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33 #ifndef VXGE_HAL_FIFO_H
34 #define VXGE_HAL_FIFO_H
39 * struct __hal_fifo_t - Fifo.
40 * @channel: Channel "base" of this fifo, the common part of all HAL
42 * @mempool: Memory pool, from which descriptors get allocated.
43 * @config: Fifo configuration, part of device configuration
44 * (see vxge_hal_device_config_t {}).
45 * @interrupt_type: Interrupt type to be used
46 * @no_snoop_bits: See vxge_hal_fifo_config_t {}.
47 * @memblock_size: Fifo descriptors are allocated in blocks of @mem_block_size
48 * bytes. Setting @memblock_size to page size ensures
49 * by-page allocation of descriptors. 128K bytes is the
50 * maximum supported block size.
51 * @txdl_per_memblock: Number of TxDLs (TxD lists) per memblock.
52 * on TxDL please refer to X3100 UG.
53 * @txdl_size: Configured TxDL size (i.e., number of TxDs in a list), plus
54 * per-TxDL HAL private space (__hal_fifo_txdl_priv_t).
55 * @txdl_priv_size: Per-TxDL space reserved for HAL and ULD
56 * @per_txdl_space: Per txdl private space for the ULD
57 * @txdlblock_priv_size: Total private space per TXDL memory block
58 * @align_size: Cache alignment size
59 * @callback: Fifo completion callback. HAL invokes the callback when there
60 * are new completions on that fifo. In many implementations
61 * the @callback executes in the hw interrupt context.
62 * @txdl_init: Fifo's descriptor-initialize callback.
63 * See vxge_hal_fifo_txdl_init_f {}.
64 * If not NULL, HAL invokes the callback when opening
65 * the fifo via vxge_hal_vpath_open().
66 * @txdl_term: Fifo's descriptor-terminate callback. If not NULL,
67 * HAL invokes the callback when closing the corresponding fifo.
68 * See also vxge_hal_fifo_txdl_term_f {}.
69 * @stats: Statistics of this fifo
72 * Note: The structure is cache line aligned.
74 typedef struct __hal_fifo_t {
75 __hal_channel_t channel;
76 vxge_hal_mempool_t *mempool;
77 vxge_hal_fifo_config_t *config;
81 u32 txdl_per_memblock;
85 u32 txdlblock_priv_size;
87 vxge_hal_fifo_callback_f callback;
88 vxge_hal_fifo_txdl_init_f txdl_init;
89 vxge_hal_fifo_txdl_term_f txdl_term;
90 vxge_hal_vpath_stats_sw_fifo_info_t *stats;
91 } __vxge_os_attr_cacheline_aligned __hal_fifo_t;
94 * struct __hal_fifo_txdl_priv_t - Transmit descriptor HAL-private data.
95 * @dma_addr: DMA (mapped) address of _this_ descriptor.
96 * @dma_handle: DMA handle used to map the descriptor onto device.
97 * @dma_offset: Descriptor's offset in the memory block. HAL allocates
98 * descriptors in memory blocks (see vxge_hal_fifo_config_t {})
99 * Each memblock is a contiguous block of DMA-able memory.
100 * @frags: Total number of fragments (that is, contiguous data buffers)
101 * carried by this TxDL.
102 * @align_vaddr_start: Aligned virtual address start
103 * @align_vaddr: Virtual address of the per-TxDL area in memory used for
104 * alignement. Used to place one or more mis-aligned fragments
105 * (the maximum defined by configration variable
106 * @max_aligned_frags).
107 * @align_dma_addr: DMA address translated from the @align_vaddr.
108 * @align_dma_handle: DMA handle that corresponds to @align_dma_addr.
109 * @align_dma_acch: DMA access handle corresponds to @align_dma_addr.
110 * @align_dma_offset: The current offset into the @align_vaddr area.
111 * Grows while filling the descriptor, gets reset.
112 * @align_used_frags: Number of fragments used.
113 * @alloc_frags: Total number of fragments allocated.
114 * @dang_frags: Number of fragments kept from release until this TxDL is freed.
120 * @dang_txdlh: Pointer to TxDL (list) kept from release until this TxDL
122 * @linked_txdl_priv: Pointer to any linked TxDL for creating contiguous
124 * @txdlh: Corresponding txdlh to this TxDL.
125 * @memblock: Pointer to the TxDL memory block or memory page.
126 * on the next send operation.
127 * @dma_object: DMA address and handle of the memory block that contains
128 * the descriptor. This member is used only in the "checked"
129 * version of the HAL (to enforce certain assertions);
130 * otherwise it gets compiled out.
131 * @allocated: True if the descriptor is reserved, 0 otherwise. Internal usage.
133 * Per-transmit decsriptor HAL-private data. HAL uses the space to keep DMA
134 * information associated with the descriptor. Note that ULD can ask HAL
135 * to allocate additional per-descriptor space for its own (ULD-specific)
138 * See also: vxge_hal_ring_rxd_priv_t {}.
140 typedef struct __hal_fifo_txdl_priv_t {
142 pci_dma_h dma_handle;
143 ptrdiff_t dma_offset;
145 u8 *align_vaddr_start;
147 dma_addr_t align_dma_addr;
148 pci_dma_h align_dma_handle;
149 pci_dma_acc_h align_dma_acch;
150 ptrdiff_t align_dma_offset;
151 u32 align_used_frags;
156 vxge_hal_fifo_txd_t *dang_txdl;
157 struct __hal_fifo_txdl_priv_t *next_txdl_priv;
158 vxge_hal_fifo_txd_t *first_txdp;
160 #if defined(VXGE_DEBUG_ASSERT)
161 vxge_hal_mempool_dma_t *dma_object;
163 #if defined(VXGE_OS_MEMORY_CHECK)
166 } __hal_fifo_txdl_priv_t;
168 #define VXGE_HAL_FIFO_ULD_PRIV(fifo, txdh) \
169 fifo->channel.dtr_arr[ \
170 ((vxge_hal_fifo_txd_t *)(txdh))->host_control].uld_priv
172 #define VXGE_HAL_FIFO_HAL_PRIV(fifo, txdh) \
173 ((__hal_fifo_txdl_priv_t *)(fifo->channel.dtr_arr[ \
174 ((vxge_hal_fifo_txd_t *)(txdh))->host_control].hal_priv))
176 #define VXGE_HAL_FIFO_MAX_FRAG_CNT(fifo) fifo->config->max_frags
178 #define VXGE_HAL_FIFO_TXDL_INDEX(txdp) \
179 (u32)((vxge_hal_fifo_txd_t *)txdp)->host_control
181 /* ========================= FIFO PRIVATE API ============================= */
185 vxge_hal_vpath_h vpath_handle,
186 vxge_hal_fifo_attr_t *attr);
190 vxge_hal_fifo_h fifoh,
191 vxge_hal_reopen_e reopen);
195 vxge_hal_fifo_h ringh);
199 vxge_hal_vpath_h vpath_handle);
202 __hal_fifo_txdl_free_many(
204 vxge_hal_fifo_txd_t *txdp,
208 #if defined(VXGE_HAL_ALIGN_XMIT)
210 __hal_fifo_txdl_align_free_unmap(
212 vxge_hal_fifo_txd_t *txdp);
215 __hal_fifo_txdl_align_alloc_map(
217 vxge_hal_fifo_txd_t *txdp);
223 #endif /* VXGE_HAL_FIFO_H */