2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #define CONFIG_PCI_MSI
35 #include <linux/types.h>
37 #include <sys/param.h>
39 #include <sys/pciio.h>
41 #include <dev/pci/pcivar.h>
42 #include <dev/pci/pcireg.h>
43 #include <dev/pci/pci_private.h>
45 #include <machine/resource.h>
47 #include <linux/list.h>
48 #include <linux/dmapool.h>
49 #include <linux/dma-mapping.h>
50 #include <linux/compiler.h>
51 #include <linux/errno.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 struct pci_device_id {
61 uintptr_t driver_data;
64 #define MODULE_DEVICE_TABLE(bus, table)
65 #define PCI_ANY_ID (-1)
66 #define PCI_VENDOR_ID_MELLANOX 0x15b3
67 #define PCI_VENDOR_ID_TOPSPIN 0x1867
68 #define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
69 #define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46
70 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278
71 #define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282
72 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
73 #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
75 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
76 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
77 #define PCI_FUNC(devfn) ((devfn) & 0x07)
79 #define PCI_VDEVICE(_vendor, _device) \
80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \
81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
82 #define PCI_DEVICE(_vendor, _device) \
83 .vendor = (_vendor), .device = (_device), \
84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
86 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
88 #define PCI_VENDOR_ID PCIR_DEVVENDOR
89 #define PCI_COMMAND PCIR_COMMAND
90 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */
91 #define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */
92 #define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */
93 #define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */
94 #define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */
95 #define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */
96 #define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */
97 #define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */
98 #define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */
99 #define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */
100 #define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */
101 #define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */
102 #define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */
103 #define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */
104 #define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */
105 #define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */
106 #define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */
107 #define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */
108 #define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */
109 #define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */
110 #define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */
111 #define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */
112 #define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */
113 #define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */
114 #define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */
115 #define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */
118 #define IORESOURCE_MEM SYS_RES_MEMORY
119 #define IORESOURCE_IO SYS_RES_IOPORT
120 #define IORESOURCE_IRQ SYS_RES_IRQ
126 struct list_head links;
128 const struct pci_device_id *id_table;
129 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);
130 void (*remove)(struct pci_dev *dev);
131 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
132 int (*resume) (struct pci_dev *dev); /* Device woken up */
135 const struct pci_error_handlers *err_handler;
138 extern struct list_head pci_drivers;
139 extern struct list_head pci_devices;
140 extern spinlock_t pci_lock;
142 #define __devexit_p(x) x
146 struct list_head links;
147 struct pci_driver *pdrv;
156 static inline struct resource_list_entry *
157 _pci_get_rle(struct pci_dev *pdev, int type, int rid)
159 struct pci_devinfo *dinfo;
160 struct resource_list *rl;
162 dinfo = device_get_ivars(pdev->dev.bsddev);
163 rl = &dinfo->resources;
164 return resource_list_find(rl, type, rid);
167 static inline struct resource_list_entry *
168 _pci_get_bar(struct pci_dev *pdev, int bar)
170 struct resource_list_entry *rle;
173 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL)
174 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar);
178 static inline struct device *
179 _pci_find_irq_dev(unsigned int irq)
181 struct pci_dev *pdev;
183 spin_lock(&pci_lock);
184 list_for_each_entry(pdev, &pci_devices, links) {
185 if (irq == pdev->dev.irq)
187 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max)
190 spin_unlock(&pci_lock);
196 static inline unsigned long
197 pci_resource_start(struct pci_dev *pdev, int bar)
199 struct resource_list_entry *rle;
201 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
206 static inline unsigned long
207 pci_resource_len(struct pci_dev *pdev, int bar)
209 struct resource_list_entry *rle;
211 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
217 * All drivers just seem to want to inspect the type not flags.
220 pci_resource_flags(struct pci_dev *pdev, int bar)
222 struct resource_list_entry *rle;
224 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
229 static inline const char *
230 pci_name(struct pci_dev *d)
233 return device_get_desc(d->dev.bsddev);
237 pci_get_drvdata(struct pci_dev *pdev)
240 return dev_get_drvdata(&pdev->dev);
244 pci_set_drvdata(struct pci_dev *pdev, void *data)
247 dev_set_drvdata(&pdev->dev, data);
251 pci_enable_device(struct pci_dev *pdev)
254 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT);
255 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY);
260 pci_disable_device(struct pci_dev *pdev)
265 pci_set_master(struct pci_dev *pdev)
268 pci_enable_busmaster(pdev->dev.bsddev);
273 pci_clear_master(struct pci_dev *pdev)
276 pci_disable_busmaster(pdev->dev.bsddev);
281 pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)
286 type = pci_resource_flags(pdev, bar);
290 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid,
297 pci_release_region(struct pci_dev *pdev, int bar)
299 struct resource_list_entry *rle;
301 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
303 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res);
307 pci_release_regions(struct pci_dev *pdev)
311 for (i = 0; i <= PCIR_MAX_BAR_0; i++)
312 pci_release_region(pdev, i);
316 pci_request_regions(struct pci_dev *pdev, const char *res_name)
321 for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
322 error = pci_request_region(pdev, i, res_name);
323 if (error && error != -ENODEV) {
324 pci_release_regions(pdev);
332 pci_disable_msix(struct pci_dev *pdev)
335 pci_release_msi(pdev->dev.bsddev);
338 #define PCI_CAP_ID_EXP PCIY_EXPRESS
339 #define PCI_CAP_ID_PCIX PCIY_PCIX
343 pci_find_capability(struct pci_dev *pdev, int capid)
347 if (pci_find_cap(pdev->dev.bsddev, capid, ®))
356 * pci_pcie_cap - get the saved PCIe capability offset
359 * PCIe capability offset is calculated at PCI device initialization
360 * time and saved in the data structure. This function returns saved
361 * PCIe capability offset. Using this instead of pci_find_capability()
362 * reduces unnecessary search in the PCI configuration space. If you
363 * need to calculate PCIe capability offset from raw device for some
364 * reasons, please use pci_find_capability() instead.
366 static inline int pci_pcie_cap(struct pci_dev *dev)
368 return pci_find_capability(dev, PCI_CAP_ID_EXP);
373 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val)
376 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
381 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)
384 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
389 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val)
392 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
397 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)
400 pci_write_config(pdev->dev.bsddev, where, val, 1);
405 pci_write_config_word(struct pci_dev *pdev, int where, u16 val)
408 pci_write_config(pdev->dev.bsddev, where, val, 2);
413 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
416 pci_write_config(pdev->dev.bsddev, where, val, 4);
420 static struct pci_driver *
421 linux_pci_find(device_t dev, const struct pci_device_id **idp)
423 const struct pci_device_id *id;
424 struct pci_driver *pdrv;
428 vendor = pci_get_vendor(dev);
429 device = pci_get_device(dev);
431 spin_lock(&pci_lock);
432 list_for_each_entry(pdrv, &pci_drivers, links) {
433 for (id = pdrv->id_table; id->vendor != 0; id++) {
434 if (vendor == id->vendor && device == id->device) {
436 spin_unlock(&pci_lock);
441 spin_unlock(&pci_lock);
446 linux_pci_probe(device_t dev)
448 const struct pci_device_id *id;
449 struct pci_driver *pdrv;
451 if ((pdrv = linux_pci_find(dev, &id)) == NULL)
453 if (device_get_driver(dev) != &pdrv->driver)
455 device_set_desc(dev, pdrv->name);
460 linux_pci_attach(device_t dev)
462 struct resource_list_entry *rle;
463 struct pci_dev *pdev;
464 struct pci_driver *pdrv;
465 const struct pci_device_id *id;
468 pdrv = linux_pci_find(dev, &id);
469 pdev = device_get_softc(dev);
470 pdev->dev.parent = &linux_rootdev;
471 pdev->dev.bsddev = dev;
472 INIT_LIST_HEAD(&pdev->dev.irqents);
473 pdev->device = id->device;
474 pdev->vendor = id->vendor;
475 pdev->dev.dma_mask = &pdev->dma_mask;
477 kobject_init(&pdev->dev.kobj, &dev_ktype);
478 kobject_set_name(&pdev->dev.kobj, device_get_nameunit(dev));
479 kobject_add(&pdev->dev.kobj, &linux_rootdev.kobj,
480 kobject_name(&pdev->dev.kobj));
481 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 0);
483 pdev->dev.irq = rle->start;
486 pdev->irq = pdev->dev.irq;
488 spin_lock(&pci_lock);
489 list_add(&pdev->links, &pci_devices);
490 spin_unlock(&pci_lock);
491 error = pdrv->probe(pdev, id);
494 spin_lock(&pci_lock);
495 list_del(&pdev->links);
496 spin_unlock(&pci_lock);
497 put_device(&pdev->dev);
504 linux_pci_detach(device_t dev)
506 struct pci_dev *pdev;
508 pdev = device_get_softc(dev);
510 pdev->pdrv->remove(pdev);
512 spin_lock(&pci_lock);
513 list_del(&pdev->links);
514 spin_unlock(&pci_lock);
515 put_device(&pdev->dev);
520 static device_method_t pci_methods[] = {
521 DEVMETHOD(device_probe, linux_pci_probe),
522 DEVMETHOD(device_attach, linux_pci_attach),
523 DEVMETHOD(device_detach, linux_pci_detach),
528 pci_register_driver(struct pci_driver *pdrv)
533 spin_lock(&pci_lock);
534 list_add(&pdrv->links, &pci_drivers);
535 spin_unlock(&pci_lock);
536 bus = devclass_find("pci");
537 pdrv->driver.name = pdrv->name;
538 pdrv->driver.methods = pci_methods;
539 pdrv->driver.size = sizeof(struct pci_dev);
541 error = devclass_add_driver(bus, &pdrv->driver, BUS_PASS_DEFAULT,
550 pci_unregister_driver(struct pci_driver *pdrv)
554 list_del(&pdrv->links);
555 bus = devclass_find("pci");
557 devclass_delete_driver(bus, &pdrv->driver);
567 * Enable msix, positive errors indicate actual number of available
568 * vectors. Negative errors are failures.
570 * NB: define added to prevent this definition of pci_enable_msix from
571 * clashing with the native FreeBSD version.
573 #define pci_enable_msix linux_pci_enable_msix
575 pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq)
577 struct resource_list_entry *rle;
582 avail = pci_msix_count(pdev->dev.bsddev);
589 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0)
592 * Handle case where "pci_alloc_msix()" may allocate less
593 * interrupts than available and return with no error:
596 pci_release_msi(pdev->dev.bsddev);
599 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1);
600 pdev->dev.msix = rle->start;
601 pdev->dev.msix_max = rle->start + avail;
602 for (i = 0; i < nreq; i++)
603 entries[i].vector = pdev->dev.msix + i;
607 #define pci_enable_msix_range linux_pci_enable_msix_range
609 pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
610 int minvec, int maxvec)
619 rc = pci_enable_msix(dev, entries, nvec);
631 static inline int pci_channel_offline(struct pci_dev *pdev)
636 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
640 static inline void pci_disable_sriov(struct pci_dev *dev)
645 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
646 * @_table: device table name
648 * This macro is used to create a struct pci_device_id array (a device table)
649 * in a generic manner.
651 #define DEFINE_PCI_DEVICE_TABLE(_table) \
652 const struct pci_device_id _table[] __devinitdata
655 /* XXX This should not be necessary. */
656 #define pcix_set_mmrbc(d, v) 0
657 #define pcix_get_max_mmrbc(d) 0
658 #define pcie_set_readrq(d, v) 0
660 #define PCI_DMA_BIDIRECTIONAL 0
661 #define PCI_DMA_TODEVICE 1
662 #define PCI_DMA_FROMDEVICE 2
663 #define PCI_DMA_NONE 3
665 #define pci_pool dma_pool
666 #define pci_pool_destroy dma_pool_destroy
667 #define pci_pool_alloc dma_pool_alloc
668 #define pci_pool_free dma_pool_free
669 #define pci_pool_create(_name, _pdev, _size, _align, _alloc) \
670 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc)
671 #define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \
672 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
673 _size, _vaddr, _dma_handle)
674 #define pci_map_sg(_hwdev, _sg, _nents, _dir) \
675 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \
676 _sg, _nents, (enum dma_data_direction)_dir)
677 #define pci_map_single(_hwdev, _ptr, _size, _dir) \
678 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \
679 (_ptr), (_size), (enum dma_data_direction)_dir)
680 #define pci_unmap_single(_hwdev, _addr, _size, _dir) \
681 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
682 _addr, _size, (enum dma_data_direction)_dir)
683 #define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \
684 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
685 _sg, _nents, (enum dma_data_direction)_dir)
686 #define pci_map_page(_hwdev, _page, _offset, _size, _dir) \
687 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\
688 _offset, _size, (enum dma_data_direction)_dir)
689 #define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \
690 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
691 _dma_address, _size, (enum dma_data_direction)_dir)
692 #define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask))
693 #define pci_dma_mapping_error(_pdev, _dma_addr) \
694 dma_mapping_error(&(_pdev)->dev, _dma_addr)
695 #define pci_set_consistent_dma_mask(_pdev, _mask) \
696 dma_set_coherent_mask(&(_pdev)->dev, (_mask))
697 #define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x);
698 #define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x);
699 #define pci_unmap_addr dma_unmap_addr
700 #define pci_unmap_addr_set dma_unmap_addr_set
701 #define pci_unmap_len dma_unmap_len
702 #define pci_unmap_len_set dma_unmap_len_set
704 typedef unsigned int __bitwise pci_channel_state_t;
705 typedef unsigned int __bitwise pci_ers_result_t;
707 enum pci_channel_state {
708 /* I/O channel is in normal state */
709 pci_channel_io_normal = (__force pci_channel_state_t) 1,
711 /* I/O to channel is blocked */
712 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
714 /* PCI card is dead */
715 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
718 enum pci_ers_result {
719 /* no result/none/not supported in device driver */
720 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
722 /* Device driver can recover without slot reset */
723 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
725 /* Device driver wants slot to be reset. */
726 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
728 /* Device has completely failed, is unrecoverable */
729 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
731 /* Device driver is fully recovered and operational */
732 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
736 /* PCI bus error event callbacks */
737 struct pci_error_handlers {
738 /* PCI bus error detected on this device */
739 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
740 enum pci_channel_state error);
742 /* MMIO has been re-enabled, but not DMA */
743 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
745 /* PCI Express link has been reset */
746 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
748 /* PCI slot has been reset */
749 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
751 /* Device driver may resume normal operations */
752 void (*resume)(struct pci_dev *dev);
755 /* freeBSD does not support SRIOV - yet */
756 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
761 static inline bool pci_is_pcie(struct pci_dev *dev)
763 return !!pci_pcie_cap(dev);
766 static inline u16 pcie_flags_reg(struct pci_dev *dev)
771 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
775 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16);
781 static inline int pci_pcie_type(struct pci_dev *dev)
783 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
786 static inline int pcie_cap_version(struct pci_dev *dev)
788 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS;
791 static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev)
793 int type = pci_pcie_type(dev);
795 return pcie_cap_version(dev) > 1 ||
796 type == PCI_EXP_TYPE_ROOT_PORT ||
797 type == PCI_EXP_TYPE_ENDPOINT ||
798 type == PCI_EXP_TYPE_LEG_END;
801 static inline bool pcie_cap_has_devctl(const struct pci_dev *dev)
806 static inline bool pcie_cap_has_sltctl(struct pci_dev *dev)
808 int type = pci_pcie_type(dev);
810 return pcie_cap_version(dev) > 1 ||
811 type == PCI_EXP_TYPE_ROOT_PORT ||
812 (type == PCI_EXP_TYPE_DOWNSTREAM &&
813 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT);
816 static inline bool pcie_cap_has_rtctl(struct pci_dev *dev)
818 int type = pci_pcie_type(dev);
820 return pcie_cap_version(dev) > 1 ||
821 type == PCI_EXP_TYPE_ROOT_PORT ||
822 type == PCI_EXP_TYPE_RC_EC;
825 static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
827 if (!pci_is_pcie(dev))
831 case PCI_EXP_FLAGS_TYPE:
836 return pcie_cap_has_devctl(dev);
840 return pcie_cap_has_lnkctl(dev);
844 return pcie_cap_has_sltctl(dev);
848 return pcie_cap_has_rtctl(dev);
849 case PCI_EXP_DEVCAP2:
850 case PCI_EXP_DEVCTL2:
851 case PCI_EXP_LNKCAP2:
852 case PCI_EXP_LNKCTL2:
853 case PCI_EXP_LNKSTA2:
854 return pcie_cap_version(dev) > 1;
861 static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
866 if (!pcie_capability_reg_implemented(dev, pos))
869 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
873 #endif /* _LINUX_PCI_H_ */