2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Machine dependent interrupt code for x86. For x86, we have to
31 * deal with different PICs. Thus, we use the passed in vector to lookup
32 * an interrupt source associated with that vector. The interrupt source
33 * describes which PIC the source belongs to and includes methods to handle
37 #include "opt_atpic.h"
40 #include <sys/param.h>
42 #include <sys/interrupt.h>
44 #include <sys/kernel.h>
46 #include <sys/mutex.h>
49 #include <sys/syslog.h>
50 #include <sys/systm.h>
51 #include <machine/clock.h>
52 #include <machine/intr_machdep.h>
53 #include <machine/smp.h>
59 #include <machine/segments.h>
60 #include <machine/frame.h>
61 #include <dev/ic/i8259.h>
62 #include <x86/isa/icu.h>
64 #include <pc98/cbus/cbus.h>
66 #include <x86/isa/isa.h>
70 #define MAX_STRAY_LOG 5
72 typedef void (*mask_fn)(void *);
74 static int intrcnt_index;
75 static struct intsrc *interrupt_sources[NUM_IO_INTS];
76 static struct mtx intr_table_lock;
77 static struct mtx intrcnt_lock;
78 static TAILQ_HEAD(pics_head, pic) pics;
81 static int assign_cpu;
84 u_long intrcnt[INTRCNT_COUNT];
85 char intrnames[INTRCNT_COUNT * (MAXCOMLEN + 1)];
86 size_t sintrcnt = sizeof(intrcnt);
87 size_t sintrnames = sizeof(intrnames);
89 static int intr_assign_cpu(void *arg, u_char cpu);
90 static void intr_disable_src(void *arg);
91 static void intr_init(void *__dummy);
92 static int intr_pic_registered(struct pic *pic);
93 static void intrcnt_setname(const char *name, int index);
94 static void intrcnt_updatename(struct intsrc *is);
95 static void intrcnt_register(struct intsrc *is);
98 intr_pic_registered(struct pic *pic)
102 TAILQ_FOREACH(p, &pics, pics) {
110 * Register a new interrupt controller (PIC). This is to support suspend
111 * and resume where we suspend/resume controllers rather than individual
112 * sources. This also allows controllers with no active sources (such as
113 * 8259As in a system using the APICs) to participate in suspend and resume.
116 intr_register_pic(struct pic *pic)
120 mtx_lock(&intr_table_lock);
121 if (intr_pic_registered(pic))
124 TAILQ_INSERT_TAIL(&pics, pic, pics);
127 mtx_unlock(&intr_table_lock);
132 * Register a new interrupt source with the global interrupt system.
133 * The global interrupts need to be disabled when this function is
137 intr_register_source(struct intsrc *isrc)
141 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
142 vector = isrc->is_pic->pic_vector(isrc);
143 if (interrupt_sources[vector] != NULL)
145 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
146 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
147 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
151 mtx_lock(&intr_table_lock);
152 if (interrupt_sources[vector] != NULL) {
153 mtx_unlock(&intr_table_lock);
154 intr_event_destroy(isrc->is_event);
157 intrcnt_register(isrc);
158 interrupt_sources[vector] = isrc;
159 isrc->is_handlers = 0;
160 mtx_unlock(&intr_table_lock);
165 intr_lookup_source(int vector)
168 return (interrupt_sources[vector]);
172 intr_add_handler(const char *name, int vector, driver_filter_t filter,
173 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
178 isrc = intr_lookup_source(vector);
181 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
182 arg, intr_priority(flags), flags, cookiep);
184 mtx_lock(&intr_table_lock);
185 intrcnt_updatename(isrc);
187 if (isrc->is_handlers == 1) {
188 isrc->is_pic->pic_enable_intr(isrc);
189 isrc->is_pic->pic_enable_source(isrc);
191 mtx_unlock(&intr_table_lock);
197 intr_remove_handler(void *cookie)
200 int error, mtx_owned;
202 isrc = intr_handler_source(cookie);
203 error = intr_event_remove_handler(cookie);
206 * Recursion is needed here so PICs can remove interrupts
207 * while resuming. It was previously not possible due to
208 * intr_resume holding the intr_table_lock and
209 * intr_remove_handler recursing on it.
211 mtx_owned = mtx_owned(&intr_table_lock);
213 mtx_lock(&intr_table_lock);
215 if (isrc->is_handlers == 0) {
216 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
217 isrc->is_pic->pic_disable_intr(isrc);
219 intrcnt_updatename(isrc);
221 mtx_unlock(&intr_table_lock);
227 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
231 isrc = intr_lookup_source(vector);
234 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
238 intr_disable_src(void *arg)
243 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
247 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
249 struct intr_event *ie;
253 * We count software interrupts when we process them. The
254 * code here follows previous practice, but there's an
255 * argument for counting hardware interrupts when they're
259 PCPU_INC(cnt.v_intr);
264 * XXX: We assume that IRQ 0 is only used for the ISA timer
267 vector = isrc->is_pic->pic_vector(isrc);
272 * For stray interrupts, mask and EOI the source, bump the
273 * stray count, and log the condition.
275 if (intr_event_handle(ie, frame) != 0) {
276 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
277 (*isrc->is_straycount)++;
278 if (*isrc->is_straycount < MAX_STRAY_LOG)
279 log(LOG_ERR, "stray irq%d\n", vector);
280 else if (*isrc->is_straycount == MAX_STRAY_LOG)
282 "too many stray irq %d's: not logging anymore\n",
288 intr_resume(bool suspend_cancelled)
295 mtx_lock(&intr_table_lock);
296 TAILQ_FOREACH(pic, &pics, pics) {
297 if (pic->pic_resume != NULL)
298 pic->pic_resume(pic, suspend_cancelled);
300 mtx_unlock(&intr_table_lock);
308 mtx_lock(&intr_table_lock);
309 TAILQ_FOREACH_REVERSE(pic, &pics, pics_head, pics) {
310 if (pic->pic_suspend != NULL)
311 pic->pic_suspend(pic);
313 mtx_unlock(&intr_table_lock);
317 intr_assign_cpu(void *arg, u_char cpu)
324 * Don't do anything during early boot. We will pick up the
325 * assignment once the APs are started.
327 if (assign_cpu && cpu != NOCPU) {
329 mtx_lock(&intr_table_lock);
330 error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
331 mtx_unlock(&intr_table_lock);
341 intrcnt_setname(const char *name, int index)
344 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
349 intrcnt_updatename(struct intsrc *is)
352 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
356 intrcnt_register(struct intsrc *is)
358 char straystr[MAXCOMLEN + 1];
360 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
361 mtx_lock_spin(&intrcnt_lock);
362 is->is_index = intrcnt_index;
364 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
365 is->is_pic->pic_vector(is));
366 intrcnt_updatename(is);
367 is->is_count = &intrcnt[is->is_index];
368 intrcnt_setname(straystr, is->is_index + 1);
369 is->is_straycount = &intrcnt[is->is_index + 1];
370 mtx_unlock_spin(&intrcnt_lock);
374 intrcnt_add(const char *name, u_long **countp)
377 mtx_lock_spin(&intrcnt_lock);
378 *countp = &intrcnt[intrcnt_index];
379 intrcnt_setname(name, intrcnt_index);
381 mtx_unlock_spin(&intrcnt_lock);
385 intr_init(void *dummy __unused)
388 intrcnt_setname("???", 0);
391 mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF);
392 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
394 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
397 /* Initialize the two 8259A's to a known-good shutdown state. */
402 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
403 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
404 outb(IO_ICU1 + ICU_IMR_OFFSET, IRQ_MASK(ICU_SLAVEID));
405 outb(IO_ICU1 + ICU_IMR_OFFSET, MASTER_MODE);
406 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
407 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
409 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
410 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
411 outb(IO_ICU2 + ICU_IMR_OFFSET, ICU_SLAVEID);
412 outb(IO_ICU2 + ICU_IMR_OFFSET, SLAVE_MODE);
413 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
414 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
418 /* Add a description to an active interrupt handler. */
420 intr_describe(u_int vector, void *ih, const char *descr)
425 isrc = intr_lookup_source(vector);
428 error = intr_event_describe_handler(isrc->is_event, ih, descr);
431 intrcnt_updatename(isrc);
437 * Dump data about interrupt handlers
439 DB_SHOW_COMMAND(irqs, db_show_irqs)
441 struct intsrc **isrc;
444 if (strcmp(modif, "v") == 0)
448 isrc = interrupt_sources;
449 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
451 db_dump_intr_event((*isrc)->is_event, verbose);
457 * Support for balancing interrupt sources across CPUs. For now we just
458 * allocate CPUs round-robin.
461 static cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1);
462 static int current_cpu;
465 * Return the CPU that the next interrupt source should use. For now
466 * this just returns the next local APIC according to round-robin.
473 /* Leave all interrupts on the BSP during boot. */
475 return (PCPU_GET(apic_id));
477 mtx_lock_spin(&icu_lock);
478 apic_id = cpu_apic_ids[current_cpu];
481 if (current_cpu > mp_maxid)
483 } while (!CPU_ISSET(current_cpu, &intr_cpus));
484 mtx_unlock_spin(&icu_lock);
488 /* Attempt to bind the specified IRQ to the specified CPU. */
490 intr_bind(u_int vector, u_char cpu)
494 isrc = intr_lookup_source(vector);
497 return (intr_event_bind(isrc->is_event, cpu));
501 * Add a CPU to our mask of valid CPUs that can be destinations of
505 intr_add_cpu(u_int cpu)
509 panic("%s: Invalid CPU ID", __func__);
511 printf("INTR: Adding local APIC %d as a target\n",
514 CPU_SET(cpu, &intr_cpus);
518 * Distribute all the interrupt sources among the available CPUs once the
519 * AP's have been launched.
522 intr_shuffle_irqs(void *arg __unused)
534 /* Don't bother on UP. */
538 /* Does not work properly on Hyper-V. */
539 if (vm_guest == VM_GUEST_HV)
541 /* Round-robin assign a CPU to each enabled source. */
542 mtx_lock(&intr_table_lock);
544 for (i = 0; i < NUM_IO_INTS; i++) {
545 isrc = interrupt_sources[i];
546 if (isrc != NULL && isrc->is_handlers > 0) {
548 * If this event is already bound to a CPU,
549 * then assign the source to that CPU instead
550 * of picking one via round-robin. Note that
551 * this is careful to only advance the
552 * round-robin if the CPU assignment succeeds.
554 if (isrc->is_event->ie_cpu != NOCPU)
555 (void)isrc->is_pic->pic_assign_cpu(isrc,
556 cpu_apic_ids[isrc->is_event->ie_cpu]);
557 else if (isrc->is_pic->pic_assign_cpu(isrc,
558 cpu_apic_ids[current_cpu]) == 0)
559 (void)intr_next_cpu();
563 mtx_unlock(&intr_table_lock);
565 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
569 * Always route interrupts to the current processor in the UP case.
575 return (PCPU_GET(apic_id));