2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
5 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
32 * The EHCI 0.96 spec can be found at
33 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
34 * The EHCI 1.0 spec can be found at
35 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
36 * and the USB 2.0 spec at
37 * http://www.usb.org/developers/docs/usb_20.zip
43 * 1) command failures are not recovered correctly
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
49 #include <sys/stdint.h>
50 #include <sys/stddef.h>
51 #include <sys/param.h>
52 #include <sys/queue.h>
53 #include <sys/types.h>
54 #include <sys/systm.h>
55 #include <sys/kernel.h>
57 #include <sys/linker_set.h>
58 #include <sys/module.h>
60 #include <sys/mutex.h>
61 #include <sys/condvar.h>
62 #include <sys/sysctl.h>
64 #include <sys/unistd.h>
65 #include <sys/callout.h>
66 #include <sys/malloc.h>
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
72 #define USB_DEBUG_VAR ehcidebug
74 #include <dev/usb/usb_core.h>
75 #include <dev/usb/usb_debug.h>
76 #include <dev/usb/usb_busdma.h>
77 #include <dev/usb/usb_process.h>
78 #include <dev/usb/usb_transfer.h>
79 #include <dev/usb/usb_device.h>
80 #include <dev/usb/usb_hub.h>
81 #include <dev/usb/usb_util.h>
83 #include <dev/usb/usb_controller.h>
84 #include <dev/usb/usb_bus.h>
85 #include <dev/usb/controller/ehci.h>
87 #define EHCI_BUS2SC(bus) \
88 ((ehci_softc_t *)(((uint8_t *)(bus)) - \
89 ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
92 static int ehcidebug = 0;
93 static int ehcinohighspeed = 0;
95 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
96 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
97 &ehcidebug, 0, "Debug level");
98 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW,
99 &ehcinohighspeed, 0, "Disable High Speed USB");
101 static void ehci_dump_regs(ehci_softc_t *sc);
102 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
106 #define EHCI_INTR_ENDPT 1
108 extern struct usb_bus_methods ehci_bus_methods;
109 extern struct usb_pipe_methods ehci_device_bulk_methods;
110 extern struct usb_pipe_methods ehci_device_ctrl_methods;
111 extern struct usb_pipe_methods ehci_device_intr_methods;
112 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
113 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
115 static void ehci_do_poll(struct usb_bus *bus);
116 static void ehci_device_done(struct usb_xfer *xfer, usb_error_t error);
117 static uint8_t ehci_check_transfer(struct usb_xfer *xfer);
118 static void ehci_timeout(void *arg);
119 static void ehci_root_intr(ehci_softc_t *sc);
121 struct ehci_std_temp {
123 struct usb_page_cache *pc;
129 uint16_t max_frame_size;
131 uint8_t auto_data_toggle;
132 uint8_t setup_alt_next;
134 uint8_t can_use_next;
138 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
140 ehci_softc_t *sc = EHCI_BUS2SC(bus);
143 cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
144 sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
146 cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
147 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
149 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
150 cb(bus, sc->sc_hw.intr_start_pc + i,
151 sc->sc_hw.intr_start_pg + i,
152 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
155 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
156 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
157 sc->sc_hw.isoc_hs_start_pg + i,
158 sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
161 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
162 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
163 sc->sc_hw.isoc_fs_start_pg + i,
164 sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
169 ehci_reset(ehci_softc_t *sc)
174 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
175 for (i = 0; i < 100; i++) {
176 usb_pause_mtx(NULL, hz / 1000);
177 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
179 if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
181 * Force USBMODE as requested. Controllers
182 * may have multiple operating modes.
184 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
185 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
186 usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
187 device_printf(sc->sc_bus.bdev,
188 "set host controller mode\n");
190 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
191 usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
192 device_printf(sc->sc_bus.bdev,
193 "set big-endian mode\n");
195 EOWRITE4(sc, EHCI_USBMODE, usbmode);
200 device_printf(sc->sc_bus.bdev, "reset timeout\n");
201 return (USB_ERR_IOERROR);
205 ehci_hcreset(ehci_softc_t *sc)
210 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
211 for (i = 0; i < 100; i++) {
212 usb_pause_mtx(NULL, hz / 1000);
213 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
219 * Fall through and try reset anyway even though
220 * Table 2-9 in the EHCI spec says this will result
221 * in undefined behavior.
223 device_printf(sc->sc_bus.bdev, "stop timeout\n");
225 return ehci_reset(sc);
229 ehci_init(ehci_softc_t *sc)
231 struct usb_page_search buf_res;
244 usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
252 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
254 version = EREAD2(sc, EHCI_HCIVERSION);
255 device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
256 version >> 8, version & 0xff);
258 sparams = EREAD4(sc, EHCI_HCSPARAMS);
259 DPRINTF("sparams=0x%x\n", sparams);
261 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
262 cparams = EREAD4(sc, EHCI_HCCPARAMS);
263 DPRINTF("cparams=0x%x\n", cparams);
265 if (EHCI_HCC_64BIT(cparams)) {
266 DPRINTF("HCC uses 64-bit structures\n");
268 /* MUST clear segment register if 64 bit capable */
269 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
271 sc->sc_bus.usbrev = USB_REV_2_0;
273 /* Reset the controller */
274 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
276 err = ehci_hcreset(sc);
278 device_printf(sc->sc_bus.bdev, "reset timeout\n");
282 * use current frame-list-size selection 0: 1024*4 bytes 1: 512*4
283 * bytes 2: 256*4 bytes 3: unknown
285 if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
286 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
287 return (USB_ERR_IOERROR);
289 /* set up the bus struct */
290 sc->sc_bus.methods = &ehci_bus_methods;
292 sc->sc_eintrs = EHCI_NORMAL_INTRS;
294 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
297 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
301 /* initialize page cache pointer */
303 qh->page_cache = sc->sc_hw.intr_start_pc + i;
305 /* store a pointer to queue head */
307 sc->sc_intr_p_last[i] = qh;
310 htohc32(sc, buf_res.physaddr) |
311 htohc32(sc, EHCI_LINK_QH);
314 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
316 htohc32(sc, EHCI_QH_SET_MULT(1));
319 qh->qh_qtd.qtd_next =
320 htohc32(sc, EHCI_LINK_TERMINATE);
321 qh->qh_qtd.qtd_altnext =
322 htohc32(sc, EHCI_LINK_TERMINATE);
323 qh->qh_qtd.qtd_status =
324 htohc32(sc, EHCI_QTD_HALTED);
328 * the QHs are arranged to give poll intervals that are
329 * powers of 2 times 1ms
331 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
338 y = (x ^ bit) | (bit / 2);
340 qh_x = sc->sc_intr_p_last[x];
341 qh_y = sc->sc_intr_p_last[y];
344 * the next QH has half the poll interval
346 qh_x->qh_link = qh_y->qh_self;
356 qh = sc->sc_intr_p_last[0];
358 /* the last (1ms) QH terminates */
359 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
361 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
365 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
367 sitd = buf_res.buffer;
369 /* initialize page cache pointer */
371 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
373 /* store a pointer to the transfer descriptor */
375 sc->sc_isoc_fs_p_last[i] = sitd;
377 /* initialize full speed isochronous */
380 htohc32(sc, buf_res.physaddr) |
381 htohc32(sc, EHCI_LINK_SITD);
384 htohc32(sc, EHCI_LINK_TERMINATE);
387 sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
390 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
392 itd = buf_res.buffer;
394 /* initialize page cache pointer */
396 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
398 /* store a pointer to the transfer descriptor */
400 sc->sc_isoc_hs_p_last[i] = itd;
402 /* initialize high speed isochronous */
405 htohc32(sc, buf_res.physaddr) |
406 htohc32(sc, EHCI_LINK_ITD);
412 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
417 pframes = buf_res.buffer;
421 * pframes -> high speed isochronous ->
422 * full speed isochronous -> interrupt QH's
424 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
425 pframes[i] = sc->sc_isoc_hs_p_last
426 [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
429 /* setup sync list pointer */
430 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
432 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
440 /* initialize page cache pointer */
442 qh->page_cache = &sc->sc_hw.async_start_pc;
444 /* store a pointer to the queue head */
446 sc->sc_async_p_last = qh;
448 /* init dummy QH that starts the async list */
451 htohc32(sc, buf_res.physaddr) |
452 htohc32(sc, EHCI_LINK_QH);
456 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
457 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
458 qh->qh_link = qh->qh_self;
461 /* fill the overlay qTD */
462 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
463 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
464 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
466 /* flush all cache into memory */
468 usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
472 ehci_dump_sqh(sc, sc->sc_async_p_last);
476 /* setup async list pointer */
477 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
480 /* enable interrupts */
481 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
483 /* turn on controller */
484 EOWRITE4(sc, EHCI_USBCMD,
485 EHCI_CMD_ITC_1 | /* 1 microframes interrupt delay */
486 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
491 /* Take over port ownership */
492 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
494 for (i = 0; i < 100; i++) {
495 usb_pause_mtx(NULL, hz / 1000);
496 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
502 device_printf(sc->sc_bus.bdev, "run timeout\n");
503 return (USB_ERR_IOERROR);
507 /* catch any lost interrupts */
508 ehci_do_poll(&sc->sc_bus);
514 * shut down the controller when the system is going down
517 ehci_detach(ehci_softc_t *sc)
519 USB_BUS_LOCK(&sc->sc_bus);
521 usb_callout_stop(&sc->sc_tmo_pcd);
523 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
524 USB_BUS_UNLOCK(&sc->sc_bus);
526 if (ehci_hcreset(sc)) {
527 DPRINTF("reset failed!\n");
530 /* XXX let stray task complete */
531 usb_pause_mtx(NULL, hz / 20);
533 usb_callout_drain(&sc->sc_tmo_pcd);
537 ehci_suspend(ehci_softc_t *sc)
543 USB_BUS_LOCK(&sc->sc_bus);
545 for (i = 1; i <= sc->sc_noport; i++) {
546 cmd = EOREAD4(sc, EHCI_PORTSC(i));
547 if (((cmd & EHCI_PS_PO) == 0) &&
548 ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
549 EOWRITE4(sc, EHCI_PORTSC(i),
554 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
556 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
557 EOWRITE4(sc, EHCI_USBCMD, cmd);
559 for (i = 0; i < 100; i++) {
560 hcr = EOREAD4(sc, EHCI_USBSTS) &
561 (EHCI_STS_ASS | EHCI_STS_PSS);
566 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
570 device_printf(sc->sc_bus.bdev, "reset timeout\n");
573 EOWRITE4(sc, EHCI_USBCMD, cmd);
575 for (i = 0; i < 100; i++) {
576 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
577 if (hcr == EHCI_STS_HCH) {
580 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
583 if (hcr != EHCI_STS_HCH) {
584 device_printf(sc->sc_bus.bdev,
587 USB_BUS_UNLOCK(&sc->sc_bus);
591 ehci_resume(ehci_softc_t *sc)
593 struct usb_page_search buf_res;
598 USB_BUS_LOCK(&sc->sc_bus);
600 /* restore things in case the bios doesn't */
601 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
603 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
604 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
606 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
607 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
609 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
612 for (i = 1; i <= sc->sc_noport; i++) {
613 cmd = EOREAD4(sc, EHCI_PORTSC(i));
614 if (((cmd & EHCI_PS_PO) == 0) &&
615 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
616 EOWRITE4(sc, EHCI_PORTSC(i),
623 usb_pause_mtx(&sc->sc_bus.bus_mtx,
624 USB_MS_TO_TICKS(USB_RESUME_WAIT));
626 for (i = 1; i <= sc->sc_noport; i++) {
627 cmd = EOREAD4(sc, EHCI_PORTSC(i));
628 if (((cmd & EHCI_PS_PO) == 0) &&
629 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
630 EOWRITE4(sc, EHCI_PORTSC(i),
635 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
637 for (i = 0; i < 100; i++) {
638 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
639 if (hcr != EHCI_STS_HCH) {
642 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
644 if (hcr == EHCI_STS_HCH) {
645 device_printf(sc->sc_bus.bdev, "config timeout\n");
648 USB_BUS_UNLOCK(&sc->sc_bus);
651 USB_MS_TO_TICKS(USB_RESUME_WAIT));
653 /* catch any lost interrupts */
654 ehci_do_poll(&sc->sc_bus);
658 ehci_shutdown(ehci_softc_t *sc)
660 DPRINTF("stopping the HC\n");
662 if (ehci_hcreset(sc)) {
663 DPRINTF("reset failed!\n");
669 ehci_dump_regs(ehci_softc_t *sc)
673 i = EOREAD4(sc, EHCI_USBCMD);
674 printf("cmd=0x%08x\n", i);
676 if (i & EHCI_CMD_ITC_1)
677 printf(" EHCI_CMD_ITC_1\n");
678 if (i & EHCI_CMD_ITC_2)
679 printf(" EHCI_CMD_ITC_2\n");
680 if (i & EHCI_CMD_ITC_4)
681 printf(" EHCI_CMD_ITC_4\n");
682 if (i & EHCI_CMD_ITC_8)
683 printf(" EHCI_CMD_ITC_8\n");
684 if (i & EHCI_CMD_ITC_16)
685 printf(" EHCI_CMD_ITC_16\n");
686 if (i & EHCI_CMD_ITC_32)
687 printf(" EHCI_CMD_ITC_32\n");
688 if (i & EHCI_CMD_ITC_64)
689 printf(" EHCI_CMD_ITC_64\n");
690 if (i & EHCI_CMD_ASPME)
691 printf(" EHCI_CMD_ASPME\n");
692 if (i & EHCI_CMD_ASPMC)
693 printf(" EHCI_CMD_ASPMC\n");
694 if (i & EHCI_CMD_LHCR)
695 printf(" EHCI_CMD_LHCR\n");
696 if (i & EHCI_CMD_IAAD)
697 printf(" EHCI_CMD_IAAD\n");
698 if (i & EHCI_CMD_ASE)
699 printf(" EHCI_CMD_ASE\n");
700 if (i & EHCI_CMD_PSE)
701 printf(" EHCI_CMD_PSE\n");
702 if (i & EHCI_CMD_FLS_M)
703 printf(" EHCI_CMD_FLS_M\n");
704 if (i & EHCI_CMD_HCRESET)
705 printf(" EHCI_CMD_HCRESET\n");
707 printf(" EHCI_CMD_RS\n");
709 i = EOREAD4(sc, EHCI_USBSTS);
711 printf("sts=0x%08x\n", i);
713 if (i & EHCI_STS_ASS)
714 printf(" EHCI_STS_ASS\n");
715 if (i & EHCI_STS_PSS)
716 printf(" EHCI_STS_PSS\n");
717 if (i & EHCI_STS_REC)
718 printf(" EHCI_STS_REC\n");
719 if (i & EHCI_STS_HCH)
720 printf(" EHCI_STS_HCH\n");
721 if (i & EHCI_STS_IAA)
722 printf(" EHCI_STS_IAA\n");
723 if (i & EHCI_STS_HSE)
724 printf(" EHCI_STS_HSE\n");
725 if (i & EHCI_STS_FLR)
726 printf(" EHCI_STS_FLR\n");
727 if (i & EHCI_STS_PCD)
728 printf(" EHCI_STS_PCD\n");
729 if (i & EHCI_STS_ERRINT)
730 printf(" EHCI_STS_ERRINT\n");
731 if (i & EHCI_STS_INT)
732 printf(" EHCI_STS_INT\n");
734 printf("ien=0x%08x\n",
735 EOREAD4(sc, EHCI_USBINTR));
736 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
737 EOREAD4(sc, EHCI_FRINDEX),
738 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
739 EOREAD4(sc, EHCI_PERIODICLISTBASE),
740 EOREAD4(sc, EHCI_ASYNCLISTADDR));
741 for (i = 1; i <= sc->sc_noport; i++) {
742 printf("port %d status=0x%08x\n", i,
743 EOREAD4(sc, EHCI_PORTSC(i)));
748 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
750 link = hc32toh(sc, link);
751 printf("0x%08x", link);
752 if (link & EHCI_LINK_TERMINATE)
757 switch (EHCI_LINK_TYPE(link)) {
777 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
782 ehci_dump_link(sc, qtd->qtd_next, 0);
784 ehci_dump_link(sc, qtd->qtd_altnext, 0);
786 s = hc32toh(sc, qtd->qtd_status);
787 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
788 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
789 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
790 printf(" cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
791 EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
792 (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
793 (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
794 (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
795 (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
796 (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
797 (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
798 (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
799 (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
801 for (s = 0; s < 5; s++) {
802 printf(" buffer[%d]=0x%08x\n", s,
803 hc32toh(sc, qtd->qtd_buffer[s]));
805 for (s = 0; s < 5; s++) {
806 printf(" buffer_hi[%d]=0x%08x\n", s,
807 hc32toh(sc, qtd->qtd_buffer_hi[s]));
812 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
816 usb_pc_cpu_invalidate(sqtd->page_cache);
817 printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
818 ehci_dump_qtd(sc, sqtd);
819 temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
824 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
830 for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
831 stop = ehci_dump_sqtd(sc, sqtd);
834 printf("dump aborted, too many TDs\n");
839 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
844 usb_pc_cpu_invalidate(qh->page_cache);
845 printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
847 ehci_dump_link(sc, qh->qh_link, 1);
849 endp = hc32toh(sc, qh->qh_endp);
850 printf(" endp=0x%08x\n", endp);
851 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
852 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
853 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
854 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
855 printf(" mpl=0x%x ctl=%d nrl=%d\n",
856 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
857 EHCI_QH_GET_NRL(endp));
858 endphub = hc32toh(sc, qh->qh_endphub);
859 printf(" endphub=0x%08x\n", endphub);
860 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
861 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
862 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
863 EHCI_QH_GET_MULT(endphub));
865 ehci_dump_link(sc, qh->qh_curqtd, 0);
867 printf("Overlay qTD:\n");
868 ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
872 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
874 usb_pc_cpu_invalidate(sitd->page_cache);
875 printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
876 printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
877 printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
878 hc32toh(sc, sitd->sitd_portaddr),
879 (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
881 EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
882 EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
883 EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
884 EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
885 printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
886 printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
887 (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
888 EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
889 printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
890 hc32toh(sc, sitd->sitd_back),
891 hc32toh(sc, sitd->sitd_bp[0]),
892 hc32toh(sc, sitd->sitd_bp[1]),
893 hc32toh(sc, sitd->sitd_bp_hi[0]),
894 hc32toh(sc, sitd->sitd_bp_hi[1]));
898 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
900 usb_pc_cpu_invalidate(itd->page_cache);
901 printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
902 printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
903 printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
904 (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
905 printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
906 (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
907 printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
908 (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
909 printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
910 (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
911 printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
912 (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
913 printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
914 (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
915 printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
916 (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
917 printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
918 (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
919 printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
920 printf(" addr=0x%02x; endpt=0x%01x\n",
921 EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
922 EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
923 printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
924 printf(" dir=%s; mpl=0x%02x\n",
925 (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
926 EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
927 printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
928 hc32toh(sc, itd->itd_bp[2]),
929 hc32toh(sc, itd->itd_bp[3]),
930 hc32toh(sc, itd->itd_bp[4]),
931 hc32toh(sc, itd->itd_bp[5]),
932 hc32toh(sc, itd->itd_bp[6]));
933 printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
934 " 0x%08x,0x%08x,0x%08x\n",
935 hc32toh(sc, itd->itd_bp_hi[0]),
936 hc32toh(sc, itd->itd_bp_hi[1]),
937 hc32toh(sc, itd->itd_bp_hi[2]),
938 hc32toh(sc, itd->itd_bp_hi[3]),
939 hc32toh(sc, itd->itd_bp_hi[4]),
940 hc32toh(sc, itd->itd_bp_hi[5]),
941 hc32toh(sc, itd->itd_bp_hi[6]));
945 ehci_dump_isoc(ehci_softc_t *sc)
952 pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
953 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
955 printf("%s: isochronous dump from frame 0x%03x:\n",
958 itd = sc->sc_isoc_hs_p_last[pos];
959 sitd = sc->sc_isoc_fs_p_last[pos];
961 while (itd && max && max--) {
962 ehci_dump_itd(sc, itd);
966 while (sitd && max && max--) {
967 ehci_dump_sitd(sc, sitd);
975 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
977 /* check for early completion */
978 if (ehci_check_transfer(xfer)) {
981 /* put transfer on interrupt queue */
982 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
984 /* start timeout, if any */
985 if (xfer->timeout != 0) {
986 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
990 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
992 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
994 DPRINTFN(11, "%p to %p\n", std, last);
996 /* (sc->sc_bus.mtx) must be locked */
998 std->next = last->next;
999 std->sitd_next = last->sitd_next;
1003 usb_pc_cpu_flush(std->page_cache);
1006 * the last->next->prev is never followed: std->next->prev = std;
1009 last->sitd_next = std->sitd_self;
1011 usb_pc_cpu_flush(last->page_cache);
1016 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
1018 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1020 DPRINTFN(11, "%p to %p\n", std, last);
1022 /* (sc->sc_bus.mtx) must be locked */
1024 std->next = last->next;
1025 std->itd_next = last->itd_next;
1029 usb_pc_cpu_flush(std->page_cache);
1032 * the last->next->prev is never followed: std->next->prev = std;
1035 last->itd_next = std->itd_self;
1037 usb_pc_cpu_flush(last->page_cache);
1042 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
1044 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1046 DPRINTFN(11, "%p to %p\n", sqh, last);
1048 if (sqh->prev != NULL) {
1049 /* should not happen */
1050 DPRINTFN(0, "QH already linked!\n");
1053 /* (sc->sc_bus.mtx) must be locked */
1055 sqh->next = last->next;
1056 sqh->qh_link = last->qh_link;
1060 usb_pc_cpu_flush(sqh->page_cache);
1063 * the last->next->prev is never followed: sqh->next->prev = sqh;
1067 last->qh_link = sqh->qh_self;
1069 usb_pc_cpu_flush(last->page_cache);
1074 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1075 static ehci_sitd_t *
1076 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1078 DPRINTFN(11, "%p from %p\n", std, last);
1080 /* (sc->sc_bus.mtx) must be locked */
1082 std->prev->next = std->next;
1083 std->prev->sitd_next = std->sitd_next;
1085 usb_pc_cpu_flush(std->prev->page_cache);
1088 std->next->prev = std->prev;
1089 usb_pc_cpu_flush(std->next->page_cache);
1091 return ((last == std) ? std->prev : last);
1094 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1096 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1098 DPRINTFN(11, "%p from %p\n", std, last);
1100 /* (sc->sc_bus.mtx) must be locked */
1102 std->prev->next = std->next;
1103 std->prev->itd_next = std->itd_next;
1105 usb_pc_cpu_flush(std->prev->page_cache);
1108 std->next->prev = std->prev;
1109 usb_pc_cpu_flush(std->next->page_cache);
1111 return ((last == std) ? std->prev : last);
1114 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1116 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1118 DPRINTFN(11, "%p from %p\n", sqh, last);
1120 /* (sc->sc_bus.mtx) must be locked */
1122 /* only remove if not removed from a queue */
1125 sqh->prev->next = sqh->next;
1126 sqh->prev->qh_link = sqh->qh_link;
1128 usb_pc_cpu_flush(sqh->prev->page_cache);
1131 sqh->next->prev = sqh->prev;
1132 usb_pc_cpu_flush(sqh->next->page_cache);
1134 last = ((last == sqh) ? sqh->prev : last);
1138 usb_pc_cpu_flush(sqh->page_cache);
1144 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1146 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1148 ehci_qtd_t *td_alt_next;
1152 td = xfer->td_transfer_cache;
1153 td_alt_next = td->alt_next;
1155 if (xfer->aframes != xfer->nframes) {
1156 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1160 usb_pc_cpu_invalidate(td->page_cache);
1161 status = hc32toh(sc, td->qtd_status);
1163 len = EHCI_QTD_GET_BYTES(status);
1166 * Verify the status length and
1167 * add the length to "frlengths[]":
1169 if (len > td->len) {
1170 /* should not happen */
1171 DPRINTF("Invalid status length, "
1172 "0x%04x/0x%04x bytes\n", len, td->len);
1173 status |= EHCI_QTD_HALTED;
1174 } else if (xfer->aframes != xfer->nframes) {
1175 xfer->frlengths[xfer->aframes] += td->len - len;
1177 /* Check for last transfer */
1178 if (((void *)td) == xfer->td_transfer_last) {
1182 /* Check for transfer error */
1183 if (status & EHCI_QTD_HALTED) {
1184 /* the transfer is finished */
1188 /* Check for short transfer */
1190 if (xfer->flags_int.short_frames_ok) {
1191 /* follow alt next */
1194 /* the transfer is finished */
1201 if (td->alt_next != td_alt_next) {
1202 /* this USB frame is complete */
1207 /* update transfer cache */
1209 xfer->td_transfer_cache = td;
1212 if (status & EHCI_QTD_STATERRS) {
1213 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1214 "status=%s%s%s%s%s%s%s%s\n",
1215 xfer->address, xfer->endpointno, xfer->aframes,
1216 (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1217 (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1218 (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1219 (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1220 (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1221 (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1222 (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1223 (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1227 return ((status & EHCI_QTD_HALTED) ?
1228 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1232 ehci_non_isoc_done(struct usb_xfer *xfer)
1234 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1237 usb_error_t err = 0;
1239 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1240 xfer, xfer->endpoint);
1243 if (ehcidebug > 10) {
1244 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1246 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1250 /* extract data toggle directly from the QH's overlay area */
1252 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1254 usb_pc_cpu_invalidate(qh->page_cache);
1256 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1258 xfer->endpoint->toggle_next =
1259 (status & EHCI_QTD_TOGGLE_MASK) ? 1 : 0;
1263 xfer->td_transfer_cache = xfer->td_transfer_first;
1265 if (xfer->flags_int.control_xfr) {
1267 if (xfer->flags_int.control_hdr) {
1269 err = ehci_non_isoc_done_sub(xfer);
1273 if (xfer->td_transfer_cache == NULL) {
1277 while (xfer->aframes != xfer->nframes) {
1279 err = ehci_non_isoc_done_sub(xfer);
1282 if (xfer->td_transfer_cache == NULL) {
1287 if (xfer->flags_int.control_xfr &&
1288 !xfer->flags_int.control_act) {
1290 err = ehci_non_isoc_done_sub(xfer);
1293 ehci_device_done(xfer, err);
1296 /*------------------------------------------------------------------------*
1297 * ehci_check_transfer
1300 * 0: USB transfer is not finished
1301 * Else: USB transfer is finished
1302 *------------------------------------------------------------------------*/
1304 ehci_check_transfer(struct usb_xfer *xfer)
1306 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1307 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1311 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1313 if (methods == &ehci_device_isoc_fs_methods) {
1316 /* isochronous full speed transfer */
1318 td = xfer->td_transfer_last;
1319 usb_pc_cpu_invalidate(td->page_cache);
1320 status = hc32toh(sc, td->sitd_status);
1322 /* also check if first is complete */
1324 td = xfer->td_transfer_first;
1325 usb_pc_cpu_invalidate(td->page_cache);
1326 status |= hc32toh(sc, td->sitd_status);
1328 if (!(status & EHCI_SITD_ACTIVE)) {
1329 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1332 } else if (methods == &ehci_device_isoc_hs_methods) {
1335 /* isochronous high speed transfer */
1337 td = xfer->td_transfer_last;
1338 usb_pc_cpu_invalidate(td->page_cache);
1340 td->itd_status[0] | td->itd_status[1] |
1341 td->itd_status[2] | td->itd_status[3] |
1342 td->itd_status[4] | td->itd_status[5] |
1343 td->itd_status[6] | td->itd_status[7];
1345 /* also check first transfer */
1346 td = xfer->td_transfer_first;
1347 usb_pc_cpu_invalidate(td->page_cache);
1349 td->itd_status[0] | td->itd_status[1] |
1350 td->itd_status[2] | td->itd_status[3] |
1351 td->itd_status[4] | td->itd_status[5] |
1352 td->itd_status[6] | td->itd_status[7];
1354 /* if no transactions are active we continue */
1355 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1356 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1363 /* non-isochronous transfer */
1366 * check whether there is an error somewhere in the middle,
1367 * or whether there was a short packet (SPD and not ACTIVE)
1369 td = xfer->td_transfer_cache;
1371 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1373 usb_pc_cpu_invalidate(qh->page_cache);
1375 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1376 if (status & EHCI_QTD_ACTIVE) {
1377 /* transfer is pending */
1382 usb_pc_cpu_invalidate(td->page_cache);
1383 status = hc32toh(sc, td->qtd_status);
1386 * Check if there is an active TD which
1387 * indicates that the transfer isn't done.
1389 if (status & EHCI_QTD_ACTIVE) {
1391 if (xfer->td_transfer_cache != td) {
1392 xfer->td_transfer_cache = td;
1393 if (qh->qh_qtd.qtd_next &
1394 htohc32(sc, EHCI_LINK_TERMINATE)) {
1395 /* XXX - manually advance to next frame */
1396 qh->qh_qtd.qtd_next = td->qtd_self;
1397 usb_pc_cpu_flush(td->page_cache);
1403 * last transfer descriptor makes the transfer done
1405 if (((void *)td) == xfer->td_transfer_last) {
1409 * any kind of error makes the transfer done
1411 if (status & EHCI_QTD_HALTED) {
1415 * if there is no alternate next transfer, a short
1416 * packet also makes the transfer done
1418 if (EHCI_QTD_GET_BYTES(status)) {
1419 if (xfer->flags_int.short_frames_ok) {
1420 /* follow alt next */
1426 /* transfer is done */
1431 ehci_non_isoc_done(xfer);
1436 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1444 ehci_pcd_enable(ehci_softc_t *sc)
1446 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1448 sc->sc_eintrs |= EHCI_STS_PCD;
1449 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1451 /* acknowledge any PCD interrupt */
1452 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1458 ehci_interrupt_poll(ehci_softc_t *sc)
1460 struct usb_xfer *xfer;
1463 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1465 * check if transfer is transferred
1467 if (ehci_check_transfer(xfer)) {
1468 /* queue has been modified */
1474 /*------------------------------------------------------------------------*
1475 * ehci_interrupt - EHCI interrupt handler
1477 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1478 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1480 *------------------------------------------------------------------------*/
1482 ehci_interrupt(ehci_softc_t *sc)
1486 USB_BUS_LOCK(&sc->sc_bus);
1488 DPRINTFN(16, "real interrupt\n");
1491 if (ehcidebug > 15) {
1496 status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1498 /* the interrupt was not for us */
1501 if (!(status & sc->sc_eintrs)) {
1504 EOWRITE4(sc, EHCI_USBSTS, status); /* acknowledge */
1506 status &= sc->sc_eintrs;
1508 if (status & EHCI_STS_HSE) {
1509 printf("%s: unrecoverable error, "
1510 "controller halted\n", __FUNCTION__);
1516 if (status & EHCI_STS_PCD) {
1518 * Disable PCD interrupt for now, because it will be
1519 * on until the port has been reset.
1521 sc->sc_eintrs &= ~EHCI_STS_PCD;
1522 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1526 /* do not allow RHSC interrupts > 1 per second */
1527 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1528 (void *)&ehci_pcd_enable, sc);
1530 status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1533 /* block unprocessed interrupts */
1534 sc->sc_eintrs &= ~status;
1535 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1536 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1538 /* poll all the USB transfers */
1539 ehci_interrupt_poll(sc);
1542 USB_BUS_UNLOCK(&sc->sc_bus);
1546 * called when a request does not complete
1549 ehci_timeout(void *arg)
1551 struct usb_xfer *xfer = arg;
1553 DPRINTF("xfer=%p\n", xfer);
1555 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1557 /* transfer is transferred */
1558 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1562 ehci_do_poll(struct usb_bus *bus)
1564 ehci_softc_t *sc = EHCI_BUS2SC(bus);
1566 USB_BUS_LOCK(&sc->sc_bus);
1567 ehci_interrupt_poll(sc);
1568 USB_BUS_UNLOCK(&sc->sc_bus);
1572 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1574 struct usb_page_search buf_res;
1576 ehci_qtd_t *td_next;
1577 ehci_qtd_t *td_alt_next;
1578 uint32_t buf_offset;
1582 uint8_t shortpkt_old;
1585 terminate = htohc32(temp->sc, EHCI_LINK_TERMINATE);
1588 shortpkt_old = temp->shortpkt;
1589 len_old = temp->len;
1595 td_next = temp->td_next;
1599 if (temp->len == 0) {
1601 if (temp->shortpkt) {
1604 /* send a Zero Length Packet, ZLP, last */
1611 average = temp->average;
1613 if (temp->len < average) {
1614 if (temp->len % temp->max_frame_size) {
1617 average = temp->len;
1621 if (td_next == NULL) {
1622 panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1627 td_next = td->obj_next;
1629 /* check if we are pre-computing */
1633 /* update remaining length */
1635 temp->len -= average;
1639 /* fill out current TD */
1643 htohc32(temp->sc, EHCI_QTD_IOC |
1644 EHCI_QTD_SET_BYTES(average));
1648 if (temp->auto_data_toggle == 0) {
1650 /* update data toggle, ZLP case */
1653 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1657 td->qtd_buffer[0] = 0;
1658 td->qtd_buffer_hi[0] = 0;
1660 td->qtd_buffer[1] = 0;
1661 td->qtd_buffer_hi[1] = 0;
1667 if (temp->auto_data_toggle == 0) {
1669 /* update data toggle */
1671 if (((average + temp->max_frame_size - 1) /
1672 temp->max_frame_size) & 1) {
1674 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1679 /* update remaining length */
1681 temp->len -= average;
1683 /* fill out buffer pointers */
1685 usbd_get_page(temp->pc, buf_offset, &buf_res);
1687 htohc32(temp->sc, buf_res.physaddr);
1688 td->qtd_buffer_hi[0] = 0;
1692 while (average > EHCI_PAGE_SIZE) {
1693 average -= EHCI_PAGE_SIZE;
1694 buf_offset += EHCI_PAGE_SIZE;
1695 usbd_get_page(temp->pc, buf_offset, &buf_res);
1698 buf_res.physaddr & (~0xFFF));
1699 td->qtd_buffer_hi[x] = 0;
1704 * NOTE: The "average" variable is never zero after
1705 * exiting the loop above !
1707 * NOTE: We have to subtract one from the offset to
1708 * ensure that we are computing the physical address
1711 buf_offset += average;
1712 usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1715 buf_res.physaddr & (~0xFFF));
1716 td->qtd_buffer_hi[x] = 0;
1719 if (temp->can_use_next) {
1721 /* link the current TD with the next one */
1722 td->qtd_next = td_next->qtd_self;
1726 * BUG WARNING: The EHCI HW can use the
1727 * qtd_next field instead of qtd_altnext when
1728 * a short packet is received! We work this
1729 * around in software by not queueing more
1730 * than one job/TD at a time!
1732 td->qtd_next = terminate;
1735 td->qtd_altnext = terminate;
1736 td->alt_next = td_alt_next;
1738 usb_pc_cpu_flush(td->page_cache);
1744 /* setup alt next pointer, if any */
1745 if (temp->last_frame) {
1748 /* we use this field internally */
1749 td_alt_next = td_next;
1753 temp->shortpkt = shortpkt_old;
1754 temp->len = len_old;
1758 temp->td_next = td_next;
1762 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1764 struct ehci_std_temp temp;
1765 struct usb_pipe_methods *methods;
1769 uint32_t qh_endphub;
1772 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1773 xfer->address, UE_GET_ADDR(xfer->endpointno),
1774 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1776 temp.average = xfer->max_hc_frame_size;
1777 temp.max_frame_size = xfer->max_frame_size;
1778 temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1780 /* toggle the DMA set we are using */
1781 xfer->flags_int.curr_dma_set ^= 1;
1783 /* get next DMA set */
1784 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1786 xfer->td_transfer_first = td;
1787 xfer->td_transfer_cache = td;
1791 temp.qtd_status = 0;
1792 temp.last_frame = 0;
1793 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1794 temp.can_use_next = (xfer->flags_int.control_xfr ||
1795 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT));
1797 if (xfer->flags_int.control_xfr) {
1798 if (xfer->endpoint->toggle_next) {
1801 htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1803 temp.auto_data_toggle = 0;
1805 temp.auto_data_toggle = 1;
1808 if (usbd_get_speed(xfer->xroot->udev) != USB_SPEED_HIGH) {
1811 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1813 /* check if we should prepend a setup message */
1815 if (xfer->flags_int.control_xfr) {
1816 if (xfer->flags_int.control_hdr) {
1819 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1820 temp.qtd_status |= htohc32(temp.sc,
1822 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1823 EHCI_QTD_SET_TOGGLE(0));
1825 temp.len = xfer->frlengths[0];
1826 temp.pc = xfer->frbuffers + 0;
1827 temp.shortpkt = temp.len ? 1 : 0;
1828 /* check for last frame */
1829 if (xfer->nframes == 1) {
1830 /* no STATUS stage yet, SETUP is last */
1831 if (xfer->flags_int.control_act) {
1832 temp.last_frame = 1;
1833 temp.setup_alt_next = 0;
1836 ehci_setup_standard_chain_sub(&temp);
1843 while (x != xfer->nframes) {
1845 /* DATA0 / DATA1 message */
1847 temp.len = xfer->frlengths[x];
1848 temp.pc = xfer->frbuffers + x;
1852 if (x == xfer->nframes) {
1853 if (xfer->flags_int.control_xfr) {
1854 /* no STATUS stage yet, DATA is last */
1855 if (xfer->flags_int.control_act) {
1856 temp.last_frame = 1;
1857 temp.setup_alt_next = 0;
1860 temp.last_frame = 1;
1861 temp.setup_alt_next = 0;
1864 /* keep previous data toggle and error count */
1867 htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1868 EHCI_QTD_SET_TOGGLE(1));
1870 if (temp.len == 0) {
1872 /* make sure that we send an USB packet */
1878 /* regular data transfer */
1880 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1883 /* set endpoint direction */
1886 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1887 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1888 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1889 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1890 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1892 ehci_setup_standard_chain_sub(&temp);
1895 /* check if we should append a status stage */
1897 if (xfer->flags_int.control_xfr &&
1898 !xfer->flags_int.control_act) {
1901 * Send a DATA1 message and invert the current endpoint
1905 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1906 EHCI_QTD_SET_TOGGLE(1));
1908 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1909 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1910 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1911 EHCI_QTD_SET_TOGGLE(1)) :
1912 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1913 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1914 EHCI_QTD_SET_TOGGLE(1));
1919 temp.last_frame = 1;
1920 temp.setup_alt_next = 0;
1922 ehci_setup_standard_chain_sub(&temp);
1926 /* the last TD terminates the transfer: */
1927 td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1928 td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1930 usb_pc_cpu_flush(td->page_cache);
1932 /* must have at least one frame! */
1934 xfer->td_transfer_last = td;
1937 if (ehcidebug > 8) {
1938 DPRINTF("nexttog=%d; data before transfer:\n",
1939 xfer->endpoint->toggle_next);
1940 ehci_dump_sqtds(temp.sc,
1941 xfer->td_transfer_first);
1945 methods = xfer->endpoint->methods;
1947 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1949 /* the "qh_link" field is filled when the QH is added */
1952 (EHCI_QH_SET_ADDR(xfer->address) |
1953 EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1954 EHCI_QH_SET_MPL(xfer->max_packet_size));
1956 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1957 qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) |
1959 if (methods != &ehci_device_intr_methods)
1960 qh_endp |= EHCI_QH_SET_NRL(8);
1963 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1964 qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL) |
1967 qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW) |
1971 if (methods == &ehci_device_ctrl_methods) {
1972 qh_endp |= EHCI_QH_CTL;
1974 if (methods != &ehci_device_intr_methods) {
1975 /* Only try one time per microframe! */
1976 qh_endp |= EHCI_QH_SET_NRL(1);
1980 qh->qh_endp = htohc32(temp.sc, qh_endp);
1983 (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1984 EHCI_QH_SET_CMASK(xfer->usb_cmask) |
1985 EHCI_QH_SET_SMASK(xfer->usb_smask) |
1986 EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1987 EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1989 qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1990 qh->qh_curqtd = htohc32(temp.sc, 0);
1992 /* fill the overlay qTD */
1993 qh->qh_qtd.qtd_status = htohc32(temp.sc, 0);
1995 if (temp.auto_data_toggle) {
1997 /* let the hardware compute the data toggle */
1999 qh->qh_endp &= htohc32(temp.sc, ~EHCI_QH_DTC);
2001 if (xfer->endpoint->toggle_next) {
2003 qh->qh_qtd.qtd_status |=
2004 htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2007 td = xfer->td_transfer_first;
2009 qh->qh_qtd.qtd_next = td->qtd_self;
2010 qh->qh_qtd.qtd_altnext =
2011 htohc32(temp.sc, EHCI_LINK_TERMINATE);
2013 usb_pc_cpu_flush(qh->page_cache);
2015 if (xfer->xroot->udev->flags.self_suspended == 0) {
2016 EHCI_APPEND_QH(qh, *qh_last);
2021 ehci_root_intr(ehci_softc_t *sc)
2026 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2028 /* clear any old interrupt data */
2029 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2032 m = (sc->sc_noport + 1);
2033 if (m > (8 * sizeof(sc->sc_hub_idata))) {
2034 m = (8 * sizeof(sc->sc_hub_idata));
2036 for (i = 1; i < m; i++) {
2037 /* pick out CHANGE bits from the status register */
2038 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2039 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2040 DPRINTF("port %d changed\n", i);
2043 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2044 sizeof(sc->sc_hub_idata));
2048 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2050 uint32_t nframes = xfer->nframes;
2052 uint32_t *plen = xfer->frlengths;
2054 ehci_sitd_t *td = xfer->td_transfer_first;
2055 ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2057 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2058 xfer, xfer->endpoint);
2062 panic("%s:%d: out of TD's\n",
2063 __FUNCTION__, __LINE__);
2065 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2066 pp_last = &sc->sc_isoc_fs_p_last[0];
2069 if (ehcidebug > 15) {
2070 DPRINTF("isoc FS-TD\n");
2071 ehci_dump_sitd(sc, td);
2074 usb_pc_cpu_invalidate(td->page_cache);
2075 status = hc32toh(sc, td->sitd_status);
2077 len = EHCI_SITD_GET_LEN(status);
2079 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2089 /* remove FS-TD from schedule */
2090 EHCI_REMOVE_FS_TD(td, *pp_last);
2097 xfer->aframes = xfer->nframes;
2101 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2103 uint32_t nframes = xfer->nframes;
2105 uint32_t *plen = xfer->frlengths;
2108 ehci_itd_t *td = xfer->td_transfer_first;
2109 ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2111 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2112 xfer, xfer->endpoint);
2116 panic("%s:%d: out of TD's\n",
2117 __FUNCTION__, __LINE__);
2119 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2120 pp_last = &sc->sc_isoc_hs_p_last[0];
2123 if (ehcidebug > 15) {
2124 DPRINTF("isoc HS-TD\n");
2125 ehci_dump_itd(sc, td);
2129 usb_pc_cpu_invalidate(td->page_cache);
2130 status = hc32toh(sc, td->itd_status[td_no]);
2132 len = EHCI_ITD_GET_LEN(status);
2134 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2138 * The length is valid. NOTE: The complete
2139 * length is written back into the status
2140 * field, and not the remainder like with
2141 * other transfer descriptor types.
2144 /* Invalid length - truncate */
2153 if ((td_no == 8) || (nframes == 0)) {
2154 /* remove HS-TD from schedule */
2155 EHCI_REMOVE_HS_TD(td, *pp_last);
2162 xfer->aframes = xfer->nframes;
2165 /* NOTE: "done" can be run two times in a row,
2166 * from close and from interrupt
2169 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2171 struct usb_pipe_methods *methods = xfer->endpoint->methods;
2172 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2174 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2176 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2177 xfer, xfer->endpoint, error);
2179 if ((methods == &ehci_device_bulk_methods) ||
2180 (methods == &ehci_device_ctrl_methods)) {
2182 if (ehcidebug > 8) {
2183 DPRINTF("nexttog=%d; data after transfer:\n",
2184 xfer->endpoint->toggle_next);
2186 xfer->td_transfer_first);
2190 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2191 sc->sc_async_p_last);
2193 if (methods == &ehci_device_intr_methods) {
2194 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2195 sc->sc_intr_p_last[xfer->qh_pos]);
2198 * Only finish isochronous transfers once which will update
2199 * "xfer->frlengths".
2201 if (xfer->td_transfer_first &&
2202 xfer->td_transfer_last) {
2203 if (methods == &ehci_device_isoc_fs_methods) {
2204 ehci_isoc_fs_done(sc, xfer);
2206 if (methods == &ehci_device_isoc_hs_methods) {
2207 ehci_isoc_hs_done(sc, xfer);
2209 xfer->td_transfer_first = NULL;
2210 xfer->td_transfer_last = NULL;
2212 /* dequeue transfer and start next transfer */
2213 usbd_transfer_done(xfer, error);
2216 /*------------------------------------------------------------------------*
2218 *------------------------------------------------------------------------*/
2220 ehci_device_bulk_open(struct usb_xfer *xfer)
2226 ehci_device_bulk_close(struct usb_xfer *xfer)
2228 ehci_device_done(xfer, USB_ERR_CANCELLED);
2232 ehci_device_bulk_enter(struct usb_xfer *xfer)
2238 ehci_device_bulk_start(struct usb_xfer *xfer)
2240 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2243 /* setup TD's and QH */
2244 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2246 /* put transfer on interrupt queue */
2247 ehci_transfer_intr_enqueue(xfer);
2249 /* XXX Performance quirk: Some Host Controllers have a too low
2250 * interrupt rate. Issue an IAAD to stimulate the Host
2251 * Controller after queueing the BULK transfer.
2253 temp = EOREAD4(sc, EHCI_USBCMD);
2254 if (!(temp & EHCI_CMD_IAAD))
2255 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2258 struct usb_pipe_methods ehci_device_bulk_methods =
2260 .open = ehci_device_bulk_open,
2261 .close = ehci_device_bulk_close,
2262 .enter = ehci_device_bulk_enter,
2263 .start = ehci_device_bulk_start,
2266 /*------------------------------------------------------------------------*
2267 * ehci control support
2268 *------------------------------------------------------------------------*/
2270 ehci_device_ctrl_open(struct usb_xfer *xfer)
2276 ehci_device_ctrl_close(struct usb_xfer *xfer)
2278 ehci_device_done(xfer, USB_ERR_CANCELLED);
2282 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2288 ehci_device_ctrl_start(struct usb_xfer *xfer)
2290 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2292 /* setup TD's and QH */
2293 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2295 /* put transfer on interrupt queue */
2296 ehci_transfer_intr_enqueue(xfer);
2299 struct usb_pipe_methods ehci_device_ctrl_methods =
2301 .open = ehci_device_ctrl_open,
2302 .close = ehci_device_ctrl_close,
2303 .enter = ehci_device_ctrl_enter,
2304 .start = ehci_device_ctrl_start,
2307 /*------------------------------------------------------------------------*
2308 * ehci interrupt support
2309 *------------------------------------------------------------------------*/
2311 ehci_device_intr_open(struct usb_xfer *xfer)
2313 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2319 /* Allocate a microframe slot first: */
2321 slot = usb_intr_schedule_adjust
2322 (xfer->xroot->udev, xfer->max_frame_size, USB_HS_MICRO_FRAMES_MAX);
2324 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
2325 xfer->usb_uframe = slot;
2326 xfer->usb_smask = (1 << slot) & 0xFF;
2327 xfer->usb_cmask = 0;
2329 xfer->usb_uframe = slot;
2330 xfer->usb_smask = (1 << slot) & 0x3F;
2331 xfer->usb_cmask = (-(4 << slot)) & 0xFE;
2335 * Find the best QH position corresponding to the given interval:
2339 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2341 if (xfer->interval >= bit) {
2345 if (sc->sc_intr_stat[x] <
2346 sc->sc_intr_stat[best]) {
2356 sc->sc_intr_stat[best]++;
2357 xfer->qh_pos = best;
2359 DPRINTFN(3, "best=%d interval=%d\n",
2360 best, xfer->interval);
2364 ehci_device_intr_close(struct usb_xfer *xfer)
2366 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2369 slot = usb_intr_schedule_adjust
2370 (xfer->xroot->udev, -(xfer->max_frame_size), xfer->usb_uframe);
2372 sc->sc_intr_stat[xfer->qh_pos]--;
2374 ehci_device_done(xfer, USB_ERR_CANCELLED);
2378 ehci_device_intr_enter(struct usb_xfer *xfer)
2384 ehci_device_intr_start(struct usb_xfer *xfer)
2386 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2388 /* setup TD's and QH */
2389 ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2391 /* put transfer on interrupt queue */
2392 ehci_transfer_intr_enqueue(xfer);
2395 struct usb_pipe_methods ehci_device_intr_methods =
2397 .open = ehci_device_intr_open,
2398 .close = ehci_device_intr_close,
2399 .enter = ehci_device_intr_enter,
2400 .start = ehci_device_intr_start,
2403 /*------------------------------------------------------------------------*
2404 * ehci full speed isochronous support
2405 *------------------------------------------------------------------------*/
2407 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2409 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2411 uint32_t sitd_portaddr;
2415 EHCI_SITD_SET_ADDR(xfer->address) |
2416 EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2417 EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2418 EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2420 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2421 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2423 sitd_portaddr = htohc32(sc, sitd_portaddr);
2425 /* initialize all TD's */
2427 for (ds = 0; ds != 2; ds++) {
2429 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2431 td->sitd_portaddr = sitd_portaddr;
2434 * TODO: make some kind of automatic
2435 * SMASK/CMASK selection based on micro-frame
2438 * micro-frame usage (8 microframes per 1ms)
2440 td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2442 usb_pc_cpu_flush(td->page_cache);
2448 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2450 ehci_device_done(xfer, USB_ERR_CANCELLED);
2454 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2456 struct usb_page_search buf_res;
2457 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2458 struct usb_fs_isoc_schedule *fss_start;
2459 struct usb_fs_isoc_schedule *fss_end;
2460 struct usb_fs_isoc_schedule *fss;
2462 ehci_sitd_t *td_last = NULL;
2463 ehci_sitd_t **pp_last;
2465 uint32_t buf_offset;
2479 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2480 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2482 /* get the current frame index */
2484 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2487 * check if the frame index is within the window where the frames
2490 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2491 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2493 if ((xfer->endpoint->is_synced == 0) ||
2494 (buf_offset < xfer->nframes)) {
2496 * If there is data underflow or the pipe queue is empty we
2497 * schedule the transfer a few frames ahead of the current
2498 * frame position. Else two isochronous transfers might
2501 xfer->endpoint->isoc_next = (nframes + 3) &
2502 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2503 xfer->endpoint->is_synced = 1;
2504 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2507 * compute how many milliseconds the insertion is ahead of the
2508 * current frame position:
2510 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2511 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2514 * pre-compute when the isochronous transfer will be finished:
2516 xfer->isoc_time_complete =
2517 usbd_fs_isoc_schedule_isoc_time_expand
2518 (xfer->xroot->udev, &fss_start, &fss_end, nframes) + buf_offset +
2521 /* get the real number of frames */
2523 nframes = xfer->nframes;
2527 plen = xfer->frlengths;
2529 /* toggle the DMA set we are using */
2530 xfer->flags_int.curr_dma_set ^= 1;
2532 /* get next DMA set */
2533 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2534 xfer->td_transfer_first = td;
2536 pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2538 /* store starting position */
2540 xfer->qh_pos = xfer->endpoint->isoc_next;
2542 fss = fss_start + (xfer->qh_pos % USB_ISOC_TIME_MAX);
2546 panic("%s:%d: out of TD's\n",
2547 __FUNCTION__, __LINE__);
2549 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2550 pp_last = &sc->sc_isoc_fs_p_last[0];
2552 if (fss >= fss_end) {
2555 /* reuse sitd_portaddr and sitd_back from last transfer */
2557 if (*plen > xfer->max_frame_size) {
2561 printf("%s: frame length(%d) exceeds %d "
2562 "bytes (frame truncated)\n",
2563 __FUNCTION__, *plen,
2564 xfer->max_frame_size);
2567 *plen = xfer->max_frame_size;
2570 * We currently don't care if the ISOCHRONOUS schedule is
2573 error = usbd_fs_isoc_schedule_alloc(fss, &sa, *plen);
2576 * The FULL speed schedule is FULL! Set length
2583 * only call "usbd_get_page()" when we have a
2586 usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2587 td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2588 buf_offset += *plen;
2590 * NOTE: We need to subtract one from the offset so
2591 * that we are on a valid page!
2593 usbd_get_page(xfer->frbuffers, buf_offset - 1,
2595 temp = buf_res.physaddr & ~0xFFF;
2601 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2604 temp |= 1; /* T-count = 1, TP = ALL */
2609 temp |= tlen; /* T-count = [1..6] */
2610 temp |= 8; /* TP = Begin */
2622 sa = (sb - sa) & 0x3F;
2625 sb = (-(4 << sa)) & 0xFE;
2626 sa = (1 << sa) & 0x3F;
2629 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2630 EHCI_SITD_SET_CMASK(sb));
2632 td->sitd_bp[1] = htohc32(sc, temp);
2634 td->sitd_mask = htohc32(sc, sitd_mask);
2637 td->sitd_status = htohc32(sc,
2640 EHCI_SITD_SET_LEN(*plen));
2642 td->sitd_status = htohc32(sc,
2644 EHCI_SITD_SET_LEN(*plen));
2646 usb_pc_cpu_flush(td->page_cache);
2649 if (ehcidebug > 15) {
2650 DPRINTF("FS-TD %d\n", nframes);
2651 ehci_dump_sitd(sc, td);
2654 /* insert TD into schedule */
2655 EHCI_APPEND_FS_TD(td, *pp_last);
2664 xfer->td_transfer_last = td_last;
2666 /* update isoc_next */
2667 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2668 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2672 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2674 /* put transfer on interrupt queue */
2675 ehci_transfer_intr_enqueue(xfer);
2678 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2680 .open = ehci_device_isoc_fs_open,
2681 .close = ehci_device_isoc_fs_close,
2682 .enter = ehci_device_isoc_fs_enter,
2683 .start = ehci_device_isoc_fs_start,
2686 /*------------------------------------------------------------------------*
2687 * ehci high speed isochronous support
2688 *------------------------------------------------------------------------*/
2690 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2692 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2697 /* initialize all TD's */
2699 for (ds = 0; ds != 2; ds++) {
2701 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2703 /* set TD inactive */
2704 td->itd_status[0] = 0;
2705 td->itd_status[1] = 0;
2706 td->itd_status[2] = 0;
2707 td->itd_status[3] = 0;
2708 td->itd_status[4] = 0;
2709 td->itd_status[5] = 0;
2710 td->itd_status[6] = 0;
2711 td->itd_status[7] = 0;
2713 /* set endpoint and address */
2714 td->itd_bp[0] = htohc32(sc,
2715 EHCI_ITD_SET_ADDR(xfer->address) |
2716 EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2719 EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2722 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2723 temp |= EHCI_ITD_SET_DIR_IN;
2725 /* set maximum packet size */
2726 td->itd_bp[1] = htohc32(sc, temp);
2728 /* set transfer multiplier */
2729 td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2731 usb_pc_cpu_flush(td->page_cache);
2737 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2739 ehci_device_done(xfer, USB_ERR_CANCELLED);
2743 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2745 struct usb_page_search buf_res;
2746 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2748 ehci_itd_t *td_last = NULL;
2749 ehci_itd_t **pp_last;
2750 bus_size_t page_addr;
2753 uint32_t buf_offset;
2755 uint32_t itd_offset[8 + 1];
2765 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2766 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2768 /* get the current frame index */
2770 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2773 * check if the frame index is within the window where the frames
2776 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2777 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2779 if ((xfer->endpoint->is_synced == 0) ||
2780 (buf_offset < ((xfer->nframes + 7) / 8))) {
2782 * If there is data underflow or the pipe queue is empty we
2783 * schedule the transfer a few frames ahead of the current
2784 * frame position. Else two isochronous transfers might
2787 xfer->endpoint->isoc_next = (nframes + 3) &
2788 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2789 xfer->endpoint->is_synced = 1;
2790 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2793 * compute how many milliseconds the insertion is ahead of the
2794 * current frame position:
2796 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2797 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2800 * pre-compute when the isochronous transfer will be finished:
2802 xfer->isoc_time_complete =
2803 usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2804 ((xfer->nframes + 7) / 8);
2806 /* get the real number of frames */
2808 nframes = xfer->nframes;
2813 plen = xfer->frlengths;
2815 /* toggle the DMA set we are using */
2816 xfer->flags_int.curr_dma_set ^= 1;
2818 /* get next DMA set */
2819 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2820 xfer->td_transfer_first = td;
2822 pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2824 /* store starting position */
2826 xfer->qh_pos = xfer->endpoint->isoc_next;
2830 panic("%s:%d: out of TD's\n",
2831 __FUNCTION__, __LINE__);
2833 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2834 pp_last = &sc->sc_isoc_hs_p_last[0];
2837 if (*plen > xfer->max_frame_size) {
2841 printf("%s: frame length(%d) exceeds %d bytes "
2842 "(frame truncated)\n",
2843 __FUNCTION__, *plen, xfer->max_frame_size);
2846 *plen = xfer->max_frame_size;
2848 status = (EHCI_ITD_SET_LEN(*plen) |
2850 EHCI_ITD_SET_PG(0));
2851 td->itd_status[td_no] = htohc32(sc, status);
2852 itd_offset[td_no] = buf_offset;
2853 buf_offset += *plen;
2857 if ((td_no == 8) || (nframes == 0)) {
2859 /* the rest of the transfers are not active, if any */
2860 for (x = td_no; x != 8; x++) {
2861 td->itd_status[x] = 0; /* not active */
2864 /* check if there is any data to be transferred */
2865 if (itd_offset[0] != buf_offset) {
2867 itd_offset[td_no] = buf_offset;
2869 /* get first page offset */
2870 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2871 /* get page address */
2872 page_addr = buf_res.physaddr & ~0xFFF;
2873 /* update page address */
2874 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2875 td->itd_bp[0] |= htohc32(sc, page_addr);
2877 for (x = 0; x != td_no; x++) {
2878 /* set page number and page offset */
2879 status = (EHCI_ITD_SET_PG(page_no) |
2880 (buf_res.physaddr & 0xFFF));
2881 td->itd_status[x] |= htohc32(sc, status);
2883 /* get next page offset */
2884 if (itd_offset[x + 1] == buf_offset) {
2886 * We subtract one so that
2887 * we don't go off the last
2890 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2892 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2895 /* check if we need a new page */
2896 if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2897 /* new page needed */
2898 page_addr = buf_res.physaddr & ~0xFFF;
2900 panic("%s: too many pages\n", __FUNCTION__);
2903 /* update page address */
2904 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2905 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2909 /* set IOC bit if we are complete */
2911 td->itd_status[7] |= htohc32(sc, EHCI_ITD_IOC);
2913 usb_pc_cpu_flush(td->page_cache);
2915 if (ehcidebug > 15) {
2916 DPRINTF("HS-TD %d\n", nframes);
2917 ehci_dump_itd(sc, td);
2920 /* insert TD into schedule */
2921 EHCI_APPEND_HS_TD(td, *pp_last);
2930 xfer->td_transfer_last = td_last;
2932 /* update isoc_next */
2933 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2934 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2938 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2940 /* put transfer on interrupt queue */
2941 ehci_transfer_intr_enqueue(xfer);
2944 struct usb_pipe_methods ehci_device_isoc_hs_methods =
2946 .open = ehci_device_isoc_hs_open,
2947 .close = ehci_device_isoc_hs_close,
2948 .enter = ehci_device_isoc_hs_enter,
2949 .start = ehci_device_isoc_hs_start,
2952 /*------------------------------------------------------------------------*
2953 * ehci root control support
2954 *------------------------------------------------------------------------*
2955 * Simulate a hardware hub by handling all the necessary requests.
2956 *------------------------------------------------------------------------*/
2959 struct usb_device_descriptor ehci_devd =
2961 sizeof(struct usb_device_descriptor),
2962 UDESC_DEVICE, /* type */
2963 {0x00, 0x02}, /* USB version */
2964 UDCLASS_HUB, /* class */
2965 UDSUBCLASS_HUB, /* subclass */
2966 UDPROTO_HSHUBSTT, /* protocol */
2967 64, /* max packet */
2968 {0}, {0}, {0x00, 0x01}, /* device id */
2969 1, 2, 0, /* string indicies */
2970 1 /* # of configurations */
2974 struct usb_device_qualifier ehci_odevd =
2976 sizeof(struct usb_device_qualifier),
2977 UDESC_DEVICE_QUALIFIER, /* type */
2978 {0x00, 0x02}, /* USB version */
2979 UDCLASS_HUB, /* class */
2980 UDSUBCLASS_HUB, /* subclass */
2981 UDPROTO_FSHUB, /* protocol */
2983 0, /* # of configurations */
2987 static const struct ehci_config_desc ehci_confd = {
2989 .bLength = sizeof(struct usb_config_descriptor),
2990 .bDescriptorType = UDESC_CONFIG,
2991 .wTotalLength[0] = sizeof(ehci_confd),
2993 .bConfigurationValue = 1,
2994 .iConfiguration = 0,
2995 .bmAttributes = UC_SELF_POWERED,
2996 .bMaxPower = 0 /* max power */
2999 .bLength = sizeof(struct usb_interface_descriptor),
3000 .bDescriptorType = UDESC_INTERFACE,
3002 .bInterfaceClass = UICLASS_HUB,
3003 .bInterfaceSubClass = UISUBCLASS_HUB,
3004 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
3008 .bLength = sizeof(struct usb_endpoint_descriptor),
3009 .bDescriptorType = UDESC_ENDPOINT,
3010 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3011 .bmAttributes = UE_INTERRUPT,
3012 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3018 struct usb_hub_descriptor ehci_hubd =
3020 0, /* dynamic length */
3030 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3035 DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3037 port = EHCI_PORTSC(index);
3038 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3039 EOWRITE4(sc, port, v | EHCI_PS_PO);
3043 ehci_roothub_exec(struct usb_device *udev,
3044 struct usb_device_request *req, const void **pptr, uint16_t *plength)
3046 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3047 const char *str_ptr;
3058 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3061 ptr = (const void *)&sc->sc_hub_desc;
3065 value = UGETW(req->wValue);
3066 index = UGETW(req->wIndex);
3068 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3069 "wValue=0x%04x wIndex=0x%04x\n",
3070 req->bmRequestType, req->bRequest,
3071 UGETW(req->wLength), value, index);
3073 #define C(x,y) ((x) | ((y) << 8))
3074 switch (C(req->bRequest, req->bmRequestType)) {
3075 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3076 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3077 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3079 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3080 * for the integrated root hub.
3083 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3085 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3087 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3088 switch (value >> 8) {
3090 if ((value & 0xff) != 0) {
3091 err = USB_ERR_IOERROR;
3094 len = sizeof(ehci_devd);
3095 ptr = (const void *)&ehci_devd;
3098 * We can't really operate at another speed,
3099 * but the specification says we need this
3102 case UDESC_DEVICE_QUALIFIER:
3103 if ((value & 0xff) != 0) {
3104 err = USB_ERR_IOERROR;
3107 len = sizeof(ehci_odevd);
3108 ptr = (const void *)&ehci_odevd;
3112 if ((value & 0xff) != 0) {
3113 err = USB_ERR_IOERROR;
3116 len = sizeof(ehci_confd);
3117 ptr = (const void *)&ehci_confd;
3121 switch (value & 0xff) {
3122 case 0: /* Language table */
3126 case 1: /* Vendor */
3127 str_ptr = sc->sc_vendor;
3130 case 2: /* Product */
3131 str_ptr = "EHCI root HUB";
3139 len = usb_make_str_desc(
3140 sc->sc_hub_desc.temp,
3141 sizeof(sc->sc_hub_desc.temp),
3145 err = USB_ERR_IOERROR;
3149 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3151 sc->sc_hub_desc.temp[0] = 0;
3153 case C(UR_GET_STATUS, UT_READ_DEVICE):
3155 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3157 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3158 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3160 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3162 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3163 if (value >= EHCI_MAX_DEVICES) {
3164 err = USB_ERR_IOERROR;
3167 sc->sc_addr = value;
3169 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3170 if ((value != 0) && (value != 1)) {
3171 err = USB_ERR_IOERROR;
3174 sc->sc_conf = value;
3176 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3178 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3179 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3180 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3181 err = USB_ERR_IOERROR;
3183 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3185 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3188 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3190 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3191 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3194 (index > sc->sc_noport)) {
3195 err = USB_ERR_IOERROR;
3198 port = EHCI_PORTSC(index);
3199 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3201 case UHF_PORT_ENABLE:
3202 EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3204 case UHF_PORT_SUSPEND:
3205 if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3208 * waking up a High Speed device is rather
3211 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3213 /* wait 20ms for resume sequence to complete */
3214 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3216 EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3217 EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3219 /* 4ms settle time */
3220 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3222 case UHF_PORT_POWER:
3223 EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3226 DPRINTFN(3, "clear port test "
3229 case UHF_PORT_INDICATOR:
3230 DPRINTFN(3, "clear port ind "
3232 EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3234 case UHF_C_PORT_CONNECTION:
3235 EOWRITE4(sc, port, v | EHCI_PS_CSC);
3237 case UHF_C_PORT_ENABLE:
3238 EOWRITE4(sc, port, v | EHCI_PS_PEC);
3240 case UHF_C_PORT_SUSPEND:
3241 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3243 case UHF_C_PORT_OVER_CURRENT:
3244 EOWRITE4(sc, port, v | EHCI_PS_OCC);
3246 case UHF_C_PORT_RESET:
3250 err = USB_ERR_IOERROR;
3254 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3255 if ((value & 0xff) != 0) {
3256 err = USB_ERR_IOERROR;
3259 v = EOREAD4(sc, EHCI_HCSPARAMS);
3261 sc->sc_hub_desc.hubd = ehci_hubd;
3262 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3263 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
3264 (EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH) |
3265 (EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) ?
3267 /* XXX can't find out? */
3268 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3269 for (l = 0; l < sc->sc_noport; l++) {
3270 /* XXX can't find out? */
3271 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] &= ~(1 << (l % 8));
3273 sc->sc_hub_desc.hubd.bDescLength =
3274 8 + ((sc->sc_noport + 7) / 8);
3275 len = sc->sc_hub_desc.hubd.bDescLength;
3277 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3279 bzero(sc->sc_hub_desc.temp, 16);
3281 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3282 DPRINTFN(9, "get port status i=%d\n",
3285 (index > sc->sc_noport)) {
3286 err = USB_ERR_IOERROR;
3289 v = EOREAD4(sc, EHCI_PORTSC(index));
3290 DPRINTFN(9, "port status=0x%04x\n", v);
3291 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3292 if ((v & 0xc000000) == 0x8000000)
3294 else if ((v & 0xc000000) == 0x4000000)
3302 i |= UPS_CURRENT_CONNECT_STATUS;
3304 i |= UPS_PORT_ENABLED;
3305 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3307 if (v & EHCI_PS_OCA)
3308 i |= UPS_OVERCURRENT_INDICATOR;
3312 i |= UPS_PORT_POWER;
3313 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3315 if (v & EHCI_PS_CSC)
3316 i |= UPS_C_CONNECT_STATUS;
3317 if (v & EHCI_PS_PEC)
3318 i |= UPS_C_PORT_ENABLED;
3319 if (v & EHCI_PS_OCC)
3320 i |= UPS_C_OVERCURRENT_INDICATOR;
3321 if (v & EHCI_PS_FPR)
3324 i |= UPS_C_PORT_RESET;
3325 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3326 len = sizeof(sc->sc_hub_desc.ps);
3328 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3329 err = USB_ERR_IOERROR;
3331 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3333 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3335 (index > sc->sc_noport)) {
3336 err = USB_ERR_IOERROR;
3339 port = EHCI_PORTSC(index);
3340 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3342 case UHF_PORT_ENABLE:
3343 EOWRITE4(sc, port, v | EHCI_PS_PE);
3345 case UHF_PORT_SUSPEND:
3346 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3348 case UHF_PORT_RESET:
3349 DPRINTFN(6, "reset port %d\n", index);
3351 if (ehcinohighspeed) {
3353 * Connect USB device to companion
3356 ehci_disown(sc, index, 1);
3360 if (EHCI_PS_IS_LOWSPEED(v) &&
3361 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3362 /* Low speed device, give up ownership. */
3363 ehci_disown(sc, index, 1);
3366 /* Start reset sequence. */
3367 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3368 EOWRITE4(sc, port, v | EHCI_PS_PR);
3370 /* Wait for reset to complete. */
3371 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3372 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
3374 /* Terminate reset sequence. */
3375 if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3376 EOWRITE4(sc, port, v);
3378 /* Wait for HC to complete reset. */
3379 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3380 USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3382 v = EOREAD4(sc, port);
3383 DPRINTF("ehci after reset, status=0x%08x\n", v);
3384 if (v & EHCI_PS_PR) {
3385 device_printf(sc->sc_bus.bdev,
3386 "port reset timeout\n");
3387 err = USB_ERR_TIMEOUT;
3390 if (!(v & EHCI_PS_PE) &&
3391 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3392 /* Not a high speed device, give up ownership.*/
3393 ehci_disown(sc, index, 0);
3397 DPRINTF("ehci port %d reset, status = 0x%08x\n",
3401 case UHF_PORT_POWER:
3402 DPRINTFN(3, "set port power %d\n", index);
3403 EOWRITE4(sc, port, v | EHCI_PS_PP);
3407 DPRINTFN(3, "set port test %d\n", index);
3410 case UHF_PORT_INDICATOR:
3411 DPRINTFN(3, "set port ind %d\n", index);
3412 EOWRITE4(sc, port, v | EHCI_PS_PIC);
3416 err = USB_ERR_IOERROR;
3420 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3421 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3422 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3423 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3426 err = USB_ERR_IOERROR;
3436 ehci_xfer_setup(struct usb_setup_params *parm)
3438 struct usb_page_search page_info;
3439 struct usb_page_cache *pc;
3441 struct usb_xfer *xfer;
3449 sc = EHCI_BUS2SC(parm->udev->bus);
3450 xfer = parm->curr_xfer;
3458 * compute maximum number of some structures
3460 if (parm->methods == &ehci_device_ctrl_methods) {
3463 * The proof for the "nqtd" formula is illustrated like
3466 * +------------------------------------+
3470 * | | xxx | x | frm 0 |
3472 * | | xxx | xx | frm 1 |
3475 * +------------------------------------+
3477 * "xxx" means a completely full USB transfer descriptor
3479 * "x" and "xx" means a short USB packet
3481 * For the remainder of an USB transfer modulo
3482 * "max_data_length" we need two USB transfer descriptors.
3483 * One to transfer the remaining data and one to finalise
3484 * with a zero length packet in case the "force_short_xfer"
3485 * flag is set. We only need two USB transfer descriptors in
3486 * the case where the transfer length of the first one is a
3487 * factor of "max_frame_size". The rest of the needed USB
3488 * transfer descriptors is given by the buffer size divided
3489 * by the maximum data payload.
3491 parm->hc_max_packet_size = 0x400;
3492 parm->hc_max_packet_count = 1;
3493 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3494 xfer->flags_int.bdma_enable = 1;
3496 usbd_transfer_setup_sub(parm);
3499 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3500 + (xfer->max_data_length / xfer->max_hc_frame_size));
3502 } else if (parm->methods == &ehci_device_bulk_methods) {
3504 parm->hc_max_packet_size = 0x400;
3505 parm->hc_max_packet_count = 1;
3506 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3507 xfer->flags_int.bdma_enable = 1;
3509 usbd_transfer_setup_sub(parm);
3512 nqtd = ((2 * xfer->nframes)
3513 + (xfer->max_data_length / xfer->max_hc_frame_size));
3515 } else if (parm->methods == &ehci_device_intr_methods) {
3517 if (parm->speed == USB_SPEED_HIGH) {
3518 parm->hc_max_packet_size = 0x400;
3519 parm->hc_max_packet_count = 3;
3520 } else if (parm->speed == USB_SPEED_FULL) {
3521 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3522 parm->hc_max_packet_count = 1;
3524 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3525 parm->hc_max_packet_count = 1;
3528 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3529 xfer->flags_int.bdma_enable = 1;
3531 usbd_transfer_setup_sub(parm);
3534 nqtd = ((2 * xfer->nframes)
3535 + (xfer->max_data_length / xfer->max_hc_frame_size));
3537 } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3539 parm->hc_max_packet_size = 0x3FF;
3540 parm->hc_max_packet_count = 1;
3541 parm->hc_max_frame_size = 0x3FF;
3542 xfer->flags_int.bdma_enable = 1;
3544 usbd_transfer_setup_sub(parm);
3546 nsitd = xfer->nframes;
3548 } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3550 parm->hc_max_packet_size = 0x400;
3551 parm->hc_max_packet_count = 3;
3552 parm->hc_max_frame_size = 0xC00;
3553 xfer->flags_int.bdma_enable = 1;
3555 usbd_transfer_setup_sub(parm);
3557 nitd = (xfer->nframes + 7) / 8;
3561 parm->hc_max_packet_size = 0x400;
3562 parm->hc_max_packet_count = 1;
3563 parm->hc_max_frame_size = 0x400;
3565 usbd_transfer_setup_sub(parm);
3574 * Allocate queue heads and transfer descriptors
3578 if (usbd_transfer_setup_sub_malloc(
3579 parm, &pc, sizeof(ehci_itd_t),
3580 EHCI_ITD_ALIGN, nitd)) {
3581 parm->err = USB_ERR_NOMEM;
3585 for (n = 0; n != nitd; n++) {
3588 usbd_get_page(pc + n, 0, &page_info);
3590 td = page_info.buffer;
3593 td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3594 td->obj_next = last_obj;
3595 td->page_cache = pc + n;
3599 usb_pc_cpu_flush(pc + n);
3602 if (usbd_transfer_setup_sub_malloc(
3603 parm, &pc, sizeof(ehci_sitd_t),
3604 EHCI_SITD_ALIGN, nsitd)) {
3605 parm->err = USB_ERR_NOMEM;
3609 for (n = 0; n != nsitd; n++) {
3612 usbd_get_page(pc + n, 0, &page_info);
3614 td = page_info.buffer;
3617 td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3618 td->obj_next = last_obj;
3619 td->page_cache = pc + n;
3623 usb_pc_cpu_flush(pc + n);
3626 if (usbd_transfer_setup_sub_malloc(
3627 parm, &pc, sizeof(ehci_qtd_t),
3628 EHCI_QTD_ALIGN, nqtd)) {
3629 parm->err = USB_ERR_NOMEM;
3633 for (n = 0; n != nqtd; n++) {
3636 usbd_get_page(pc + n, 0, &page_info);
3638 qtd = page_info.buffer;
3641 qtd->qtd_self = htohc32(sc, page_info.physaddr);
3642 qtd->obj_next = last_obj;
3643 qtd->page_cache = pc + n;
3647 usb_pc_cpu_flush(pc + n);
3650 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3654 if (usbd_transfer_setup_sub_malloc(
3655 parm, &pc, sizeof(ehci_qh_t),
3656 EHCI_QH_ALIGN, nqh)) {
3657 parm->err = USB_ERR_NOMEM;
3661 for (n = 0; n != nqh; n++) {
3664 usbd_get_page(pc + n, 0, &page_info);
3666 qh = page_info.buffer;
3669 qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3670 qh->obj_next = last_obj;
3671 qh->page_cache = pc + n;
3675 usb_pc_cpu_flush(pc + n);
3678 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3680 if (!xfer->flags_int.curr_dma_set) {
3681 xfer->flags_int.curr_dma_set = 1;
3687 ehci_xfer_unsetup(struct usb_xfer *xfer)
3693 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3694 struct usb_endpoint *ep)
3696 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3698 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3700 edesc->bEndpointAddress, udev->flags.usb_mode,
3703 if (udev->flags.usb_mode != USB_MODE_HOST) {
3707 if (udev->device_index != sc->sc_addr) {
3709 if ((udev->speed != USB_SPEED_HIGH) &&
3710 ((udev->hs_hub_addr == 0) ||
3711 (udev->hs_port_no == 0) ||
3712 (udev->parent_hs_hub == NULL) ||
3713 (udev->parent_hs_hub->hub == NULL))) {
3714 /* We need a transaction translator */
3717 switch (edesc->bmAttributes & UE_XFERTYPE) {
3719 ep->methods = &ehci_device_ctrl_methods;
3722 ep->methods = &ehci_device_intr_methods;
3724 case UE_ISOCHRONOUS:
3725 if (udev->speed == USB_SPEED_HIGH) {
3726 ep->methods = &ehci_device_isoc_hs_methods;
3727 } else if (udev->speed == USB_SPEED_FULL) {
3728 ep->methods = &ehci_device_isoc_fs_methods;
3732 if (udev->speed != USB_SPEED_LOW) {
3733 ep->methods = &ehci_device_bulk_methods;
3746 ehci_get_dma_delay(struct usb_bus *bus, uint32_t *pus)
3749 * Wait until the hardware has finished any possible use of
3750 * the transfer descriptor(s) and QH
3752 *pus = (188); /* microseconds */
3756 ehci_device_resume(struct usb_device *udev)
3758 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3759 struct usb_xfer *xfer;
3760 struct usb_pipe_methods *methods;
3764 USB_BUS_LOCK(udev->bus);
3766 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3768 if (xfer->xroot->udev == udev) {
3770 methods = xfer->endpoint->methods;
3772 if ((methods == &ehci_device_bulk_methods) ||
3773 (methods == &ehci_device_ctrl_methods)) {
3774 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3775 sc->sc_async_p_last);
3777 if (methods == &ehci_device_intr_methods) {
3778 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3779 sc->sc_intr_p_last[xfer->qh_pos]);
3784 USB_BUS_UNLOCK(udev->bus);
3790 ehci_device_suspend(struct usb_device *udev)
3792 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3793 struct usb_xfer *xfer;
3794 struct usb_pipe_methods *methods;
3798 USB_BUS_LOCK(udev->bus);
3800 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3802 if (xfer->xroot->udev == udev) {
3804 methods = xfer->endpoint->methods;
3806 if ((methods == &ehci_device_bulk_methods) ||
3807 (methods == &ehci_device_ctrl_methods)) {
3808 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3809 sc->sc_async_p_last);
3811 if (methods == &ehci_device_intr_methods) {
3812 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3813 sc->sc_intr_p_last[xfer->qh_pos]);
3818 USB_BUS_UNLOCK(udev->bus);
3824 ehci_set_hw_power(struct usb_bus *bus)
3826 ehci_softc_t *sc = EHCI_BUS2SC(bus);
3834 flags = bus->hw_power_state;
3836 temp = EOREAD4(sc, EHCI_USBCMD);
3838 temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3840 if (flags & (USB_HW_POWER_CONTROL |
3841 USB_HW_POWER_BULK)) {
3842 DPRINTF("Async is active\n");
3843 temp |= EHCI_CMD_ASE;
3845 if (flags & (USB_HW_POWER_INTERRUPT |
3846 USB_HW_POWER_ISOC)) {
3847 DPRINTF("Periodic is active\n");
3848 temp |= EHCI_CMD_PSE;
3850 EOWRITE4(sc, EHCI_USBCMD, temp);
3852 USB_BUS_UNLOCK(bus);
3857 struct usb_bus_methods ehci_bus_methods =
3859 .endpoint_init = ehci_ep_init,
3860 .xfer_setup = ehci_xfer_setup,
3861 .xfer_unsetup = ehci_xfer_unsetup,
3862 .get_dma_delay = ehci_get_dma_delay,
3863 .device_resume = ehci_device_resume,
3864 .device_suspend = ehci_device_suspend,
3865 .set_hw_power = ehci_set_hw_power,
3866 .roothub_exec = ehci_roothub_exec,
3867 .xfer_poll = ehci_do_poll,