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1 /*-
2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3  * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
4  * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
5  * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28
29 /*
30  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
31  *
32  * The EHCI 0.96 spec can be found at
33  * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
34  * The EHCI 1.0 spec can be found at
35  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
36  * and the USB 2.0 spec at
37  * http://www.usb.org/developers/docs/usb_20.zip
38  *
39  */
40
41 /*
42  * TODO: 
43  * 1) command failures are not recovered correctly
44  */
45
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
48
49 #include <sys/stdint.h>
50 #include <sys/stddef.h>
51 #include <sys/param.h>
52 #include <sys/queue.h>
53 #include <sys/types.h>
54 #include <sys/systm.h>
55 #include <sys/kernel.h>
56 #include <sys/bus.h>
57 #include <sys/linker_set.h>
58 #include <sys/module.h>
59 #include <sys/lock.h>
60 #include <sys/mutex.h>
61 #include <sys/condvar.h>
62 #include <sys/sysctl.h>
63 #include <sys/sx.h>
64 #include <sys/unistd.h>
65 #include <sys/callout.h>
66 #include <sys/malloc.h>
67 #include <sys/priv.h>
68
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
71
72 #define USB_DEBUG_VAR ehcidebug
73
74 #include <dev/usb/usb_core.h>
75 #include <dev/usb/usb_debug.h>
76 #include <dev/usb/usb_busdma.h>
77 #include <dev/usb/usb_process.h>
78 #include <dev/usb/usb_transfer.h>
79 #include <dev/usb/usb_device.h>
80 #include <dev/usb/usb_hub.h>
81 #include <dev/usb/usb_util.h>
82
83 #include <dev/usb/usb_controller.h>
84 #include <dev/usb/usb_bus.h>
85 #include <dev/usb/controller/ehci.h>
86
87 #define EHCI_BUS2SC(bus) \
88    ((ehci_softc_t *)(((uint8_t *)(bus)) - \
89     ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
90
91 #if USB_DEBUG
92 static int ehcidebug = 0;
93 static int ehcinohighspeed = 0;
94
95 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
96 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
97     &ehcidebug, 0, "Debug level");
98 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW,
99     &ehcinohighspeed, 0, "Disable High Speed USB");
100
101 static void ehci_dump_regs(ehci_softc_t *sc);
102 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
103
104 #endif
105
106 #define EHCI_INTR_ENDPT 1
107
108 extern struct usb_bus_methods ehci_bus_methods;
109 extern struct usb_pipe_methods ehci_device_bulk_methods;
110 extern struct usb_pipe_methods ehci_device_ctrl_methods;
111 extern struct usb_pipe_methods ehci_device_intr_methods;
112 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
113 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
114
115 static void ehci_do_poll(struct usb_bus *bus);
116 static void ehci_device_done(struct usb_xfer *xfer, usb_error_t error);
117 static uint8_t ehci_check_transfer(struct usb_xfer *xfer);
118 static void ehci_timeout(void *arg);
119 static void ehci_root_intr(ehci_softc_t *sc);
120
121 struct ehci_std_temp {
122         ehci_softc_t *sc;
123         struct usb_page_cache *pc;
124         ehci_qtd_t *td;
125         ehci_qtd_t *td_next;
126         uint32_t average;
127         uint32_t qtd_status;
128         uint32_t len;
129         uint16_t max_frame_size;
130         uint8_t shortpkt;
131         uint8_t auto_data_toggle;
132         uint8_t setup_alt_next;
133         uint8_t last_frame;
134         uint8_t can_use_next;
135 };
136
137 void
138 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
139 {
140         ehci_softc_t *sc = EHCI_BUS2SC(bus);
141         uint32_t i;
142
143         cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
144             sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
145
146         cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
147             sizeof(ehci_qh_t), EHCI_QH_ALIGN);
148
149         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
150                 cb(bus, sc->sc_hw.intr_start_pc + i,
151                     sc->sc_hw.intr_start_pg + i,
152                     sizeof(ehci_qh_t), EHCI_QH_ALIGN);
153         }
154
155         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
156                 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
157                     sc->sc_hw.isoc_hs_start_pg + i,
158                     sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
159         }
160
161         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
162                 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
163                     sc->sc_hw.isoc_fs_start_pg + i,
164                     sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
165         }
166 }
167
168 usb_error_t
169 ehci_reset(ehci_softc_t *sc)
170 {
171         uint32_t hcr;
172         int i;
173
174         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
175         for (i = 0; i < 100; i++) {
176                 usb_pause_mtx(NULL, hz / 1000);
177                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
178                 if (!hcr) {
179                         if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
180                                 /*
181                                  * Force USBMODE as requested.  Controllers
182                                  * may have multiple operating modes.
183                                  */
184                                 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
185                                 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
186                                         usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
187                                         device_printf(sc->sc_bus.bdev,
188                                             "set host controller mode\n");
189                                 }
190                                 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
191                                         usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
192                                         device_printf(sc->sc_bus.bdev,
193                                             "set big-endian mode\n");
194                                 }
195                                 EOWRITE4(sc,  EHCI_USBMODE, usbmode);
196                         }
197                         return (0);
198                 }
199         }
200         device_printf(sc->sc_bus.bdev, "reset timeout\n");
201         return (USB_ERR_IOERROR);
202 }
203
204 static usb_error_t
205 ehci_hcreset(ehci_softc_t *sc)
206 {
207         uint32_t hcr;
208         int i;
209
210         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
211         for (i = 0; i < 100; i++) {
212                 usb_pause_mtx(NULL, hz / 1000);
213                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
214                 if (hcr)
215                         break;
216         }
217         if (!hcr)
218                 /*
219                  * Fall through and try reset anyway even though
220                  * Table 2-9 in the EHCI spec says this will result
221                  * in undefined behavior.
222                  */
223                 device_printf(sc->sc_bus.bdev, "stop timeout\n");
224
225         return ehci_reset(sc);
226 }
227
228 usb_error_t
229 ehci_init(ehci_softc_t *sc)
230 {
231         struct usb_page_search buf_res;
232         uint32_t version;
233         uint32_t sparams;
234         uint32_t cparams;
235         uint32_t hcr;
236         uint16_t i;
237         uint16_t x;
238         uint16_t y;
239         uint16_t bit;
240         usb_error_t err = 0;
241
242         DPRINTF("start\n");
243
244         usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
245
246 #if USB_DEBUG
247         if (ehcidebug > 2) {
248                 ehci_dump_regs(sc);
249         }
250 #endif
251
252         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
253
254         version = EREAD2(sc, EHCI_HCIVERSION);
255         device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
256             version >> 8, version & 0xff);
257
258         sparams = EREAD4(sc, EHCI_HCSPARAMS);
259         DPRINTF("sparams=0x%x\n", sparams);
260
261         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
262         cparams = EREAD4(sc, EHCI_HCCPARAMS);
263         DPRINTF("cparams=0x%x\n", cparams);
264
265         if (EHCI_HCC_64BIT(cparams)) {
266                 DPRINTF("HCC uses 64-bit structures\n");
267
268                 /* MUST clear segment register if 64 bit capable */
269                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
270         }
271         sc->sc_bus.usbrev = USB_REV_2_0;
272
273         /* Reset the controller */
274         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
275
276         err = ehci_hcreset(sc);
277         if (err) {
278                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
279                 return (err);
280         }
281         /*
282          * use current frame-list-size selection 0: 1024*4 bytes 1:  512*4
283          * bytes 2:  256*4 bytes 3:      unknown
284          */
285         if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
286                 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
287                 return (USB_ERR_IOERROR);
288         }
289         /* set up the bus struct */
290         sc->sc_bus.methods = &ehci_bus_methods;
291
292         sc->sc_eintrs = EHCI_NORMAL_INTRS;
293
294         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
295                 ehci_qh_t *qh;
296
297                 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
298
299                 qh = buf_res.buffer;
300
301                 /* initialize page cache pointer */
302
303                 qh->page_cache = sc->sc_hw.intr_start_pc + i;
304
305                 /* store a pointer to queue head */
306
307                 sc->sc_intr_p_last[i] = qh;
308
309                 qh->qh_self =
310                     htohc32(sc, buf_res.physaddr) |
311                     htohc32(sc, EHCI_LINK_QH);
312
313                 qh->qh_endp =
314                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
315                 qh->qh_endphub =
316                     htohc32(sc, EHCI_QH_SET_MULT(1));
317                 qh->qh_curqtd = 0;
318
319                 qh->qh_qtd.qtd_next =
320                     htohc32(sc, EHCI_LINK_TERMINATE);
321                 qh->qh_qtd.qtd_altnext =
322                     htohc32(sc, EHCI_LINK_TERMINATE);
323                 qh->qh_qtd.qtd_status =
324                     htohc32(sc, EHCI_QTD_HALTED);
325         }
326
327         /*
328          * the QHs are arranged to give poll intervals that are
329          * powers of 2 times 1ms
330          */
331         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
332         while (bit) {
333                 x = bit;
334                 while (x & bit) {
335                         ehci_qh_t *qh_x;
336                         ehci_qh_t *qh_y;
337
338                         y = (x ^ bit) | (bit / 2);
339
340                         qh_x = sc->sc_intr_p_last[x];
341                         qh_y = sc->sc_intr_p_last[y];
342
343                         /*
344                          * the next QH has half the poll interval
345                          */
346                         qh_x->qh_link = qh_y->qh_self;
347
348                         x++;
349                 }
350                 bit >>= 1;
351         }
352
353         if (1) {
354                 ehci_qh_t *qh;
355
356                 qh = sc->sc_intr_p_last[0];
357
358                 /* the last (1ms) QH terminates */
359                 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
360         }
361         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
362                 ehci_sitd_t *sitd;
363                 ehci_itd_t *itd;
364
365                 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
366
367                 sitd = buf_res.buffer;
368
369                 /* initialize page cache pointer */
370
371                 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
372
373                 /* store a pointer to the transfer descriptor */
374
375                 sc->sc_isoc_fs_p_last[i] = sitd;
376
377                 /* initialize full speed isochronous */
378
379                 sitd->sitd_self =
380                     htohc32(sc, buf_res.physaddr) |
381                     htohc32(sc, EHCI_LINK_SITD);
382
383                 sitd->sitd_back =
384                     htohc32(sc, EHCI_LINK_TERMINATE);
385
386                 sitd->sitd_next =
387                     sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
388
389
390                 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
391
392                 itd = buf_res.buffer;
393
394                 /* initialize page cache pointer */
395
396                 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
397
398                 /* store a pointer to the transfer descriptor */
399
400                 sc->sc_isoc_hs_p_last[i] = itd;
401
402                 /* initialize high speed isochronous */
403
404                 itd->itd_self =
405                     htohc32(sc, buf_res.physaddr) |
406                     htohc32(sc, EHCI_LINK_ITD);
407
408                 itd->itd_next =
409                     sitd->sitd_self;
410         }
411
412         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
413
414         if (1) {
415                 uint32_t *pframes;
416
417                 pframes = buf_res.buffer;
418
419                 /*
420                  * execution order:
421                  * pframes -> high speed isochronous ->
422                  *    full speed isochronous -> interrupt QH's
423                  */
424                 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
425                         pframes[i] = sc->sc_isoc_hs_p_last
426                             [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
427                 }
428         }
429         /* setup sync list pointer */
430         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
431
432         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
433
434         if (1) {
435
436                 ehci_qh_t *qh;
437
438                 qh = buf_res.buffer;
439
440                 /* initialize page cache pointer */
441
442                 qh->page_cache = &sc->sc_hw.async_start_pc;
443
444                 /* store a pointer to the queue head */
445
446                 sc->sc_async_p_last = qh;
447
448                 /* init dummy QH that starts the async list */
449
450                 qh->qh_self =
451                     htohc32(sc, buf_res.physaddr) |
452                     htohc32(sc, EHCI_LINK_QH);
453
454                 /* fill the QH */
455                 qh->qh_endp =
456                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
457                 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
458                 qh->qh_link = qh->qh_self;
459                 qh->qh_curqtd = 0;
460
461                 /* fill the overlay qTD */
462                 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
463                 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
464                 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
465         }
466         /* flush all cache into memory */
467
468         usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
469
470 #if USB_DEBUG
471         if (ehcidebug) {
472                 ehci_dump_sqh(sc, sc->sc_async_p_last);
473         }
474 #endif
475
476         /* setup async list pointer */
477         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
478
479
480         /* enable interrupts */
481         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
482
483         /* turn on controller */
484         EOWRITE4(sc, EHCI_USBCMD,
485             EHCI_CMD_ITC_1 |            /* 1 microframes interrupt delay */
486             (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
487             EHCI_CMD_ASE |
488             EHCI_CMD_PSE |
489             EHCI_CMD_RS);
490
491         /* Take over port ownership */
492         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
493
494         for (i = 0; i < 100; i++) {
495                 usb_pause_mtx(NULL, hz / 1000);
496                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
497                 if (!hcr) {
498                         break;
499                 }
500         }
501         if (hcr) {
502                 device_printf(sc->sc_bus.bdev, "run timeout\n");
503                 return (USB_ERR_IOERROR);
504         }
505
506         if (!err) {
507                 /* catch any lost interrupts */
508                 ehci_do_poll(&sc->sc_bus);
509         }
510         return (err);
511 }
512
513 /*
514  * shut down the controller when the system is going down
515  */
516 void
517 ehci_detach(ehci_softc_t *sc)
518 {
519         USB_BUS_LOCK(&sc->sc_bus);
520
521         usb_callout_stop(&sc->sc_tmo_pcd);
522
523         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
524         USB_BUS_UNLOCK(&sc->sc_bus);
525
526         if (ehci_hcreset(sc)) {
527                 DPRINTF("reset failed!\n");
528         }
529
530         /* XXX let stray task complete */
531         usb_pause_mtx(NULL, hz / 20);
532
533         usb_callout_drain(&sc->sc_tmo_pcd);
534 }
535
536 void
537 ehci_suspend(ehci_softc_t *sc)
538 {
539         uint32_t cmd;
540         uint32_t hcr;
541         uint8_t i;
542
543         USB_BUS_LOCK(&sc->sc_bus);
544
545         for (i = 1; i <= sc->sc_noport; i++) {
546                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
547                 if (((cmd & EHCI_PS_PO) == 0) &&
548                     ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
549                         EOWRITE4(sc, EHCI_PORTSC(i),
550                             cmd | EHCI_PS_SUSP);
551                 }
552         }
553
554         sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
555
556         cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
557         EOWRITE4(sc, EHCI_USBCMD, cmd);
558
559         for (i = 0; i < 100; i++) {
560                 hcr = EOREAD4(sc, EHCI_USBSTS) &
561                     (EHCI_STS_ASS | EHCI_STS_PSS);
562
563                 if (hcr == 0) {
564                         break;
565                 }
566                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
567         }
568
569         if (hcr != 0) {
570                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
571         }
572         cmd &= ~EHCI_CMD_RS;
573         EOWRITE4(sc, EHCI_USBCMD, cmd);
574
575         for (i = 0; i < 100; i++) {
576                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
577                 if (hcr == EHCI_STS_HCH) {
578                         break;
579                 }
580                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
581         }
582
583         if (hcr != EHCI_STS_HCH) {
584                 device_printf(sc->sc_bus.bdev,
585                     "config timeout\n");
586         }
587         USB_BUS_UNLOCK(&sc->sc_bus);
588 }
589
590 void
591 ehci_resume(ehci_softc_t *sc)
592 {
593         struct usb_page_search buf_res;
594         uint32_t cmd;
595         uint32_t hcr;
596         uint8_t i;
597
598         USB_BUS_LOCK(&sc->sc_bus);
599
600         /* restore things in case the bios doesn't */
601         EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
602
603         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
604         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
605
606         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
607         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
608
609         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
610
611         hcr = 0;
612         for (i = 1; i <= sc->sc_noport; i++) {
613                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
614                 if (((cmd & EHCI_PS_PO) == 0) &&
615                     ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
616                         EOWRITE4(sc, EHCI_PORTSC(i),
617                             cmd | EHCI_PS_FPR);
618                         hcr = 1;
619                 }
620         }
621
622         if (hcr) {
623                 usb_pause_mtx(&sc->sc_bus.bus_mtx,
624                     USB_MS_TO_TICKS(USB_RESUME_WAIT));
625
626                 for (i = 1; i <= sc->sc_noport; i++) {
627                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
628                         if (((cmd & EHCI_PS_PO) == 0) &&
629                             ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
630                                 EOWRITE4(sc, EHCI_PORTSC(i),
631                                     cmd & ~EHCI_PS_FPR);
632                         }
633                 }
634         }
635         EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
636
637         for (i = 0; i < 100; i++) {
638                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
639                 if (hcr != EHCI_STS_HCH) {
640                         break;
641                 }
642                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
643         }
644         if (hcr == EHCI_STS_HCH) {
645                 device_printf(sc->sc_bus.bdev, "config timeout\n");
646         }
647
648         USB_BUS_UNLOCK(&sc->sc_bus);
649
650         usb_pause_mtx(NULL,
651             USB_MS_TO_TICKS(USB_RESUME_WAIT));
652
653         /* catch any lost interrupts */
654         ehci_do_poll(&sc->sc_bus);
655 }
656
657 void
658 ehci_shutdown(ehci_softc_t *sc)
659 {
660         DPRINTF("stopping the HC\n");
661
662         if (ehci_hcreset(sc)) {
663                 DPRINTF("reset failed!\n");
664         }
665 }
666
667 #if USB_DEBUG
668 static void
669 ehci_dump_regs(ehci_softc_t *sc)
670 {
671         uint32_t i;
672
673         i = EOREAD4(sc, EHCI_USBCMD);
674         printf("cmd=0x%08x\n", i);
675
676         if (i & EHCI_CMD_ITC_1)
677                 printf(" EHCI_CMD_ITC_1\n");
678         if (i & EHCI_CMD_ITC_2)
679                 printf(" EHCI_CMD_ITC_2\n");
680         if (i & EHCI_CMD_ITC_4)
681                 printf(" EHCI_CMD_ITC_4\n");
682         if (i & EHCI_CMD_ITC_8)
683                 printf(" EHCI_CMD_ITC_8\n");
684         if (i & EHCI_CMD_ITC_16)
685                 printf(" EHCI_CMD_ITC_16\n");
686         if (i & EHCI_CMD_ITC_32)
687                 printf(" EHCI_CMD_ITC_32\n");
688         if (i & EHCI_CMD_ITC_64)
689                 printf(" EHCI_CMD_ITC_64\n");
690         if (i & EHCI_CMD_ASPME)
691                 printf(" EHCI_CMD_ASPME\n");
692         if (i & EHCI_CMD_ASPMC)
693                 printf(" EHCI_CMD_ASPMC\n");
694         if (i & EHCI_CMD_LHCR)
695                 printf(" EHCI_CMD_LHCR\n");
696         if (i & EHCI_CMD_IAAD)
697                 printf(" EHCI_CMD_IAAD\n");
698         if (i & EHCI_CMD_ASE)
699                 printf(" EHCI_CMD_ASE\n");
700         if (i & EHCI_CMD_PSE)
701                 printf(" EHCI_CMD_PSE\n");
702         if (i & EHCI_CMD_FLS_M)
703                 printf(" EHCI_CMD_FLS_M\n");
704         if (i & EHCI_CMD_HCRESET)
705                 printf(" EHCI_CMD_HCRESET\n");
706         if (i & EHCI_CMD_RS)
707                 printf(" EHCI_CMD_RS\n");
708
709         i = EOREAD4(sc, EHCI_USBSTS);
710
711         printf("sts=0x%08x\n", i);
712
713         if (i & EHCI_STS_ASS)
714                 printf(" EHCI_STS_ASS\n");
715         if (i & EHCI_STS_PSS)
716                 printf(" EHCI_STS_PSS\n");
717         if (i & EHCI_STS_REC)
718                 printf(" EHCI_STS_REC\n");
719         if (i & EHCI_STS_HCH)
720                 printf(" EHCI_STS_HCH\n");
721         if (i & EHCI_STS_IAA)
722                 printf(" EHCI_STS_IAA\n");
723         if (i & EHCI_STS_HSE)
724                 printf(" EHCI_STS_HSE\n");
725         if (i & EHCI_STS_FLR)
726                 printf(" EHCI_STS_FLR\n");
727         if (i & EHCI_STS_PCD)
728                 printf(" EHCI_STS_PCD\n");
729         if (i & EHCI_STS_ERRINT)
730                 printf(" EHCI_STS_ERRINT\n");
731         if (i & EHCI_STS_INT)
732                 printf(" EHCI_STS_INT\n");
733
734         printf("ien=0x%08x\n",
735             EOREAD4(sc, EHCI_USBINTR));
736         printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
737             EOREAD4(sc, EHCI_FRINDEX),
738             EOREAD4(sc, EHCI_CTRLDSSEGMENT),
739             EOREAD4(sc, EHCI_PERIODICLISTBASE),
740             EOREAD4(sc, EHCI_ASYNCLISTADDR));
741         for (i = 1; i <= sc->sc_noport; i++) {
742                 printf("port %d status=0x%08x\n", i,
743                     EOREAD4(sc, EHCI_PORTSC(i)));
744         }
745 }
746
747 static void
748 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
749 {
750         link = hc32toh(sc, link);
751         printf("0x%08x", link);
752         if (link & EHCI_LINK_TERMINATE)
753                 printf("<T>");
754         else {
755                 printf("<");
756                 if (type) {
757                         switch (EHCI_LINK_TYPE(link)) {
758                         case EHCI_LINK_ITD:
759                                 printf("ITD");
760                                 break;
761                         case EHCI_LINK_QH:
762                                 printf("QH");
763                                 break;
764                         case EHCI_LINK_SITD:
765                                 printf("SITD");
766                                 break;
767                         case EHCI_LINK_FSTN:
768                                 printf("FSTN");
769                                 break;
770                         }
771                 }
772                 printf(">");
773         }
774 }
775
776 static void
777 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
778 {
779         uint32_t s;
780
781         printf("  next=");
782         ehci_dump_link(sc, qtd->qtd_next, 0);
783         printf(" altnext=");
784         ehci_dump_link(sc, qtd->qtd_altnext, 0);
785         printf("\n");
786         s = hc32toh(sc, qtd->qtd_status);
787         printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
788             s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
789             EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
790         printf("    cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
791             EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
792             (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
793             (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
794             (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
795             (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
796             (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
797             (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
798             (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
799             (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
800
801         for (s = 0; s < 5; s++) {
802                 printf("  buffer[%d]=0x%08x\n", s,
803                     hc32toh(sc, qtd->qtd_buffer[s]));
804         }
805         for (s = 0; s < 5; s++) {
806                 printf("  buffer_hi[%d]=0x%08x\n", s,
807                     hc32toh(sc, qtd->qtd_buffer_hi[s]));
808         }
809 }
810
811 static uint8_t
812 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
813 {
814         uint8_t temp;
815
816         usb_pc_cpu_invalidate(sqtd->page_cache);
817         printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
818         ehci_dump_qtd(sc, sqtd);
819         temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
820         return (temp);
821 }
822
823 static void
824 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
825 {
826         uint16_t i;
827         uint8_t stop;
828
829         stop = 0;
830         for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
831                 stop = ehci_dump_sqtd(sc, sqtd);
832         }
833         if (sqtd) {
834                 printf("dump aborted, too many TDs\n");
835         }
836 }
837
838 static void
839 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
840 {
841         uint32_t endp;
842         uint32_t endphub;
843
844         usb_pc_cpu_invalidate(qh->page_cache);
845         printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
846         printf("  link=");
847         ehci_dump_link(sc, qh->qh_link, 1);
848         printf("\n");
849         endp = hc32toh(sc, qh->qh_endp);
850         printf("  endp=0x%08x\n", endp);
851         printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
852             EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
853             EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
854             EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
855         printf("    mpl=0x%x ctl=%d nrl=%d\n",
856             EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
857             EHCI_QH_GET_NRL(endp));
858         endphub = hc32toh(sc, qh->qh_endphub);
859         printf("  endphub=0x%08x\n", endphub);
860         printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
861             EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
862             EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
863             EHCI_QH_GET_MULT(endphub));
864         printf("  curqtd=");
865         ehci_dump_link(sc, qh->qh_curqtd, 0);
866         printf("\n");
867         printf("Overlay qTD:\n");
868         ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
869 }
870
871 static void
872 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
873 {
874         usb_pc_cpu_invalidate(sitd->page_cache);
875         printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
876         printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
877         printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
878             hc32toh(sc, sitd->sitd_portaddr),
879             (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
880             ? "in" : "out",
881             EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
882             EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
883             EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
884             EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
885         printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
886         printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
887             (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
888             EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
889         printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
890             hc32toh(sc, sitd->sitd_back),
891             hc32toh(sc, sitd->sitd_bp[0]),
892             hc32toh(sc, sitd->sitd_bp[1]),
893             hc32toh(sc, sitd->sitd_bp_hi[0]),
894             hc32toh(sc, sitd->sitd_bp_hi[1]));
895 }
896
897 static void
898 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
899 {
900         usb_pc_cpu_invalidate(itd->page_cache);
901         printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
902         printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
903         printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
904             (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
905         printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
906             (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
907         printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
908             (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
909         printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
910             (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
911         printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
912             (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
913         printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
914             (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
915         printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
916             (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
917         printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
918             (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
919         printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
920         printf("  addr=0x%02x; endpt=0x%01x\n",
921             EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
922             EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
923         printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
924         printf(" dir=%s; mpl=0x%02x\n",
925             (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
926             EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
927         printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
928             hc32toh(sc, itd->itd_bp[2]),
929             hc32toh(sc, itd->itd_bp[3]),
930             hc32toh(sc, itd->itd_bp[4]),
931             hc32toh(sc, itd->itd_bp[5]),
932             hc32toh(sc, itd->itd_bp[6]));
933         printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
934             "       0x%08x,0x%08x,0x%08x\n",
935             hc32toh(sc, itd->itd_bp_hi[0]),
936             hc32toh(sc, itd->itd_bp_hi[1]),
937             hc32toh(sc, itd->itd_bp_hi[2]),
938             hc32toh(sc, itd->itd_bp_hi[3]),
939             hc32toh(sc, itd->itd_bp_hi[4]),
940             hc32toh(sc, itd->itd_bp_hi[5]),
941             hc32toh(sc, itd->itd_bp_hi[6]));
942 }
943
944 static void
945 ehci_dump_isoc(ehci_softc_t *sc)
946 {
947         ehci_itd_t *itd;
948         ehci_sitd_t *sitd;
949         uint16_t max = 1000;
950         uint16_t pos;
951
952         pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
953             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
954
955         printf("%s: isochronous dump from frame 0x%03x:\n",
956             __FUNCTION__, pos);
957
958         itd = sc->sc_isoc_hs_p_last[pos];
959         sitd = sc->sc_isoc_fs_p_last[pos];
960
961         while (itd && max && max--) {
962                 ehci_dump_itd(sc, itd);
963                 itd = itd->prev;
964         }
965
966         while (sitd && max && max--) {
967                 ehci_dump_sitd(sc, sitd);
968                 sitd = sitd->prev;
969         }
970 }
971
972 #endif
973
974 static void
975 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
976 {
977         /* check for early completion */
978         if (ehci_check_transfer(xfer)) {
979                 return;
980         }
981         /* put transfer on interrupt queue */
982         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
983
984         /* start timeout, if any */
985         if (xfer->timeout != 0) {
986                 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
987         }
988 }
989
990 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
991 static ehci_sitd_t *
992 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
993 {
994         DPRINTFN(11, "%p to %p\n", std, last);
995
996         /* (sc->sc_bus.mtx) must be locked */
997
998         std->next = last->next;
999         std->sitd_next = last->sitd_next;
1000
1001         std->prev = last;
1002
1003         usb_pc_cpu_flush(std->page_cache);
1004
1005         /*
1006          * the last->next->prev is never followed: std->next->prev = std;
1007          */
1008         last->next = std;
1009         last->sitd_next = std->sitd_self;
1010
1011         usb_pc_cpu_flush(last->page_cache);
1012
1013         return (std);
1014 }
1015
1016 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
1017 static ehci_itd_t *
1018 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1019 {
1020         DPRINTFN(11, "%p to %p\n", std, last);
1021
1022         /* (sc->sc_bus.mtx) must be locked */
1023
1024         std->next = last->next;
1025         std->itd_next = last->itd_next;
1026
1027         std->prev = last;
1028
1029         usb_pc_cpu_flush(std->page_cache);
1030
1031         /*
1032          * the last->next->prev is never followed: std->next->prev = std;
1033          */
1034         last->next = std;
1035         last->itd_next = std->itd_self;
1036
1037         usb_pc_cpu_flush(last->page_cache);
1038
1039         return (std);
1040 }
1041
1042 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
1043 static ehci_qh_t *
1044 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1045 {
1046         DPRINTFN(11, "%p to %p\n", sqh, last);
1047
1048         if (sqh->prev != NULL) {
1049                 /* should not happen */
1050                 DPRINTFN(0, "QH already linked!\n");
1051                 return (last);
1052         }
1053         /* (sc->sc_bus.mtx) must be locked */
1054
1055         sqh->next = last->next;
1056         sqh->qh_link = last->qh_link;
1057
1058         sqh->prev = last;
1059
1060         usb_pc_cpu_flush(sqh->page_cache);
1061
1062         /*
1063          * the last->next->prev is never followed: sqh->next->prev = sqh;
1064          */
1065
1066         last->next = sqh;
1067         last->qh_link = sqh->qh_self;
1068
1069         usb_pc_cpu_flush(last->page_cache);
1070
1071         return (sqh);
1072 }
1073
1074 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1075 static ehci_sitd_t *
1076 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1077 {
1078         DPRINTFN(11, "%p from %p\n", std, last);
1079
1080         /* (sc->sc_bus.mtx) must be locked */
1081
1082         std->prev->next = std->next;
1083         std->prev->sitd_next = std->sitd_next;
1084
1085         usb_pc_cpu_flush(std->prev->page_cache);
1086
1087         if (std->next) {
1088                 std->next->prev = std->prev;
1089                 usb_pc_cpu_flush(std->next->page_cache);
1090         }
1091         return ((last == std) ? std->prev : last);
1092 }
1093
1094 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1095 static ehci_itd_t *
1096 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1097 {
1098         DPRINTFN(11, "%p from %p\n", std, last);
1099
1100         /* (sc->sc_bus.mtx) must be locked */
1101
1102         std->prev->next = std->next;
1103         std->prev->itd_next = std->itd_next;
1104
1105         usb_pc_cpu_flush(std->prev->page_cache);
1106
1107         if (std->next) {
1108                 std->next->prev = std->prev;
1109                 usb_pc_cpu_flush(std->next->page_cache);
1110         }
1111         return ((last == std) ? std->prev : last);
1112 }
1113
1114 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1115 static ehci_qh_t *
1116 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1117 {
1118         DPRINTFN(11, "%p from %p\n", sqh, last);
1119
1120         /* (sc->sc_bus.mtx) must be locked */
1121
1122         /* only remove if not removed from a queue */
1123         if (sqh->prev) {
1124
1125                 sqh->prev->next = sqh->next;
1126                 sqh->prev->qh_link = sqh->qh_link;
1127
1128                 usb_pc_cpu_flush(sqh->prev->page_cache);
1129
1130                 if (sqh->next) {
1131                         sqh->next->prev = sqh->prev;
1132                         usb_pc_cpu_flush(sqh->next->page_cache);
1133                 }
1134                 last = ((last == sqh) ? sqh->prev : last);
1135
1136                 sqh->prev = 0;
1137
1138                 usb_pc_cpu_flush(sqh->page_cache);
1139         }
1140         return (last);
1141 }
1142
1143 static usb_error_t
1144 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1145 {
1146         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1147         ehci_qtd_t *td;
1148         ehci_qtd_t *td_alt_next;
1149         uint32_t status;
1150         uint16_t len;
1151
1152         td = xfer->td_transfer_cache;
1153         td_alt_next = td->alt_next;
1154
1155         if (xfer->aframes != xfer->nframes) {
1156                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1157         }
1158         while (1) {
1159
1160                 usb_pc_cpu_invalidate(td->page_cache);
1161                 status = hc32toh(sc, td->qtd_status);
1162
1163                 len = EHCI_QTD_GET_BYTES(status);
1164
1165                 /*
1166                  * Verify the status length and
1167                  * add the length to "frlengths[]":
1168                  */
1169                 if (len > td->len) {
1170                         /* should not happen */
1171                         DPRINTF("Invalid status length, "
1172                             "0x%04x/0x%04x bytes\n", len, td->len);
1173                         status |= EHCI_QTD_HALTED;
1174                 } else if (xfer->aframes != xfer->nframes) {
1175                         xfer->frlengths[xfer->aframes] += td->len - len;
1176                 }
1177                 /* Check for last transfer */
1178                 if (((void *)td) == xfer->td_transfer_last) {
1179                         td = NULL;
1180                         break;
1181                 }
1182                 /* Check for transfer error */
1183                 if (status & EHCI_QTD_HALTED) {
1184                         /* the transfer is finished */
1185                         td = NULL;
1186                         break;
1187                 }
1188                 /* Check for short transfer */
1189                 if (len > 0) {
1190                         if (xfer->flags_int.short_frames_ok) {
1191                                 /* follow alt next */
1192                                 td = td->alt_next;
1193                         } else {
1194                                 /* the transfer is finished */
1195                                 td = NULL;
1196                         }
1197                         break;
1198                 }
1199                 td = td->obj_next;
1200
1201                 if (td->alt_next != td_alt_next) {
1202                         /* this USB frame is complete */
1203                         break;
1204                 }
1205         }
1206
1207         /* update transfer cache */
1208
1209         xfer->td_transfer_cache = td;
1210
1211 #if USB_DEBUG
1212         if (status & EHCI_QTD_STATERRS) {
1213                 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1214                     "status=%s%s%s%s%s%s%s%s\n",
1215                     xfer->address, xfer->endpointno, xfer->aframes,
1216                     (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1217                     (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1218                     (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1219                     (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1220                     (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1221                     (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1222                     (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1223                     (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1224         }
1225 #endif
1226
1227         return ((status & EHCI_QTD_HALTED) ?
1228             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1229 }
1230
1231 static void
1232 ehci_non_isoc_done(struct usb_xfer *xfer)
1233 {
1234         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1235         ehci_qh_t *qh;
1236         uint32_t status;
1237         usb_error_t err = 0;
1238
1239         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1240             xfer, xfer->endpoint);
1241
1242 #if USB_DEBUG
1243         if (ehcidebug > 10) {
1244                 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1245
1246                 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1247         }
1248 #endif
1249
1250         /* extract data toggle directly from the QH's overlay area */
1251
1252         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1253
1254         usb_pc_cpu_invalidate(qh->page_cache);
1255
1256         status = hc32toh(sc, qh->qh_qtd.qtd_status);
1257
1258         xfer->endpoint->toggle_next =
1259             (status & EHCI_QTD_TOGGLE_MASK) ? 1 : 0;
1260
1261         /* reset scanner */
1262
1263         xfer->td_transfer_cache = xfer->td_transfer_first;
1264
1265         if (xfer->flags_int.control_xfr) {
1266
1267                 if (xfer->flags_int.control_hdr) {
1268
1269                         err = ehci_non_isoc_done_sub(xfer);
1270                 }
1271                 xfer->aframes = 1;
1272
1273                 if (xfer->td_transfer_cache == NULL) {
1274                         goto done;
1275                 }
1276         }
1277         while (xfer->aframes != xfer->nframes) {
1278
1279                 err = ehci_non_isoc_done_sub(xfer);
1280                 xfer->aframes++;
1281
1282                 if (xfer->td_transfer_cache == NULL) {
1283                         goto done;
1284                 }
1285         }
1286
1287         if (xfer->flags_int.control_xfr &&
1288             !xfer->flags_int.control_act) {
1289
1290                 err = ehci_non_isoc_done_sub(xfer);
1291         }
1292 done:
1293         ehci_device_done(xfer, err);
1294 }
1295
1296 /*------------------------------------------------------------------------*
1297  *      ehci_check_transfer
1298  *
1299  * Return values:
1300  *    0: USB transfer is not finished
1301  * Else: USB transfer is finished
1302  *------------------------------------------------------------------------*/
1303 static uint8_t
1304 ehci_check_transfer(struct usb_xfer *xfer)
1305 {
1306         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1307         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1308
1309         uint32_t status;
1310
1311         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1312
1313         if (methods == &ehci_device_isoc_fs_methods) {
1314                 ehci_sitd_t *td;
1315
1316                 /* isochronous full speed transfer */
1317
1318                 td = xfer->td_transfer_last;
1319                 usb_pc_cpu_invalidate(td->page_cache);
1320                 status = hc32toh(sc, td->sitd_status);
1321
1322                 /* also check if first is complete */
1323
1324                 td = xfer->td_transfer_first;
1325                 usb_pc_cpu_invalidate(td->page_cache);
1326                 status |= hc32toh(sc, td->sitd_status);
1327
1328                 if (!(status & EHCI_SITD_ACTIVE)) {
1329                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1330                         goto transferred;
1331                 }
1332         } else if (methods == &ehci_device_isoc_hs_methods) {
1333                 ehci_itd_t *td;
1334
1335                 /* isochronous high speed transfer */
1336
1337                 td = xfer->td_transfer_last;
1338                 usb_pc_cpu_invalidate(td->page_cache);
1339                 status =
1340                     td->itd_status[0] | td->itd_status[1] |
1341                     td->itd_status[2] | td->itd_status[3] |
1342                     td->itd_status[4] | td->itd_status[5] |
1343                     td->itd_status[6] | td->itd_status[7];
1344
1345                 /* also check first transfer */
1346                 td = xfer->td_transfer_first;
1347                 usb_pc_cpu_invalidate(td->page_cache);
1348                 status |=
1349                     td->itd_status[0] | td->itd_status[1] |
1350                     td->itd_status[2] | td->itd_status[3] |
1351                     td->itd_status[4] | td->itd_status[5] |
1352                     td->itd_status[6] | td->itd_status[7];
1353
1354                 /* if no transactions are active we continue */
1355                 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1356                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1357                         goto transferred;
1358                 }
1359         } else {
1360                 ehci_qtd_t *td;
1361                 ehci_qh_t *qh;
1362
1363                 /* non-isochronous transfer */
1364
1365                 /*
1366                  * check whether there is an error somewhere in the middle,
1367                  * or whether there was a short packet (SPD and not ACTIVE)
1368                  */
1369                 td = xfer->td_transfer_cache;
1370
1371                 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1372
1373                 usb_pc_cpu_invalidate(qh->page_cache);
1374
1375                 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1376                 if (status & EHCI_QTD_ACTIVE) {
1377                         /* transfer is pending */
1378                         goto done;
1379                 }
1380
1381                 while (1) {
1382                         usb_pc_cpu_invalidate(td->page_cache);
1383                         status = hc32toh(sc, td->qtd_status);
1384
1385                         /*
1386                          * Check if there is an active TD which
1387                          * indicates that the transfer isn't done.
1388                          */
1389                         if (status & EHCI_QTD_ACTIVE) {
1390                                 /* update cache */
1391                                 if (xfer->td_transfer_cache != td) {
1392                                         xfer->td_transfer_cache = td;
1393                                         if (qh->qh_qtd.qtd_next & 
1394                                             htohc32(sc, EHCI_LINK_TERMINATE)) {
1395                                                 /* XXX - manually advance to next frame */
1396                                                 qh->qh_qtd.qtd_next = td->qtd_self;
1397                                                 usb_pc_cpu_flush(td->page_cache);
1398                                         }
1399                                 }
1400                                 goto done;
1401                         }
1402                         /*
1403                          * last transfer descriptor makes the transfer done
1404                          */
1405                         if (((void *)td) == xfer->td_transfer_last) {
1406                                 break;
1407                         }
1408                         /*
1409                          * any kind of error makes the transfer done
1410                          */
1411                         if (status & EHCI_QTD_HALTED) {
1412                                 break;
1413                         }
1414                         /*
1415                          * if there is no alternate next transfer, a short
1416                          * packet also makes the transfer done
1417                          */
1418                         if (EHCI_QTD_GET_BYTES(status)) {
1419                                 if (xfer->flags_int.short_frames_ok) {
1420                                         /* follow alt next */
1421                                         if (td->alt_next) {
1422                                                 td = td->alt_next;
1423                                                 continue;
1424                                         }
1425                                 }
1426                                 /* transfer is done */
1427                                 break;
1428                         }
1429                         td = td->obj_next;
1430                 }
1431                 ehci_non_isoc_done(xfer);
1432                 goto transferred;
1433         }
1434
1435 done:
1436         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1437         return (0);
1438
1439 transferred:
1440         return (1);
1441 }
1442
1443 static void
1444 ehci_pcd_enable(ehci_softc_t *sc)
1445 {
1446         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1447
1448         sc->sc_eintrs |= EHCI_STS_PCD;
1449         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1450
1451         /* acknowledge any PCD interrupt */
1452         EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1453
1454         ehci_root_intr(sc);
1455 }
1456
1457 static void
1458 ehci_interrupt_poll(ehci_softc_t *sc)
1459 {
1460         struct usb_xfer *xfer;
1461
1462 repeat:
1463         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1464                 /*
1465                  * check if transfer is transferred
1466                  */
1467                 if (ehci_check_transfer(xfer)) {
1468                         /* queue has been modified */
1469                         goto repeat;
1470                 }
1471         }
1472 }
1473
1474 /*------------------------------------------------------------------------*
1475  *      ehci_interrupt - EHCI interrupt handler
1476  *
1477  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1478  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1479  * is present !
1480  *------------------------------------------------------------------------*/
1481 void
1482 ehci_interrupt(ehci_softc_t *sc)
1483 {
1484         uint32_t status;
1485
1486         USB_BUS_LOCK(&sc->sc_bus);
1487
1488         DPRINTFN(16, "real interrupt\n");
1489
1490 #if USB_DEBUG
1491         if (ehcidebug > 15) {
1492                 ehci_dump_regs(sc);
1493         }
1494 #endif
1495
1496         status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1497         if (status == 0) {
1498                 /* the interrupt was not for us */
1499                 goto done;
1500         }
1501         if (!(status & sc->sc_eintrs)) {
1502                 goto done;
1503         }
1504         EOWRITE4(sc, EHCI_USBSTS, status);      /* acknowledge */
1505
1506         status &= sc->sc_eintrs;
1507
1508         if (status & EHCI_STS_HSE) {
1509                 printf("%s: unrecoverable error, "
1510                     "controller halted\n", __FUNCTION__);
1511 #if USB_DEBUG
1512                 ehci_dump_regs(sc);
1513                 ehci_dump_isoc(sc);
1514 #endif
1515         }
1516         if (status & EHCI_STS_PCD) {
1517                 /*
1518                  * Disable PCD interrupt for now, because it will be
1519                  * on until the port has been reset.
1520                  */
1521                 sc->sc_eintrs &= ~EHCI_STS_PCD;
1522                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1523
1524                 ehci_root_intr(sc);
1525
1526                 /* do not allow RHSC interrupts > 1 per second */
1527                 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1528                     (void *)&ehci_pcd_enable, sc);
1529         }
1530         status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1531
1532         if (status != 0) {
1533                 /* block unprocessed interrupts */
1534                 sc->sc_eintrs &= ~status;
1535                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1536                 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1537         }
1538         /* poll all the USB transfers */
1539         ehci_interrupt_poll(sc);
1540
1541 done:
1542         USB_BUS_UNLOCK(&sc->sc_bus);
1543 }
1544
1545 /*
1546  * called when a request does not complete
1547  */
1548 static void
1549 ehci_timeout(void *arg)
1550 {
1551         struct usb_xfer *xfer = arg;
1552
1553         DPRINTF("xfer=%p\n", xfer);
1554
1555         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1556
1557         /* transfer is transferred */
1558         ehci_device_done(xfer, USB_ERR_TIMEOUT);
1559 }
1560
1561 static void
1562 ehci_do_poll(struct usb_bus *bus)
1563 {
1564         ehci_softc_t *sc = EHCI_BUS2SC(bus);
1565
1566         USB_BUS_LOCK(&sc->sc_bus);
1567         ehci_interrupt_poll(sc);
1568         USB_BUS_UNLOCK(&sc->sc_bus);
1569 }
1570
1571 static void
1572 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1573 {
1574         struct usb_page_search buf_res;
1575         ehci_qtd_t *td;
1576         ehci_qtd_t *td_next;
1577         ehci_qtd_t *td_alt_next;
1578         uint32_t buf_offset;
1579         uint32_t average;
1580         uint32_t len_old;
1581         uint32_t terminate;
1582         uint8_t shortpkt_old;
1583         uint8_t precompute;
1584
1585         terminate = htohc32(temp->sc, EHCI_LINK_TERMINATE);
1586         td_alt_next = NULL;
1587         buf_offset = 0;
1588         shortpkt_old = temp->shortpkt;
1589         len_old = temp->len;
1590         precompute = 1;
1591
1592 restart:
1593
1594         td = temp->td;
1595         td_next = temp->td_next;
1596
1597         while (1) {
1598
1599                 if (temp->len == 0) {
1600
1601                         if (temp->shortpkt) {
1602                                 break;
1603                         }
1604                         /* send a Zero Length Packet, ZLP, last */
1605
1606                         temp->shortpkt = 1;
1607                         average = 0;
1608
1609                 } else {
1610
1611                         average = temp->average;
1612
1613                         if (temp->len < average) {
1614                                 if (temp->len % temp->max_frame_size) {
1615                                         temp->shortpkt = 1;
1616                                 }
1617                                 average = temp->len;
1618                         }
1619                 }
1620
1621                 if (td_next == NULL) {
1622                         panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1623                 }
1624                 /* get next TD */
1625
1626                 td = td_next;
1627                 td_next = td->obj_next;
1628
1629                 /* check if we are pre-computing */
1630
1631                 if (precompute) {
1632
1633                         /* update remaining length */
1634
1635                         temp->len -= average;
1636
1637                         continue;
1638                 }
1639                 /* fill out current TD */
1640
1641                 td->qtd_status =
1642                     temp->qtd_status |
1643                     htohc32(temp->sc, EHCI_QTD_IOC |
1644                         EHCI_QTD_SET_BYTES(average));
1645
1646                 if (average == 0) {
1647
1648                         if (temp->auto_data_toggle == 0) {
1649
1650                                 /* update data toggle, ZLP case */
1651
1652                                 temp->qtd_status ^=
1653                                     htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1654                         }
1655                         td->len = 0;
1656
1657                         td->qtd_buffer[0] = 0;
1658                         td->qtd_buffer_hi[0] = 0;
1659
1660                         td->qtd_buffer[1] = 0;
1661                         td->qtd_buffer_hi[1] = 0;
1662
1663                 } else {
1664
1665                         uint8_t x;
1666
1667                         if (temp->auto_data_toggle == 0) {
1668
1669                                 /* update data toggle */
1670
1671                                 if (((average + temp->max_frame_size - 1) /
1672                                     temp->max_frame_size) & 1) {
1673                                         temp->qtd_status ^=
1674                                             htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1675                                 }
1676                         }
1677                         td->len = average;
1678
1679                         /* update remaining length */
1680
1681                         temp->len -= average;
1682
1683                         /* fill out buffer pointers */
1684
1685                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1686                         td->qtd_buffer[0] =
1687                             htohc32(temp->sc, buf_res.physaddr);
1688                         td->qtd_buffer_hi[0] = 0;
1689
1690                         x = 1;
1691
1692                         while (average > EHCI_PAGE_SIZE) {
1693                                 average -= EHCI_PAGE_SIZE;
1694                                 buf_offset += EHCI_PAGE_SIZE;
1695                                 usbd_get_page(temp->pc, buf_offset, &buf_res);
1696                                 td->qtd_buffer[x] =
1697                                     htohc32(temp->sc,
1698                                     buf_res.physaddr & (~0xFFF));
1699                                 td->qtd_buffer_hi[x] = 0;
1700                                 x++;
1701                         }
1702
1703                         /*
1704                          * NOTE: The "average" variable is never zero after
1705                          * exiting the loop above !
1706                          *
1707                          * NOTE: We have to subtract one from the offset to
1708                          * ensure that we are computing the physical address
1709                          * of a valid page !
1710                          */
1711                         buf_offset += average;
1712                         usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1713                         td->qtd_buffer[x] =
1714                             htohc32(temp->sc,
1715                             buf_res.physaddr & (~0xFFF));
1716                         td->qtd_buffer_hi[x] = 0;
1717                 }
1718
1719                 if (temp->can_use_next) {
1720                         if (td_next) {
1721                                 /* link the current TD with the next one */
1722                                 td->qtd_next = td_next->qtd_self;
1723                         }
1724                 } else {
1725                         /*
1726                          * BUG WARNING: The EHCI HW can use the
1727                          * qtd_next field instead of qtd_altnext when
1728                          * a short packet is received! We work this
1729                          * around in software by not queueing more
1730                          * than one job/TD at a time!
1731                          */
1732                         td->qtd_next = terminate;
1733                 }
1734
1735                 td->qtd_altnext = terminate;
1736                 td->alt_next = td_alt_next;
1737
1738                 usb_pc_cpu_flush(td->page_cache);
1739         }
1740
1741         if (precompute) {
1742                 precompute = 0;
1743
1744                 /* setup alt next pointer, if any */
1745                 if (temp->last_frame) {
1746                         td_alt_next = NULL;
1747                 } else {
1748                         /* we use this field internally */
1749                         td_alt_next = td_next;
1750                 }
1751
1752                 /* restore */
1753                 temp->shortpkt = shortpkt_old;
1754                 temp->len = len_old;
1755                 goto restart;
1756         }
1757         temp->td = td;
1758         temp->td_next = td_next;
1759 }
1760
1761 static void
1762 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1763 {
1764         struct ehci_std_temp temp;
1765         struct usb_pipe_methods *methods;
1766         ehci_qh_t *qh;
1767         ehci_qtd_t *td;
1768         uint32_t qh_endp;
1769         uint32_t qh_endphub;
1770         uint32_t x;
1771
1772         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1773             xfer->address, UE_GET_ADDR(xfer->endpointno),
1774             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1775
1776         temp.average = xfer->max_hc_frame_size;
1777         temp.max_frame_size = xfer->max_frame_size;
1778         temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1779
1780         /* toggle the DMA set we are using */
1781         xfer->flags_int.curr_dma_set ^= 1;
1782
1783         /* get next DMA set */
1784         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1785
1786         xfer->td_transfer_first = td;
1787         xfer->td_transfer_cache = td;
1788
1789         temp.td = NULL;
1790         temp.td_next = td;
1791         temp.qtd_status = 0;
1792         temp.last_frame = 0;
1793         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1794         temp.can_use_next = (xfer->flags_int.control_xfr ||
1795             (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT));
1796
1797         if (xfer->flags_int.control_xfr) {
1798                 if (xfer->endpoint->toggle_next) {
1799                         /* DATA1 is next */
1800                         temp.qtd_status |=
1801                             htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1802                 }
1803                 temp.auto_data_toggle = 0;
1804         } else {
1805                 temp.auto_data_toggle = 1;
1806         }
1807
1808         if (usbd_get_speed(xfer->xroot->udev) != USB_SPEED_HIGH) {
1809                 /* max 3 retries */
1810                 temp.qtd_status |=
1811                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1812         }
1813         /* check if we should prepend a setup message */
1814
1815         if (xfer->flags_int.control_xfr) {
1816                 if (xfer->flags_int.control_hdr) {
1817
1818                         temp.qtd_status &=
1819                             htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1820                         temp.qtd_status |= htohc32(temp.sc,
1821                             EHCI_QTD_ACTIVE |
1822                             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1823                             EHCI_QTD_SET_TOGGLE(0));
1824
1825                         temp.len = xfer->frlengths[0];
1826                         temp.pc = xfer->frbuffers + 0;
1827                         temp.shortpkt = temp.len ? 1 : 0;
1828                         /* check for last frame */
1829                         if (xfer->nframes == 1) {
1830                                 /* no STATUS stage yet, SETUP is last */
1831                                 if (xfer->flags_int.control_act) {
1832                                         temp.last_frame = 1;
1833                                         temp.setup_alt_next = 0;
1834                                 }
1835                         }
1836                         ehci_setup_standard_chain_sub(&temp);
1837                 }
1838                 x = 1;
1839         } else {
1840                 x = 0;
1841         }
1842
1843         while (x != xfer->nframes) {
1844
1845                 /* DATA0 / DATA1 message */
1846
1847                 temp.len = xfer->frlengths[x];
1848                 temp.pc = xfer->frbuffers + x;
1849
1850                 x++;
1851
1852                 if (x == xfer->nframes) {
1853                         if (xfer->flags_int.control_xfr) {
1854                                 /* no STATUS stage yet, DATA is last */
1855                                 if (xfer->flags_int.control_act) {
1856                                         temp.last_frame = 1;
1857                                         temp.setup_alt_next = 0;
1858                                 }
1859                         } else {
1860                                 temp.last_frame = 1;
1861                                 temp.setup_alt_next = 0;
1862                         }
1863                 }
1864                 /* keep previous data toggle and error count */
1865
1866                 temp.qtd_status &=
1867                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1868                     EHCI_QTD_SET_TOGGLE(1));
1869
1870                 if (temp.len == 0) {
1871
1872                         /* make sure that we send an USB packet */
1873
1874                         temp.shortpkt = 0;
1875
1876                 } else {
1877
1878                         /* regular data transfer */
1879
1880                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1881                 }
1882
1883                 /* set endpoint direction */
1884
1885                 temp.qtd_status |=
1886                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1887                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1888                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1889                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1890                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1891
1892                 ehci_setup_standard_chain_sub(&temp);
1893         }
1894
1895         /* check if we should append a status stage */
1896
1897         if (xfer->flags_int.control_xfr &&
1898             !xfer->flags_int.control_act) {
1899
1900                 /*
1901                  * Send a DATA1 message and invert the current endpoint
1902                  * direction.
1903                  */
1904
1905                 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1906                     EHCI_QTD_SET_TOGGLE(1));
1907                 temp.qtd_status |=
1908                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1909                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1910                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1911                     EHCI_QTD_SET_TOGGLE(1)) :
1912                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1913                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1914                     EHCI_QTD_SET_TOGGLE(1));
1915
1916                 temp.len = 0;
1917                 temp.pc = NULL;
1918                 temp.shortpkt = 0;
1919                 temp.last_frame = 1;
1920                 temp.setup_alt_next = 0;
1921
1922                 ehci_setup_standard_chain_sub(&temp);
1923         }
1924         td = temp.td;
1925
1926         /* the last TD terminates the transfer: */
1927         td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1928         td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1929
1930         usb_pc_cpu_flush(td->page_cache);
1931
1932         /* must have at least one frame! */
1933
1934         xfer->td_transfer_last = td;
1935
1936 #if USB_DEBUG
1937         if (ehcidebug > 8) {
1938                 DPRINTF("nexttog=%d; data before transfer:\n",
1939                     xfer->endpoint->toggle_next);
1940                 ehci_dump_sqtds(temp.sc,
1941                     xfer->td_transfer_first);
1942         }
1943 #endif
1944
1945         methods = xfer->endpoint->methods;
1946
1947         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1948
1949         /* the "qh_link" field is filled when the QH is added */
1950
1951         qh_endp =
1952             (EHCI_QH_SET_ADDR(xfer->address) |
1953             EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1954             EHCI_QH_SET_MPL(xfer->max_packet_size));
1955
1956         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1957                 qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) |
1958                     EHCI_QH_DTC);
1959                 if (methods != &ehci_device_intr_methods)
1960                         qh_endp |= EHCI_QH_SET_NRL(8);
1961         } else {
1962
1963                 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1964                         qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL) |
1965                             EHCI_QH_DTC);
1966                 } else {
1967                         qh_endp |= (EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW) |
1968                             EHCI_QH_DTC);
1969                 }
1970
1971                 if (methods == &ehci_device_ctrl_methods) {
1972                         qh_endp |= EHCI_QH_CTL;
1973                 }
1974                 if (methods != &ehci_device_intr_methods) {
1975                         /* Only try one time per microframe! */
1976                         qh_endp |= EHCI_QH_SET_NRL(1);
1977                 }
1978         }
1979
1980         qh->qh_endp = htohc32(temp.sc, qh_endp);
1981
1982         qh_endphub =
1983             (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1984             EHCI_QH_SET_CMASK(xfer->usb_cmask) |
1985             EHCI_QH_SET_SMASK(xfer->usb_smask) |
1986             EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1987             EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1988
1989         qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1990         qh->qh_curqtd = htohc32(temp.sc, 0);
1991
1992         /* fill the overlay qTD */
1993         qh->qh_qtd.qtd_status = htohc32(temp.sc, 0);
1994
1995         if (temp.auto_data_toggle) {
1996
1997                 /* let the hardware compute the data toggle */
1998
1999                 qh->qh_endp &= htohc32(temp.sc, ~EHCI_QH_DTC);
2000
2001                 if (xfer->endpoint->toggle_next) {
2002                         /* DATA1 is next */
2003                         qh->qh_qtd.qtd_status |=
2004                             htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2005                 }
2006         }
2007         td = xfer->td_transfer_first;
2008
2009         qh->qh_qtd.qtd_next = td->qtd_self;
2010         qh->qh_qtd.qtd_altnext =
2011             htohc32(temp.sc, EHCI_LINK_TERMINATE);
2012
2013         usb_pc_cpu_flush(qh->page_cache);
2014
2015         if (xfer->xroot->udev->flags.self_suspended == 0) {
2016                 EHCI_APPEND_QH(qh, *qh_last);
2017         }
2018 }
2019
2020 static void
2021 ehci_root_intr(ehci_softc_t *sc)
2022 {
2023         uint16_t i;
2024         uint16_t m;
2025
2026         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2027
2028         /* clear any old interrupt data */
2029         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2030
2031         /* set bits */
2032         m = (sc->sc_noport + 1);
2033         if (m > (8 * sizeof(sc->sc_hub_idata))) {
2034                 m = (8 * sizeof(sc->sc_hub_idata));
2035         }
2036         for (i = 1; i < m; i++) {
2037                 /* pick out CHANGE bits from the status register */
2038                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2039                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2040                         DPRINTF("port %d changed\n", i);
2041                 }
2042         }
2043         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2044             sizeof(sc->sc_hub_idata));
2045 }
2046
2047 static void
2048 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2049 {
2050         uint32_t nframes = xfer->nframes;
2051         uint32_t status;
2052         uint32_t *plen = xfer->frlengths;
2053         uint16_t len = 0;
2054         ehci_sitd_t *td = xfer->td_transfer_first;
2055         ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2056
2057         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2058             xfer, xfer->endpoint);
2059
2060         while (nframes--) {
2061                 if (td == NULL) {
2062                         panic("%s:%d: out of TD's\n",
2063                             __FUNCTION__, __LINE__);
2064                 }
2065                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2066                         pp_last = &sc->sc_isoc_fs_p_last[0];
2067                 }
2068 #if USB_DEBUG
2069                 if (ehcidebug > 15) {
2070                         DPRINTF("isoc FS-TD\n");
2071                         ehci_dump_sitd(sc, td);
2072                 }
2073 #endif
2074                 usb_pc_cpu_invalidate(td->page_cache);
2075                 status = hc32toh(sc, td->sitd_status);
2076
2077                 len = EHCI_SITD_GET_LEN(status);
2078
2079                 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2080
2081                 if (*plen >= len) {
2082                         len = *plen - len;
2083                 } else {
2084                         len = 0;
2085                 }
2086
2087                 *plen = len;
2088
2089                 /* remove FS-TD from schedule */
2090                 EHCI_REMOVE_FS_TD(td, *pp_last);
2091
2092                 pp_last++;
2093                 plen++;
2094                 td = td->obj_next;
2095         }
2096
2097         xfer->aframes = xfer->nframes;
2098 }
2099
2100 static void
2101 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2102 {
2103         uint32_t nframes = xfer->nframes;
2104         uint32_t status;
2105         uint32_t *plen = xfer->frlengths;
2106         uint16_t len = 0;
2107         uint8_t td_no = 0;
2108         ehci_itd_t *td = xfer->td_transfer_first;
2109         ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2110
2111         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2112             xfer, xfer->endpoint);
2113
2114         while (nframes--) {
2115                 if (td == NULL) {
2116                         panic("%s:%d: out of TD's\n",
2117                             __FUNCTION__, __LINE__);
2118                 }
2119                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2120                         pp_last = &sc->sc_isoc_hs_p_last[0];
2121                 }
2122 #if USB_DEBUG
2123                 if (ehcidebug > 15) {
2124                         DPRINTF("isoc HS-TD\n");
2125                         ehci_dump_itd(sc, td);
2126                 }
2127 #endif
2128
2129                 usb_pc_cpu_invalidate(td->page_cache);
2130                 status = hc32toh(sc, td->itd_status[td_no]);
2131
2132                 len = EHCI_ITD_GET_LEN(status);
2133
2134                 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2135
2136                 if (*plen >= len) {
2137                         /*
2138                          * The length is valid. NOTE: The complete
2139                          * length is written back into the status
2140                          * field, and not the remainder like with
2141                          * other transfer descriptor types.
2142                          */
2143                 } else {
2144                         /* Invalid length - truncate */
2145                         len = 0;
2146                 }
2147
2148                 *plen = len;
2149
2150                 plen++;
2151                 td_no++;
2152
2153                 if ((td_no == 8) || (nframes == 0)) {
2154                         /* remove HS-TD from schedule */
2155                         EHCI_REMOVE_HS_TD(td, *pp_last);
2156                         pp_last++;
2157
2158                         td_no = 0;
2159                         td = td->obj_next;
2160                 }
2161         }
2162         xfer->aframes = xfer->nframes;
2163 }
2164
2165 /* NOTE: "done" can be run two times in a row,
2166  * from close and from interrupt
2167  */
2168 static void
2169 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2170 {
2171         struct usb_pipe_methods *methods = xfer->endpoint->methods;
2172         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2173
2174         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2175
2176         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2177             xfer, xfer->endpoint, error);
2178
2179         if ((methods == &ehci_device_bulk_methods) ||
2180             (methods == &ehci_device_ctrl_methods)) {
2181 #if USB_DEBUG
2182                 if (ehcidebug > 8) {
2183                         DPRINTF("nexttog=%d; data after transfer:\n",
2184                             xfer->endpoint->toggle_next);
2185                         ehci_dump_sqtds(sc,
2186                             xfer->td_transfer_first);
2187                 }
2188 #endif
2189
2190                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2191                     sc->sc_async_p_last);
2192         }
2193         if (methods == &ehci_device_intr_methods) {
2194                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2195                     sc->sc_intr_p_last[xfer->qh_pos]);
2196         }
2197         /*
2198          * Only finish isochronous transfers once which will update
2199          * "xfer->frlengths".
2200          */
2201         if (xfer->td_transfer_first &&
2202             xfer->td_transfer_last) {
2203                 if (methods == &ehci_device_isoc_fs_methods) {
2204                         ehci_isoc_fs_done(sc, xfer);
2205                 }
2206                 if (methods == &ehci_device_isoc_hs_methods) {
2207                         ehci_isoc_hs_done(sc, xfer);
2208                 }
2209                 xfer->td_transfer_first = NULL;
2210                 xfer->td_transfer_last = NULL;
2211         }
2212         /* dequeue transfer and start next transfer */
2213         usbd_transfer_done(xfer, error);
2214 }
2215
2216 /*------------------------------------------------------------------------*
2217  * ehci bulk support
2218  *------------------------------------------------------------------------*/
2219 static void
2220 ehci_device_bulk_open(struct usb_xfer *xfer)
2221 {
2222         return;
2223 }
2224
2225 static void
2226 ehci_device_bulk_close(struct usb_xfer *xfer)
2227 {
2228         ehci_device_done(xfer, USB_ERR_CANCELLED);
2229 }
2230
2231 static void
2232 ehci_device_bulk_enter(struct usb_xfer *xfer)
2233 {
2234         return;
2235 }
2236
2237 static void
2238 ehci_device_bulk_start(struct usb_xfer *xfer)
2239 {
2240         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2241         uint32_t temp;
2242
2243         /* setup TD's and QH */
2244         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2245
2246         /* put transfer on interrupt queue */
2247         ehci_transfer_intr_enqueue(xfer);
2248
2249         /* XXX Performance quirk: Some Host Controllers have a too low
2250          * interrupt rate. Issue an IAAD to stimulate the Host
2251          * Controller after queueing the BULK transfer.
2252          */
2253         temp = EOREAD4(sc, EHCI_USBCMD);
2254         if (!(temp & EHCI_CMD_IAAD))
2255                 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2256 }
2257
2258 struct usb_pipe_methods ehci_device_bulk_methods =
2259 {
2260         .open = ehci_device_bulk_open,
2261         .close = ehci_device_bulk_close,
2262         .enter = ehci_device_bulk_enter,
2263         .start = ehci_device_bulk_start,
2264 };
2265
2266 /*------------------------------------------------------------------------*
2267  * ehci control support
2268  *------------------------------------------------------------------------*/
2269 static void
2270 ehci_device_ctrl_open(struct usb_xfer *xfer)
2271 {
2272         return;
2273 }
2274
2275 static void
2276 ehci_device_ctrl_close(struct usb_xfer *xfer)
2277 {
2278         ehci_device_done(xfer, USB_ERR_CANCELLED);
2279 }
2280
2281 static void
2282 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2283 {
2284         return;
2285 }
2286
2287 static void
2288 ehci_device_ctrl_start(struct usb_xfer *xfer)
2289 {
2290         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2291
2292         /* setup TD's and QH */
2293         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2294
2295         /* put transfer on interrupt queue */
2296         ehci_transfer_intr_enqueue(xfer);
2297 }
2298
2299 struct usb_pipe_methods ehci_device_ctrl_methods =
2300 {
2301         .open = ehci_device_ctrl_open,
2302         .close = ehci_device_ctrl_close,
2303         .enter = ehci_device_ctrl_enter,
2304         .start = ehci_device_ctrl_start,
2305 };
2306
2307 /*------------------------------------------------------------------------*
2308  * ehci interrupt support
2309  *------------------------------------------------------------------------*/
2310 static void
2311 ehci_device_intr_open(struct usb_xfer *xfer)
2312 {
2313         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2314         uint16_t best;
2315         uint16_t bit;
2316         uint16_t x;
2317         uint8_t slot;
2318
2319         /* Allocate a microframe slot first: */
2320
2321         slot = usb_intr_schedule_adjust
2322             (xfer->xroot->udev, xfer->max_frame_size, USB_HS_MICRO_FRAMES_MAX);
2323
2324         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
2325                 xfer->usb_uframe = slot;
2326                 xfer->usb_smask = (1 << slot) & 0xFF;
2327                 xfer->usb_cmask = 0;
2328         } else {
2329                 xfer->usb_uframe = slot;
2330                 xfer->usb_smask = (1 << slot) & 0x3F;
2331                 xfer->usb_cmask = (-(4 << slot)) & 0xFE;
2332         }
2333
2334         /*
2335          * Find the best QH position corresponding to the given interval:
2336          */
2337
2338         best = 0;
2339         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2340         while (bit) {
2341                 if (xfer->interval >= bit) {
2342                         x = bit;
2343                         best = bit;
2344                         while (x & bit) {
2345                                 if (sc->sc_intr_stat[x] <
2346                                     sc->sc_intr_stat[best]) {
2347                                         best = x;
2348                                 }
2349                                 x++;
2350                         }
2351                         break;
2352                 }
2353                 bit >>= 1;
2354         }
2355
2356         sc->sc_intr_stat[best]++;
2357         xfer->qh_pos = best;
2358
2359         DPRINTFN(3, "best=%d interval=%d\n",
2360             best, xfer->interval);
2361 }
2362
2363 static void
2364 ehci_device_intr_close(struct usb_xfer *xfer)
2365 {
2366         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2367         uint8_t slot;
2368
2369         slot = usb_intr_schedule_adjust
2370             (xfer->xroot->udev, -(xfer->max_frame_size), xfer->usb_uframe);
2371
2372         sc->sc_intr_stat[xfer->qh_pos]--;
2373
2374         ehci_device_done(xfer, USB_ERR_CANCELLED);
2375 }
2376
2377 static void
2378 ehci_device_intr_enter(struct usb_xfer *xfer)
2379 {
2380         return;
2381 }
2382
2383 static void
2384 ehci_device_intr_start(struct usb_xfer *xfer)
2385 {
2386         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2387
2388         /* setup TD's and QH */
2389         ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2390
2391         /* put transfer on interrupt queue */
2392         ehci_transfer_intr_enqueue(xfer);
2393 }
2394
2395 struct usb_pipe_methods ehci_device_intr_methods =
2396 {
2397         .open = ehci_device_intr_open,
2398         .close = ehci_device_intr_close,
2399         .enter = ehci_device_intr_enter,
2400         .start = ehci_device_intr_start,
2401 };
2402
2403 /*------------------------------------------------------------------------*
2404  * ehci full speed isochronous support
2405  *------------------------------------------------------------------------*/
2406 static void
2407 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2408 {
2409         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2410         ehci_sitd_t *td;
2411         uint32_t sitd_portaddr;
2412         uint8_t ds;
2413
2414         sitd_portaddr =
2415             EHCI_SITD_SET_ADDR(xfer->address) |
2416             EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2417             EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2418             EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2419
2420         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2421                 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2422         }
2423         sitd_portaddr = htohc32(sc, sitd_portaddr);
2424
2425         /* initialize all TD's */
2426
2427         for (ds = 0; ds != 2; ds++) {
2428
2429                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2430
2431                         td->sitd_portaddr = sitd_portaddr;
2432
2433                         /*
2434                          * TODO: make some kind of automatic
2435                          * SMASK/CMASK selection based on micro-frame
2436                          * usage
2437                          *
2438                          * micro-frame usage (8 microframes per 1ms)
2439                          */
2440                         td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2441
2442                         usb_pc_cpu_flush(td->page_cache);
2443                 }
2444         }
2445 }
2446
2447 static void
2448 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2449 {
2450         ehci_device_done(xfer, USB_ERR_CANCELLED);
2451 }
2452
2453 static void
2454 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2455 {
2456         struct usb_page_search buf_res;
2457         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2458         struct usb_fs_isoc_schedule *fss_start;
2459         struct usb_fs_isoc_schedule *fss_end;
2460         struct usb_fs_isoc_schedule *fss;
2461         ehci_sitd_t *td;
2462         ehci_sitd_t *td_last = NULL;
2463         ehci_sitd_t **pp_last;
2464         uint32_t *plen;
2465         uint32_t buf_offset;
2466         uint32_t nframes;
2467         uint32_t temp;
2468         uint32_t sitd_mask;
2469         uint16_t tlen;
2470         uint8_t sa;
2471         uint8_t sb;
2472         uint8_t error;
2473
2474 #if USB_DEBUG
2475         uint8_t once = 1;
2476
2477 #endif
2478
2479         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2480             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2481
2482         /* get the current frame index */
2483
2484         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2485
2486         /*
2487          * check if the frame index is within the window where the frames
2488          * will be inserted
2489          */
2490         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2491             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2492
2493         if ((xfer->endpoint->is_synced == 0) ||
2494             (buf_offset < xfer->nframes)) {
2495                 /*
2496                  * If there is data underflow or the pipe queue is empty we
2497                  * schedule the transfer a few frames ahead of the current
2498                  * frame position. Else two isochronous transfers might
2499                  * overlap.
2500                  */
2501                 xfer->endpoint->isoc_next = (nframes + 3) &
2502                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2503                 xfer->endpoint->is_synced = 1;
2504                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2505         }
2506         /*
2507          * compute how many milliseconds the insertion is ahead of the
2508          * current frame position:
2509          */
2510         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2511             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2512
2513         /*
2514          * pre-compute when the isochronous transfer will be finished:
2515          */
2516         xfer->isoc_time_complete =
2517             usbd_fs_isoc_schedule_isoc_time_expand
2518             (xfer->xroot->udev, &fss_start, &fss_end, nframes) + buf_offset +
2519             xfer->nframes;
2520
2521         /* get the real number of frames */
2522
2523         nframes = xfer->nframes;
2524
2525         buf_offset = 0;
2526
2527         plen = xfer->frlengths;
2528
2529         /* toggle the DMA set we are using */
2530         xfer->flags_int.curr_dma_set ^= 1;
2531
2532         /* get next DMA set */
2533         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2534         xfer->td_transfer_first = td;
2535
2536         pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2537
2538         /* store starting position */
2539
2540         xfer->qh_pos = xfer->endpoint->isoc_next;
2541
2542         fss = fss_start + (xfer->qh_pos % USB_ISOC_TIME_MAX);
2543
2544         while (nframes--) {
2545                 if (td == NULL) {
2546                         panic("%s:%d: out of TD's\n",
2547                             __FUNCTION__, __LINE__);
2548                 }
2549                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2550                         pp_last = &sc->sc_isoc_fs_p_last[0];
2551                 }
2552                 if (fss >= fss_end) {
2553                         fss = fss_start;
2554                 }
2555                 /* reuse sitd_portaddr and sitd_back from last transfer */
2556
2557                 if (*plen > xfer->max_frame_size) {
2558 #if USB_DEBUG
2559                         if (once) {
2560                                 once = 0;
2561                                 printf("%s: frame length(%d) exceeds %d "
2562                                     "bytes (frame truncated)\n",
2563                                     __FUNCTION__, *plen,
2564                                     xfer->max_frame_size);
2565                         }
2566 #endif
2567                         *plen = xfer->max_frame_size;
2568                 }
2569                 /*
2570                  * We currently don't care if the ISOCHRONOUS schedule is
2571                  * full!
2572                  */
2573                 error = usbd_fs_isoc_schedule_alloc(fss, &sa, *plen);
2574                 if (error) {
2575                         /*
2576                          * The FULL speed schedule is FULL! Set length
2577                          * to zero.
2578                          */
2579                         *plen = 0;
2580                 }
2581                 if (*plen) {
2582                         /*
2583                          * only call "usbd_get_page()" when we have a
2584                          * non-zero length
2585                          */
2586                         usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2587                         td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2588                         buf_offset += *plen;
2589                         /*
2590                          * NOTE: We need to subtract one from the offset so
2591                          * that we are on a valid page!
2592                          */
2593                         usbd_get_page(xfer->frbuffers, buf_offset - 1,
2594                             &buf_res);
2595                         temp = buf_res.physaddr & ~0xFFF;
2596                 } else {
2597                         td->sitd_bp[0] = 0;
2598                         temp = 0;
2599                 }
2600
2601                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2602                         tlen = *plen;
2603                         if (tlen <= 188) {
2604                                 temp |= 1;      /* T-count = 1, TP = ALL */
2605                                 tlen = 1;
2606                         } else {
2607                                 tlen += 187;
2608                                 tlen /= 188;
2609                                 temp |= tlen;   /* T-count = [1..6] */
2610                                 temp |= 8;      /* TP = Begin */
2611                         }
2612
2613                         tlen += sa;
2614
2615                         if (tlen >= 8) {
2616                                 sb = 0;
2617                         } else {
2618                                 sb = (1 << tlen);
2619                         }
2620
2621                         sa = (1 << sa);
2622                         sa = (sb - sa) & 0x3F;
2623                         sb = 0;
2624                 } else {
2625                         sb = (-(4 << sa)) & 0xFE;
2626                         sa = (1 << sa) & 0x3F;
2627                 }
2628
2629                 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2630                     EHCI_SITD_SET_CMASK(sb));
2631
2632                 td->sitd_bp[1] = htohc32(sc, temp);
2633
2634                 td->sitd_mask = htohc32(sc, sitd_mask);
2635
2636                 if (nframes == 0) {
2637                         td->sitd_status = htohc32(sc,
2638                             EHCI_SITD_IOC |
2639                             EHCI_SITD_ACTIVE |
2640                             EHCI_SITD_SET_LEN(*plen));
2641                 } else {
2642                         td->sitd_status = htohc32(sc,
2643                             EHCI_SITD_ACTIVE |
2644                             EHCI_SITD_SET_LEN(*plen));
2645                 }
2646                 usb_pc_cpu_flush(td->page_cache);
2647
2648 #if USB_DEBUG
2649                 if (ehcidebug > 15) {
2650                         DPRINTF("FS-TD %d\n", nframes);
2651                         ehci_dump_sitd(sc, td);
2652                 }
2653 #endif
2654                 /* insert TD into schedule */
2655                 EHCI_APPEND_FS_TD(td, *pp_last);
2656                 pp_last++;
2657
2658                 plen++;
2659                 fss++;
2660                 td_last = td;
2661                 td = td->obj_next;
2662         }
2663
2664         xfer->td_transfer_last = td_last;
2665
2666         /* update isoc_next */
2667         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2668             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2669 }
2670
2671 static void
2672 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2673 {
2674         /* put transfer on interrupt queue */
2675         ehci_transfer_intr_enqueue(xfer);
2676 }
2677
2678 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2679 {
2680         .open = ehci_device_isoc_fs_open,
2681         .close = ehci_device_isoc_fs_close,
2682         .enter = ehci_device_isoc_fs_enter,
2683         .start = ehci_device_isoc_fs_start,
2684 };
2685
2686 /*------------------------------------------------------------------------*
2687  * ehci high speed isochronous support
2688  *------------------------------------------------------------------------*/
2689 static void
2690 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2691 {
2692         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2693         ehci_itd_t *td;
2694         uint32_t temp;
2695         uint8_t ds;
2696
2697         /* initialize all TD's */
2698
2699         for (ds = 0; ds != 2; ds++) {
2700
2701                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2702
2703                         /* set TD inactive */
2704                         td->itd_status[0] = 0;
2705                         td->itd_status[1] = 0;
2706                         td->itd_status[2] = 0;
2707                         td->itd_status[3] = 0;
2708                         td->itd_status[4] = 0;
2709                         td->itd_status[5] = 0;
2710                         td->itd_status[6] = 0;
2711                         td->itd_status[7] = 0;
2712
2713                         /* set endpoint and address */
2714                         td->itd_bp[0] = htohc32(sc,
2715                             EHCI_ITD_SET_ADDR(xfer->address) |
2716                             EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2717
2718                         temp =
2719                             EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2720
2721                         /* set direction */
2722                         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2723                                 temp |= EHCI_ITD_SET_DIR_IN;
2724                         }
2725                         /* set maximum packet size */
2726                         td->itd_bp[1] = htohc32(sc, temp);
2727
2728                         /* set transfer multiplier */
2729                         td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2730
2731                         usb_pc_cpu_flush(td->page_cache);
2732                 }
2733         }
2734 }
2735
2736 static void
2737 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2738 {
2739         ehci_device_done(xfer, USB_ERR_CANCELLED);
2740 }
2741
2742 static void
2743 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2744 {
2745         struct usb_page_search buf_res;
2746         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2747         ehci_itd_t *td;
2748         ehci_itd_t *td_last = NULL;
2749         ehci_itd_t **pp_last;
2750         bus_size_t page_addr;
2751         uint32_t *plen;
2752         uint32_t status;
2753         uint32_t buf_offset;
2754         uint32_t nframes;
2755         uint32_t itd_offset[8 + 1];
2756         uint8_t x;
2757         uint8_t td_no;
2758         uint8_t page_no;
2759
2760 #if USB_DEBUG
2761         uint8_t once = 1;
2762
2763 #endif
2764
2765         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2766             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2767
2768         /* get the current frame index */
2769
2770         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2771
2772         /*
2773          * check if the frame index is within the window where the frames
2774          * will be inserted
2775          */
2776         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2777             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2778
2779         if ((xfer->endpoint->is_synced == 0) ||
2780             (buf_offset < ((xfer->nframes + 7) / 8))) {
2781                 /*
2782                  * If there is data underflow or the pipe queue is empty we
2783                  * schedule the transfer a few frames ahead of the current
2784                  * frame position. Else two isochronous transfers might
2785                  * overlap.
2786                  */
2787                 xfer->endpoint->isoc_next = (nframes + 3) &
2788                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2789                 xfer->endpoint->is_synced = 1;
2790                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2791         }
2792         /*
2793          * compute how many milliseconds the insertion is ahead of the
2794          * current frame position:
2795          */
2796         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2797             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2798
2799         /*
2800          * pre-compute when the isochronous transfer will be finished:
2801          */
2802         xfer->isoc_time_complete =
2803             usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2804             ((xfer->nframes + 7) / 8);
2805
2806         /* get the real number of frames */
2807
2808         nframes = xfer->nframes;
2809
2810         buf_offset = 0;
2811         td_no = 0;
2812
2813         plen = xfer->frlengths;
2814
2815         /* toggle the DMA set we are using */
2816         xfer->flags_int.curr_dma_set ^= 1;
2817
2818         /* get next DMA set */
2819         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2820         xfer->td_transfer_first = td;
2821
2822         pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2823
2824         /* store starting position */
2825
2826         xfer->qh_pos = xfer->endpoint->isoc_next;
2827
2828         while (nframes--) {
2829                 if (td == NULL) {
2830                         panic("%s:%d: out of TD's\n",
2831                             __FUNCTION__, __LINE__);
2832                 }
2833                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2834                         pp_last = &sc->sc_isoc_hs_p_last[0];
2835                 }
2836                 /* range check */
2837                 if (*plen > xfer->max_frame_size) {
2838 #if USB_DEBUG
2839                         if (once) {
2840                                 once = 0;
2841                                 printf("%s: frame length(%d) exceeds %d bytes "
2842                                     "(frame truncated)\n",
2843                                     __FUNCTION__, *plen, xfer->max_frame_size);
2844                         }
2845 #endif
2846                         *plen = xfer->max_frame_size;
2847                 }
2848                 status = (EHCI_ITD_SET_LEN(*plen) |
2849                     EHCI_ITD_ACTIVE |
2850                     EHCI_ITD_SET_PG(0));
2851                 td->itd_status[td_no] = htohc32(sc, status);
2852                 itd_offset[td_no] = buf_offset;
2853                 buf_offset += *plen;
2854                 plen++;
2855                 td_no++;
2856
2857                 if ((td_no == 8) || (nframes == 0)) {
2858
2859                         /* the rest of the transfers are not active, if any */
2860                         for (x = td_no; x != 8; x++) {
2861                                 td->itd_status[x] = 0;  /* not active */
2862                         }
2863
2864                         /* check if there is any data to be transferred */
2865                         if (itd_offset[0] != buf_offset) {
2866                                 page_no = 0;
2867                                 itd_offset[td_no] = buf_offset;
2868
2869                                 /* get first page offset */
2870                                 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2871                                 /* get page address */
2872                                 page_addr = buf_res.physaddr & ~0xFFF;
2873                                 /* update page address */
2874                                 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2875                                 td->itd_bp[0] |= htohc32(sc, page_addr);
2876
2877                                 for (x = 0; x != td_no; x++) {
2878                                         /* set page number and page offset */
2879                                         status = (EHCI_ITD_SET_PG(page_no) |
2880                                             (buf_res.physaddr & 0xFFF));
2881                                         td->itd_status[x] |= htohc32(sc, status);
2882
2883                                         /* get next page offset */
2884                                         if (itd_offset[x + 1] == buf_offset) {
2885                                                 /*
2886                                                  * We subtract one so that
2887                                                  * we don't go off the last
2888                                                  * page!
2889                                                  */
2890                                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2891                                         } else {
2892                                                 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2893                                         }
2894
2895                                         /* check if we need a new page */
2896                                         if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2897                                                 /* new page needed */
2898                                                 page_addr = buf_res.physaddr & ~0xFFF;
2899                                                 if (page_no == 6) {
2900                                                         panic("%s: too many pages\n", __FUNCTION__);
2901                                                 }
2902                                                 page_no++;
2903                                                 /* update page address */
2904                                                 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2905                                                 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2906                                         }
2907                                 }
2908                         }
2909                         /* set IOC bit if we are complete */
2910                         if (nframes == 0) {
2911                                 td->itd_status[7] |= htohc32(sc, EHCI_ITD_IOC);
2912                         }
2913                         usb_pc_cpu_flush(td->page_cache);
2914 #if USB_DEBUG
2915                         if (ehcidebug > 15) {
2916                                 DPRINTF("HS-TD %d\n", nframes);
2917                                 ehci_dump_itd(sc, td);
2918                         }
2919 #endif
2920                         /* insert TD into schedule */
2921                         EHCI_APPEND_HS_TD(td, *pp_last);
2922                         pp_last++;
2923
2924                         td_no = 0;
2925                         td_last = td;
2926                         td = td->obj_next;
2927                 }
2928         }
2929
2930         xfer->td_transfer_last = td_last;
2931
2932         /* update isoc_next */
2933         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2934             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2935 }
2936
2937 static void
2938 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2939 {
2940         /* put transfer on interrupt queue */
2941         ehci_transfer_intr_enqueue(xfer);
2942 }
2943
2944 struct usb_pipe_methods ehci_device_isoc_hs_methods =
2945 {
2946         .open = ehci_device_isoc_hs_open,
2947         .close = ehci_device_isoc_hs_close,
2948         .enter = ehci_device_isoc_hs_enter,
2949         .start = ehci_device_isoc_hs_start,
2950 };
2951
2952 /*------------------------------------------------------------------------*
2953  * ehci root control support
2954  *------------------------------------------------------------------------*
2955  * Simulate a hardware hub by handling all the necessary requests.
2956  *------------------------------------------------------------------------*/
2957
2958 static const
2959 struct usb_device_descriptor ehci_devd =
2960 {
2961         sizeof(struct usb_device_descriptor),
2962         UDESC_DEVICE,                   /* type */
2963         {0x00, 0x02},                   /* USB version */
2964         UDCLASS_HUB,                    /* class */
2965         UDSUBCLASS_HUB,                 /* subclass */
2966         UDPROTO_HSHUBSTT,               /* protocol */
2967         64,                             /* max packet */
2968         {0}, {0}, {0x00, 0x01},         /* device id */
2969         1, 2, 0,                        /* string indicies */
2970         1                               /* # of configurations */
2971 };
2972
2973 static const
2974 struct usb_device_qualifier ehci_odevd =
2975 {
2976         sizeof(struct usb_device_qualifier),
2977         UDESC_DEVICE_QUALIFIER,         /* type */
2978         {0x00, 0x02},                   /* USB version */
2979         UDCLASS_HUB,                    /* class */
2980         UDSUBCLASS_HUB,                 /* subclass */
2981         UDPROTO_FSHUB,                  /* protocol */
2982         0,                              /* max packet */
2983         0,                              /* # of configurations */
2984         0
2985 };
2986
2987 static const struct ehci_config_desc ehci_confd = {
2988         .confd = {
2989                 .bLength = sizeof(struct usb_config_descriptor),
2990                 .bDescriptorType = UDESC_CONFIG,
2991                 .wTotalLength[0] = sizeof(ehci_confd),
2992                 .bNumInterface = 1,
2993                 .bConfigurationValue = 1,
2994                 .iConfiguration = 0,
2995                 .bmAttributes = UC_SELF_POWERED,
2996                 .bMaxPower = 0          /* max power */
2997         },
2998         .ifcd = {
2999                 .bLength = sizeof(struct usb_interface_descriptor),
3000                 .bDescriptorType = UDESC_INTERFACE,
3001                 .bNumEndpoints = 1,
3002                 .bInterfaceClass = UICLASS_HUB,
3003                 .bInterfaceSubClass = UISUBCLASS_HUB,
3004                 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
3005                 0
3006         },
3007         .endpd = {
3008                 .bLength = sizeof(struct usb_endpoint_descriptor),
3009                 .bDescriptorType = UDESC_ENDPOINT,
3010                 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3011                 .bmAttributes = UE_INTERRUPT,
3012                 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3013                 .bInterval = 255,
3014         },
3015 };
3016
3017 static const
3018 struct usb_hub_descriptor ehci_hubd =
3019 {
3020         0,                              /* dynamic length */
3021         UDESC_HUB,
3022         0,
3023         {0, 0},
3024         0,
3025         0,
3026         {0},
3027 };
3028
3029 static void
3030 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3031 {
3032         uint32_t port;
3033         uint32_t v;
3034
3035         DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3036
3037         port = EHCI_PORTSC(index);
3038         v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3039         EOWRITE4(sc, port, v | EHCI_PS_PO);
3040 }
3041
3042 static usb_error_t
3043 ehci_roothub_exec(struct usb_device *udev,
3044     struct usb_device_request *req, const void **pptr, uint16_t *plength)
3045 {
3046         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3047         const char *str_ptr;
3048         const void *ptr;
3049         uint32_t port;
3050         uint32_t v;
3051         uint16_t len;
3052         uint16_t i;
3053         uint16_t value;
3054         uint16_t index;
3055         uint8_t l;
3056         usb_error_t err;
3057
3058         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3059
3060         /* buffer reset */
3061         ptr = (const void *)&sc->sc_hub_desc;
3062         len = 0;
3063         err = 0;
3064
3065         value = UGETW(req->wValue);
3066         index = UGETW(req->wIndex);
3067
3068         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3069             "wValue=0x%04x wIndex=0x%04x\n",
3070             req->bmRequestType, req->bRequest,
3071             UGETW(req->wLength), value, index);
3072
3073 #define C(x,y) ((x) | ((y) << 8))
3074         switch (C(req->bRequest, req->bmRequestType)) {
3075         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3076         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3077         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3078                 /*
3079                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3080                  * for the integrated root hub.
3081                  */
3082                 break;
3083         case C(UR_GET_CONFIG, UT_READ_DEVICE):
3084                 len = 1;
3085                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3086                 break;
3087         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3088                 switch (value >> 8) {
3089                 case UDESC_DEVICE:
3090                         if ((value & 0xff) != 0) {
3091                                 err = USB_ERR_IOERROR;
3092                                 goto done;
3093                         }
3094                         len = sizeof(ehci_devd);
3095                         ptr = (const void *)&ehci_devd;
3096                         break;
3097                         /*
3098                          * We can't really operate at another speed,
3099                          * but the specification says we need this
3100                          * descriptor:
3101                          */
3102                 case UDESC_DEVICE_QUALIFIER:
3103                         if ((value & 0xff) != 0) {
3104                                 err = USB_ERR_IOERROR;
3105                                 goto done;
3106                         }
3107                         len = sizeof(ehci_odevd);
3108                         ptr = (const void *)&ehci_odevd;
3109                         break;
3110
3111                 case UDESC_CONFIG:
3112                         if ((value & 0xff) != 0) {
3113                                 err = USB_ERR_IOERROR;
3114                                 goto done;
3115                         }
3116                         len = sizeof(ehci_confd);
3117                         ptr = (const void *)&ehci_confd;
3118                         break;
3119
3120                 case UDESC_STRING:
3121                         switch (value & 0xff) {
3122                         case 0: /* Language table */
3123                                 str_ptr = "\001";
3124                                 break;
3125
3126                         case 1: /* Vendor */
3127                                 str_ptr = sc->sc_vendor;
3128                                 break;
3129
3130                         case 2: /* Product */
3131                                 str_ptr = "EHCI root HUB";
3132                                 break;
3133
3134                         default:
3135                                 str_ptr = "";
3136                                 break;
3137                         }
3138
3139                         len = usb_make_str_desc(
3140                             sc->sc_hub_desc.temp,
3141                             sizeof(sc->sc_hub_desc.temp),
3142                             str_ptr);
3143                         break;
3144                 default:
3145                         err = USB_ERR_IOERROR;
3146                         goto done;
3147                 }
3148                 break;
3149         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3150                 len = 1;
3151                 sc->sc_hub_desc.temp[0] = 0;
3152                 break;
3153         case C(UR_GET_STATUS, UT_READ_DEVICE):
3154                 len = 2;
3155                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3156                 break;
3157         case C(UR_GET_STATUS, UT_READ_INTERFACE):
3158         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3159                 len = 2;
3160                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3161                 break;
3162         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3163                 if (value >= EHCI_MAX_DEVICES) {
3164                         err = USB_ERR_IOERROR;
3165                         goto done;
3166                 }
3167                 sc->sc_addr = value;
3168                 break;
3169         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3170                 if ((value != 0) && (value != 1)) {
3171                         err = USB_ERR_IOERROR;
3172                         goto done;
3173                 }
3174                 sc->sc_conf = value;
3175                 break;
3176         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3177                 break;
3178         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3179         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3180         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3181                 err = USB_ERR_IOERROR;
3182                 goto done;
3183         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3184                 break;
3185         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3186                 break;
3187                 /* Hub requests */
3188         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3189                 break;
3190         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3191                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3192
3193                 if ((index < 1) ||
3194                     (index > sc->sc_noport)) {
3195                         err = USB_ERR_IOERROR;
3196                         goto done;
3197                 }
3198                 port = EHCI_PORTSC(index);
3199                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3200                 switch (value) {
3201                 case UHF_PORT_ENABLE:
3202                         EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3203                         break;
3204                 case UHF_PORT_SUSPEND:
3205                         if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3206
3207                                 /*
3208                                  * waking up a High Speed device is rather
3209                                  * complicated if
3210                                  */
3211                                 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3212                         }
3213                         /* wait 20ms for resume sequence to complete */
3214                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3215
3216                         EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3217                             EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3218
3219                         /* 4ms settle time */
3220                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3221                         break;
3222                 case UHF_PORT_POWER:
3223                         EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3224                         break;
3225                 case UHF_PORT_TEST:
3226                         DPRINTFN(3, "clear port test "
3227                             "%d\n", index);
3228                         break;
3229                 case UHF_PORT_INDICATOR:
3230                         DPRINTFN(3, "clear port ind "
3231                             "%d\n", index);
3232                         EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3233                         break;
3234                 case UHF_C_PORT_CONNECTION:
3235                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
3236                         break;
3237                 case UHF_C_PORT_ENABLE:
3238                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
3239                         break;
3240                 case UHF_C_PORT_SUSPEND:
3241                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3242                         break;
3243                 case UHF_C_PORT_OVER_CURRENT:
3244                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
3245                         break;
3246                 case UHF_C_PORT_RESET:
3247                         sc->sc_isreset = 0;
3248                         break;
3249                 default:
3250                         err = USB_ERR_IOERROR;
3251                         goto done;
3252                 }
3253                 break;
3254         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3255                 if ((value & 0xff) != 0) {
3256                         err = USB_ERR_IOERROR;
3257                         goto done;
3258                 }
3259                 v = EOREAD4(sc, EHCI_HCSPARAMS);
3260
3261                 sc->sc_hub_desc.hubd = ehci_hubd;
3262                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3263                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
3264                     (EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH) |
3265                     (EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) ?
3266                     UHD_PORT_IND : 0));
3267                 /* XXX can't find out? */
3268                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3269                 for (l = 0; l < sc->sc_noport; l++) {
3270                         /* XXX can't find out? */
3271                         sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] &= ~(1 << (l % 8));
3272                 }
3273                 sc->sc_hub_desc.hubd.bDescLength =
3274                     8 + ((sc->sc_noport + 7) / 8);
3275                 len = sc->sc_hub_desc.hubd.bDescLength;
3276                 break;
3277         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3278                 len = 16;
3279                 bzero(sc->sc_hub_desc.temp, 16);
3280                 break;
3281         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3282                 DPRINTFN(9, "get port status i=%d\n",
3283                     index);
3284                 if ((index < 1) ||
3285                     (index > sc->sc_noport)) {
3286                         err = USB_ERR_IOERROR;
3287                         goto done;
3288                 }
3289                 v = EOREAD4(sc, EHCI_PORTSC(index));
3290                 DPRINTFN(9, "port status=0x%04x\n", v);
3291                 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3292                         if ((v & 0xc000000) == 0x8000000)
3293                                 i = UPS_HIGH_SPEED;
3294                         else if ((v & 0xc000000) == 0x4000000)
3295                                 i = UPS_LOW_SPEED;
3296                         else
3297                                 i = 0;
3298                 } else {
3299                         i = UPS_HIGH_SPEED;
3300                 }
3301                 if (v & EHCI_PS_CS)
3302                         i |= UPS_CURRENT_CONNECT_STATUS;
3303                 if (v & EHCI_PS_PE)
3304                         i |= UPS_PORT_ENABLED;
3305                 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3306                         i |= UPS_SUSPEND;
3307                 if (v & EHCI_PS_OCA)
3308                         i |= UPS_OVERCURRENT_INDICATOR;
3309                 if (v & EHCI_PS_PR)
3310                         i |= UPS_RESET;
3311                 if (v & EHCI_PS_PP)
3312                         i |= UPS_PORT_POWER;
3313                 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3314                 i = 0;
3315                 if (v & EHCI_PS_CSC)
3316                         i |= UPS_C_CONNECT_STATUS;
3317                 if (v & EHCI_PS_PEC)
3318                         i |= UPS_C_PORT_ENABLED;
3319                 if (v & EHCI_PS_OCC)
3320                         i |= UPS_C_OVERCURRENT_INDICATOR;
3321                 if (v & EHCI_PS_FPR)
3322                         i |= UPS_C_SUSPEND;
3323                 if (sc->sc_isreset)
3324                         i |= UPS_C_PORT_RESET;
3325                 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3326                 len = sizeof(sc->sc_hub_desc.ps);
3327                 break;
3328         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3329                 err = USB_ERR_IOERROR;
3330                 goto done;
3331         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3332                 break;
3333         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3334                 if ((index < 1) ||
3335                     (index > sc->sc_noport)) {
3336                         err = USB_ERR_IOERROR;
3337                         goto done;
3338                 }
3339                 port = EHCI_PORTSC(index);
3340                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3341                 switch (value) {
3342                 case UHF_PORT_ENABLE:
3343                         EOWRITE4(sc, port, v | EHCI_PS_PE);
3344                         break;
3345                 case UHF_PORT_SUSPEND:
3346                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3347                         break;
3348                 case UHF_PORT_RESET:
3349                         DPRINTFN(6, "reset port %d\n", index);
3350 #if USB_DEBUG
3351                         if (ehcinohighspeed) {
3352                                 /*
3353                                  * Connect USB device to companion
3354                                  * controller.
3355                                  */
3356                                 ehci_disown(sc, index, 1);
3357                                 break;
3358                         }
3359 #endif
3360                         if (EHCI_PS_IS_LOWSPEED(v) &&
3361                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3362                                 /* Low speed device, give up ownership. */
3363                                 ehci_disown(sc, index, 1);
3364                                 break;
3365                         }
3366                         /* Start reset sequence. */
3367                         v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3368                         EOWRITE4(sc, port, v | EHCI_PS_PR);
3369
3370                         /* Wait for reset to complete. */
3371                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3372                             USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
3373
3374                         /* Terminate reset sequence. */
3375                         if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3376                                 EOWRITE4(sc, port, v);
3377
3378                         /* Wait for HC to complete reset. */
3379                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3380                             USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3381
3382                         v = EOREAD4(sc, port);
3383                         DPRINTF("ehci after reset, status=0x%08x\n", v);
3384                         if (v & EHCI_PS_PR) {
3385                                 device_printf(sc->sc_bus.bdev,
3386                                     "port reset timeout\n");
3387                                 err = USB_ERR_TIMEOUT;
3388                                 goto done;
3389                         }
3390                         if (!(v & EHCI_PS_PE) &&
3391                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3392                                 /* Not a high speed device, give up ownership.*/
3393                                 ehci_disown(sc, index, 0);
3394                                 break;
3395                         }
3396                         sc->sc_isreset = 1;
3397                         DPRINTF("ehci port %d reset, status = 0x%08x\n",
3398                             index, v);
3399                         break;
3400
3401                 case UHF_PORT_POWER:
3402                         DPRINTFN(3, "set port power %d\n", index);
3403                         EOWRITE4(sc, port, v | EHCI_PS_PP);
3404                         break;
3405
3406                 case UHF_PORT_TEST:
3407                         DPRINTFN(3, "set port test %d\n", index);
3408                         break;
3409
3410                 case UHF_PORT_INDICATOR:
3411                         DPRINTFN(3, "set port ind %d\n", index);
3412                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
3413                         break;
3414
3415                 default:
3416                         err = USB_ERR_IOERROR;
3417                         goto done;
3418                 }
3419                 break;
3420         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3421         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3422         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3423         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3424                 break;
3425         default:
3426                 err = USB_ERR_IOERROR;
3427                 goto done;
3428         }
3429 done:
3430         *plength = len;
3431         *pptr = ptr;
3432         return (err);
3433 }
3434
3435 static void
3436 ehci_xfer_setup(struct usb_setup_params *parm)
3437 {
3438         struct usb_page_search page_info;
3439         struct usb_page_cache *pc;
3440         ehci_softc_t *sc;
3441         struct usb_xfer *xfer;
3442         void *last_obj;
3443         uint32_t nqtd;
3444         uint32_t nqh;
3445         uint32_t nsitd;
3446         uint32_t nitd;
3447         uint32_t n;
3448
3449         sc = EHCI_BUS2SC(parm->udev->bus);
3450         xfer = parm->curr_xfer;
3451
3452         nqtd = 0;
3453         nqh = 0;
3454         nsitd = 0;
3455         nitd = 0;
3456
3457         /*
3458          * compute maximum number of some structures
3459          */
3460         if (parm->methods == &ehci_device_ctrl_methods) {
3461
3462                 /*
3463                  * The proof for the "nqtd" formula is illustrated like
3464                  * this:
3465                  *
3466                  * +------------------------------------+
3467                  * |                                    |
3468                  * |         |remainder ->              |
3469                  * |   +-----+---+                      |
3470                  * |   | xxx | x | frm 0                |
3471                  * |   +-----+---++                     |
3472                  * |   | xxx | xx | frm 1               |
3473                  * |   +-----+----+                     |
3474                  * |            ...                     |
3475                  * +------------------------------------+
3476                  *
3477                  * "xxx" means a completely full USB transfer descriptor
3478                  *
3479                  * "x" and "xx" means a short USB packet
3480                  *
3481                  * For the remainder of an USB transfer modulo
3482                  * "max_data_length" we need two USB transfer descriptors.
3483                  * One to transfer the remaining data and one to finalise
3484                  * with a zero length packet in case the "force_short_xfer"
3485                  * flag is set. We only need two USB transfer descriptors in
3486                  * the case where the transfer length of the first one is a
3487                  * factor of "max_frame_size". The rest of the needed USB
3488                  * transfer descriptors is given by the buffer size divided
3489                  * by the maximum data payload.
3490                  */
3491                 parm->hc_max_packet_size = 0x400;
3492                 parm->hc_max_packet_count = 1;
3493                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3494                 xfer->flags_int.bdma_enable = 1;
3495
3496                 usbd_transfer_setup_sub(parm);
3497
3498                 nqh = 1;
3499                 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3500                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3501
3502         } else if (parm->methods == &ehci_device_bulk_methods) {
3503
3504                 parm->hc_max_packet_size = 0x400;
3505                 parm->hc_max_packet_count = 1;
3506                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3507                 xfer->flags_int.bdma_enable = 1;
3508
3509                 usbd_transfer_setup_sub(parm);
3510
3511                 nqh = 1;
3512                 nqtd = ((2 * xfer->nframes)
3513                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3514
3515         } else if (parm->methods == &ehci_device_intr_methods) {
3516
3517                 if (parm->speed == USB_SPEED_HIGH) {
3518                         parm->hc_max_packet_size = 0x400;
3519                         parm->hc_max_packet_count = 3;
3520                 } else if (parm->speed == USB_SPEED_FULL) {
3521                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3522                         parm->hc_max_packet_count = 1;
3523                 } else {
3524                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3525                         parm->hc_max_packet_count = 1;
3526                 }
3527
3528                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3529                 xfer->flags_int.bdma_enable = 1;
3530
3531                 usbd_transfer_setup_sub(parm);
3532
3533                 nqh = 1;
3534                 nqtd = ((2 * xfer->nframes)
3535                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3536
3537         } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3538
3539                 parm->hc_max_packet_size = 0x3FF;
3540                 parm->hc_max_packet_count = 1;
3541                 parm->hc_max_frame_size = 0x3FF;
3542                 xfer->flags_int.bdma_enable = 1;
3543
3544                 usbd_transfer_setup_sub(parm);
3545
3546                 nsitd = xfer->nframes;
3547
3548         } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3549
3550                 parm->hc_max_packet_size = 0x400;
3551                 parm->hc_max_packet_count = 3;
3552                 parm->hc_max_frame_size = 0xC00;
3553                 xfer->flags_int.bdma_enable = 1;
3554
3555                 usbd_transfer_setup_sub(parm);
3556
3557                 nitd = (xfer->nframes + 7) / 8;
3558
3559         } else {
3560
3561                 parm->hc_max_packet_size = 0x400;
3562                 parm->hc_max_packet_count = 1;
3563                 parm->hc_max_frame_size = 0x400;
3564
3565                 usbd_transfer_setup_sub(parm);
3566         }
3567
3568 alloc_dma_set:
3569
3570         if (parm->err) {
3571                 return;
3572         }
3573         /*
3574          * Allocate queue heads and transfer descriptors
3575          */
3576         last_obj = NULL;
3577
3578         if (usbd_transfer_setup_sub_malloc(
3579             parm, &pc, sizeof(ehci_itd_t),
3580             EHCI_ITD_ALIGN, nitd)) {
3581                 parm->err = USB_ERR_NOMEM;
3582                 return;
3583         }
3584         if (parm->buf) {
3585                 for (n = 0; n != nitd; n++) {
3586                         ehci_itd_t *td;
3587
3588                         usbd_get_page(pc + n, 0, &page_info);
3589
3590                         td = page_info.buffer;
3591
3592                         /* init TD */
3593                         td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3594                         td->obj_next = last_obj;
3595                         td->page_cache = pc + n;
3596
3597                         last_obj = td;
3598
3599                         usb_pc_cpu_flush(pc + n);
3600                 }
3601         }
3602         if (usbd_transfer_setup_sub_malloc(
3603             parm, &pc, sizeof(ehci_sitd_t),
3604             EHCI_SITD_ALIGN, nsitd)) {
3605                 parm->err = USB_ERR_NOMEM;
3606                 return;
3607         }
3608         if (parm->buf) {
3609                 for (n = 0; n != nsitd; n++) {
3610                         ehci_sitd_t *td;
3611
3612                         usbd_get_page(pc + n, 0, &page_info);
3613
3614                         td = page_info.buffer;
3615
3616                         /* init TD */
3617                         td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3618                         td->obj_next = last_obj;
3619                         td->page_cache = pc + n;
3620
3621                         last_obj = td;
3622
3623                         usb_pc_cpu_flush(pc + n);
3624                 }
3625         }
3626         if (usbd_transfer_setup_sub_malloc(
3627             parm, &pc, sizeof(ehci_qtd_t),
3628             EHCI_QTD_ALIGN, nqtd)) {
3629                 parm->err = USB_ERR_NOMEM;
3630                 return;
3631         }
3632         if (parm->buf) {
3633                 for (n = 0; n != nqtd; n++) {
3634                         ehci_qtd_t *qtd;
3635
3636                         usbd_get_page(pc + n, 0, &page_info);
3637
3638                         qtd = page_info.buffer;
3639
3640                         /* init TD */
3641                         qtd->qtd_self = htohc32(sc, page_info.physaddr);
3642                         qtd->obj_next = last_obj;
3643                         qtd->page_cache = pc + n;
3644
3645                         last_obj = qtd;
3646
3647                         usb_pc_cpu_flush(pc + n);
3648                 }
3649         }
3650         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3651
3652         last_obj = NULL;
3653
3654         if (usbd_transfer_setup_sub_malloc(
3655             parm, &pc, sizeof(ehci_qh_t),
3656             EHCI_QH_ALIGN, nqh)) {
3657                 parm->err = USB_ERR_NOMEM;
3658                 return;
3659         }
3660         if (parm->buf) {
3661                 for (n = 0; n != nqh; n++) {
3662                         ehci_qh_t *qh;
3663
3664                         usbd_get_page(pc + n, 0, &page_info);
3665
3666                         qh = page_info.buffer;
3667
3668                         /* init QH */
3669                         qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3670                         qh->obj_next = last_obj;
3671                         qh->page_cache = pc + n;
3672
3673                         last_obj = qh;
3674
3675                         usb_pc_cpu_flush(pc + n);
3676                 }
3677         }
3678         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3679
3680         if (!xfer->flags_int.curr_dma_set) {
3681                 xfer->flags_int.curr_dma_set = 1;
3682                 goto alloc_dma_set;
3683         }
3684 }
3685
3686 static void
3687 ehci_xfer_unsetup(struct usb_xfer *xfer)
3688 {
3689         return;
3690 }
3691
3692 static void
3693 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3694     struct usb_endpoint *ep)
3695 {
3696         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3697
3698         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3699             ep, udev->address,
3700             edesc->bEndpointAddress, udev->flags.usb_mode,
3701             sc->sc_addr);
3702
3703         if (udev->flags.usb_mode != USB_MODE_HOST) {
3704                 /* not supported */
3705                 return;
3706         }
3707         if (udev->device_index != sc->sc_addr) {
3708
3709                 if ((udev->speed != USB_SPEED_HIGH) &&
3710                     ((udev->hs_hub_addr == 0) ||
3711                     (udev->hs_port_no == 0) ||
3712                     (udev->parent_hs_hub == NULL) ||
3713                     (udev->parent_hs_hub->hub == NULL))) {
3714                         /* We need a transaction translator */
3715                         goto done;
3716                 }
3717                 switch (edesc->bmAttributes & UE_XFERTYPE) {
3718                 case UE_CONTROL:
3719                         ep->methods = &ehci_device_ctrl_methods;
3720                         break;
3721                 case UE_INTERRUPT:
3722                         ep->methods = &ehci_device_intr_methods;
3723                         break;
3724                 case UE_ISOCHRONOUS:
3725                         if (udev->speed == USB_SPEED_HIGH) {
3726                                 ep->methods = &ehci_device_isoc_hs_methods;
3727                         } else if (udev->speed == USB_SPEED_FULL) {
3728                                 ep->methods = &ehci_device_isoc_fs_methods;
3729                         }
3730                         break;
3731                 case UE_BULK:
3732                         if (udev->speed != USB_SPEED_LOW) {
3733                                 ep->methods = &ehci_device_bulk_methods;
3734                         }
3735                         break;
3736                 default:
3737                         /* do nothing */
3738                         break;
3739                 }
3740         }
3741 done:
3742         return;
3743 }
3744
3745 static void
3746 ehci_get_dma_delay(struct usb_bus *bus, uint32_t *pus)
3747 {
3748         /*
3749          * Wait until the hardware has finished any possible use of
3750          * the transfer descriptor(s) and QH
3751          */
3752         *pus = (188);                   /* microseconds */
3753 }
3754
3755 static void
3756 ehci_device_resume(struct usb_device *udev)
3757 {
3758         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3759         struct usb_xfer *xfer;
3760         struct usb_pipe_methods *methods;
3761
3762         DPRINTF("\n");
3763
3764         USB_BUS_LOCK(udev->bus);
3765
3766         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3767
3768                 if (xfer->xroot->udev == udev) {
3769
3770                         methods = xfer->endpoint->methods;
3771
3772                         if ((methods == &ehci_device_bulk_methods) ||
3773                             (methods == &ehci_device_ctrl_methods)) {
3774                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3775                                     sc->sc_async_p_last);
3776                         }
3777                         if (methods == &ehci_device_intr_methods) {
3778                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3779                                     sc->sc_intr_p_last[xfer->qh_pos]);
3780                         }
3781                 }
3782         }
3783
3784         USB_BUS_UNLOCK(udev->bus);
3785
3786         return;
3787 }
3788
3789 static void
3790 ehci_device_suspend(struct usb_device *udev)
3791 {
3792         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3793         struct usb_xfer *xfer;
3794         struct usb_pipe_methods *methods;
3795
3796         DPRINTF("\n");
3797
3798         USB_BUS_LOCK(udev->bus);
3799
3800         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3801
3802                 if (xfer->xroot->udev == udev) {
3803
3804                         methods = xfer->endpoint->methods;
3805
3806                         if ((methods == &ehci_device_bulk_methods) ||
3807                             (methods == &ehci_device_ctrl_methods)) {
3808                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3809                                     sc->sc_async_p_last);
3810                         }
3811                         if (methods == &ehci_device_intr_methods) {
3812                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3813                                     sc->sc_intr_p_last[xfer->qh_pos]);
3814                         }
3815                 }
3816         }
3817
3818         USB_BUS_UNLOCK(udev->bus);
3819
3820         return;
3821 }
3822
3823 static void
3824 ehci_set_hw_power(struct usb_bus *bus)
3825 {
3826         ehci_softc_t *sc = EHCI_BUS2SC(bus);
3827         uint32_t temp;
3828         uint32_t flags;
3829
3830         DPRINTF("\n");
3831
3832         USB_BUS_LOCK(bus);
3833
3834         flags = bus->hw_power_state;
3835
3836         temp = EOREAD4(sc, EHCI_USBCMD);
3837
3838         temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3839
3840         if (flags & (USB_HW_POWER_CONTROL |
3841             USB_HW_POWER_BULK)) {
3842                 DPRINTF("Async is active\n");
3843                 temp |= EHCI_CMD_ASE;
3844         }
3845         if (flags & (USB_HW_POWER_INTERRUPT |
3846             USB_HW_POWER_ISOC)) {
3847                 DPRINTF("Periodic is active\n");
3848                 temp |= EHCI_CMD_PSE;
3849         }
3850         EOWRITE4(sc, EHCI_USBCMD, temp);
3851
3852         USB_BUS_UNLOCK(bus);
3853
3854         return;
3855 }
3856
3857 struct usb_bus_methods ehci_bus_methods =
3858 {
3859         .endpoint_init = ehci_ep_init,
3860         .xfer_setup = ehci_xfer_setup,
3861         .xfer_unsetup = ehci_xfer_unsetup,
3862         .get_dma_delay = ehci_get_dma_delay,
3863         .device_resume = ehci_device_resume,
3864         .device_suspend = ehci_device_suspend,
3865         .set_hw_power = ehci_set_hw_power,
3866         .roothub_exec = ehci_roothub_exec,
3867         .xfer_poll = ehci_do_poll,
3868 };