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1 /*-
2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 /*
32  * USB Open Host Controller driver.
33  *
34  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
36  */
37
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/bus.h>
46 #include <sys/linker_set.h>
47 #include <sys/module.h>
48 #include <sys/lock.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51 #include <sys/sysctl.h>
52 #include <sys/sx.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
56 #include <sys/priv.h>
57
58 #include <dev/usb/usb.h>
59 #include <dev/usb/usbdi.h>
60
61 #define USB_DEBUG_VAR ohcidebug
62
63 #include <dev/usb/usb_core.h>
64 #include <dev/usb/usb_debug.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_transfer.h>
68 #include <dev/usb/usb_device.h>
69 #include <dev/usb/usb_hub.h>
70 #include <dev/usb/usb_util.h>
71
72 #include <dev/usb/usb_controller.h>
73 #include <dev/usb/usb_bus.h>
74 #include <dev/usb/controller/ohci.h>
75
76 #define OHCI_BUS2SC(bus) \
77    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
78     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
79
80 #ifdef USB_DEBUG
81 static int ohcidebug = 0;
82
83 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
84 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
85     &ohcidebug, 0, "ohci debug level");
86 static void ohci_dumpregs(ohci_softc_t *);
87 static void ohci_dump_tds(ohci_td_t *);
88 static uint8_t ohci_dump_td(ohci_td_t *);
89 static void ohci_dump_ed(ohci_ed_t *);
90 static uint8_t ohci_dump_itd(ohci_itd_t *);
91 static void ohci_dump_itds(ohci_itd_t *);
92
93 #endif
94
95 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
96                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
97 #define OWRITE1(sc, r, x) \
98  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
99 #define OWRITE2(sc, r, x) \
100  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
101 #define OWRITE4(sc, r, x) \
102  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
103 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
104 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
105 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
106
107 #define OHCI_INTR_ENDPT 1
108
109 extern struct usb_bus_methods ohci_bus_methods;
110 extern struct usb_pipe_methods ohci_device_bulk_methods;
111 extern struct usb_pipe_methods ohci_device_ctrl_methods;
112 extern struct usb_pipe_methods ohci_device_intr_methods;
113 extern struct usb_pipe_methods ohci_device_isoc_methods;
114
115 static void ohci_do_poll(struct usb_bus *bus);
116 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
117 static void ohci_timeout(void *arg);
118 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
119 static void ohci_root_intr(ohci_softc_t *sc);
120
121 struct ohci_std_temp {
122         struct usb_page_cache *pc;
123         ohci_td_t *td;
124         ohci_td_t *td_next;
125         uint32_t average;
126         uint32_t td_flags;
127         uint32_t len;
128         uint16_t max_frame_size;
129         uint8_t shortpkt;
130         uint8_t setup_alt_next;
131         uint8_t last_frame;
132 };
133
134 static struct ohci_hcca *
135 ohci_get_hcca(ohci_softc_t *sc)
136 {
137         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
138         return (sc->sc_hcca_p);
139 }
140
141 void
142 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
143 {
144         struct ohci_softc *sc = OHCI_BUS2SC(bus);
145         uint32_t i;
146
147         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
148             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
149
150         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
151             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
152
153         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
154             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
155
156         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
157             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
158
159         for (i = 0; i != OHCI_NO_EDS; i++) {
160                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
161                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
162         }
163 }
164
165 static usb_error_t
166 ohci_controller_init(ohci_softc_t *sc)
167 {
168         struct usb_page_search buf_res;
169         uint32_t i;
170         uint32_t ctl;
171         uint32_t ival;
172         uint32_t hcr;
173         uint32_t fm;
174         uint32_t per;
175         uint32_t desca;
176
177         /* Determine in what context we are running. */
178         ctl = OREAD4(sc, OHCI_CONTROL);
179         if (ctl & OHCI_IR) {
180                 /* SMM active, request change */
181                 DPRINTF("SMM active, request owner change\n");
182                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
183                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
184                         usb_pause_mtx(NULL, hz / 1000);
185                         ctl = OREAD4(sc, OHCI_CONTROL);
186                 }
187                 if (ctl & OHCI_IR) {
188                         device_printf(sc->sc_bus.bdev,
189                             "SMM does not respond, resetting\n");
190                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
191                         goto reset;
192                 }
193         } else {
194                 DPRINTF("cold started\n");
195 reset:
196                 /* controller was cold started */
197                 usb_pause_mtx(NULL,
198                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
199         }
200
201         /*
202          * This reset should not be necessary according to the OHCI spec, but
203          * without it some controllers do not start.
204          */
205         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
206         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
207
208         usb_pause_mtx(NULL,
209             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
210
211         /* we now own the host controller and the bus has been reset */
212         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
213
214         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
215         /* nominal time for a reset is 10 us */
216         for (i = 0; i < 10; i++) {
217                 DELAY(10);
218                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
219                 if (!hcr) {
220                         break;
221                 }
222         }
223         if (hcr) {
224                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
225                 return (USB_ERR_IOERROR);
226         }
227 #ifdef USB_DEBUG
228         if (ohcidebug > 15) {
229                 ohci_dumpregs(sc);
230         }
231 #endif
232
233         /* The controller is now in SUSPEND state, we have 2ms to finish. */
234
235         /* set up HC registers */
236         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
237         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
238
239         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
240         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
241
242         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
243         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
244
245         /* disable all interrupts and then switch on all desired interrupts */
246         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
247         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
248         /* switch on desired functional features */
249         ctl = OREAD4(sc, OHCI_CONTROL);
250         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
251         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
252             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
253         /* And finally start it! */
254         OWRITE4(sc, OHCI_CONTROL, ctl);
255
256         /*
257          * The controller is now OPERATIONAL.  Set a some final
258          * registers that should be set earlier, but that the
259          * controller ignores when in the SUSPEND state.
260          */
261         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
262         fm |= OHCI_FSMPS(ival) | ival;
263         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
264         per = OHCI_PERIODIC(ival);      /* 90% periodic */
265         OWRITE4(sc, OHCI_PERIODIC_START, per);
266
267         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
268         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
269         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
270         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
271         usb_pause_mtx(NULL,
272             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
273         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
274
275         /*
276          * The AMD756 requires a delay before re-reading the register,
277          * otherwise it will occasionally report 0 ports.
278          */
279         sc->sc_noport = 0;
280         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
281                 usb_pause_mtx(NULL,
282                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
283                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
284         }
285
286 #ifdef USB_DEBUG
287         if (ohcidebug > 5) {
288                 ohci_dumpregs(sc);
289         }
290 #endif
291         return (USB_ERR_NORMAL_COMPLETION);
292 }
293
294 static struct ohci_ed *
295 ohci_init_ed(struct usb_page_cache *pc)
296 {
297         struct usb_page_search buf_res;
298         struct ohci_ed *ed;
299
300         usbd_get_page(pc, 0, &buf_res);
301
302         ed = buf_res.buffer;
303
304         ed->ed_self = htole32(buf_res.physaddr);
305         ed->ed_flags = htole32(OHCI_ED_SKIP);
306         ed->page_cache = pc;
307
308         return (ed);
309 }
310
311 usb_error_t
312 ohci_init(ohci_softc_t *sc)
313 {
314         struct usb_page_search buf_res;
315         uint16_t i;
316         uint16_t bit;
317         uint16_t x;
318         uint16_t y;
319
320         DPRINTF("start\n");
321
322         sc->sc_eintrs = OHCI_NORMAL_INTRS;
323
324         /*
325          * Setup all ED's
326          */
327
328         sc->sc_ctrl_p_last =
329             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
330
331         sc->sc_bulk_p_last =
332             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
333
334         sc->sc_isoc_p_last =
335             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
336
337         for (i = 0; i != OHCI_NO_EDS; i++) {
338                 sc->sc_intr_p_last[i] =
339                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
340         }
341
342         /*
343          * the QHs are arranged to give poll intervals that are
344          * powers of 2 times 1ms
345          */
346         bit = OHCI_NO_EDS / 2;
347         while (bit) {
348                 x = bit;
349                 while (x & bit) {
350                         ohci_ed_t *ed_x;
351                         ohci_ed_t *ed_y;
352
353                         y = (x ^ bit) | (bit / 2);
354
355                         /*
356                          * the next QH has half the poll interval
357                          */
358                         ed_x = sc->sc_intr_p_last[x];
359                         ed_y = sc->sc_intr_p_last[y];
360
361                         ed_x->next = NULL;
362                         ed_x->ed_next = ed_y->ed_self;
363
364                         x++;
365                 }
366                 bit >>= 1;
367         }
368
369         if (1) {
370
371                 ohci_ed_t *ed_int;
372                 ohci_ed_t *ed_isc;
373
374                 ed_int = sc->sc_intr_p_last[0];
375                 ed_isc = sc->sc_isoc_p_last;
376
377                 /* the last (1ms) QH */
378                 ed_int->next = ed_isc;
379                 ed_int->ed_next = ed_isc->ed_self;
380         }
381         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
382
383         sc->sc_hcca_p = buf_res.buffer;
384
385         /*
386          * Fill HCCA interrupt table.  The bit reversal is to get
387          * the tree set up properly to spread the interrupts.
388          */
389         for (i = 0; i != OHCI_NO_INTRS; i++) {
390                 sc->sc_hcca_p->hcca_interrupt_table[i] =
391                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
392         }
393         /* flush all cache into memory */
394
395         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
396
397         /* set up the bus struct */
398         sc->sc_bus.methods = &ohci_bus_methods;
399
400         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
401
402 #ifdef USB_DEBUG
403         if (ohcidebug > 15) {
404                 for (i = 0; i != OHCI_NO_EDS; i++) {
405                         printf("ed#%d ", i);
406                         ohci_dump_ed(sc->sc_intr_p_last[i]);
407                 }
408                 printf("iso ");
409                 ohci_dump_ed(sc->sc_isoc_p_last);
410         }
411 #endif
412
413         sc->sc_bus.usbrev = USB_REV_1_0;
414
415         if (ohci_controller_init(sc)) {
416                 return (USB_ERR_INVAL);
417         } else {
418                 /* catch any lost interrupts */
419                 ohci_do_poll(&sc->sc_bus);
420                 return (USB_ERR_NORMAL_COMPLETION);
421         }
422 }
423
424 /*
425  * shut down the controller when the system is going down
426  */
427 void
428 ohci_detach(struct ohci_softc *sc)
429 {
430         USB_BUS_LOCK(&sc->sc_bus);
431
432         usb_callout_stop(&sc->sc_tmo_rhsc);
433
434         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
435         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
436
437         USB_BUS_UNLOCK(&sc->sc_bus);
438
439         /* XXX let stray task complete */
440         usb_pause_mtx(NULL, hz / 20);
441
442         usb_callout_drain(&sc->sc_tmo_rhsc);
443 }
444
445 /* NOTE: suspend/resume is called from
446  * interrupt context and cannot sleep!
447  */
448 void
449 ohci_suspend(ohci_softc_t *sc)
450 {
451         uint32_t ctl;
452
453         USB_BUS_LOCK(&sc->sc_bus);
454
455 #ifdef USB_DEBUG
456         DPRINTF("\n");
457         if (ohcidebug > 2) {
458                 ohci_dumpregs(sc);
459         }
460 #endif
461
462         ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
463         if (sc->sc_control == 0) {
464                 /*
465                  * Preserve register values, in case that APM BIOS
466                  * does not recover them.
467                  */
468                 sc->sc_control = ctl;
469                 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
470         }
471         ctl |= OHCI_HCFS_SUSPEND;
472         OWRITE4(sc, OHCI_CONTROL, ctl);
473
474         usb_pause_mtx(&sc->sc_bus.bus_mtx,
475             USB_MS_TO_TICKS(USB_RESUME_WAIT));
476
477         USB_BUS_UNLOCK(&sc->sc_bus);
478 }
479
480 void
481 ohci_resume(ohci_softc_t *sc)
482 {
483         uint32_t ctl;
484
485 #ifdef USB_DEBUG
486         DPRINTF("\n");
487         if (ohcidebug > 2) {
488                 ohci_dumpregs(sc);
489         }
490 #endif
491         /* some broken BIOSes never initialize the Controller chip */
492         ohci_controller_init(sc);
493
494         USB_BUS_LOCK(&sc->sc_bus);
495         if (sc->sc_intre) {
496                 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
497                     sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
498         }
499         if (sc->sc_control)
500                 ctl = sc->sc_control;
501         else
502                 ctl = OREAD4(sc, OHCI_CONTROL);
503         ctl |= OHCI_HCFS_RESUME;
504         OWRITE4(sc, OHCI_CONTROL, ctl);
505         usb_pause_mtx(&sc->sc_bus.bus_mtx,
506             USB_MS_TO_TICKS(USB_RESUME_DELAY));
507         ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
508         OWRITE4(sc, OHCI_CONTROL, ctl);
509         usb_pause_mtx(&sc->sc_bus.bus_mtx, 
510             USB_MS_TO_TICKS(USB_RESUME_RECOVERY));
511         sc->sc_control = sc->sc_intre = 0;
512
513         USB_BUS_UNLOCK(&sc->sc_bus);
514
515         /* catch any lost interrupts */
516         ohci_do_poll(&sc->sc_bus);
517 }
518
519 #ifdef USB_DEBUG
520 static void
521 ohci_dumpregs(ohci_softc_t *sc)
522 {
523         struct ohci_hcca *hcca;
524
525         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
526             OREAD4(sc, OHCI_REVISION),
527             OREAD4(sc, OHCI_CONTROL),
528             OREAD4(sc, OHCI_COMMAND_STATUS));
529         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
530             OREAD4(sc, OHCI_INTERRUPT_STATUS),
531             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
532             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
533         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
534             OREAD4(sc, OHCI_HCCA),
535             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
536             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
537         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
538             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
539             OREAD4(sc, OHCI_BULK_HEAD_ED),
540             OREAD4(sc, OHCI_BULK_CURRENT_ED));
541         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
542             OREAD4(sc, OHCI_DONE_HEAD),
543             OREAD4(sc, OHCI_FM_INTERVAL),
544             OREAD4(sc, OHCI_FM_REMAINING));
545         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
546             OREAD4(sc, OHCI_FM_NUMBER),
547             OREAD4(sc, OHCI_PERIODIC_START),
548             OREAD4(sc, OHCI_LS_THRESHOLD));
549         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
550             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
551             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
552             OREAD4(sc, OHCI_RH_STATUS));
553         DPRINTF("               port1=0x%08x port2=0x%08x\n",
554             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
555             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
556
557         hcca = ohci_get_hcca(sc);
558
559         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
560             le32toh(hcca->hcca_frame_number),
561             le32toh(hcca->hcca_done_head));
562 }
563 static void
564 ohci_dump_tds(ohci_td_t *std)
565 {
566         for (; std; std = std->obj_next) {
567                 if (ohci_dump_td(std)) {
568                         break;
569                 }
570         }
571 }
572
573 static uint8_t
574 ohci_dump_td(ohci_td_t *std)
575 {
576         uint32_t td_flags;
577         uint8_t temp;
578
579         usb_pc_cpu_invalidate(std->page_cache);
580
581         td_flags = le32toh(std->td_flags);
582         temp = (std->td_next == 0);
583
584         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
585             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
586             std, le32toh(std->td_self),
587             (td_flags & OHCI_TD_R) ? "-R" : "",
588             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
589             (td_flags & OHCI_TD_IN) ? "-IN" : "",
590             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
591             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
592             OHCI_TD_GET_DI(td_flags),
593             OHCI_TD_GET_EC(td_flags),
594             OHCI_TD_GET_CC(td_flags),
595             le32toh(std->td_cbp),
596             le32toh(std->td_next),
597             le32toh(std->td_be));
598
599         return (temp);
600 }
601
602 static uint8_t
603 ohci_dump_itd(ohci_itd_t *sitd)
604 {
605         uint32_t itd_flags;
606         uint16_t i;
607         uint8_t temp;
608
609         usb_pc_cpu_invalidate(sitd->page_cache);
610
611         itd_flags = le32toh(sitd->itd_flags);
612         temp = (sitd->itd_next == 0);
613
614         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
615             "bp0=0x%08x next=0x%08x be=0x%08x\n",
616             sitd, le32toh(sitd->itd_self),
617             OHCI_ITD_GET_SF(itd_flags),
618             OHCI_ITD_GET_DI(itd_flags),
619             OHCI_ITD_GET_FC(itd_flags),
620             OHCI_ITD_GET_CC(itd_flags),
621             le32toh(sitd->itd_bp0),
622             le32toh(sitd->itd_next),
623             le32toh(sitd->itd_be));
624         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
625                 printf("offs[%d]=0x%04x ", i,
626                     (uint32_t)le16toh(sitd->itd_offset[i]));
627         }
628         printf("\n");
629
630         return (temp);
631 }
632
633 static void
634 ohci_dump_itds(ohci_itd_t *sitd)
635 {
636         for (; sitd; sitd = sitd->obj_next) {
637                 if (ohci_dump_itd(sitd)) {
638                         break;
639                 }
640         }
641 }
642
643 static void
644 ohci_dump_ed(ohci_ed_t *sed)
645 {
646         uint32_t ed_flags;
647         uint32_t ed_headp;
648
649         usb_pc_cpu_invalidate(sed->page_cache);
650
651         ed_flags = le32toh(sed->ed_flags);
652         ed_headp = le32toh(sed->ed_headp);
653
654         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
655             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
656             sed, le32toh(sed->ed_self),
657             OHCI_ED_GET_FA(ed_flags),
658             OHCI_ED_GET_EN(ed_flags),
659             OHCI_ED_GET_MAXP(ed_flags),
660             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
661             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
662             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
663             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
664             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
665             le32toh(sed->ed_tailp),
666             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
667             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
668             le32toh(sed->ed_headp),
669             le32toh(sed->ed_next));
670 }
671
672 #endif
673
674 static void
675 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
676 {
677         /* check for early completion */
678         if (ohci_check_transfer(xfer)) {
679                 return;
680         }
681         /* put transfer on interrupt queue */
682         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
683
684         /* start timeout, if any */
685         if (xfer->timeout != 0) {
686                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
687         }
688 }
689
690 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
691 static ohci_ed_t *
692 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
693 {
694         DPRINTFN(11, "%p to %p\n", sed, last);
695
696         if (sed->prev != NULL) {
697                 /* should not happen */
698                 DPRINTFN(0, "ED already linked!\n");
699                 return (last);
700         }
701         /* (sc->sc_bus.bus_mtx) must be locked */
702
703         sed->next = last->next;
704         sed->ed_next = last->ed_next;
705         sed->ed_tailp = 0;
706
707         sed->prev = last;
708
709         usb_pc_cpu_flush(sed->page_cache);
710
711         /*
712          * the last->next->prev is never followed: sed->next->prev = sed;
713          */
714
715         last->next = sed;
716         last->ed_next = sed->ed_self;
717
718         usb_pc_cpu_flush(last->page_cache);
719
720         return (sed);
721 }
722
723 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
724 static ohci_ed_t *
725 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
726 {
727         DPRINTFN(11, "%p from %p\n", sed, last);
728
729         /* (sc->sc_bus.bus_mtx) must be locked */
730
731         /* only remove if not removed from a queue */
732         if (sed->prev) {
733
734                 sed->prev->next = sed->next;
735                 sed->prev->ed_next = sed->ed_next;
736
737                 usb_pc_cpu_flush(sed->prev->page_cache);
738
739                 if (sed->next) {
740                         sed->next->prev = sed->prev;
741                         usb_pc_cpu_flush(sed->next->page_cache);
742                 }
743                 last = ((last == sed) ? sed->prev : last);
744
745                 sed->prev = 0;
746
747                 usb_pc_cpu_flush(sed->page_cache);
748         }
749         return (last);
750 }
751
752 static void
753 ohci_isoc_done(struct usb_xfer *xfer)
754 {
755         uint8_t nframes;
756         uint32_t *plen = xfer->frlengths;
757         volatile uint16_t *olen;
758         uint16_t len = 0;
759         ohci_itd_t *td = xfer->td_transfer_first;
760
761         while (1) {
762                 if (td == NULL) {
763                         panic("%s:%d: out of TD's\n",
764                             __FUNCTION__, __LINE__);
765                 }
766 #ifdef USB_DEBUG
767                 if (ohcidebug > 5) {
768                         DPRINTF("isoc TD\n");
769                         ohci_dump_itd(td);
770                 }
771 #endif
772                 usb_pc_cpu_invalidate(td->page_cache);
773
774                 nframes = td->frames;
775                 olen = &td->itd_offset[0];
776
777                 if (nframes > 8) {
778                         nframes = 8;
779                 }
780                 while (nframes--) {
781                         len = le16toh(*olen);
782
783                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
784                                 len = 0;
785                         } else {
786                                 len &= ((1 << 12) - 1);
787                         }
788
789                         if (len > *plen) {
790                                 len = 0;/* invalid length */
791                         }
792                         *plen = len;
793                         plen++;
794                         olen++;
795                 }
796
797                 if (((void *)td) == xfer->td_transfer_last) {
798                         break;
799                 }
800                 td = td->obj_next;
801         }
802
803         xfer->aframes = xfer->nframes;
804         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
805 }
806
807 #ifdef USB_DEBUG
808 static const char *const
809         ohci_cc_strs[] =
810 {
811         "NO_ERROR",
812         "CRC",
813         "BIT_STUFFING",
814         "DATA_TOGGLE_MISMATCH",
815
816         "STALL",
817         "DEVICE_NOT_RESPONDING",
818         "PID_CHECK_FAILURE",
819         "UNEXPECTED_PID",
820
821         "DATA_OVERRUN",
822         "DATA_UNDERRUN",
823         "BUFFER_OVERRUN",
824         "BUFFER_UNDERRUN",
825
826         "reserved",
827         "reserved",
828         "NOT_ACCESSED",
829         "NOT_ACCESSED"
830 };
831
832 #endif
833
834 static usb_error_t
835 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
836 {
837         ohci_td_t *td;
838         ohci_td_t *td_alt_next;
839         uint32_t temp;
840         uint32_t phy_start;
841         uint32_t phy_end;
842         uint32_t td_flags;
843         uint16_t cc;
844
845         td = xfer->td_transfer_cache;
846         td_alt_next = td->alt_next;
847         td_flags = 0;
848
849         if (xfer->aframes != xfer->nframes) {
850                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
851         }
852         while (1) {
853
854                 usb_pc_cpu_invalidate(td->page_cache);
855                 phy_start = le32toh(td->td_cbp);
856                 td_flags = le32toh(td->td_flags);
857                 cc = OHCI_TD_GET_CC(td_flags);
858
859                 if (phy_start) {
860                         /*
861                          * short transfer - compute the number of remaining
862                          * bytes in the hardware buffer:
863                          */
864                         phy_end = le32toh(td->td_be);
865                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
866                             (OHCI_PAGE_SIZE + 1) : 0x0001);
867                         temp += OHCI_PAGE_OFFSET(phy_end);
868                         temp -= OHCI_PAGE_OFFSET(phy_start);
869
870                         if (temp > td->len) {
871                                 /* guard against corruption */
872                                 cc = OHCI_CC_STALL;
873                         } else if (xfer->aframes != xfer->nframes) {
874                                 /*
875                                  * Sum up total transfer length
876                                  * in "frlengths[]":
877                                  */
878                                 xfer->frlengths[xfer->aframes] += td->len - temp;
879                         }
880                 } else {
881                         if (xfer->aframes != xfer->nframes) {
882                                 /* transfer was complete */
883                                 xfer->frlengths[xfer->aframes] += td->len;
884                         }
885                 }
886                 /* Check for last transfer */
887                 if (((void *)td) == xfer->td_transfer_last) {
888                         td = NULL;
889                         break;
890                 }
891                 /* Check transfer status */
892                 if (cc) {
893                         /* the transfer is finished */
894                         td = NULL;
895                         break;
896                 }
897                 /* Check for short transfer */
898                 if (phy_start) {
899                         if (xfer->flags_int.short_frames_ok) {
900                                 /* follow alt next */
901                                 td = td->alt_next;
902                         } else {
903                                 /* the transfer is finished */
904                                 td = NULL;
905                         }
906                         break;
907                 }
908                 td = td->obj_next;
909
910                 if (td->alt_next != td_alt_next) {
911                         /* this USB frame is complete */
912                         break;
913                 }
914         }
915
916         /* update transfer cache */
917
918         xfer->td_transfer_cache = td;
919
920         DPRINTFN(16, "error cc=%d (%s)\n",
921             cc, ohci_cc_strs[cc]);
922
923         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
924             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
925 }
926
927 static void
928 ohci_non_isoc_done(struct usb_xfer *xfer)
929 {
930         usb_error_t err = 0;
931
932         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
933             xfer, xfer->endpoint);
934
935 #ifdef USB_DEBUG
936         if (ohcidebug > 10) {
937                 ohci_dump_tds(xfer->td_transfer_first);
938         }
939 #endif
940
941         /* reset scanner */
942
943         xfer->td_transfer_cache = xfer->td_transfer_first;
944
945         if (xfer->flags_int.control_xfr) {
946
947                 if (xfer->flags_int.control_hdr) {
948
949                         err = ohci_non_isoc_done_sub(xfer);
950                 }
951                 xfer->aframes = 1;
952
953                 if (xfer->td_transfer_cache == NULL) {
954                         goto done;
955                 }
956         }
957         while (xfer->aframes != xfer->nframes) {
958
959                 err = ohci_non_isoc_done_sub(xfer);
960                 xfer->aframes++;
961
962                 if (xfer->td_transfer_cache == NULL) {
963                         goto done;
964                 }
965         }
966
967         if (xfer->flags_int.control_xfr &&
968             !xfer->flags_int.control_act) {
969
970                 err = ohci_non_isoc_done_sub(xfer);
971         }
972 done:
973         ohci_device_done(xfer, err);
974 }
975
976 /*------------------------------------------------------------------------*
977  *      ohci_check_transfer_sub
978  *------------------------------------------------------------------------*/
979 static void
980 ohci_check_transfer_sub(struct usb_xfer *xfer)
981 {
982         ohci_td_t *td;
983         ohci_ed_t *ed;
984         uint32_t phy_start;
985         uint32_t td_flags;
986         uint32_t td_next;
987         uint16_t cc;
988
989         td = xfer->td_transfer_cache;
990
991         while (1) {
992
993                 usb_pc_cpu_invalidate(td->page_cache);
994                 phy_start = le32toh(td->td_cbp);
995                 td_flags = le32toh(td->td_flags);
996                 td_next = le32toh(td->td_next);
997
998                 /* Check for last transfer */
999                 if (((void *)td) == xfer->td_transfer_last) {
1000                         /* the transfer is finished */
1001                         td = NULL;
1002                         break;
1003                 }
1004                 /* Check transfer status */
1005                 cc = OHCI_TD_GET_CC(td_flags);
1006                 if (cc) {
1007                         /* the transfer is finished */
1008                         td = NULL;
1009                         break;
1010                 }
1011                 /*
1012                  * Check if we reached the last packet
1013                  * or if there is a short packet:
1014                  */
1015
1016                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
1017                         /* follow alt next */
1018                         td = td->alt_next;
1019                         break;
1020                 }
1021                 td = td->obj_next;
1022         }
1023
1024         /* update transfer cache */
1025
1026         xfer->td_transfer_cache = td;
1027
1028         if (td) {
1029
1030                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1031
1032                 ed->ed_headp = td->td_self;
1033                 usb_pc_cpu_flush(ed->page_cache);
1034
1035                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1036
1037                 /*
1038                  * Make sure that the OHCI re-scans the schedule by
1039                  * writing the BLF and CLF bits:
1040                  */
1041
1042                 if (xfer->xroot->udev->flags.self_suspended) {
1043                         /* nothing to do */
1044                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1045                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1046
1047                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1048                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1049                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1050
1051                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1052                 }
1053         }
1054 }
1055
1056 /*------------------------------------------------------------------------*
1057  *      ohci_check_transfer
1058  *
1059  * Return values:
1060  *    0: USB transfer is not finished
1061  * Else: USB transfer is finished
1062  *------------------------------------------------------------------------*/
1063 static uint8_t
1064 ohci_check_transfer(struct usb_xfer *xfer)
1065 {
1066         ohci_ed_t *ed;
1067         uint32_t ed_headp;
1068         uint32_t ed_tailp;
1069
1070         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1071
1072         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1073
1074         usb_pc_cpu_invalidate(ed->page_cache);
1075         ed_headp = le32toh(ed->ed_headp);
1076         ed_tailp = le32toh(ed->ed_tailp);
1077
1078         if ((ed_headp & OHCI_HALTED) ||
1079             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1080                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1081                         /* isochronous transfer */
1082                         ohci_isoc_done(xfer);
1083                 } else {
1084                         if (xfer->flags_int.short_frames_ok) {
1085                                 ohci_check_transfer_sub(xfer);
1086                                 if (xfer->td_transfer_cache) {
1087                                         /* not finished yet */
1088                                         return (0);
1089                                 }
1090                         }
1091                         /* store data-toggle */
1092                         if (ed_headp & OHCI_TOGGLECARRY) {
1093                                 xfer->endpoint->toggle_next = 1;
1094                         } else {
1095                                 xfer->endpoint->toggle_next = 0;
1096                         }
1097
1098                         /* non-isochronous transfer */
1099                         ohci_non_isoc_done(xfer);
1100                 }
1101                 return (1);
1102         }
1103         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1104         return (0);
1105 }
1106
1107 static void
1108 ohci_rhsc_enable(ohci_softc_t *sc)
1109 {
1110         DPRINTFN(5, "\n");
1111
1112         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1113
1114         sc->sc_eintrs |= OHCI_RHSC;
1115         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1116
1117         /* acknowledge any RHSC interrupt */
1118         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1119
1120         ohci_root_intr(sc);
1121 }
1122
1123 static void
1124 ohci_interrupt_poll(ohci_softc_t *sc)
1125 {
1126         struct usb_xfer *xfer;
1127
1128 repeat:
1129         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1130                 /*
1131                  * check if transfer is transferred
1132                  */
1133                 if (ohci_check_transfer(xfer)) {
1134                         /* queue has been modified */
1135                         goto repeat;
1136                 }
1137         }
1138 }
1139
1140 /*------------------------------------------------------------------------*
1141  *      ohci_interrupt - OHCI interrupt handler
1142  *
1143  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1144  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1145  * is present !
1146  *------------------------------------------------------------------------*/
1147 void
1148 ohci_interrupt(ohci_softc_t *sc)
1149 {
1150         struct ohci_hcca *hcca;
1151         uint32_t status;
1152         uint32_t done;
1153
1154         USB_BUS_LOCK(&sc->sc_bus);
1155
1156         hcca = ohci_get_hcca(sc);
1157
1158         DPRINTFN(16, "real interrupt\n");
1159
1160 #ifdef USB_DEBUG
1161         if (ohcidebug > 15) {
1162                 ohci_dumpregs(sc);
1163         }
1164 #endif
1165
1166         done = le32toh(hcca->hcca_done_head);
1167
1168         /*
1169          * The LSb of done is used to inform the HC Driver that an interrupt
1170          * condition exists for both the Done list and for another event
1171          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1172          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1173          * the interrupt was caused by other than the HccaDoneHead update
1174          * and the HcInterruptStatus register needs to be accessed to
1175          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1176          * then a Done list update interrupt is indicated and if the LSb of
1177          * done is nonzero, then an additional interrupt event is indicated
1178          * and HcInterruptStatus should be checked to determine its cause.
1179          */
1180         if (done != 0) {
1181                 status = 0;
1182
1183                 if (done & ~OHCI_DONE_INTRS) {
1184                         status |= OHCI_WDH;
1185                 }
1186                 if (done & OHCI_DONE_INTRS) {
1187                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1188                 }
1189                 hcca->hcca_done_head = 0;
1190
1191                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1192         } else {
1193                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1194         }
1195
1196         status &= ~OHCI_MIE;
1197         if (status == 0) {
1198                 /*
1199                  * nothing to be done (PCI shared
1200                  * interrupt)
1201                  */
1202                 goto done;
1203         }
1204         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1205
1206         status &= sc->sc_eintrs;
1207         if (status == 0) {
1208                 goto done;
1209         }
1210         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1211 #if 0
1212                 if (status & OHCI_SO) {
1213                         /* XXX do what */
1214                 }
1215 #endif
1216                 if (status & OHCI_RD) {
1217                         printf("%s: resume detect\n", __FUNCTION__);
1218                         /* XXX process resume detect */
1219                 }
1220                 if (status & OHCI_UE) {
1221                         printf("%s: unrecoverable error, "
1222                             "controller halted\n", __FUNCTION__);
1223                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1224                         /* XXX what else */
1225                 }
1226                 if (status & OHCI_RHSC) {
1227                         /*
1228                          * Disable RHSC interrupt for now, because it will be
1229                          * on until the port has been reset.
1230                          */
1231                         sc->sc_eintrs &= ~OHCI_RHSC;
1232                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1233
1234                         ohci_root_intr(sc);
1235
1236                         /* do not allow RHSC interrupts > 1 per second */
1237                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1238                             (void *)&ohci_rhsc_enable, sc);
1239                 }
1240         }
1241         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1242         if (status != 0) {
1243                 /* Block unprocessed interrupts. XXX */
1244                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1245                 sc->sc_eintrs &= ~status;
1246                 printf("%s: blocking intrs 0x%x\n",
1247                     __FUNCTION__, status);
1248         }
1249         /* poll all the USB transfers */
1250         ohci_interrupt_poll(sc);
1251
1252 done:
1253         USB_BUS_UNLOCK(&sc->sc_bus);
1254 }
1255
1256 /*
1257  * called when a request does not complete
1258  */
1259 static void
1260 ohci_timeout(void *arg)
1261 {
1262         struct usb_xfer *xfer = arg;
1263
1264         DPRINTF("xfer=%p\n", xfer);
1265
1266         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1267
1268         /* transfer is transferred */
1269         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1270 }
1271
1272 static void
1273 ohci_do_poll(struct usb_bus *bus)
1274 {
1275         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1276
1277         USB_BUS_LOCK(&sc->sc_bus);
1278         ohci_interrupt_poll(sc);
1279         USB_BUS_UNLOCK(&sc->sc_bus);
1280 }
1281
1282 static void
1283 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1284 {
1285         struct usb_page_search buf_res;
1286         ohci_td_t *td;
1287         ohci_td_t *td_next;
1288         ohci_td_t *td_alt_next;
1289         uint32_t buf_offset;
1290         uint32_t average;
1291         uint32_t len_old;
1292         uint8_t shortpkt_old;
1293         uint8_t precompute;
1294
1295         td_alt_next = NULL;
1296         buf_offset = 0;
1297         shortpkt_old = temp->shortpkt;
1298         len_old = temp->len;
1299         precompute = 1;
1300
1301         /* software is used to detect short incoming transfers */
1302
1303         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1304                 temp->td_flags |= htole32(OHCI_TD_R);
1305         } else {
1306                 temp->td_flags &= ~htole32(OHCI_TD_R);
1307         }
1308
1309 restart:
1310
1311         td = temp->td;
1312         td_next = temp->td_next;
1313
1314         while (1) {
1315
1316                 if (temp->len == 0) {
1317
1318                         if (temp->shortpkt) {
1319                                 break;
1320                         }
1321                         /* send a Zero Length Packet, ZLP, last */
1322
1323                         temp->shortpkt = 1;
1324                         average = 0;
1325
1326                 } else {
1327
1328                         average = temp->average;
1329
1330                         if (temp->len < average) {
1331                                 if (temp->len % temp->max_frame_size) {
1332                                         temp->shortpkt = 1;
1333                                 }
1334                                 average = temp->len;
1335                         }
1336                 }
1337
1338                 if (td_next == NULL) {
1339                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1340                 }
1341                 /* get next TD */
1342
1343                 td = td_next;
1344                 td_next = td->obj_next;
1345
1346                 /* check if we are pre-computing */
1347
1348                 if (precompute) {
1349
1350                         /* update remaining length */
1351
1352                         temp->len -= average;
1353
1354                         continue;
1355                 }
1356                 /* fill out current TD */
1357                 td->td_flags = temp->td_flags;
1358
1359                 /* the next TD uses TOGGLE_CARRY */
1360                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1361
1362                 if (average == 0) {
1363                         /*
1364                          * The buffer start and end phys addresses should be
1365                          * 0x0 for a zero length packet.
1366                          */
1367                         td->td_cbp = 0;
1368                         td->td_be = 0;
1369                         td->len = 0;
1370
1371                 } else {
1372
1373                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1374                         td->td_cbp = htole32(buf_res.physaddr);
1375                         buf_offset += (average - 1);
1376
1377                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1378                         td->td_be = htole32(buf_res.physaddr);
1379                         buf_offset++;
1380
1381                         td->len = average;
1382
1383                         /* update remaining length */
1384
1385                         temp->len -= average;
1386                 }
1387
1388                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1389                         /* we need to receive these frames one by one ! */
1390                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1391                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1392                         td->td_next = htole32(OHCI_TD_NEXT_END);
1393                 } else {
1394                         if (td_next) {
1395                                 /* link the current TD with the next one */
1396                                 td->td_next = td_next->td_self;
1397                         }
1398                 }
1399
1400                 td->alt_next = td_alt_next;
1401
1402                 usb_pc_cpu_flush(td->page_cache);
1403         }
1404
1405         if (precompute) {
1406                 precompute = 0;
1407
1408                 /* setup alt next pointer, if any */
1409                 if (temp->last_frame) {
1410                         /* no alternate next */
1411                         td_alt_next = NULL;
1412                 } else {
1413                         /* we use this field internally */
1414                         td_alt_next = td_next;
1415                 }
1416
1417                 /* restore */
1418                 temp->shortpkt = shortpkt_old;
1419                 temp->len = len_old;
1420                 goto restart;
1421         }
1422         temp->td = td;
1423         temp->td_next = td_next;
1424 }
1425
1426 static void
1427 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1428 {
1429         struct ohci_std_temp temp;
1430         struct usb_pipe_methods *methods;
1431         ohci_ed_t *ed;
1432         ohci_td_t *td;
1433         uint32_t ed_flags;
1434         uint32_t x;
1435
1436         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1437             xfer->address, UE_GET_ADDR(xfer->endpointno),
1438             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1439
1440         temp.average = xfer->max_hc_frame_size;
1441         temp.max_frame_size = xfer->max_frame_size;
1442
1443         /* toggle the DMA set we are using */
1444         xfer->flags_int.curr_dma_set ^= 1;
1445
1446         /* get next DMA set */
1447         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1448
1449         xfer->td_transfer_first = td;
1450         xfer->td_transfer_cache = td;
1451
1452         temp.td = NULL;
1453         temp.td_next = td;
1454         temp.last_frame = 0;
1455         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1456
1457         methods = xfer->endpoint->methods;
1458
1459         /* check if we should prepend a setup message */
1460
1461         if (xfer->flags_int.control_xfr) {
1462                 if (xfer->flags_int.control_hdr) {
1463
1464                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1465                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1466
1467                         temp.len = xfer->frlengths[0];
1468                         temp.pc = xfer->frbuffers + 0;
1469                         temp.shortpkt = temp.len ? 1 : 0;
1470                         /* check for last frame */
1471                         if (xfer->nframes == 1) {
1472                                 /* no STATUS stage yet, SETUP is last */
1473                                 if (xfer->flags_int.control_act) {
1474                                         temp.last_frame = 1;
1475                                         temp.setup_alt_next = 0;
1476                                 }
1477                         }
1478                         ohci_setup_standard_chain_sub(&temp);
1479
1480                         /*
1481                          * XXX assume that the setup message is
1482                          * contained within one USB packet:
1483                          */
1484                         xfer->endpoint->toggle_next = 1;
1485                 }
1486                 x = 1;
1487         } else {
1488                 x = 0;
1489         }
1490         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1491
1492         /* set data toggle */
1493
1494         if (xfer->endpoint->toggle_next) {
1495                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1496         } else {
1497                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1498         }
1499
1500         /* set endpoint direction */
1501
1502         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1503                 temp.td_flags |= htole32(OHCI_TD_IN);
1504         } else {
1505                 temp.td_flags |= htole32(OHCI_TD_OUT);
1506         }
1507
1508         while (x != xfer->nframes) {
1509
1510                 /* DATA0 / DATA1 message */
1511
1512                 temp.len = xfer->frlengths[x];
1513                 temp.pc = xfer->frbuffers + x;
1514
1515                 x++;
1516
1517                 if (x == xfer->nframes) {
1518                         if (xfer->flags_int.control_xfr) {
1519                                 /* no STATUS stage yet, DATA is last */
1520                                 if (xfer->flags_int.control_act) {
1521                                         temp.last_frame = 1;
1522                                         temp.setup_alt_next = 0;
1523                                 }
1524                         } else {
1525                                 temp.last_frame = 1;
1526                                 temp.setup_alt_next = 0;
1527                         }
1528                 }
1529                 if (temp.len == 0) {
1530
1531                         /* make sure that we send an USB packet */
1532
1533                         temp.shortpkt = 0;
1534
1535                 } else {
1536
1537                         /* regular data transfer */
1538
1539                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1540                 }
1541
1542                 ohci_setup_standard_chain_sub(&temp);
1543         }
1544
1545         /* check if we should append a status stage */
1546
1547         if (xfer->flags_int.control_xfr &&
1548             !xfer->flags_int.control_act) {
1549
1550                 /*
1551                  * Send a DATA1 message and invert the current endpoint
1552                  * direction.
1553                  */
1554
1555                 /* set endpoint direction and data toggle */
1556
1557                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1558                         temp.td_flags = htole32(OHCI_TD_OUT |
1559                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1560                 } else {
1561                         temp.td_flags = htole32(OHCI_TD_IN |
1562                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1563                 }
1564
1565                 temp.len = 0;
1566                 temp.pc = NULL;
1567                 temp.shortpkt = 0;
1568                 temp.last_frame = 1;
1569                 temp.setup_alt_next = 0;
1570
1571                 ohci_setup_standard_chain_sub(&temp);
1572         }
1573         td = temp.td;
1574
1575         /* Ensure that last TD is terminating: */
1576         td->td_next = htole32(OHCI_TD_NEXT_END);
1577         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1578         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1579
1580         usb_pc_cpu_flush(td->page_cache);
1581
1582         /* must have at least one frame! */
1583
1584         xfer->td_transfer_last = td;
1585
1586 #ifdef USB_DEBUG
1587         if (ohcidebug > 8) {
1588                 DPRINTF("nexttog=%d; data before transfer:\n",
1589                     xfer->endpoint->toggle_next);
1590                 ohci_dump_tds(xfer->td_transfer_first);
1591         }
1592 #endif
1593
1594         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1595
1596         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1597             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1598             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1599
1600         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1601
1602         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1603                 ed_flags |= OHCI_ED_SPEED;
1604         }
1605         ed->ed_flags = htole32(ed_flags);
1606
1607         td = xfer->td_transfer_first;
1608
1609         ed->ed_headp = td->td_self;
1610
1611         if (xfer->xroot->udev->flags.self_suspended == 0) {
1612                 /* the append function will flush the endpoint descriptor */
1613                 OHCI_APPEND_QH(ed, *ed_last);
1614
1615                 if (methods == &ohci_device_bulk_methods) {
1616                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1617
1618                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1619                 }
1620                 if (methods == &ohci_device_ctrl_methods) {
1621                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1622
1623                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1624                 }
1625         } else {
1626                 usb_pc_cpu_flush(ed->page_cache);
1627         }
1628 }
1629
1630 static void
1631 ohci_root_intr(ohci_softc_t *sc)
1632 {
1633         uint32_t hstatus;
1634         uint16_t i;
1635         uint16_t m;
1636
1637         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1638
1639         /* clear any old interrupt data */
1640         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1641
1642         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1643         DPRINTF("sc=%p hstatus=0x%08x\n",
1644             sc, hstatus);
1645
1646         /* set bits */
1647         m = (sc->sc_noport + 1);
1648         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1649                 m = (8 * sizeof(sc->sc_hub_idata));
1650         }
1651         for (i = 1; i < m; i++) {
1652                 /* pick out CHANGE bits from the status register */
1653                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1654                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1655                         DPRINTF("port %d changed\n", i);
1656                 }
1657         }
1658
1659         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1660             sizeof(sc->sc_hub_idata));
1661 }
1662
1663 /* NOTE: "done" can be run two times in a row,
1664  * from close and from interrupt
1665  */
1666 static void
1667 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1668 {
1669         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1670         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1671         ohci_ed_t *ed;
1672
1673         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1674
1675
1676         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1677             xfer, xfer->endpoint, error);
1678
1679         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1680         if (ed) {
1681                 usb_pc_cpu_invalidate(ed->page_cache);
1682         }
1683         if (methods == &ohci_device_bulk_methods) {
1684                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1685         }
1686         if (methods == &ohci_device_ctrl_methods) {
1687                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1688         }
1689         if (methods == &ohci_device_intr_methods) {
1690                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1691         }
1692         if (methods == &ohci_device_isoc_methods) {
1693                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1694         }
1695         xfer->td_transfer_first = NULL;
1696         xfer->td_transfer_last = NULL;
1697
1698         /* dequeue transfer and start next transfer */
1699         usbd_transfer_done(xfer, error);
1700 }
1701
1702 /*------------------------------------------------------------------------*
1703  * ohci bulk support
1704  *------------------------------------------------------------------------*/
1705 static void
1706 ohci_device_bulk_open(struct usb_xfer *xfer)
1707 {
1708         return;
1709 }
1710
1711 static void
1712 ohci_device_bulk_close(struct usb_xfer *xfer)
1713 {
1714         ohci_device_done(xfer, USB_ERR_CANCELLED);
1715 }
1716
1717 static void
1718 ohci_device_bulk_enter(struct usb_xfer *xfer)
1719 {
1720         return;
1721 }
1722
1723 static void
1724 ohci_device_bulk_start(struct usb_xfer *xfer)
1725 {
1726         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1727
1728         /* setup TD's and QH */
1729         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1730
1731         /* put transfer on interrupt queue */
1732         ohci_transfer_intr_enqueue(xfer);
1733 }
1734
1735 struct usb_pipe_methods ohci_device_bulk_methods =
1736 {
1737         .open = ohci_device_bulk_open,
1738         .close = ohci_device_bulk_close,
1739         .enter = ohci_device_bulk_enter,
1740         .start = ohci_device_bulk_start,
1741 };
1742
1743 /*------------------------------------------------------------------------*
1744  * ohci control support
1745  *------------------------------------------------------------------------*/
1746 static void
1747 ohci_device_ctrl_open(struct usb_xfer *xfer)
1748 {
1749         return;
1750 }
1751
1752 static void
1753 ohci_device_ctrl_close(struct usb_xfer *xfer)
1754 {
1755         ohci_device_done(xfer, USB_ERR_CANCELLED);
1756 }
1757
1758 static void
1759 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1760 {
1761         return;
1762 }
1763
1764 static void
1765 ohci_device_ctrl_start(struct usb_xfer *xfer)
1766 {
1767         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1768
1769         /* setup TD's and QH */
1770         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1771
1772         /* put transfer on interrupt queue */
1773         ohci_transfer_intr_enqueue(xfer);
1774 }
1775
1776 struct usb_pipe_methods ohci_device_ctrl_methods =
1777 {
1778         .open = ohci_device_ctrl_open,
1779         .close = ohci_device_ctrl_close,
1780         .enter = ohci_device_ctrl_enter,
1781         .start = ohci_device_ctrl_start,
1782 };
1783
1784 /*------------------------------------------------------------------------*
1785  * ohci interrupt support
1786  *------------------------------------------------------------------------*/
1787 static void
1788 ohci_device_intr_open(struct usb_xfer *xfer)
1789 {
1790         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1791         uint16_t best;
1792         uint16_t bit;
1793         uint16_t x;
1794
1795         best = 0;
1796         bit = OHCI_NO_EDS / 2;
1797         while (bit) {
1798                 if (xfer->interval >= bit) {
1799                         x = bit;
1800                         best = bit;
1801                         while (x & bit) {
1802                                 if (sc->sc_intr_stat[x] <
1803                                     sc->sc_intr_stat[best]) {
1804                                         best = x;
1805                                 }
1806                                 x++;
1807                         }
1808                         break;
1809                 }
1810                 bit >>= 1;
1811         }
1812
1813         sc->sc_intr_stat[best]++;
1814         xfer->qh_pos = best;
1815
1816         DPRINTFN(3, "best=%d interval=%d\n",
1817             best, xfer->interval);
1818 }
1819
1820 static void
1821 ohci_device_intr_close(struct usb_xfer *xfer)
1822 {
1823         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1824
1825         sc->sc_intr_stat[xfer->qh_pos]--;
1826
1827         ohci_device_done(xfer, USB_ERR_CANCELLED);
1828 }
1829
1830 static void
1831 ohci_device_intr_enter(struct usb_xfer *xfer)
1832 {
1833         return;
1834 }
1835
1836 static void
1837 ohci_device_intr_start(struct usb_xfer *xfer)
1838 {
1839         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1840
1841         /* setup TD's and QH */
1842         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1843
1844         /* put transfer on interrupt queue */
1845         ohci_transfer_intr_enqueue(xfer);
1846 }
1847
1848 struct usb_pipe_methods ohci_device_intr_methods =
1849 {
1850         .open = ohci_device_intr_open,
1851         .close = ohci_device_intr_close,
1852         .enter = ohci_device_intr_enter,
1853         .start = ohci_device_intr_start,
1854 };
1855
1856 /*------------------------------------------------------------------------*
1857  * ohci isochronous support
1858  *------------------------------------------------------------------------*/
1859 static void
1860 ohci_device_isoc_open(struct usb_xfer *xfer)
1861 {
1862         return;
1863 }
1864
1865 static void
1866 ohci_device_isoc_close(struct usb_xfer *xfer)
1867 {
1868         /**/
1869         ohci_device_done(xfer, USB_ERR_CANCELLED);
1870 }
1871
1872 static void
1873 ohci_device_isoc_enter(struct usb_xfer *xfer)
1874 {
1875         struct usb_page_search buf_res;
1876         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1877         struct ohci_hcca *hcca;
1878         uint32_t buf_offset;
1879         uint32_t nframes;
1880         uint32_t ed_flags;
1881         uint32_t *plen;
1882         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1883         uint16_t length;
1884         uint8_t ncur;
1885         ohci_itd_t *td;
1886         ohci_itd_t *td_last = NULL;
1887         ohci_ed_t *ed;
1888
1889         hcca = ohci_get_hcca(sc);
1890
1891         nframes = le32toh(hcca->hcca_frame_number);
1892
1893         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1894             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1895
1896         if ((xfer->endpoint->is_synced == 0) ||
1897             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1898             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1899                 /*
1900                  * If there is data underflow or the pipe queue is empty we
1901                  * schedule the transfer a few frames ahead of the current
1902                  * frame position. Else two isochronous transfers might
1903                  * overlap.
1904                  */
1905                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1906                 xfer->endpoint->is_synced = 1;
1907                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1908         }
1909         /*
1910          * compute how many milliseconds the insertion is ahead of the
1911          * current frame position:
1912          */
1913         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1914
1915         /*
1916          * pre-compute when the isochronous transfer will be finished:
1917          */
1918         xfer->isoc_time_complete =
1919             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1920             xfer->nframes);
1921
1922         /* get the real number of frames */
1923
1924         nframes = xfer->nframes;
1925
1926         buf_offset = 0;
1927
1928         plen = xfer->frlengths;
1929
1930         /* toggle the DMA set we are using */
1931         xfer->flags_int.curr_dma_set ^= 1;
1932
1933         /* get next DMA set */
1934         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1935
1936         xfer->td_transfer_first = td;
1937
1938         ncur = 0;
1939         length = 0;
1940
1941         while (nframes--) {
1942                 if (td == NULL) {
1943                         panic("%s:%d: out of TD's\n",
1944                             __FUNCTION__, __LINE__);
1945                 }
1946                 itd_offset[ncur] = length;
1947                 buf_offset += *plen;
1948                 length += *plen;
1949                 plen++;
1950                 ncur++;
1951
1952                 if (                    /* check if the ITD is full */
1953                     (ncur == OHCI_ITD_NOFFSET) ||
1954                 /* check if we have put more than 4K into the ITD */
1955                     (length & 0xF000) ||
1956                 /* check if it is the last frame */
1957                     (nframes == 0)) {
1958
1959                         /* fill current ITD */
1960                         td->itd_flags = htole32(
1961                             OHCI_ITD_NOCC |
1962                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1963                             OHCI_ITD_NOINTR |
1964                             OHCI_ITD_SET_FC(ncur));
1965
1966                         td->frames = ncur;
1967                         xfer->endpoint->isoc_next += ncur;
1968
1969                         if (length == 0) {
1970                                 /* all zero */
1971                                 td->itd_bp0 = 0;
1972                                 td->itd_be = ~0;
1973
1974                                 while (ncur--) {
1975                                         td->itd_offset[ncur] =
1976                                             htole16(OHCI_ITD_MK_OFFS(0));
1977                                 }
1978                         } else {
1979                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1980                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1981                                 buf_res.physaddr =
1982                                     OHCI_PAGE(buf_res.physaddr);
1983                                 td->itd_bp0 = htole32(buf_res.physaddr);
1984                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1985                                 td->itd_be = htole32(buf_res.physaddr);
1986
1987                                 while (ncur--) {
1988                                         itd_offset[ncur] += length;
1989                                         itd_offset[ncur] =
1990                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1991                                         td->itd_offset[ncur] =
1992                                             htole16(itd_offset[ncur]);
1993                                 }
1994                         }
1995                         ncur = 0;
1996                         length = 0;
1997                         td_last = td;
1998                         td = td->obj_next;
1999
2000                         if (td) {
2001                                 /* link the last TD with the next one */
2002                                 td_last->itd_next = td->itd_self;
2003                         }
2004                         usb_pc_cpu_flush(td_last->page_cache);
2005                 }
2006         }
2007
2008         /* update the last TD */
2009         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
2010         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
2011         td_last->itd_next = 0;
2012
2013         usb_pc_cpu_flush(td_last->page_cache);
2014
2015         xfer->td_transfer_last = td_last;
2016
2017 #ifdef USB_DEBUG
2018         if (ohcidebug > 8) {
2019                 DPRINTF("data before transfer:\n");
2020                 ohci_dump_itds(xfer->td_transfer_first);
2021         }
2022 #endif
2023         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2024
2025         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2026                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
2027         else
2028                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
2029
2030         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
2031             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
2032             OHCI_ED_SET_MAXP(xfer->max_frame_size));
2033
2034         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2035                 ed_flags |= OHCI_ED_SPEED;
2036         }
2037         ed->ed_flags = htole32(ed_flags);
2038
2039         td = xfer->td_transfer_first;
2040
2041         ed->ed_headp = td->itd_self;
2042
2043         /* isochronous transfers are not affected by suspend / resume */
2044         /* the append function will flush the endpoint descriptor */
2045
2046         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2047 }
2048
2049 static void
2050 ohci_device_isoc_start(struct usb_xfer *xfer)
2051 {
2052         /* put transfer on interrupt queue */
2053         ohci_transfer_intr_enqueue(xfer);
2054 }
2055
2056 struct usb_pipe_methods ohci_device_isoc_methods =
2057 {
2058         .open = ohci_device_isoc_open,
2059         .close = ohci_device_isoc_close,
2060         .enter = ohci_device_isoc_enter,
2061         .start = ohci_device_isoc_start,
2062 };
2063
2064 /*------------------------------------------------------------------------*
2065  * ohci root control support
2066  *------------------------------------------------------------------------*
2067  * Simulate a hardware hub by handling all the necessary requests.
2068  *------------------------------------------------------------------------*/
2069
2070 static const
2071 struct usb_device_descriptor ohci_devd =
2072 {
2073         sizeof(struct usb_device_descriptor),
2074         UDESC_DEVICE,                   /* type */
2075         {0x00, 0x01},                   /* USB version */
2076         UDCLASS_HUB,                    /* class */
2077         UDSUBCLASS_HUB,                 /* subclass */
2078         UDPROTO_FSHUB,                  /* protocol */
2079         64,                             /* max packet */
2080         {0}, {0}, {0x00, 0x01},         /* device id */
2081         1, 2, 0,                        /* string indicies */
2082         1                               /* # of configurations */
2083 };
2084
2085 static const
2086 struct ohci_config_desc ohci_confd =
2087 {
2088         .confd = {
2089                 .bLength = sizeof(struct usb_config_descriptor),
2090                 .bDescriptorType = UDESC_CONFIG,
2091                 .wTotalLength[0] = sizeof(ohci_confd),
2092                 .bNumInterface = 1,
2093                 .bConfigurationValue = 1,
2094                 .iConfiguration = 0,
2095                 .bmAttributes = UC_SELF_POWERED,
2096                 .bMaxPower = 0,         /* max power */
2097         },
2098         .ifcd = {
2099                 .bLength = sizeof(struct usb_interface_descriptor),
2100                 .bDescriptorType = UDESC_INTERFACE,
2101                 .bNumEndpoints = 1,
2102                 .bInterfaceClass = UICLASS_HUB,
2103                 .bInterfaceSubClass = UISUBCLASS_HUB,
2104                 .bInterfaceProtocol = UIPROTO_FSHUB,
2105         },
2106         .endpd = {
2107                 .bLength = sizeof(struct usb_endpoint_descriptor),
2108                 .bDescriptorType = UDESC_ENDPOINT,
2109                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2110                 .bmAttributes = UE_INTERRUPT,
2111                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2112                 .bInterval = 255,
2113         },
2114 };
2115
2116 static const
2117 struct usb_hub_descriptor ohci_hubd =
2118 {
2119         0,                              /* dynamic length */
2120         UDESC_HUB,
2121         0,
2122         {0, 0},
2123         0,
2124         0,
2125         {0},
2126 };
2127
2128 static usb_error_t
2129 ohci_roothub_exec(struct usb_device *udev,
2130     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2131 {
2132         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2133         const void *ptr;
2134         const char *str_ptr;
2135         uint32_t port;
2136         uint32_t v;
2137         uint16_t len;
2138         uint16_t value;
2139         uint16_t index;
2140         uint8_t l;
2141         usb_error_t err;
2142
2143         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2144
2145         /* buffer reset */
2146         ptr = (const void *)&sc->sc_hub_desc.temp;
2147         len = 0;
2148         err = 0;
2149
2150         value = UGETW(req->wValue);
2151         index = UGETW(req->wIndex);
2152
2153         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2154             "wValue=0x%04x wIndex=0x%04x\n",
2155             req->bmRequestType, req->bRequest,
2156             UGETW(req->wLength), value, index);
2157
2158 #define C(x,y) ((x) | ((y) << 8))
2159         switch (C(req->bRequest, req->bmRequestType)) {
2160         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2161         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2162         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2163                 /*
2164                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2165                  * for the integrated root hub.
2166                  */
2167                 break;
2168         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2169                 len = 1;
2170                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2171                 break;
2172         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2173                 switch (value >> 8) {
2174                 case UDESC_DEVICE:
2175                         if ((value & 0xff) != 0) {
2176                                 err = USB_ERR_IOERROR;
2177                                 goto done;
2178                         }
2179                         len = sizeof(ohci_devd);
2180                         ptr = (const void *)&ohci_devd;
2181                         break;
2182
2183                 case UDESC_CONFIG:
2184                         if ((value & 0xff) != 0) {
2185                                 err = USB_ERR_IOERROR;
2186                                 goto done;
2187                         }
2188                         len = sizeof(ohci_confd);
2189                         ptr = (const void *)&ohci_confd;
2190                         break;
2191
2192                 case UDESC_STRING:
2193                         switch (value & 0xff) {
2194                         case 0: /* Language table */
2195                                 str_ptr = "\001";
2196                                 break;
2197
2198                         case 1: /* Vendor */
2199                                 str_ptr = sc->sc_vendor;
2200                                 break;
2201
2202                         case 2: /* Product */
2203                                 str_ptr = "OHCI root HUB";
2204                                 break;
2205
2206                         default:
2207                                 str_ptr = "";
2208                                 break;
2209                         }
2210
2211                         len = usb_make_str_desc(
2212                             sc->sc_hub_desc.temp,
2213                             sizeof(sc->sc_hub_desc.temp),
2214                             str_ptr);
2215                         break;
2216
2217                 default:
2218                         err = USB_ERR_IOERROR;
2219                         goto done;
2220                 }
2221                 break;
2222         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2223                 len = 1;
2224                 sc->sc_hub_desc.temp[0] = 0;
2225                 break;
2226         case C(UR_GET_STATUS, UT_READ_DEVICE):
2227                 len = 2;
2228                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2229                 break;
2230         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2231         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2232                 len = 2;
2233                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2234                 break;
2235         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2236                 if (value >= OHCI_MAX_DEVICES) {
2237                         err = USB_ERR_IOERROR;
2238                         goto done;
2239                 }
2240                 sc->sc_addr = value;
2241                 break;
2242         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2243                 if ((value != 0) && (value != 1)) {
2244                         err = USB_ERR_IOERROR;
2245                         goto done;
2246                 }
2247                 sc->sc_conf = value;
2248                 break;
2249         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2250                 break;
2251         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2252         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2253         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2254                 err = USB_ERR_IOERROR;
2255                 goto done;
2256         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2257                 break;
2258         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2259                 break;
2260                 /* Hub requests */
2261         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2262                 break;
2263         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2264                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2265                     "port=%d feature=%d\n",
2266                     index, value);
2267                 if ((index < 1) ||
2268                     (index > sc->sc_noport)) {
2269                         err = USB_ERR_IOERROR;
2270                         goto done;
2271                 }
2272                 port = OHCI_RH_PORT_STATUS(index);
2273                 switch (value) {
2274                 case UHF_PORT_ENABLE:
2275                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2276                         break;
2277                 case UHF_PORT_SUSPEND:
2278                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2279                         break;
2280                 case UHF_PORT_POWER:
2281                         /* Yes, writing to the LOW_SPEED bit clears power. */
2282                         OWRITE4(sc, port, UPS_LOW_SPEED);
2283                         break;
2284                 case UHF_C_PORT_CONNECTION:
2285                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2286                         break;
2287                 case UHF_C_PORT_ENABLE:
2288                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2289                         break;
2290                 case UHF_C_PORT_SUSPEND:
2291                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2292                         break;
2293                 case UHF_C_PORT_OVER_CURRENT:
2294                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2295                         break;
2296                 case UHF_C_PORT_RESET:
2297                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2298                         break;
2299                 default:
2300                         err = USB_ERR_IOERROR;
2301                         goto done;
2302                 }
2303                 switch (value) {
2304                 case UHF_C_PORT_CONNECTION:
2305                 case UHF_C_PORT_ENABLE:
2306                 case UHF_C_PORT_SUSPEND:
2307                 case UHF_C_PORT_OVER_CURRENT:
2308                 case UHF_C_PORT_RESET:
2309                         /* enable RHSC interrupt if condition is cleared. */
2310                         if ((OREAD4(sc, port) >> 16) == 0)
2311                                 ohci_rhsc_enable(sc);
2312                         break;
2313                 default:
2314                         break;
2315                 }
2316                 break;
2317         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2318                 if ((value & 0xff) != 0) {
2319                         err = USB_ERR_IOERROR;
2320                         goto done;
2321                 }
2322                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2323
2324                 sc->sc_hub_desc.hubd = ohci_hubd;
2325                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2326                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2327                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2328                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2329                 /* XXX overcurrent */
2330                     );
2331                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2332                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2333
2334                 for (l = 0; l < sc->sc_noport; l++) {
2335                         if (v & 1) {
2336                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2337                         }
2338                         v >>= 1;
2339                 }
2340                 sc->sc_hub_desc.hubd.bDescLength =
2341                     8 + ((sc->sc_noport + 7) / 8);
2342                 len = sc->sc_hub_desc.hubd.bDescLength;
2343                 break;
2344
2345         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2346                 len = 16;
2347                 bzero(sc->sc_hub_desc.temp, 16);
2348                 break;
2349         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2350                 DPRINTFN(9, "get port status i=%d\n",
2351                     index);
2352                 if ((index < 1) ||
2353                     (index > sc->sc_noport)) {
2354                         err = USB_ERR_IOERROR;
2355                         goto done;
2356                 }
2357                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2358                 DPRINTFN(9, "port status=0x%04x\n", v);
2359                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2360                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2361                 len = sizeof(sc->sc_hub_desc.ps);
2362                 break;
2363         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2364                 err = USB_ERR_IOERROR;
2365                 goto done;
2366         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2367                 break;
2368         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2369                 if ((index < 1) ||
2370                     (index > sc->sc_noport)) {
2371                         err = USB_ERR_IOERROR;
2372                         goto done;
2373                 }
2374                 port = OHCI_RH_PORT_STATUS(index);
2375                 switch (value) {
2376                 case UHF_PORT_ENABLE:
2377                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2378                         break;
2379                 case UHF_PORT_SUSPEND:
2380                         OWRITE4(sc, port, UPS_SUSPEND);
2381                         break;
2382                 case UHF_PORT_RESET:
2383                         DPRINTFN(6, "reset port %d\n", index);
2384                         OWRITE4(sc, port, UPS_RESET);
2385                         for (v = 0;; v++) {
2386                                 if (v < 12) {
2387                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2388                                             USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2389
2390                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2391                                                 break;
2392                                         }
2393                                 } else {
2394                                         err = USB_ERR_TIMEOUT;
2395                                         goto done;
2396                                 }
2397                         }
2398                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2399                             index, OREAD4(sc, port));
2400                         break;
2401                 case UHF_PORT_POWER:
2402                         DPRINTFN(3, "set port power %d\n", index);
2403                         OWRITE4(sc, port, UPS_PORT_POWER);
2404                         break;
2405                 default:
2406                         err = USB_ERR_IOERROR;
2407                         goto done;
2408                 }
2409                 break;
2410         default:
2411                 err = USB_ERR_IOERROR;
2412                 goto done;
2413         }
2414 done:
2415         *plength = len;
2416         *pptr = ptr;
2417         return (err);
2418 }
2419
2420 static void
2421 ohci_xfer_setup(struct usb_setup_params *parm)
2422 {
2423         struct usb_page_search page_info;
2424         struct usb_page_cache *pc;
2425         ohci_softc_t *sc;
2426         struct usb_xfer *xfer;
2427         void *last_obj;
2428         uint32_t ntd;
2429         uint32_t nitd;
2430         uint32_t nqh;
2431         uint32_t n;
2432
2433         sc = OHCI_BUS2SC(parm->udev->bus);
2434         xfer = parm->curr_xfer;
2435
2436         parm->hc_max_packet_size = 0x500;
2437         parm->hc_max_packet_count = 1;
2438         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2439
2440         /*
2441          * calculate ntd and nqh
2442          */
2443         if (parm->methods == &ohci_device_ctrl_methods) {
2444                 xfer->flags_int.bdma_enable = 1;
2445
2446                 usbd_transfer_setup_sub(parm);
2447
2448                 nitd = 0;
2449                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2450                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2451                 nqh = 1;
2452
2453         } else if (parm->methods == &ohci_device_bulk_methods) {
2454                 xfer->flags_int.bdma_enable = 1;
2455
2456                 usbd_transfer_setup_sub(parm);
2457
2458                 nitd = 0;
2459                 ntd = ((2 * xfer->nframes)
2460                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2461                 nqh = 1;
2462
2463         } else if (parm->methods == &ohci_device_intr_methods) {
2464                 xfer->flags_int.bdma_enable = 1;
2465
2466                 usbd_transfer_setup_sub(parm);
2467
2468                 nitd = 0;
2469                 ntd = ((2 * xfer->nframes)
2470                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2471                 nqh = 1;
2472
2473         } else if (parm->methods == &ohci_device_isoc_methods) {
2474                 xfer->flags_int.bdma_enable = 1;
2475
2476                 usbd_transfer_setup_sub(parm);
2477
2478                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2479                     ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2480                     1 /* EXTRA */ );
2481                 ntd = 0;
2482                 nqh = 1;
2483
2484         } else {
2485
2486                 usbd_transfer_setup_sub(parm);
2487
2488                 nitd = 0;
2489                 ntd = 0;
2490                 nqh = 0;
2491         }
2492
2493 alloc_dma_set:
2494
2495         if (parm->err) {
2496                 return;
2497         }
2498         last_obj = NULL;
2499
2500         if (usbd_transfer_setup_sub_malloc(
2501             parm, &pc, sizeof(ohci_td_t),
2502             OHCI_TD_ALIGN, ntd)) {
2503                 parm->err = USB_ERR_NOMEM;
2504                 return;
2505         }
2506         if (parm->buf) {
2507                 for (n = 0; n != ntd; n++) {
2508                         ohci_td_t *td;
2509
2510                         usbd_get_page(pc + n, 0, &page_info);
2511
2512                         td = page_info.buffer;
2513
2514                         /* init TD */
2515                         td->td_self = htole32(page_info.physaddr);
2516                         td->obj_next = last_obj;
2517                         td->page_cache = pc + n;
2518
2519                         last_obj = td;
2520
2521                         usb_pc_cpu_flush(pc + n);
2522                 }
2523         }
2524         if (usbd_transfer_setup_sub_malloc(
2525             parm, &pc, sizeof(ohci_itd_t),
2526             OHCI_ITD_ALIGN, nitd)) {
2527                 parm->err = USB_ERR_NOMEM;
2528                 return;
2529         }
2530         if (parm->buf) {
2531                 for (n = 0; n != nitd; n++) {
2532                         ohci_itd_t *itd;
2533
2534                         usbd_get_page(pc + n, 0, &page_info);
2535
2536                         itd = page_info.buffer;
2537
2538                         /* init TD */
2539                         itd->itd_self = htole32(page_info.physaddr);
2540                         itd->obj_next = last_obj;
2541                         itd->page_cache = pc + n;
2542
2543                         last_obj = itd;
2544
2545                         usb_pc_cpu_flush(pc + n);
2546                 }
2547         }
2548         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2549
2550         last_obj = NULL;
2551
2552         if (usbd_transfer_setup_sub_malloc(
2553             parm, &pc, sizeof(ohci_ed_t),
2554             OHCI_ED_ALIGN, nqh)) {
2555                 parm->err = USB_ERR_NOMEM;
2556                 return;
2557         }
2558         if (parm->buf) {
2559                 for (n = 0; n != nqh; n++) {
2560                         ohci_ed_t *ed;
2561
2562                         usbd_get_page(pc + n, 0, &page_info);
2563
2564                         ed = page_info.buffer;
2565
2566                         /* init QH */
2567                         ed->ed_self = htole32(page_info.physaddr);
2568                         ed->obj_next = last_obj;
2569                         ed->page_cache = pc + n;
2570
2571                         last_obj = ed;
2572
2573                         usb_pc_cpu_flush(pc + n);
2574                 }
2575         }
2576         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2577
2578         if (!xfer->flags_int.curr_dma_set) {
2579                 xfer->flags_int.curr_dma_set = 1;
2580                 goto alloc_dma_set;
2581         }
2582 }
2583
2584 static void
2585 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2586     struct usb_endpoint *ep)
2587 {
2588         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2589
2590         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2591             ep, udev->address,
2592             edesc->bEndpointAddress, udev->flags.usb_mode,
2593             sc->sc_addr);
2594
2595         if (udev->flags.usb_mode != USB_MODE_HOST) {
2596                 /* not supported */
2597                 return;
2598         }
2599         if (udev->device_index != sc->sc_addr) {
2600                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2601                 case UE_CONTROL:
2602                         ep->methods = &ohci_device_ctrl_methods;
2603                         break;
2604                 case UE_INTERRUPT:
2605                         ep->methods = &ohci_device_intr_methods;
2606                         break;
2607                 case UE_ISOCHRONOUS:
2608                         if (udev->speed == USB_SPEED_FULL) {
2609                                 ep->methods = &ohci_device_isoc_methods;
2610                         }
2611                         break;
2612                 case UE_BULK:
2613                         if (udev->speed != USB_SPEED_LOW) {
2614                                 ep->methods = &ohci_device_bulk_methods;
2615                         }
2616                         break;
2617                 default:
2618                         /* do nothing */
2619                         break;
2620                 }
2621         }
2622 }
2623
2624 static void
2625 ohci_xfer_unsetup(struct usb_xfer *xfer)
2626 {
2627         return;
2628 }
2629
2630 static void
2631 ohci_get_dma_delay(struct usb_bus *bus, uint32_t *pus)
2632 {
2633         /*
2634          * Wait until hardware has finished any possible use of the
2635          * transfer descriptor(s) and QH
2636          */
2637         *pus = (1125);                  /* microseconds */
2638 }
2639
2640 static void
2641 ohci_device_resume(struct usb_device *udev)
2642 {
2643         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2644         struct usb_xfer *xfer;
2645         struct usb_pipe_methods *methods;
2646         ohci_ed_t *ed;
2647
2648         DPRINTF("\n");
2649
2650         USB_BUS_LOCK(udev->bus);
2651
2652         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2653
2654                 if (xfer->xroot->udev == udev) {
2655
2656                         methods = xfer->endpoint->methods;
2657                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2658
2659                         if (methods == &ohci_device_bulk_methods) {
2660                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2661                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2662                         }
2663                         if (methods == &ohci_device_ctrl_methods) {
2664                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2665                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2666                         }
2667                         if (methods == &ohci_device_intr_methods) {
2668                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2669                         }
2670                 }
2671         }
2672
2673         USB_BUS_UNLOCK(udev->bus);
2674
2675         return;
2676 }
2677
2678 static void
2679 ohci_device_suspend(struct usb_device *udev)
2680 {
2681         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2682         struct usb_xfer *xfer;
2683         struct usb_pipe_methods *methods;
2684         ohci_ed_t *ed;
2685
2686         DPRINTF("\n");
2687
2688         USB_BUS_LOCK(udev->bus);
2689
2690         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2691
2692                 if (xfer->xroot->udev == udev) {
2693
2694                         methods = xfer->endpoint->methods;
2695                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2696
2697                         if (methods == &ohci_device_bulk_methods) {
2698                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2699                         }
2700                         if (methods == &ohci_device_ctrl_methods) {
2701                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2702                         }
2703                         if (methods == &ohci_device_intr_methods) {
2704                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2705                         }
2706                 }
2707         }
2708
2709         USB_BUS_UNLOCK(udev->bus);
2710
2711         return;
2712 }
2713
2714 static void
2715 ohci_set_hw_power(struct usb_bus *bus)
2716 {
2717         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2718         uint32_t temp;
2719         uint32_t flags;
2720
2721         DPRINTF("\n");
2722
2723         USB_BUS_LOCK(bus);
2724
2725         flags = bus->hw_power_state;
2726
2727         temp = OREAD4(sc, OHCI_CONTROL);
2728         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2729
2730         if (flags & USB_HW_POWER_CONTROL)
2731                 temp |= OHCI_CLE;
2732
2733         if (flags & USB_HW_POWER_BULK)
2734                 temp |= OHCI_BLE;
2735
2736         if (flags & USB_HW_POWER_INTERRUPT)
2737                 temp |= OHCI_PLE;
2738
2739         if (flags & USB_HW_POWER_ISOC)
2740                 temp |= OHCI_IE | OHCI_PLE;
2741
2742         OWRITE4(sc, OHCI_CONTROL, temp);
2743
2744         USB_BUS_UNLOCK(bus);
2745
2746         return;
2747 }
2748
2749 struct usb_bus_methods ohci_bus_methods =
2750 {
2751         .endpoint_init = ohci_ep_init,
2752         .xfer_setup = ohci_xfer_setup,
2753         .xfer_unsetup = ohci_xfer_unsetup,
2754         .get_dma_delay = ohci_get_dma_delay,
2755         .device_resume = ohci_device_resume,
2756         .device_suspend = ohci_device_suspend,
2757         .set_hw_power = ohci_set_hw_power,
2758         .roothub_exec = ohci_roothub_exec,
2759         .xfer_poll = ohci_do_poll,
2760 };