3 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Lennart Augustsson (lennart@augustsson.net) at
8 * Carlstedt Research & Technology.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
42 #define UHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
44 /* PCI config registers */
45 #define PCI_USBREV 0x60 /* USB protocol revision */
46 #define PCI_USB_REV_MASK 0xff
47 #define PCI_USB_REV_PRE_1_0 0x00
48 #define PCI_USB_REV_1_0 0x10
49 #define PCI_USB_REV_1_1 0x11
50 #define PCI_LEGSUP 0xc0 /* Legacy Support register */
51 #define PCI_LEGSUP_USBPIRQDEN 0x2000 /* USB PIRQ D Enable */
52 #define PCI_CBIO 0x20 /* configuration base IO */
53 #define PCI_INTERFACE_UHCI 0x00
57 #define UHCI_CMD_RS 0x0001
58 #define UHCI_CMD_HCRESET 0x0002
59 #define UHCI_CMD_GRESET 0x0004
60 #define UHCI_CMD_EGSM 0x0008
61 #define UHCI_CMD_FGR 0x0010
62 #define UHCI_CMD_SWDBG 0x0020
63 #define UHCI_CMD_CF 0x0040
64 #define UHCI_CMD_MAXP 0x0080
66 #define UHCI_STS_USBINT 0x0001
67 #define UHCI_STS_USBEI 0x0002
68 #define UHCI_STS_RD 0x0004
69 #define UHCI_STS_HSE 0x0008
70 #define UHCI_STS_HCPE 0x0010
71 #define UHCI_STS_HCH 0x0020
72 #define UHCI_STS_ALLINTRS 0x003f
73 #define UHCI_INTR 0x04
74 #define UHCI_INTR_TOCRCIE 0x0001
75 #define UHCI_INTR_RIE 0x0002
76 #define UHCI_INTR_IOCE 0x0004
77 #define UHCI_INTR_SPIE 0x0008
78 #define UHCI_FRNUM 0x06
79 #define UHCI_FRNUM_MASK 0x03ff
80 #define UHCI_FLBASEADDR 0x08
82 #define UHCI_SOF_MASK 0x7f
83 #define UHCI_PORTSC1 0x010
84 #define UHCI_PORTSC2 0x012
85 #define UHCI_PORTSC_CCS 0x0001
86 #define UHCI_PORTSC_CSC 0x0002
87 #define UHCI_PORTSC_PE 0x0004
88 #define UHCI_PORTSC_POEDC 0x0008
89 #define UHCI_PORTSC_LS 0x0030
90 #define UHCI_PORTSC_LS_SHIFT 4
91 #define UHCI_PORTSC_RD 0x0040
92 #define UHCI_PORTSC_LSDA 0x0100
93 #define UHCI_PORTSC_PR 0x0200
94 #define UHCI_PORTSC_OCI 0x0400
95 #define UHCI_PORTSC_OCIC 0x0800
96 #define UHCI_PORTSC_SUSP 0x1000
98 #define URWMASK(x) ((x) & (UHCI_PORTSC_SUSP | \
99 UHCI_PORTSC_PR | UHCI_PORTSC_RD | \
102 #define UHCI_FRAMELIST_COUNT 1024 /* units */
103 #define UHCI_FRAMELIST_ALIGN 4096 /* bytes */
105 /* Structures alignment (bytes) */
106 #define UHCI_TD_ALIGN 16
107 #define UHCI_QH_ALIGN 16
109 #if ((USB_PAGE_SIZE < UHCI_TD_ALIGN) || (UHCI_TD_ALIGN == 0) || \
110 (USB_PAGE_SIZE < UHCI_QH_ALIGN) || (UHCI_QH_ALIGN == 0))
111 #error "Invalid USB page size!"
114 typedef uint32_t uhci_physaddr_t;
116 #define UHCI_PTR_T 0x00000001
117 #define UHCI_PTR_TD 0x00000000
118 #define UHCI_PTR_QH 0x00000002
119 #define UHCI_PTR_VF 0x00000004
121 #define UHCI_QH_REMOVE_DELAY 5 /* us - QH remove delay */
124 * The Queue Heads (QH) and Transfer Descriptors (TD) are accessed by
125 * both the CPU and the USB-controller which run concurrently. Great
126 * care must be taken. When the data-structures are linked into the
127 * USB controller's frame list, the USB-controller "owns" the
128 * td_status and qh_elink fields, which will not be written by the
135 * Data used by the UHCI controller.
136 * volatile is used in order to mantain struct members ordering.
138 volatile uint32_t td_next;
139 volatile uint32_t td_status;
140 #define UHCI_TD_GET_ACTLEN(s) (((s) + 1) & 0x3ff)
141 #define UHCI_TD_ZERO_ACTLEN(t) ((t) | 0x3ff)
142 #define UHCI_TD_BITSTUFF 0x00020000
143 #define UHCI_TD_CRCTO 0x00040000
144 #define UHCI_TD_NAK 0x00080000
145 #define UHCI_TD_BABBLE 0x00100000
146 #define UHCI_TD_DBUFFER 0x00200000
147 #define UHCI_TD_STALLED 0x00400000
148 #define UHCI_TD_ACTIVE 0x00800000
149 #define UHCI_TD_IOC 0x01000000
150 #define UHCI_TD_IOS 0x02000000
151 #define UHCI_TD_LS 0x04000000
152 #define UHCI_TD_GET_ERRCNT(s) (((s) >> 27) & 3)
153 #define UHCI_TD_SET_ERRCNT(n) ((n) << 27)
154 #define UHCI_TD_SPD 0x20000000
155 volatile uint32_t td_token;
156 #define UHCI_TD_PID 0x000000ff
157 #define UHCI_TD_PID_IN 0x00000069
158 #define UHCI_TD_PID_OUT 0x000000e1
159 #define UHCI_TD_PID_SETUP 0x0000002d
160 #define UHCI_TD_GET_PID(s) ((s) & 0xff)
161 #define UHCI_TD_SET_DEVADDR(a) ((a) << 8)
162 #define UHCI_TD_GET_DEVADDR(s) (((s) >> 8) & 0x7f)
163 #define UHCI_TD_SET_ENDPT(e) (((e) & 0xf) << 15)
164 #define UHCI_TD_GET_ENDPT(s) (((s) >> 15) & 0xf)
165 #define UHCI_TD_SET_DT(t) ((t) << 19)
166 #define UHCI_TD_GET_DT(s) (((s) >> 19) & 1)
167 #define UHCI_TD_SET_MAXLEN(l) (((l)-1) << 21)
168 #define UHCI_TD_GET_MAXLEN(s) ((((s) >> 21) + 1) & 0x7ff)
169 #define UHCI_TD_MAXLEN_MASK 0xffe00000
170 volatile uint32_t td_buffer;
172 * Extra information needed:
174 struct uhci_td *next;
175 struct uhci_td *prev;
176 struct uhci_td *obj_next;
177 struct usb_page_cache *page_cache;
178 struct usb_page_cache *fix_pc;
181 } __aligned(UHCI_TD_ALIGN);
183 typedef struct uhci_td uhci_td_t;
185 #define UHCI_TD_ERROR (UHCI_TD_BITSTUFF | UHCI_TD_CRCTO | \
186 UHCI_TD_BABBLE | UHCI_TD_DBUFFER | UHCI_TD_STALLED)
188 #define UHCI_TD_SETUP(len, endp, dev) (UHCI_TD_SET_MAXLEN(len) | \
189 UHCI_TD_SET_ENDPT(endp) | \
190 UHCI_TD_SET_DEVADDR(dev) | \
193 #define UHCI_TD_OUT(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \
194 UHCI_TD_SET_ENDPT(endp) | \
195 UHCI_TD_SET_DEVADDR(dev) | \
196 UHCI_TD_PID_OUT | UHCI_TD_SET_DT(dt))
198 #define UHCI_TD_IN(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \
199 UHCI_TD_SET_ENDPT(endp) | \
200 UHCI_TD_SET_DEVADDR(dev) | \
201 UHCI_TD_PID_IN | UHCI_TD_SET_DT(dt))
205 * Data used by the UHCI controller.
207 volatile uint32_t qh_h_next;
208 volatile uint32_t qh_e_next;
210 * Extra information needed:
212 struct uhci_qh *h_next;
213 struct uhci_qh *h_prev;
214 struct uhci_qh *obj_next;
215 struct uhci_td *e_next;
216 struct usb_page_cache *page_cache;
219 } __aligned(UHCI_QH_ALIGN);
221 typedef struct uhci_qh uhci_qh_t;
223 /* Maximum number of isochronous TD's and QH's interrupt */
224 #define UHCI_VFRAMELIST_COUNT 128
225 #define UHCI_IFRAMELIST_COUNT (2 * UHCI_VFRAMELIST_COUNT)
227 #if (((UHCI_VFRAMELIST_COUNT & (UHCI_VFRAMELIST_COUNT-1)) != 0) || \
228 (UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT))
229 #error "UHCI_VFRAMELIST_COUNT is not power of two"
230 #error "or UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT"
233 #if (UHCI_VFRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
234 #error "maximum number of full-speed isochronous frames is higher than supported!"
237 struct uhci_config_desc {
238 struct usb_config_descriptor confd;
239 struct usb_interface_descriptor ifcd;
240 struct usb_endpoint_descriptor endpd;
243 union uhci_hub_desc {
244 struct usb_status stat;
245 struct usb_port_status ps;
249 struct uhci_hw_softc {
250 struct usb_page_cache pframes_pc;
251 struct usb_page_cache isoc_start_pc[UHCI_VFRAMELIST_COUNT];
252 struct usb_page_cache intr_start_pc[UHCI_IFRAMELIST_COUNT];
253 struct usb_page_cache ls_ctl_start_pc;
254 struct usb_page_cache fs_ctl_start_pc;
255 struct usb_page_cache bulk_start_pc;
256 struct usb_page_cache last_qh_pc;
257 struct usb_page_cache last_td_pc;
259 struct usb_page pframes_pg;
260 struct usb_page isoc_start_pg[UHCI_VFRAMELIST_COUNT];
261 struct usb_page intr_start_pg[UHCI_IFRAMELIST_COUNT];
262 struct usb_page ls_ctl_start_pg;
263 struct usb_page fs_ctl_start_pg;
264 struct usb_page bulk_start_pg;
265 struct usb_page last_qh_pg;
266 struct usb_page last_td_pg;
269 typedef struct uhci_softc {
270 struct uhci_hw_softc sc_hw;
271 struct usb_bus sc_bus; /* base device */
272 union uhci_hub_desc sc_hub_desc;
273 struct usb_callout sc_root_intr;
275 struct usb_device *sc_devices[UHCI_MAX_DEVICES];
276 /* pointer to last TD for isochronous */
277 struct uhci_td *sc_isoc_p_last[UHCI_VFRAMELIST_COUNT];
278 /* pointer to last QH for interrupt */
279 struct uhci_qh *sc_intr_p_last[UHCI_IFRAMELIST_COUNT];
280 /* pointer to last QH for low speed control */
281 struct uhci_qh *sc_ls_ctl_p_last;
282 /* pointer to last QH for full speed control */
283 struct uhci_qh *sc_fs_ctl_p_last;
284 /* pointer to last QH for bulk */
285 struct uhci_qh *sc_bulk_p_last;
286 struct uhci_qh *sc_reclaim_qh_p;
287 struct uhci_qh *sc_last_qh_p;
288 struct uhci_td *sc_last_td_p;
289 struct resource *sc_io_res;
290 struct resource *sc_irq_res;
293 bus_size_t sc_io_size;
294 bus_space_tag_t sc_io_tag;
295 bus_space_handle_t sc_io_hdl;
297 uint32_t sc_loops; /* number of QHs that wants looping */
299 uint16_t sc_intr_stat[UHCI_IFRAMELIST_COUNT];
300 uint16_t sc_saved_frnum;
302 uint8_t sc_addr; /* device address */
303 uint8_t sc_conf; /* device configuration */
304 uint8_t sc_isreset; /* bits set if a root hub is reset */
305 uint8_t sc_isresumed; /* bits set if a port was resumed */
306 uint8_t sc_saved_sof;
307 uint8_t sc_hub_idata[1];
309 char sc_vendor[16]; /* vendor string for root hub */
312 usb_bus_mem_cb_t uhci_iterate_hw_softc;
314 usb_error_t uhci_init(uhci_softc_t *sc);
315 void uhci_suspend(uhci_softc_t *sc);
316 void uhci_resume(uhci_softc_t *sc);
317 void uhci_reset(uhci_softc_t *sc);
318 void uhci_interrupt(uhci_softc_t *sc);
320 #endif /* _UHCI_H_ */