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1 /* $FreeBSD$ */
2 /*-
3  * Copyright (c) 2008 Hans Petter Selasky <hselasky@FreeBSD.org>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27
28 /*
29  * This file contains the driver for the USS820 series USB Device
30  * Controller
31  *
32  * NOTE: The datasheet does not document everything.
33  */
34
35 #include <sys/stdint.h>
36 #include <sys/stddef.h>
37 #include <sys/param.h>
38 #include <sys/queue.h>
39 #include <sys/types.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/bus.h>
43 #include <sys/linker_set.h>
44 #include <sys/module.h>
45 #include <sys/lock.h>
46 #include <sys/mutex.h>
47 #include <sys/condvar.h>
48 #include <sys/sysctl.h>
49 #include <sys/sx.h>
50 #include <sys/unistd.h>
51 #include <sys/callout.h>
52 #include <sys/malloc.h>
53 #include <sys/priv.h>
54
55 #include <dev/usb/usb.h>
56 #include <dev/usb/usbdi.h>
57
58 #define USB_DEBUG_VAR uss820dcidebug
59
60 #include <dev/usb/usb_core.h>
61 #include <dev/usb/usb_debug.h>
62 #include <dev/usb/usb_busdma.h>
63 #include <dev/usb/usb_process.h>
64 #include <dev/usb/usb_transfer.h>
65 #include <dev/usb/usb_device.h>
66 #include <dev/usb/usb_hub.h>
67 #include <dev/usb/usb_util.h>
68
69 #include <dev/usb/usb_controller.h>
70 #include <dev/usb/usb_bus.h>
71 #include <dev/usb/controller/uss820dci.h>
72
73 #define USS820_DCI_BUS2SC(bus) \
74    ((struct uss820dci_softc *)(((uint8_t *)(bus)) - \
75     ((uint8_t *)&(((struct uss820dci_softc *)0)->sc_bus))))
76
77 #define USS820_DCI_PC2SC(pc) \
78    USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
79
80 #if USB_DEBUG
81 static int uss820dcidebug = 0;
82
83 SYSCTL_NODE(_hw_usb, OID_AUTO, uss820dci, CTLFLAG_RW, 0, "USB uss820dci");
84 SYSCTL_INT(_hw_usb_uss820dci, OID_AUTO, debug, CTLFLAG_RW,
85     &uss820dcidebug, 0, "uss820dci debug level");
86 #endif
87
88 #define USS820_DCI_INTR_ENDPT 1
89
90 /* prototypes */
91
92 struct usb_bus_methods uss820dci_bus_methods;
93 struct usb_pipe_methods uss820dci_device_bulk_methods;
94 struct usb_pipe_methods uss820dci_device_ctrl_methods;
95 struct usb_pipe_methods uss820dci_device_intr_methods;
96 struct usb_pipe_methods uss820dci_device_isoc_fs_methods;
97
98 static uss820dci_cmd_t uss820dci_setup_rx;
99 static uss820dci_cmd_t uss820dci_data_rx;
100 static uss820dci_cmd_t uss820dci_data_tx;
101 static uss820dci_cmd_t uss820dci_data_tx_sync;
102 static void     uss820dci_device_done(struct usb_xfer *, usb_error_t);
103 static void     uss820dci_do_poll(struct usb_bus *);
104 static void     uss820dci_standard_done(struct usb_xfer *);
105 static void     uss820dci_intr_set(struct usb_xfer *, uint8_t);
106 static void     uss820dci_update_shared_1(struct uss820dci_softc *, uint8_t,
107                     uint8_t, uint8_t);
108 static void     uss820dci_root_intr(struct uss820dci_softc *);
109
110 /*
111  * Here is a list of what the USS820D chip can support. The main
112  * limitation is that the sum of the buffer sizes must be less than
113  * 1120 bytes.
114  */
115 static const struct usb_hw_ep_profile
116         uss820dci_ep_profile[] = {
117
118         [0] = {
119                 .max_in_frame_size = 32,
120                 .max_out_frame_size = 32,
121                 .is_simplex = 0,
122                 .support_control = 1,
123         },
124         [1] = {
125                 .max_in_frame_size = 64,
126                 .max_out_frame_size = 64,
127                 .is_simplex = 0,
128                 .support_multi_buffer = 1,
129                 .support_bulk = 1,
130                 .support_interrupt = 1,
131                 .support_in = 1,
132                 .support_out = 1,
133         },
134         [2] = {
135                 .max_in_frame_size = 8,
136                 .max_out_frame_size = 8,
137                 .is_simplex = 0,
138                 .support_multi_buffer = 1,
139                 .support_bulk = 1,
140                 .support_interrupt = 1,
141                 .support_in = 1,
142                 .support_out = 1,
143         },
144         [3] = {
145                 .max_in_frame_size = 256,
146                 .max_out_frame_size = 256,
147                 .is_simplex = 0,
148                 .support_multi_buffer = 1,
149                 .support_isochronous = 1,
150                 .support_in = 1,
151                 .support_out = 1,
152         },
153 };
154
155 static void
156 uss820dci_update_shared_1(struct uss820dci_softc *sc, uint8_t reg,
157     uint8_t keep_mask, uint8_t set_mask)
158 {
159         uint8_t temp;
160
161         USS820_WRITE_1(sc, USS820_PEND, 1);
162         temp = USS820_READ_1(sc, reg);
163         temp &= (keep_mask);
164         temp |= (set_mask);
165         USS820_WRITE_1(sc, reg, temp);
166         USS820_WRITE_1(sc, USS820_PEND, 0);
167 }
168
169 static void
170 uss820dci_get_hw_ep_profile(struct usb_device *udev,
171     const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
172 {
173         if (ep_addr == 0) {
174                 *ppf = uss820dci_ep_profile + 0;
175         } else if (ep_addr < 5) {
176                 *ppf = uss820dci_ep_profile + 1;
177         } else if (ep_addr < 7) {
178                 *ppf = uss820dci_ep_profile + 2;
179         } else if (ep_addr == 7) {
180                 *ppf = uss820dci_ep_profile + 3;
181         } else {
182                 *ppf = NULL;
183         }
184 }
185
186 static void
187 uss820dci_pull_up(struct uss820dci_softc *sc)
188 {
189         uint8_t temp;
190
191         /* pullup D+, if possible */
192
193         if (!sc->sc_flags.d_pulled_up &&
194             sc->sc_flags.port_powered) {
195                 sc->sc_flags.d_pulled_up = 1;
196
197                 DPRINTF("\n");
198
199                 temp = USS820_READ_1(sc, USS820_MCSR);
200                 temp |= USS820_MCSR_DPEN;
201                 USS820_WRITE_1(sc, USS820_MCSR, temp);
202         }
203 }
204
205 static void
206 uss820dci_pull_down(struct uss820dci_softc *sc)
207 {
208         uint8_t temp;
209
210         /* pulldown D+, if possible */
211
212         if (sc->sc_flags.d_pulled_up) {
213                 sc->sc_flags.d_pulled_up = 0;
214
215                 DPRINTF("\n");
216
217                 temp = USS820_READ_1(sc, USS820_MCSR);
218                 temp &= ~USS820_MCSR_DPEN;
219                 USS820_WRITE_1(sc, USS820_MCSR, temp);
220         }
221 }
222
223 static void
224 uss820dci_wakeup_peer(struct uss820dci_softc *sc)
225 {
226         if (!(sc->sc_flags.status_suspend)) {
227                 return;
228         }
229         DPRINTFN(0, "not supported\n");
230 }
231
232 static void
233 uss820dci_set_address(struct uss820dci_softc *sc, uint8_t addr)
234 {
235         DPRINTFN(5, "addr=%d\n", addr);
236
237         USS820_WRITE_1(sc, USS820_FADDR, addr);
238 }
239
240 static uint8_t
241 uss820dci_setup_rx(struct uss820dci_td *td)
242 {
243         struct uss820dci_softc *sc;
244         struct usb_device_request req;
245         uint16_t count;
246         uint8_t rx_stat;
247         uint8_t temp;
248
249         /* select the correct endpoint */
250         bus_space_write_1(td->io_tag, td->io_hdl,
251             USS820_EPINDEX, td->ep_index);
252
253         /* read out FIFO status */
254         rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
255             USS820_RXSTAT);
256
257         /* get pointer to softc */
258         sc = USS820_DCI_PC2SC(td->pc);
259
260         DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
261
262         if (!(rx_stat & USS820_RXSTAT_RXSETUP)) {
263                 goto not_complete;
264         }
265         /* clear did stall */
266         td->did_stall = 0;
267
268         /* clear stall and all I/O */
269         uss820dci_update_shared_1(sc, USS820_EPCON,
270             0xFF ^ (USS820_EPCON_TXSTL |
271             USS820_EPCON_RXSTL |
272             USS820_EPCON_RXIE |
273             USS820_EPCON_TXOE), 0);
274
275         /* clear end overwrite flag */
276         uss820dci_update_shared_1(sc, USS820_RXSTAT,
277             0xFF ^ USS820_RXSTAT_EDOVW, 0);
278
279         /* get the packet byte count */
280         count = bus_space_read_1(td->io_tag, td->io_hdl,
281             USS820_RXCNTL);
282         count |= (bus_space_read_1(td->io_tag, td->io_hdl,
283             USS820_RXCNTH) << 8);
284         count &= 0x3FF;
285
286         /* verify data length */
287         if (count != td->remainder) {
288                 DPRINTFN(0, "Invalid SETUP packet "
289                     "length, %d bytes\n", count);
290                 goto setup_not_complete;
291         }
292         if (count != sizeof(req)) {
293                 DPRINTFN(0, "Unsupported SETUP packet "
294                     "length, %d bytes\n", count);
295                 goto setup_not_complete;
296         }
297         /* receive data */
298         bus_space_read_multi_1(td->io_tag, td->io_hdl,
299             USS820_RXDAT, (void *)&req, sizeof(req));
300
301         /* read out FIFO status */
302         rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
303             USS820_RXSTAT);
304
305         if (rx_stat & (USS820_RXSTAT_EDOVW |
306             USS820_RXSTAT_STOVW)) {
307                 DPRINTF("new SETUP packet received\n");
308                 return (1);             /* not complete */
309         }
310         /* clear receive setup bit */
311         uss820dci_update_shared_1(sc, USS820_RXSTAT,
312             0xFF ^ (USS820_RXSTAT_RXSETUP |
313             USS820_RXSTAT_EDOVW |
314             USS820_RXSTAT_STOVW), 0);
315
316         /* set RXFFRC bit */
317         temp = bus_space_read_1(td->io_tag, td->io_hdl,
318             USS820_RXCON);
319         temp |= USS820_RXCON_RXFFRC;
320         bus_space_write_1(td->io_tag, td->io_hdl,
321             USS820_RXCON, temp);
322
323         /* copy data into real buffer */
324         usbd_copy_in(td->pc, 0, &req, sizeof(req));
325
326         td->offset = sizeof(req);
327         td->remainder = 0;
328
329         /* sneak peek the set address */
330         if ((req.bmRequestType == UT_WRITE_DEVICE) &&
331             (req.bRequest == UR_SET_ADDRESS)) {
332                 sc->sc_dv_addr = req.wValue[0] & 0x7F;
333         } else {
334                 sc->sc_dv_addr = 0xFF;
335         }
336         return (0);                     /* complete */
337
338 setup_not_complete:
339
340         /* set RXFFRC bit */
341         temp = bus_space_read_1(td->io_tag, td->io_hdl,
342             USS820_RXCON);
343         temp |= USS820_RXCON_RXFFRC;
344         bus_space_write_1(td->io_tag, td->io_hdl,
345             USS820_RXCON, temp);
346
347         /* FALLTHROUGH */
348
349 not_complete:
350         /* abort any ongoing transfer */
351         if (!td->did_stall) {
352                 DPRINTFN(5, "stalling\n");
353                 /* set stall */
354                 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF,
355                     (USS820_EPCON_TXSTL | USS820_EPCON_RXSTL));
356
357                 td->did_stall = 1;
358         }
359
360         /* clear end overwrite flag, if any */
361         if (rx_stat & USS820_RXSTAT_RXSETUP) {
362                 uss820dci_update_shared_1(sc, USS820_RXSTAT,
363                     0xFF ^ (USS820_RXSTAT_EDOVW |
364                     USS820_RXSTAT_STOVW |
365                     USS820_RXSTAT_RXSETUP), 0);
366         }
367         return (1);                     /* not complete */
368
369 }
370
371 static uint8_t
372 uss820dci_data_rx(struct uss820dci_td *td)
373 {
374         struct usb_page_search buf_res;
375         uint16_t count;
376         uint8_t rx_flag;
377         uint8_t rx_stat;
378         uint8_t rx_cntl;
379         uint8_t to;
380         uint8_t got_short;
381
382         to = 2;                         /* don't loop forever! */
383         got_short = 0;
384
385         /* select the correct endpoint */
386         bus_space_write_1(td->io_tag, td->io_hdl, USS820_EPINDEX, td->ep_index);
387
388         /* check if any of the FIFO banks have data */
389 repeat:
390         /* read out FIFO flag */
391         rx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
392             USS820_RXFLG);
393         /* read out FIFO status */
394         rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
395             USS820_RXSTAT);
396
397         DPRINTFN(5, "rx_stat=0x%02x rx_flag=0x%02x rem=%u\n",
398             rx_stat, rx_flag, td->remainder);
399
400         if (rx_stat & (USS820_RXSTAT_RXSETUP |
401             USS820_RXSTAT_RXSOVW |
402             USS820_RXSTAT_EDOVW)) {
403                 if (td->remainder == 0) {
404                         /*
405                          * We are actually complete and have
406                          * received the next SETUP
407                          */
408                         DPRINTFN(5, "faking complete\n");
409                         return (0);     /* complete */
410                 }
411                 /*
412                  * USB Host Aborted the transfer.
413                  */
414                 td->error = 1;
415                 return (0);             /* complete */
416         }
417         /* check for errors */
418         if (rx_flag & (USS820_RXFLG_RXOVF |
419             USS820_RXFLG_RXURF)) {
420                 DPRINTFN(5, "overflow or underflow\n");
421                 /* should not happen */
422                 td->error = 1;
423                 return (0);             /* complete */
424         }
425         /* check status */
426         if (!(rx_flag & (USS820_RXFLG_RXFIF0 |
427             USS820_RXFLG_RXFIF1))) {
428
429                 /* read out EPCON register */
430                 /* enable RX input */
431                 if (!td->did_enable) {
432                         uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
433                             USS820_EPCON, 0xFF, USS820_EPCON_RXIE);
434                         td->did_enable = 1;
435                 }
436                 return (1);             /* not complete */
437         }
438         /* get the packet byte count */
439         count = bus_space_read_1(td->io_tag, td->io_hdl,
440             USS820_RXCNTL);
441
442         count |= (bus_space_read_1(td->io_tag, td->io_hdl,
443             USS820_RXCNTH) << 8);
444         count &= 0x3FF;
445
446         DPRINTFN(5, "count=0x%04x\n", count);
447
448         /* verify the packet byte count */
449         if (count != td->max_packet_size) {
450                 if (count < td->max_packet_size) {
451                         /* we have a short packet */
452                         td->short_pkt = 1;
453                         got_short = 1;
454                 } else {
455                         /* invalid USB packet */
456                         td->error = 1;
457                         return (0);     /* we are complete */
458                 }
459         }
460         /* verify the packet byte count */
461         if (count > td->remainder) {
462                 /* invalid USB packet */
463                 td->error = 1;
464                 return (0);             /* we are complete */
465         }
466         while (count > 0) {
467                 usbd_get_page(td->pc, td->offset, &buf_res);
468
469                 /* get correct length */
470                 if (buf_res.length > count) {
471                         buf_res.length = count;
472                 }
473                 /* receive data */
474                 bus_space_read_multi_1(td->io_tag, td->io_hdl,
475                     USS820_RXDAT, buf_res.buffer, buf_res.length);
476
477                 /* update counters */
478                 count -= buf_res.length;
479                 td->offset += buf_res.length;
480                 td->remainder -= buf_res.length;
481         }
482
483         /* set RXFFRC bit */
484         rx_cntl = bus_space_read_1(td->io_tag, td->io_hdl,
485             USS820_RXCON);
486         rx_cntl |= USS820_RXCON_RXFFRC;
487         bus_space_write_1(td->io_tag, td->io_hdl,
488             USS820_RXCON, rx_cntl);
489
490         /* check if we are complete */
491         if ((td->remainder == 0) || got_short) {
492                 if (td->short_pkt) {
493                         /* we are complete */
494                         return (0);
495                 }
496                 /* else need to receive a zero length packet */
497         }
498         if (--to) {
499                 goto repeat;
500         }
501         return (1);                     /* not complete */
502 }
503
504 static uint8_t
505 uss820dci_data_tx(struct uss820dci_td *td)
506 {
507         struct usb_page_search buf_res;
508         uint16_t count;
509         uint16_t count_copy;
510         uint8_t rx_stat;
511         uint8_t tx_flag;
512         uint8_t to;
513
514         /* select the correct endpoint */
515         bus_space_write_1(td->io_tag, td->io_hdl,
516             USS820_EPINDEX, td->ep_index);
517
518         to = 2;                         /* don't loop forever! */
519
520 repeat:
521         /* read out TX FIFO flags */
522         tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
523             USS820_TXFLG);
524
525         /* read out RX FIFO status last */
526         rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
527             USS820_RXSTAT);
528
529         DPRINTFN(5, "rx_stat=0x%02x tx_flag=0x%02x rem=%u\n",
530             rx_stat, tx_flag, td->remainder);
531
532         if (rx_stat & (USS820_RXSTAT_RXSETUP |
533             USS820_RXSTAT_RXSOVW |
534             USS820_RXSTAT_EDOVW)) {
535                 /*
536                  * The current transfer was aborted
537                  * by the USB Host
538                  */
539                 td->error = 1;
540                 return (0);             /* complete */
541         }
542         if (tx_flag & (USS820_TXFLG_TXOVF |
543             USS820_TXFLG_TXURF)) {
544                 td->error = 1;
545                 return (0);             /* complete */
546         }
547         if (tx_flag & USS820_TXFLG_TXFIF0) {
548                 if (tx_flag & USS820_TXFLG_TXFIF1) {
549                         return (1);     /* not complete */
550                 }
551         }
552         if ((!td->support_multi_buffer) &&
553             (tx_flag & (USS820_TXFLG_TXFIF0 |
554             USS820_TXFLG_TXFIF1))) {
555                 return (1);             /* not complete */
556         }
557         count = td->max_packet_size;
558         if (td->remainder < count) {
559                 /* we have a short packet */
560                 td->short_pkt = 1;
561                 count = td->remainder;
562         }
563         count_copy = count;
564         while (count > 0) {
565
566                 usbd_get_page(td->pc, td->offset, &buf_res);
567
568                 /* get correct length */
569                 if (buf_res.length > count) {
570                         buf_res.length = count;
571                 }
572                 /* transmit data */
573                 bus_space_write_multi_1(td->io_tag, td->io_hdl,
574                     USS820_TXDAT, buf_res.buffer, buf_res.length);
575
576                 /* update counters */
577                 count -= buf_res.length;
578                 td->offset += buf_res.length;
579                 td->remainder -= buf_res.length;
580         }
581
582         /* post-write high packet byte count first */
583         bus_space_write_1(td->io_tag, td->io_hdl,
584             USS820_TXCNTH, count_copy >> 8);
585
586         /* post-write low packet byte count last */
587         bus_space_write_1(td->io_tag, td->io_hdl,
588             USS820_TXCNTL, count_copy);
589
590         /*
591          * Enable TX output, which must happen after that we have written
592          * data into the FIFO. This is undocumented.
593          */
594         if (!td->did_enable) {
595                 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
596                     USS820_EPCON, 0xFF, USS820_EPCON_TXOE);
597                 td->did_enable = 1;
598         }
599         /* check remainder */
600         if (td->remainder == 0) {
601                 if (td->short_pkt) {
602                         return (0);     /* complete */
603                 }
604                 /* else we need to transmit a short packet */
605         }
606         if (--to) {
607                 goto repeat;
608         }
609         return (1);                     /* not complete */
610 }
611
612 static uint8_t
613 uss820dci_data_tx_sync(struct uss820dci_td *td)
614 {
615         struct uss820dci_softc *sc;
616         uint8_t rx_stat;
617         uint8_t tx_flag;
618
619         /* select the correct endpoint */
620         bus_space_write_1(td->io_tag, td->io_hdl,
621             USS820_EPINDEX, td->ep_index);
622
623         /* read out TX FIFO flag */
624         tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
625             USS820_TXFLG);
626
627         /* read out RX FIFO status last */
628         rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
629             USS820_RXSTAT);
630
631         DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
632
633         if (rx_stat & (USS820_RXSTAT_RXSETUP |
634             USS820_RXSTAT_RXSOVW |
635             USS820_RXSTAT_EDOVW)) {
636                 DPRINTFN(5, "faking complete\n");
637                 /* Race condition */
638                 return (0);             /* complete */
639         }
640         DPRINTFN(5, "tx_flag=0x%02x rem=%u\n",
641             tx_flag, td->remainder);
642
643         if (tx_flag & (USS820_TXFLG_TXOVF |
644             USS820_TXFLG_TXURF)) {
645                 td->error = 1;
646                 return (0);             /* complete */
647         }
648         if (tx_flag & (USS820_TXFLG_TXFIF0 |
649             USS820_TXFLG_TXFIF1)) {
650                 return (1);             /* not complete */
651         }
652         sc = USS820_DCI_PC2SC(td->pc);
653         if (sc->sc_dv_addr != 0xFF) {
654                 /* write function address */
655                 uss820dci_set_address(sc, sc->sc_dv_addr);
656         }
657         return (0);                     /* complete */
658 }
659
660 static uint8_t
661 uss820dci_xfer_do_fifo(struct usb_xfer *xfer)
662 {
663         struct uss820dci_td *td;
664
665         DPRINTFN(9, "\n");
666
667         td = xfer->td_transfer_cache;
668         while (1) {
669                 if ((td->func) (td)) {
670                         /* operation in progress */
671                         break;
672                 }
673                 if (((void *)td) == xfer->td_transfer_last) {
674                         goto done;
675                 }
676                 if (td->error) {
677                         goto done;
678                 } else if (td->remainder > 0) {
679                         /*
680                          * We had a short transfer. If there is no alternate
681                          * next, stop processing !
682                          */
683                         if (!td->alt_next) {
684                                 goto done;
685                         }
686                 }
687                 /*
688                  * Fetch the next transfer descriptor.
689                  */
690                 td = td->obj_next;
691                 xfer->td_transfer_cache = td;
692         }
693         return (1);                     /* not complete */
694
695 done:
696         /* compute all actual lengths */
697
698         uss820dci_standard_done(xfer);
699
700         return (0);                     /* complete */
701 }
702
703 static void
704 uss820dci_interrupt_poll(struct uss820dci_softc *sc)
705 {
706         struct usb_xfer *xfer;
707
708 repeat:
709         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
710                 if (!uss820dci_xfer_do_fifo(xfer)) {
711                         /* queue has been modified */
712                         goto repeat;
713                 }
714         }
715 }
716
717 static void
718 uss820dci_wait_suspend(struct uss820dci_softc *sc, uint8_t on)
719 {
720         uint8_t scr;
721         uint8_t scratch;
722
723         scr = USS820_READ_1(sc, USS820_SCR);
724         scratch = USS820_READ_1(sc, USS820_SCRATCH);
725
726         if (on) {
727                 scr |= USS820_SCR_IE_SUSP;
728                 scratch &= ~USS820_SCRATCH_IE_RESUME;
729         } else {
730                 scr &= ~USS820_SCR_IE_SUSP;
731                 scratch |= USS820_SCRATCH_IE_RESUME;
732         }
733
734         USS820_WRITE_1(sc, USS820_SCR, scr);
735         USS820_WRITE_1(sc, USS820_SCRATCH, scratch);
736 }
737
738 void
739 uss820dci_interrupt(struct uss820dci_softc *sc)
740 {
741         uint8_t ssr;
742         uint8_t event;
743
744         USB_BUS_LOCK(&sc->sc_bus);
745
746         ssr = USS820_READ_1(sc, USS820_SSR);
747
748         ssr &= (USS820_SSR_SUSPEND |
749             USS820_SSR_RESUME |
750             USS820_SSR_RESET);
751
752         /* acknowledge all interrupts */
753
754         uss820dci_update_shared_1(sc, USS820_SSR, 0, 0);
755
756         /* check for any bus state change interrupts */
757
758         if (ssr) {
759
760                 event = 0;
761
762                 if (ssr & USS820_SSR_RESET) {
763                         sc->sc_flags.status_bus_reset = 1;
764                         sc->sc_flags.status_suspend = 0;
765                         sc->sc_flags.change_suspend = 0;
766                         sc->sc_flags.change_connect = 1;
767
768                         /* disable resume interrupt */
769                         uss820dci_wait_suspend(sc, 1);
770
771                         event = 1;
772                 }
773                 /*
774                  * If "RESUME" and "SUSPEND" is set at the same time
775                  * we interpret that like "RESUME". Resume is set when
776                  * there is at least 3 milliseconds of inactivity on
777                  * the USB BUS.
778                  */
779                 if (ssr & USS820_SSR_RESUME) {
780                         if (sc->sc_flags.status_suspend) {
781                                 sc->sc_flags.status_suspend = 0;
782                                 sc->sc_flags.change_suspend = 1;
783                                 /* disable resume interrupt */
784                                 uss820dci_wait_suspend(sc, 1);
785                                 event = 1;
786                         }
787                 } else if (ssr & USS820_SSR_SUSPEND) {
788                         if (!sc->sc_flags.status_suspend) {
789                                 sc->sc_flags.status_suspend = 1;
790                                 sc->sc_flags.change_suspend = 1;
791                                 /* enable resume interrupt */
792                                 uss820dci_wait_suspend(sc, 0);
793                                 event = 1;
794                         }
795                 }
796                 if (event) {
797
798                         DPRINTF("real bus interrupt 0x%02x\n", ssr);
799
800                         /* complete root HUB interrupt endpoint */
801                         uss820dci_root_intr(sc);
802                 }
803         }
804         /* acknowledge all SBI interrupts */
805         uss820dci_update_shared_1(sc, USS820_SBI, 0, 0);
806
807         /* acknowledge all SBI1 interrupts */
808         uss820dci_update_shared_1(sc, USS820_SBI1, 0, 0);
809
810         /* poll all active transfers */
811         uss820dci_interrupt_poll(sc);
812
813         USB_BUS_UNLOCK(&sc->sc_bus);
814 }
815
816 static void
817 uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp)
818 {
819         struct uss820dci_td *td;
820
821         /* get current Transfer Descriptor */
822         td = temp->td_next;
823         temp->td = td;
824
825         /* prepare for next TD */
826         temp->td_next = td->obj_next;
827
828         /* fill out the Transfer Descriptor */
829         td->func = temp->func;
830         td->pc = temp->pc;
831         td->offset = temp->offset;
832         td->remainder = temp->len;
833         td->error = 0;
834         td->did_enable = 0;
835         td->did_stall = temp->did_stall;
836         td->short_pkt = temp->short_pkt;
837         td->alt_next = temp->setup_alt_next;
838 }
839
840 static void
841 uss820dci_setup_standard_chain(struct usb_xfer *xfer)
842 {
843         struct uss820_std_temp temp;
844         struct uss820dci_softc *sc;
845         struct uss820dci_td *td;
846         uint32_t x;
847         uint8_t ep_no;
848
849         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
850             xfer->address, UE_GET_ADDR(xfer->endpointno),
851             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
852
853         temp.max_frame_size = xfer->max_frame_size;
854
855         td = xfer->td_start[0];
856         xfer->td_transfer_first = td;
857         xfer->td_transfer_cache = td;
858
859         /* setup temp */
860
861         temp.td = NULL;
862         temp.td_next = xfer->td_start[0];
863         temp.offset = 0;
864         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
865         temp.did_stall = !xfer->flags_int.control_stall;
866
867         sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
868         ep_no = (xfer->endpointno & UE_ADDR);
869
870         /* check if we should prepend a setup message */
871
872         if (xfer->flags_int.control_xfr) {
873                 if (xfer->flags_int.control_hdr) {
874
875                         temp.func = &uss820dci_setup_rx;
876                         temp.len = xfer->frlengths[0];
877                         temp.pc = xfer->frbuffers + 0;
878                         temp.short_pkt = temp.len ? 1 : 0;
879                         /* check for last frame */
880                         if (xfer->nframes == 1) {
881                                 /* no STATUS stage yet, SETUP is last */
882                                 if (xfer->flags_int.control_act)
883                                         temp.setup_alt_next = 0;
884                         }
885
886                         uss820dci_setup_standard_chain_sub(&temp);
887                 }
888                 x = 1;
889         } else {
890                 x = 0;
891         }
892
893         if (x != xfer->nframes) {
894                 if (xfer->endpointno & UE_DIR_IN) {
895                         temp.func = &uss820dci_data_tx;
896                 } else {
897                         temp.func = &uss820dci_data_rx;
898                 }
899
900                 /* setup "pc" pointer */
901                 temp.pc = xfer->frbuffers + x;
902         }
903         while (x != xfer->nframes) {
904
905                 /* DATA0 / DATA1 message */
906
907                 temp.len = xfer->frlengths[x];
908
909                 x++;
910
911                 if (x == xfer->nframes) {
912                         if (xfer->flags_int.control_xfr) {
913                                 if (xfer->flags_int.control_act) {
914                                         temp.setup_alt_next = 0;
915                                 }
916                         } else {
917                                 temp.setup_alt_next = 0;
918                         }
919                 }
920                 if (temp.len == 0) {
921
922                         /* make sure that we send an USB packet */
923
924                         temp.short_pkt = 0;
925
926                 } else {
927
928                         /* regular data transfer */
929
930                         temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
931                 }
932
933                 uss820dci_setup_standard_chain_sub(&temp);
934
935                 if (xfer->flags_int.isochronous_xfr) {
936                         temp.offset += temp.len;
937                 } else {
938                         /* get next Page Cache pointer */
939                         temp.pc = xfer->frbuffers + x;
940                 }
941         }
942
943         /* check for control transfer */
944         if (xfer->flags_int.control_xfr) {
945                 uint8_t need_sync;
946
947                 /* always setup a valid "pc" pointer for status and sync */
948                 temp.pc = xfer->frbuffers + 0;
949                 temp.len = 0;
950                 temp.short_pkt = 0;
951                 temp.setup_alt_next = 0;
952
953                 /* check if we should append a status stage */
954                 if (!xfer->flags_int.control_act) {
955
956                         /*
957                          * Send a DATA1 message and invert the current
958                          * endpoint direction.
959                          */
960                         if (xfer->endpointno & UE_DIR_IN) {
961                                 temp.func = &uss820dci_data_rx;
962                                 need_sync = 0;
963                         } else {
964                                 temp.func = &uss820dci_data_tx;
965                                 need_sync = 1;
966                         }
967                         temp.len = 0;
968                         temp.short_pkt = 0;
969
970                         uss820dci_setup_standard_chain_sub(&temp);
971                         if (need_sync) {
972                                 /* we need a SYNC point after TX */
973                                 temp.func = &uss820dci_data_tx_sync;
974                                 uss820dci_setup_standard_chain_sub(&temp);
975                         }
976                 }
977         }
978         /* must have at least one frame! */
979         td = temp.td;
980         xfer->td_transfer_last = td;
981 }
982
983 static void
984 uss820dci_timeout(void *arg)
985 {
986         struct usb_xfer *xfer = arg;
987
988         DPRINTF("xfer=%p\n", xfer);
989
990         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
991
992         /* transfer is transferred */
993         uss820dci_device_done(xfer, USB_ERR_TIMEOUT);
994 }
995
996 static void
997 uss820dci_intr_set(struct usb_xfer *xfer, uint8_t set)
998 {
999         struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1000         uint8_t ep_no = (xfer->endpointno & UE_ADDR);
1001         uint8_t ep_reg;
1002         uint8_t temp;
1003
1004         DPRINTFN(15, "endpoint 0x%02x\n", xfer->endpointno);
1005
1006         if (ep_no > 3) {
1007                 ep_reg = USS820_SBIE1;
1008         } else {
1009                 ep_reg = USS820_SBIE;
1010         }
1011
1012         ep_no &= 3;
1013         ep_no = 1 << (2 * ep_no);
1014
1015         if (xfer->flags_int.control_xfr) {
1016                 if (xfer->flags_int.control_hdr) {
1017                         ep_no <<= 1;    /* RX interrupt only */
1018                 } else {
1019                         ep_no |= (ep_no << 1);  /* RX and TX interrupt */
1020                 }
1021         } else {
1022                 if (!(xfer->endpointno & UE_DIR_IN)) {
1023                         ep_no <<= 1;
1024                 }
1025         }
1026         temp = USS820_READ_1(sc, ep_reg);
1027         if (set) {
1028                 temp |= ep_no;
1029         } else {
1030                 temp &= ~ep_no;
1031         }
1032         USS820_WRITE_1(sc, ep_reg, temp);
1033 }
1034
1035 static void
1036 uss820dci_start_standard_chain(struct usb_xfer *xfer)
1037 {
1038         DPRINTFN(9, "\n");
1039
1040         /* poll one time */
1041         if (uss820dci_xfer_do_fifo(xfer)) {
1042
1043                 /*
1044                  * Only enable the endpoint interrupt when we are
1045                  * actually waiting for data, hence we are dealing
1046                  * with level triggered interrupts !
1047                  */
1048                 uss820dci_intr_set(xfer, 1);
1049
1050                 /* put transfer on interrupt queue */
1051                 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1052
1053                 /* start timeout, if any */
1054                 if (xfer->timeout != 0) {
1055                         usbd_transfer_timeout_ms(xfer,
1056                             &uss820dci_timeout, xfer->timeout);
1057                 }
1058         }
1059 }
1060
1061 static void
1062 uss820dci_root_intr(struct uss820dci_softc *sc)
1063 {
1064         DPRINTFN(9, "\n");
1065
1066         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1067
1068         /* set port bit */
1069         sc->sc_hub_idata[0] = 0x02;     /* we only have one port */
1070
1071         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1072             sizeof(sc->sc_hub_idata));
1073 }
1074
1075 static usb_error_t
1076 uss820dci_standard_done_sub(struct usb_xfer *xfer)
1077 {
1078         struct uss820dci_td *td;
1079         uint32_t len;
1080         uint8_t error;
1081
1082         DPRINTFN(9, "\n");
1083
1084         td = xfer->td_transfer_cache;
1085
1086         do {
1087                 len = td->remainder;
1088
1089                 if (xfer->aframes != xfer->nframes) {
1090                         /*
1091                          * Verify the length and subtract
1092                          * the remainder from "frlengths[]":
1093                          */
1094                         if (len > xfer->frlengths[xfer->aframes]) {
1095                                 td->error = 1;
1096                         } else {
1097                                 xfer->frlengths[xfer->aframes] -= len;
1098                         }
1099                 }
1100                 /* Check for transfer error */
1101                 if (td->error) {
1102                         /* the transfer is finished */
1103                         error = 1;
1104                         td = NULL;
1105                         break;
1106                 }
1107                 /* Check for short transfer */
1108                 if (len > 0) {
1109                         if (xfer->flags_int.short_frames_ok) {
1110                                 /* follow alt next */
1111                                 if (td->alt_next) {
1112                                         td = td->obj_next;
1113                                 } else {
1114                                         td = NULL;
1115                                 }
1116                         } else {
1117                                 /* the transfer is finished */
1118                                 td = NULL;
1119                         }
1120                         error = 0;
1121                         break;
1122                 }
1123                 td = td->obj_next;
1124
1125                 /* this USB frame is complete */
1126                 error = 0;
1127                 break;
1128
1129         } while (0);
1130
1131         /* update transfer cache */
1132
1133         xfer->td_transfer_cache = td;
1134
1135         return (error ?
1136             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1137 }
1138
1139 static void
1140 uss820dci_standard_done(struct usb_xfer *xfer)
1141 {
1142         usb_error_t err = 0;
1143
1144         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1145             xfer, xfer->endpoint);
1146
1147         /* reset scanner */
1148
1149         xfer->td_transfer_cache = xfer->td_transfer_first;
1150
1151         if (xfer->flags_int.control_xfr) {
1152
1153                 if (xfer->flags_int.control_hdr) {
1154
1155                         err = uss820dci_standard_done_sub(xfer);
1156                 }
1157                 xfer->aframes = 1;
1158
1159                 if (xfer->td_transfer_cache == NULL) {
1160                         goto done;
1161                 }
1162         }
1163         while (xfer->aframes != xfer->nframes) {
1164
1165                 err = uss820dci_standard_done_sub(xfer);
1166                 xfer->aframes++;
1167
1168                 if (xfer->td_transfer_cache == NULL) {
1169                         goto done;
1170                 }
1171         }
1172
1173         if (xfer->flags_int.control_xfr &&
1174             !xfer->flags_int.control_act) {
1175
1176                 err = uss820dci_standard_done_sub(xfer);
1177         }
1178 done:
1179         uss820dci_device_done(xfer, err);
1180 }
1181
1182 /*------------------------------------------------------------------------*
1183  *      uss820dci_device_done
1184  *
1185  * NOTE: this function can be called more than one time on the
1186  * same USB transfer!
1187  *------------------------------------------------------------------------*/
1188 static void
1189 uss820dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1190 {
1191         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1192
1193         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1194             xfer, xfer->endpoint, error);
1195
1196         if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1197                 uss820dci_intr_set(xfer, 0);
1198         }
1199         /* dequeue transfer and start next transfer */
1200         usbd_transfer_done(xfer, error);
1201 }
1202
1203 static void
1204 uss820dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1205     struct usb_endpoint *ep, uint8_t *did_stall)
1206 {
1207         struct uss820dci_softc *sc;
1208         uint8_t ep_no;
1209         uint8_t ep_type;
1210         uint8_t ep_dir;
1211         uint8_t temp;
1212
1213         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1214
1215         DPRINTFN(5, "endpoint=%p\n", ep);
1216
1217         if (xfer) {
1218                 /* cancel any ongoing transfers */
1219                 uss820dci_device_done(xfer, USB_ERR_STALLED);
1220         }
1221         /* set FORCESTALL */
1222         sc = USS820_DCI_BUS2SC(udev->bus);
1223         ep_no = (ep->edesc->bEndpointAddress & UE_ADDR);
1224         ep_dir = (ep->edesc->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT));
1225         ep_type = (ep->edesc->bmAttributes & UE_XFERTYPE);
1226
1227         if (ep_type == UE_CONTROL) {
1228                 /* should not happen */
1229                 return;
1230         }
1231         USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1232
1233         if (ep_dir == UE_DIR_IN) {
1234                 temp = USS820_EPCON_TXSTL;
1235         } else {
1236                 temp = USS820_EPCON_RXSTL;
1237         }
1238         uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1239 }
1240
1241 static void
1242 uss820dci_clear_stall_sub(struct uss820dci_softc *sc,
1243     uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir)
1244 {
1245         uint8_t temp;
1246
1247         if (ep_type == UE_CONTROL) {
1248                 /* clearing stall is not needed */
1249                 return;
1250         }
1251         /* select endpoint index */
1252         USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1253
1254         /* clear stall and disable I/O transfers */
1255         if (ep_dir == UE_DIR_IN) {
1256                 temp = 0xFF ^ (USS820_EPCON_TXOE |
1257                     USS820_EPCON_TXSTL);
1258         } else {
1259                 temp = 0xFF ^ (USS820_EPCON_RXIE |
1260                     USS820_EPCON_RXSTL);
1261         }
1262         uss820dci_update_shared_1(sc, USS820_EPCON, temp, 0);
1263
1264         if (ep_dir == UE_DIR_IN) {
1265                 /* reset data toggle */
1266                 USS820_WRITE_1(sc, USS820_TXSTAT,
1267                     USS820_TXSTAT_TXSOVW);
1268
1269                 /* reset FIFO */
1270                 temp = USS820_READ_1(sc, USS820_TXCON);
1271                 temp |= USS820_TXCON_TXCLR;
1272                 USS820_WRITE_1(sc, USS820_TXCON, temp);
1273                 temp &= ~USS820_TXCON_TXCLR;
1274                 USS820_WRITE_1(sc, USS820_TXCON, temp);
1275         } else {
1276
1277                 /* reset data toggle */
1278                 uss820dci_update_shared_1(sc, USS820_RXSTAT,
1279                     0, USS820_RXSTAT_RXSOVW);
1280
1281                 /* reset FIFO */
1282                 temp = USS820_READ_1(sc, USS820_RXCON);
1283                 temp |= USS820_RXCON_RXCLR;
1284                 temp &= ~USS820_RXCON_RXFFRC;
1285                 USS820_WRITE_1(sc, USS820_RXCON, temp);
1286                 temp &= ~USS820_RXCON_RXCLR;
1287                 USS820_WRITE_1(sc, USS820_RXCON, temp);
1288         }
1289 }
1290
1291 static void
1292 uss820dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1293 {
1294         struct uss820dci_softc *sc;
1295         struct usb_endpoint_descriptor *ed;
1296
1297         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1298
1299         DPRINTFN(5, "endpoint=%p\n", ep);
1300
1301         /* check mode */
1302         if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1303                 /* not supported */
1304                 return;
1305         }
1306         /* get softc */
1307         sc = USS820_DCI_BUS2SC(udev->bus);
1308
1309         /* get endpoint descriptor */
1310         ed = ep->edesc;
1311
1312         /* reset endpoint */
1313         uss820dci_clear_stall_sub(sc,
1314             (ed->bEndpointAddress & UE_ADDR),
1315             (ed->bmAttributes & UE_XFERTYPE),
1316             (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1317 }
1318
1319 usb_error_t
1320 uss820dci_init(struct uss820dci_softc *sc)
1321 {
1322         const struct usb_hw_ep_profile *pf;
1323         uint8_t n;
1324         uint8_t temp;
1325
1326         DPRINTF("start\n");
1327
1328         /* set up the bus structure */
1329         sc->sc_bus.usbrev = USB_REV_1_1;
1330         sc->sc_bus.methods = &uss820dci_bus_methods;
1331
1332         USB_BUS_LOCK(&sc->sc_bus);
1333
1334         /* we always have VBUS */
1335         sc->sc_flags.status_vbus = 1;
1336
1337         /* reset the chip */
1338         USS820_WRITE_1(sc, USS820_SCR, USS820_SCR_SRESET);
1339         DELAY(100);
1340         USS820_WRITE_1(sc, USS820_SCR, 0);
1341
1342         /* wait for reset to complete */
1343         for (n = 0;; n++) {
1344
1345                 temp = USS820_READ_1(sc, USS820_MCSR);
1346
1347                 if (temp & USS820_MCSR_INIT) {
1348                         break;
1349                 }
1350                 if (n == 100) {
1351                         USB_BUS_UNLOCK(&sc->sc_bus);
1352                         return (USB_ERR_INVAL);
1353                 }
1354                 /* wait a little for things to stabilise */
1355                 DELAY(100);
1356         }
1357
1358         /* do a pulldown */
1359         uss820dci_pull_down(sc);
1360
1361         /* wait 10ms for pulldown to stabilise */
1362         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
1363
1364         /* check hardware revision */
1365         temp = USS820_READ_1(sc, USS820_REV);
1366
1367         if (temp < 0x13) {
1368                 USB_BUS_UNLOCK(&sc->sc_bus);
1369                 return (USB_ERR_INVAL);
1370         }
1371         /* enable interrupts */
1372         USS820_WRITE_1(sc, USS820_SCR,
1373             USS820_SCR_T_IRQ |
1374             USS820_SCR_IE_RESET |
1375         /* USS820_SCR_RWUPE | */
1376             USS820_SCR_IE_SUSP |
1377             USS820_SCR_IRQPOL);
1378
1379         /* enable interrupts */
1380         USS820_WRITE_1(sc, USS820_SCRATCH,
1381             USS820_SCRATCH_IE_RESUME);
1382
1383         /* enable features */
1384         USS820_WRITE_1(sc, USS820_MCSR,
1385             USS820_MCSR_BDFEAT |
1386             USS820_MCSR_FEAT);
1387
1388         sc->sc_flags.mcsr_feat = 1;
1389
1390         /* disable interrupts */
1391         USS820_WRITE_1(sc, USS820_SBIE, 0);
1392
1393         /* disable interrupts */
1394         USS820_WRITE_1(sc, USS820_SBIE1, 0);
1395
1396         /* disable all endpoints */
1397         for (n = 0; n != USS820_EP_MAX; n++) {
1398
1399                 /* select endpoint */
1400                 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1401
1402                 /* disable endpoint */
1403                 uss820dci_update_shared_1(sc, USS820_EPCON, 0, 0);
1404         }
1405
1406         /*
1407          * Initialise default values for some registers that cannot be
1408          * changed during operation!
1409          */
1410         for (n = 0; n != USS820_EP_MAX; n++) {
1411
1412                 uss820dci_get_hw_ep_profile(NULL, &pf, n);
1413
1414                 /* the maximum frame sizes should be the same */
1415                 if (pf->max_in_frame_size != pf->max_out_frame_size) {
1416                         DPRINTF("Max frame size mismatch %u != %u\n",
1417                             pf->max_in_frame_size, pf->max_out_frame_size);
1418                 }
1419                 if (pf->support_isochronous) {
1420                         if (pf->max_in_frame_size <= 64) {
1421                                 temp = (USS820_TXCON_FFSZ_16_64 |
1422                                     USS820_TXCON_TXISO |
1423                                     USS820_TXCON_ATM);
1424                         } else if (pf->max_in_frame_size <= 256) {
1425                                 temp = (USS820_TXCON_FFSZ_64_256 |
1426                                     USS820_TXCON_TXISO |
1427                                     USS820_TXCON_ATM);
1428                         } else if (pf->max_in_frame_size <= 512) {
1429                                 temp = (USS820_TXCON_FFSZ_8_512 |
1430                                     USS820_TXCON_TXISO |
1431                                     USS820_TXCON_ATM);
1432                         } else {        /* 1024 bytes */
1433                                 temp = (USS820_TXCON_FFSZ_32_1024 |
1434                                     USS820_TXCON_TXISO |
1435                                     USS820_TXCON_ATM);
1436                         }
1437                 } else {
1438                         if ((pf->max_in_frame_size <= 8) &&
1439                             (sc->sc_flags.mcsr_feat)) {
1440                                 temp = (USS820_TXCON_FFSZ_8_512 |
1441                                     USS820_TXCON_ATM);
1442                         } else if (pf->max_in_frame_size <= 16) {
1443                                 temp = (USS820_TXCON_FFSZ_16_64 |
1444                                     USS820_TXCON_ATM);
1445                         } else if ((pf->max_in_frame_size <= 32) &&
1446                             (sc->sc_flags.mcsr_feat)) {
1447                                 temp = (USS820_TXCON_FFSZ_32_1024 |
1448                                     USS820_TXCON_ATM);
1449                         } else {        /* 64 bytes */
1450                                 temp = (USS820_TXCON_FFSZ_64_256 |
1451                                     USS820_TXCON_ATM);
1452                         }
1453                 }
1454
1455                 /* need to configure the chip early */
1456
1457                 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1458                 USS820_WRITE_1(sc, USS820_TXCON, temp);
1459                 USS820_WRITE_1(sc, USS820_RXCON, temp);
1460
1461                 if (pf->support_control) {
1462                         temp = USS820_EPCON_CTLEP |
1463                             USS820_EPCON_RXSPM |
1464                             USS820_EPCON_RXIE |
1465                             USS820_EPCON_RXEPEN |
1466                             USS820_EPCON_TXOE |
1467                             USS820_EPCON_TXEPEN;
1468                 } else {
1469                         temp = USS820_EPCON_RXEPEN | USS820_EPCON_TXEPEN;
1470                 }
1471
1472                 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1473         }
1474
1475         USB_BUS_UNLOCK(&sc->sc_bus);
1476
1477         /* catch any lost interrupts */
1478
1479         uss820dci_do_poll(&sc->sc_bus);
1480
1481         return (0);                     /* success */
1482 }
1483
1484 void
1485 uss820dci_uninit(struct uss820dci_softc *sc)
1486 {
1487         uint8_t temp;
1488
1489         USB_BUS_LOCK(&sc->sc_bus);
1490
1491         /* disable all interrupts */
1492         temp = USS820_READ_1(sc, USS820_SCR);
1493         temp &= ~USS820_SCR_T_IRQ;
1494         USS820_WRITE_1(sc, USS820_SCR, temp);
1495
1496         sc->sc_flags.port_powered = 0;
1497         sc->sc_flags.status_vbus = 0;
1498         sc->sc_flags.status_bus_reset = 0;
1499         sc->sc_flags.status_suspend = 0;
1500         sc->sc_flags.change_suspend = 0;
1501         sc->sc_flags.change_connect = 1;
1502
1503         uss820dci_pull_down(sc);
1504         USB_BUS_UNLOCK(&sc->sc_bus);
1505 }
1506
1507 void
1508 uss820dci_suspend(struct uss820dci_softc *sc)
1509 {
1510         return;
1511 }
1512
1513 void
1514 uss820dci_resume(struct uss820dci_softc *sc)
1515 {
1516         return;
1517 }
1518
1519 static void
1520 uss820dci_do_poll(struct usb_bus *bus)
1521 {
1522         struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
1523
1524         USB_BUS_LOCK(&sc->sc_bus);
1525         uss820dci_interrupt_poll(sc);
1526         USB_BUS_UNLOCK(&sc->sc_bus);
1527 }
1528
1529 /*------------------------------------------------------------------------*
1530  * at91dci bulk support
1531  *------------------------------------------------------------------------*/
1532 static void
1533 uss820dci_device_bulk_open(struct usb_xfer *xfer)
1534 {
1535         return;
1536 }
1537
1538 static void
1539 uss820dci_device_bulk_close(struct usb_xfer *xfer)
1540 {
1541         uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1542 }
1543
1544 static void
1545 uss820dci_device_bulk_enter(struct usb_xfer *xfer)
1546 {
1547         return;
1548 }
1549
1550 static void
1551 uss820dci_device_bulk_start(struct usb_xfer *xfer)
1552 {
1553         /* setup TDs */
1554         uss820dci_setup_standard_chain(xfer);
1555         uss820dci_start_standard_chain(xfer);
1556 }
1557
1558 struct usb_pipe_methods uss820dci_device_bulk_methods =
1559 {
1560         .open = uss820dci_device_bulk_open,
1561         .close = uss820dci_device_bulk_close,
1562         .enter = uss820dci_device_bulk_enter,
1563         .start = uss820dci_device_bulk_start,
1564 };
1565
1566 /*------------------------------------------------------------------------*
1567  * at91dci control support
1568  *------------------------------------------------------------------------*/
1569 static void
1570 uss820dci_device_ctrl_open(struct usb_xfer *xfer)
1571 {
1572         return;
1573 }
1574
1575 static void
1576 uss820dci_device_ctrl_close(struct usb_xfer *xfer)
1577 {
1578         uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1579 }
1580
1581 static void
1582 uss820dci_device_ctrl_enter(struct usb_xfer *xfer)
1583 {
1584         return;
1585 }
1586
1587 static void
1588 uss820dci_device_ctrl_start(struct usb_xfer *xfer)
1589 {
1590         /* setup TDs */
1591         uss820dci_setup_standard_chain(xfer);
1592         uss820dci_start_standard_chain(xfer);
1593 }
1594
1595 struct usb_pipe_methods uss820dci_device_ctrl_methods =
1596 {
1597         .open = uss820dci_device_ctrl_open,
1598         .close = uss820dci_device_ctrl_close,
1599         .enter = uss820dci_device_ctrl_enter,
1600         .start = uss820dci_device_ctrl_start,
1601 };
1602
1603 /*------------------------------------------------------------------------*
1604  * at91dci interrupt support
1605  *------------------------------------------------------------------------*/
1606 static void
1607 uss820dci_device_intr_open(struct usb_xfer *xfer)
1608 {
1609         return;
1610 }
1611
1612 static void
1613 uss820dci_device_intr_close(struct usb_xfer *xfer)
1614 {
1615         uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1616 }
1617
1618 static void
1619 uss820dci_device_intr_enter(struct usb_xfer *xfer)
1620 {
1621         return;
1622 }
1623
1624 static void
1625 uss820dci_device_intr_start(struct usb_xfer *xfer)
1626 {
1627         /* setup TDs */
1628         uss820dci_setup_standard_chain(xfer);
1629         uss820dci_start_standard_chain(xfer);
1630 }
1631
1632 struct usb_pipe_methods uss820dci_device_intr_methods =
1633 {
1634         .open = uss820dci_device_intr_open,
1635         .close = uss820dci_device_intr_close,
1636         .enter = uss820dci_device_intr_enter,
1637         .start = uss820dci_device_intr_start,
1638 };
1639
1640 /*------------------------------------------------------------------------*
1641  * at91dci full speed isochronous support
1642  *------------------------------------------------------------------------*/
1643 static void
1644 uss820dci_device_isoc_fs_open(struct usb_xfer *xfer)
1645 {
1646         return;
1647 }
1648
1649 static void
1650 uss820dci_device_isoc_fs_close(struct usb_xfer *xfer)
1651 {
1652         uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1653 }
1654
1655 static void
1656 uss820dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1657 {
1658         struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1659         uint32_t temp;
1660         uint32_t nframes;
1661
1662         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1663             xfer, xfer->endpoint->isoc_next, xfer->nframes);
1664
1665         /* get the current frame index - we don't need the high bits */
1666
1667         nframes = USS820_READ_1(sc, USS820_SOFL);
1668
1669         /*
1670          * check if the frame index is within the window where the
1671          * frames will be inserted
1672          */
1673         temp = (nframes - xfer->endpoint->isoc_next) & USS820_SOFL_MASK;
1674
1675         if ((xfer->endpoint->is_synced == 0) ||
1676             (temp < xfer->nframes)) {
1677                 /*
1678                  * If there is data underflow or the pipe queue is
1679                  * empty we schedule the transfer a few frames ahead
1680                  * of the current frame position. Else two isochronous
1681                  * transfers might overlap.
1682                  */
1683                 xfer->endpoint->isoc_next = (nframes + 3) & USS820_SOFL_MASK;
1684                 xfer->endpoint->is_synced = 1;
1685                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1686         }
1687         /*
1688          * compute how many milliseconds the insertion is ahead of the
1689          * current frame position:
1690          */
1691         temp = (xfer->endpoint->isoc_next - nframes) & USS820_SOFL_MASK;
1692
1693         /*
1694          * pre-compute when the isochronous transfer will be finished:
1695          */
1696         xfer->isoc_time_complete =
1697             usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1698             xfer->nframes;
1699
1700         /* compute frame number for next insertion */
1701         xfer->endpoint->isoc_next += xfer->nframes;
1702
1703         /* setup TDs */
1704         uss820dci_setup_standard_chain(xfer);
1705 }
1706
1707 static void
1708 uss820dci_device_isoc_fs_start(struct usb_xfer *xfer)
1709 {
1710         /* start TD chain */
1711         uss820dci_start_standard_chain(xfer);
1712 }
1713
1714 struct usb_pipe_methods uss820dci_device_isoc_fs_methods =
1715 {
1716         .open = uss820dci_device_isoc_fs_open,
1717         .close = uss820dci_device_isoc_fs_close,
1718         .enter = uss820dci_device_isoc_fs_enter,
1719         .start = uss820dci_device_isoc_fs_start,
1720 };
1721
1722 /*------------------------------------------------------------------------*
1723  * at91dci root control support
1724  *------------------------------------------------------------------------*
1725  * Simulate a hardware HUB by handling all the necessary requests.
1726  *------------------------------------------------------------------------*/
1727
1728 static const struct usb_device_descriptor uss820dci_devd = {
1729         .bLength = sizeof(struct usb_device_descriptor),
1730         .bDescriptorType = UDESC_DEVICE,
1731         .bcdUSB = {0x00, 0x02},
1732         .bDeviceClass = UDCLASS_HUB,
1733         .bDeviceSubClass = UDSUBCLASS_HUB,
1734         .bDeviceProtocol = UDPROTO_HSHUBSTT,
1735         .bMaxPacketSize = 64,
1736         .bcdDevice = {0x00, 0x01},
1737         .iManufacturer = 1,
1738         .iProduct = 2,
1739         .bNumConfigurations = 1,
1740 };
1741
1742 static const struct usb_device_qualifier uss820dci_odevd = {
1743         .bLength = sizeof(struct usb_device_qualifier),
1744         .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1745         .bcdUSB = {0x00, 0x02},
1746         .bDeviceClass = UDCLASS_HUB,
1747         .bDeviceSubClass = UDSUBCLASS_HUB,
1748         .bDeviceProtocol = UDPROTO_FSHUB,
1749         .bMaxPacketSize0 = 0,
1750         .bNumConfigurations = 0,
1751 };
1752
1753 static const struct uss820dci_config_desc uss820dci_confd = {
1754         .confd = {
1755                 .bLength = sizeof(struct usb_config_descriptor),
1756                 .bDescriptorType = UDESC_CONFIG,
1757                 .wTotalLength[0] = sizeof(uss820dci_confd),
1758                 .bNumInterface = 1,
1759                 .bConfigurationValue = 1,
1760                 .iConfiguration = 0,
1761                 .bmAttributes = UC_SELF_POWERED,
1762                 .bMaxPower = 0,
1763         },
1764         .ifcd = {
1765                 .bLength = sizeof(struct usb_interface_descriptor),
1766                 .bDescriptorType = UDESC_INTERFACE,
1767                 .bNumEndpoints = 1,
1768                 .bInterfaceClass = UICLASS_HUB,
1769                 .bInterfaceSubClass = UISUBCLASS_HUB,
1770                 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
1771         },
1772
1773         .endpd = {
1774                 .bLength = sizeof(struct usb_endpoint_descriptor),
1775                 .bDescriptorType = UDESC_ENDPOINT,
1776                 .bEndpointAddress = (UE_DIR_IN | USS820_DCI_INTR_ENDPT),
1777                 .bmAttributes = UE_INTERRUPT,
1778                 .wMaxPacketSize[0] = 8,
1779                 .bInterval = 255,
1780         },
1781 };
1782
1783 static const struct usb_hub_descriptor_min uss820dci_hubd = {
1784         .bDescLength = sizeof(uss820dci_hubd),
1785         .bDescriptorType = UDESC_HUB,
1786         .bNbrPorts = 1,
1787         .wHubCharacteristics[0] =
1788         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) & 0xFF,
1789         .wHubCharacteristics[1] =
1790         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) >> 8,
1791         .bPwrOn2PwrGood = 50,
1792         .bHubContrCurrent = 0,
1793         .DeviceRemovable = {0},         /* port is removable */
1794 };
1795
1796 #define STRING_LANG \
1797   0x09, 0x04,                           /* American English */
1798
1799 #define STRING_VENDOR \
1800   'A', 0, 'G', 0, 'E', 0, 'R', 0, 'E', 0
1801
1802 #define STRING_PRODUCT \
1803   'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
1804   'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
1805   'U', 0, 'B', 0,
1806
1807 USB_MAKE_STRING_DESC(STRING_LANG, uss820dci_langtab);
1808 USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor);
1809 USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product);
1810
1811 static usb_error_t
1812 uss820dci_roothub_exec(struct usb_device *udev,
1813     struct usb_device_request *req, const void **pptr, uint16_t *plength)
1814 {
1815         struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
1816         const void *ptr;
1817         uint16_t len;
1818         uint16_t value;
1819         uint16_t index;
1820         usb_error_t err;
1821
1822         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1823
1824         /* buffer reset */
1825         ptr = (const void *)&sc->sc_hub_temp;
1826         len = 0;
1827         err = 0;
1828
1829         value = UGETW(req->wValue);
1830         index = UGETW(req->wIndex);
1831
1832         /* demultiplex the control request */
1833
1834         switch (req->bmRequestType) {
1835         case UT_READ_DEVICE:
1836                 switch (req->bRequest) {
1837                 case UR_GET_DESCRIPTOR:
1838                         goto tr_handle_get_descriptor;
1839                 case UR_GET_CONFIG:
1840                         goto tr_handle_get_config;
1841                 case UR_GET_STATUS:
1842                         goto tr_handle_get_status;
1843                 default:
1844                         goto tr_stalled;
1845                 }
1846                 break;
1847
1848         case UT_WRITE_DEVICE:
1849                 switch (req->bRequest) {
1850                 case UR_SET_ADDRESS:
1851                         goto tr_handle_set_address;
1852                 case UR_SET_CONFIG:
1853                         goto tr_handle_set_config;
1854                 case UR_CLEAR_FEATURE:
1855                         goto tr_valid;  /* nop */
1856                 case UR_SET_DESCRIPTOR:
1857                         goto tr_valid;  /* nop */
1858                 case UR_SET_FEATURE:
1859                 default:
1860                         goto tr_stalled;
1861                 }
1862                 break;
1863
1864         case UT_WRITE_ENDPOINT:
1865                 switch (req->bRequest) {
1866                 case UR_CLEAR_FEATURE:
1867                         switch (UGETW(req->wValue)) {
1868                         case UF_ENDPOINT_HALT:
1869                                 goto tr_handle_clear_halt;
1870                         case UF_DEVICE_REMOTE_WAKEUP:
1871                                 goto tr_handle_clear_wakeup;
1872                         default:
1873                                 goto tr_stalled;
1874                         }
1875                         break;
1876                 case UR_SET_FEATURE:
1877                         switch (UGETW(req->wValue)) {
1878                         case UF_ENDPOINT_HALT:
1879                                 goto tr_handle_set_halt;
1880                         case UF_DEVICE_REMOTE_WAKEUP:
1881                                 goto tr_handle_set_wakeup;
1882                         default:
1883                                 goto tr_stalled;
1884                         }
1885                         break;
1886                 case UR_SYNCH_FRAME:
1887                         goto tr_valid;  /* nop */
1888                 default:
1889                         goto tr_stalled;
1890                 }
1891                 break;
1892
1893         case UT_READ_ENDPOINT:
1894                 switch (req->bRequest) {
1895                 case UR_GET_STATUS:
1896                         goto tr_handle_get_ep_status;
1897                 default:
1898                         goto tr_stalled;
1899                 }
1900                 break;
1901
1902         case UT_WRITE_INTERFACE:
1903                 switch (req->bRequest) {
1904                 case UR_SET_INTERFACE:
1905                         goto tr_handle_set_interface;
1906                 case UR_CLEAR_FEATURE:
1907                         goto tr_valid;  /* nop */
1908                 case UR_SET_FEATURE:
1909                 default:
1910                         goto tr_stalled;
1911                 }
1912                 break;
1913
1914         case UT_READ_INTERFACE:
1915                 switch (req->bRequest) {
1916                 case UR_GET_INTERFACE:
1917                         goto tr_handle_get_interface;
1918                 case UR_GET_STATUS:
1919                         goto tr_handle_get_iface_status;
1920                 default:
1921                         goto tr_stalled;
1922                 }
1923                 break;
1924
1925         case UT_WRITE_CLASS_INTERFACE:
1926         case UT_WRITE_VENDOR_INTERFACE:
1927                 /* XXX forward */
1928                 break;
1929
1930         case UT_READ_CLASS_INTERFACE:
1931         case UT_READ_VENDOR_INTERFACE:
1932                 /* XXX forward */
1933                 break;
1934
1935         case UT_WRITE_CLASS_DEVICE:
1936                 switch (req->bRequest) {
1937                 case UR_CLEAR_FEATURE:
1938                         goto tr_valid;
1939                 case UR_SET_DESCRIPTOR:
1940                 case UR_SET_FEATURE:
1941                         break;
1942                 default:
1943                         goto tr_stalled;
1944                 }
1945                 break;
1946
1947         case UT_WRITE_CLASS_OTHER:
1948                 switch (req->bRequest) {
1949                 case UR_CLEAR_FEATURE:
1950                         goto tr_handle_clear_port_feature;
1951                 case UR_SET_FEATURE:
1952                         goto tr_handle_set_port_feature;
1953                 case UR_CLEAR_TT_BUFFER:
1954                 case UR_RESET_TT:
1955                 case UR_STOP_TT:
1956                         goto tr_valid;
1957
1958                 default:
1959                         goto tr_stalled;
1960                 }
1961                 break;
1962
1963         case UT_READ_CLASS_OTHER:
1964                 switch (req->bRequest) {
1965                 case UR_GET_TT_STATE:
1966                         goto tr_handle_get_tt_state;
1967                 case UR_GET_STATUS:
1968                         goto tr_handle_get_port_status;
1969                 default:
1970                         goto tr_stalled;
1971                 }
1972                 break;
1973
1974         case UT_READ_CLASS_DEVICE:
1975                 switch (req->bRequest) {
1976                 case UR_GET_DESCRIPTOR:
1977                         goto tr_handle_get_class_descriptor;
1978                 case UR_GET_STATUS:
1979                         goto tr_handle_get_class_status;
1980
1981                 default:
1982                         goto tr_stalled;
1983                 }
1984                 break;
1985         default:
1986                 goto tr_stalled;
1987         }
1988         goto tr_valid;
1989
1990 tr_handle_get_descriptor:
1991         switch (value >> 8) {
1992         case UDESC_DEVICE:
1993                 if (value & 0xff) {
1994                         goto tr_stalled;
1995                 }
1996                 len = sizeof(uss820dci_devd);
1997                 ptr = (const void *)&uss820dci_devd;
1998                 goto tr_valid;
1999         case UDESC_CONFIG:
2000                 if (value & 0xff) {
2001                         goto tr_stalled;
2002                 }
2003                 len = sizeof(uss820dci_confd);
2004                 ptr = (const void *)&uss820dci_confd;
2005                 goto tr_valid;
2006         case UDESC_STRING:
2007                 switch (value & 0xff) {
2008                 case 0:         /* Language table */
2009                         len = sizeof(uss820dci_langtab);
2010                         ptr = (const void *)&uss820dci_langtab;
2011                         goto tr_valid;
2012
2013                 case 1:         /* Vendor */
2014                         len = sizeof(uss820dci_vendor);
2015                         ptr = (const void *)&uss820dci_vendor;
2016                         goto tr_valid;
2017
2018                 case 2:         /* Product */
2019                         len = sizeof(uss820dci_product);
2020                         ptr = (const void *)&uss820dci_product;
2021                         goto tr_valid;
2022                 default:
2023                         break;
2024                 }
2025                 break;
2026         default:
2027                 goto tr_stalled;
2028         }
2029         goto tr_stalled;
2030
2031 tr_handle_get_config:
2032         len = 1;
2033         sc->sc_hub_temp.wValue[0] = sc->sc_conf;
2034         goto tr_valid;
2035
2036 tr_handle_get_status:
2037         len = 2;
2038         USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
2039         goto tr_valid;
2040
2041 tr_handle_set_address:
2042         if (value & 0xFF00) {
2043                 goto tr_stalled;
2044         }
2045         sc->sc_rt_addr = value;
2046         goto tr_valid;
2047
2048 tr_handle_set_config:
2049         if (value >= 2) {
2050                 goto tr_stalled;
2051         }
2052         sc->sc_conf = value;
2053         goto tr_valid;
2054
2055 tr_handle_get_interface:
2056         len = 1;
2057         sc->sc_hub_temp.wValue[0] = 0;
2058         goto tr_valid;
2059
2060 tr_handle_get_tt_state:
2061 tr_handle_get_class_status:
2062 tr_handle_get_iface_status:
2063 tr_handle_get_ep_status:
2064         len = 2;
2065         USETW(sc->sc_hub_temp.wValue, 0);
2066         goto tr_valid;
2067
2068 tr_handle_set_halt:
2069 tr_handle_set_interface:
2070 tr_handle_set_wakeup:
2071 tr_handle_clear_wakeup:
2072 tr_handle_clear_halt:
2073         goto tr_valid;
2074
2075 tr_handle_clear_port_feature:
2076         if (index != 1) {
2077                 goto tr_stalled;
2078         }
2079         DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
2080
2081         switch (value) {
2082         case UHF_PORT_SUSPEND:
2083                 uss820dci_wakeup_peer(sc);
2084                 break;
2085
2086         case UHF_PORT_ENABLE:
2087                 sc->sc_flags.port_enabled = 0;
2088                 break;
2089
2090         case UHF_PORT_TEST:
2091         case UHF_PORT_INDICATOR:
2092         case UHF_C_PORT_ENABLE:
2093         case UHF_C_PORT_OVER_CURRENT:
2094         case UHF_C_PORT_RESET:
2095                 /* nops */
2096                 break;
2097         case UHF_PORT_POWER:
2098                 sc->sc_flags.port_powered = 0;
2099                 uss820dci_pull_down(sc);
2100                 break;
2101         case UHF_C_PORT_CONNECTION:
2102                 sc->sc_flags.change_connect = 0;
2103                 break;
2104         case UHF_C_PORT_SUSPEND:
2105                 sc->sc_flags.change_suspend = 0;
2106                 break;
2107         default:
2108                 err = USB_ERR_IOERROR;
2109                 goto done;
2110         }
2111         goto tr_valid;
2112
2113 tr_handle_set_port_feature:
2114         if (index != 1) {
2115                 goto tr_stalled;
2116         }
2117         DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
2118
2119         switch (value) {
2120         case UHF_PORT_ENABLE:
2121                 sc->sc_flags.port_enabled = 1;
2122                 break;
2123         case UHF_PORT_SUSPEND:
2124         case UHF_PORT_RESET:
2125         case UHF_PORT_TEST:
2126         case UHF_PORT_INDICATOR:
2127                 /* nops */
2128                 break;
2129         case UHF_PORT_POWER:
2130                 sc->sc_flags.port_powered = 1;
2131                 break;
2132         default:
2133                 err = USB_ERR_IOERROR;
2134                 goto done;
2135         }
2136         goto tr_valid;
2137
2138 tr_handle_get_port_status:
2139
2140         DPRINTFN(9, "UR_GET_PORT_STATUS\n");
2141
2142         if (index != 1) {
2143                 goto tr_stalled;
2144         }
2145         if (sc->sc_flags.status_vbus) {
2146                 uss820dci_pull_up(sc);
2147         } else {
2148                 uss820dci_pull_down(sc);
2149         }
2150
2151         /* Select FULL-speed and Device Side Mode */
2152
2153         value = UPS_PORT_MODE_DEVICE;
2154
2155         if (sc->sc_flags.port_powered) {
2156                 value |= UPS_PORT_POWER;
2157         }
2158         if (sc->sc_flags.port_enabled) {
2159                 value |= UPS_PORT_ENABLED;
2160         }
2161         if (sc->sc_flags.status_vbus &&
2162             sc->sc_flags.status_bus_reset) {
2163                 value |= UPS_CURRENT_CONNECT_STATUS;
2164         }
2165         if (sc->sc_flags.status_suspend) {
2166                 value |= UPS_SUSPEND;
2167         }
2168         USETW(sc->sc_hub_temp.ps.wPortStatus, value);
2169
2170         value = 0;
2171
2172         if (sc->sc_flags.change_connect) {
2173                 value |= UPS_C_CONNECT_STATUS;
2174         }
2175         if (sc->sc_flags.change_suspend) {
2176                 value |= UPS_C_SUSPEND;
2177         }
2178         USETW(sc->sc_hub_temp.ps.wPortChange, value);
2179         len = sizeof(sc->sc_hub_temp.ps);
2180         goto tr_valid;
2181
2182 tr_handle_get_class_descriptor:
2183         if (value & 0xFF) {
2184                 goto tr_stalled;
2185         }
2186         ptr = (const void *)&uss820dci_hubd;
2187         len = sizeof(uss820dci_hubd);
2188         goto tr_valid;
2189
2190 tr_stalled:
2191         err = USB_ERR_STALLED;
2192 tr_valid:
2193 done:
2194         *plength = len;
2195         *pptr = ptr;
2196         return (err);
2197 }
2198
2199 static void
2200 uss820dci_xfer_setup(struct usb_setup_params *parm)
2201 {
2202         const struct usb_hw_ep_profile *pf;
2203         struct uss820dci_softc *sc;
2204         struct usb_xfer *xfer;
2205         void *last_obj;
2206         uint32_t ntd;
2207         uint32_t n;
2208         uint8_t ep_no;
2209
2210         sc = USS820_DCI_BUS2SC(parm->udev->bus);
2211         xfer = parm->curr_xfer;
2212
2213         /*
2214          * NOTE: This driver does not use any of the parameters that
2215          * are computed from the following values. Just set some
2216          * reasonable dummies:
2217          */
2218         parm->hc_max_packet_size = 0x500;
2219         parm->hc_max_packet_count = 1;
2220         parm->hc_max_frame_size = 0x500;
2221
2222         usbd_transfer_setup_sub(parm);
2223
2224         /*
2225          * compute maximum number of TDs
2226          */
2227         if (parm->methods == &uss820dci_device_ctrl_methods) {
2228
2229                 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ;
2230
2231         } else if (parm->methods == &uss820dci_device_bulk_methods) {
2232
2233                 ntd = xfer->nframes + 1 /* SYNC */ ;
2234
2235         } else if (parm->methods == &uss820dci_device_intr_methods) {
2236
2237                 ntd = xfer->nframes + 1 /* SYNC */ ;
2238
2239         } else if (parm->methods == &uss820dci_device_isoc_fs_methods) {
2240
2241                 ntd = xfer->nframes + 1 /* SYNC */ ;
2242
2243         } else {
2244
2245                 ntd = 0;
2246         }
2247
2248         /*
2249          * check if "usbd_transfer_setup_sub" set an error
2250          */
2251         if (parm->err) {
2252                 return;
2253         }
2254         /*
2255          * allocate transfer descriptors
2256          */
2257         last_obj = NULL;
2258
2259         /*
2260          * get profile stuff
2261          */
2262         if (ntd) {
2263
2264                 ep_no = xfer->endpointno & UE_ADDR;
2265                 uss820dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2266
2267                 if (pf == NULL) {
2268                         /* should not happen */
2269                         parm->err = USB_ERR_INVAL;
2270                         return;
2271                 }
2272         } else {
2273                 ep_no = 0;
2274                 pf = NULL;
2275         }
2276
2277         /* align data */
2278         parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2279
2280         for (n = 0; n != ntd; n++) {
2281
2282                 struct uss820dci_td *td;
2283
2284                 if (parm->buf) {
2285
2286                         td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2287
2288                         /* init TD */
2289                         td->io_tag = sc->sc_io_tag;
2290                         td->io_hdl = sc->sc_io_hdl;
2291                         td->max_packet_size = xfer->max_packet_size;
2292                         td->ep_index = ep_no;
2293                         if (pf->support_multi_buffer &&
2294                             (parm->methods != &uss820dci_device_ctrl_methods)) {
2295                                 td->support_multi_buffer = 1;
2296                         }
2297                         td->obj_next = last_obj;
2298
2299                         last_obj = td;
2300                 }
2301                 parm->size[0] += sizeof(*td);
2302         }
2303
2304         xfer->td_start[0] = last_obj;
2305 }
2306
2307 static void
2308 uss820dci_xfer_unsetup(struct usb_xfer *xfer)
2309 {
2310         return;
2311 }
2312
2313 static void
2314 uss820dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2315     struct usb_endpoint *ep)
2316 {
2317         struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
2318
2319         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2320             ep, udev->address,
2321             edesc->bEndpointAddress, udev->flags.usb_mode,
2322             sc->sc_rt_addr);
2323
2324         if (udev->device_index != sc->sc_rt_addr) {
2325
2326                 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
2327                         /* not supported */
2328                         return;
2329                 }
2330                 if (udev->speed != USB_SPEED_FULL) {
2331                         /* not supported */
2332                         return;
2333                 }
2334                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2335                 case UE_CONTROL:
2336                         ep->methods = &uss820dci_device_ctrl_methods;
2337                         break;
2338                 case UE_INTERRUPT:
2339                         ep->methods = &uss820dci_device_intr_methods;
2340                         break;
2341                 case UE_ISOCHRONOUS:
2342                         ep->methods = &uss820dci_device_isoc_fs_methods;
2343                         break;
2344                 case UE_BULK:
2345                         ep->methods = &uss820dci_device_bulk_methods;
2346                         break;
2347                 default:
2348                         /* do nothing */
2349                         break;
2350                 }
2351         }
2352 }
2353
2354 struct usb_bus_methods uss820dci_bus_methods =
2355 {
2356         .endpoint_init = &uss820dci_ep_init,
2357         .xfer_setup = &uss820dci_xfer_setup,
2358         .xfer_unsetup = &uss820dci_xfer_unsetup,
2359         .get_hw_ep_profile = &uss820dci_get_hw_ep_profile,
2360         .set_stall = &uss820dci_set_stall,
2361         .clear_stall = &uss820dci_clear_stall,
2362         .roothub_exec = &uss820dci_roothub_exec,
2363         .xfer_poll = &uss820dci_do_poll,
2364 };