sys/dev/usb/serial/uchcom.c

   1 /*      $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $      */
   2
   3 /*-
   4  * Copyright (c) 2007, Takanori Watanabe
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  31  * All rights reserved.
  32  *
  33  * This code is derived from software contributed to The NetBSD Foundation
  34  * by Takuya SHIOZAKI (tshiozak@netbsd.org).
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. All advertising materials mentioning features or use of this software
  45  *    must display the following acknowledgement:
  46  *        This product includes software developed by the NetBSD
  47  *        Foundation, Inc. and its contributors.
  48  * 4. Neither the name of The NetBSD Foundation nor the names of its
  49  *    contributors may be used to endorse or promote products derived
  50  *    from this software without specific prior written permission.
  51  *
  52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  62  * POSSIBILITY OF SUCH DAMAGE.
  63  */
  64
  65 #include <sys/cdefs.h>
  66 __FBSDID("$FreeBSD$");
  67
  68 /*
  69  * driver for WinChipHead CH341/340, the worst USB-serial chip in the world.
  70  */
  71
  72 #include <sys/stdint.h>
  73 #include <sys/stddef.h>
  74 #include <sys/param.h>
  75 #include <sys/queue.h>
  76 #include <sys/types.h>
  77 #include <sys/systm.h>
  78 #include <sys/kernel.h>
  79 #include <sys/bus.h>
  80 #include <sys/linker_set.h>
  81 #include <sys/module.h>
  82 #include <sys/lock.h>
  83 #include <sys/mutex.h>
  84 #include <sys/condvar.h>
  85 #include <sys/sysctl.h>
  86 #include <sys/sx.h>
  87 #include <sys/unistd.h>
  88 #include <sys/callout.h>
  89 #include <sys/malloc.h>
  90 #include <sys/priv.h>
  91
  92 #include <dev/usb/usb.h>
  93 #include <dev/usb/usbdi.h>
  94 #include <dev/usb/usbdi_util.h>
  95 #include "usbdevs.h"
  96
  97 #define USB_DEBUG_VAR uchcom_debug
  98 #include <dev/usb/usb_debug.h>
  99 #include <dev/usb/usb_process.h>
 100
 101 #include <dev/usb/serial/usb_serial.h>
 102
 103 #if USB_DEBUG
 104 static int uchcom_debug = 0;
 105
 106 SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom");
 107 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RW,
 108     &uchcom_debug, 0, "uchcom debug level");
 109 #endif
 110
 111 #define UCHCOM_IFACE_INDEX      0
 112 #define UCHCOM_CONFIG_INDEX     0
 113
 114 #define UCHCOM_REV_CH340        0x0250
 115 #define UCHCOM_INPUT_BUF_SIZE   8
 116
 117 #define UCHCOM_REQ_GET_VERSION  0x5F
 118 #define UCHCOM_REQ_READ_REG     0x95
 119 #define UCHCOM_REQ_WRITE_REG    0x9A
 120 #define UCHCOM_REQ_RESET        0xA1
 121 #define UCHCOM_REQ_SET_DTRRTS   0xA4
 122
 123 #define UCHCOM_REG_STAT1        0x06
 124 #define UCHCOM_REG_STAT2        0x07
 125 #define UCHCOM_REG_BPS_PRE      0x12
 126 #define UCHCOM_REG_BPS_DIV      0x13
 127 #define UCHCOM_REG_BPS_MOD      0x14
 128 #define UCHCOM_REG_BPS_PAD      0x0F
 129 #define UCHCOM_REG_BREAK1       0x05
 130 #define UCHCOM_REG_BREAK2       0x18
 131 #define UCHCOM_REG_LCR1         0x18
 132 #define UCHCOM_REG_LCR2         0x25
 133
 134 #define UCHCOM_VER_20           0x20
 135
 136 #define UCHCOM_BASE_UNKNOWN     0
 137 #define UCHCOM_BPS_MOD_BASE     20000000
 138 #define UCHCOM_BPS_MOD_BASE_OFS 1100
 139
 140 #define UCHCOM_DTR_MASK         0x20
 141 #define UCHCOM_RTS_MASK         0x40
 142
 143 #define UCHCOM_BRK1_MASK        0x01
 144 #define UCHCOM_BRK2_MASK        0x40
 145
 146 #define UCHCOM_LCR1_MASK        0xAF
 147 #define UCHCOM_LCR2_MASK        0x07
 148 #define UCHCOM_LCR1_PARENB      0x80
 149 #define UCHCOM_LCR2_PAREVEN     0x07
 150 #define UCHCOM_LCR2_PARODD      0x06
 151 #define UCHCOM_LCR2_PARMARK     0x05
 152 #define UCHCOM_LCR2_PARSPACE    0x04
 153
 154 #define UCHCOM_INTR_STAT1       0x02
 155 #define UCHCOM_INTR_STAT2       0x03
 156 #define UCHCOM_INTR_LEAST       4
 157
 158 #define UCHCOM_BULK_BUF_SIZE 1024       /* bytes */
 159
 160 enum {
 161         UCHCOM_BULK_DT_WR,
 162         UCHCOM_BULK_DT_RD,
 163         UCHCOM_INTR_DT_RD,
 164         UCHCOM_N_TRANSFER,
 165 };
 166
 167 struct uchcom_softc {
 168         struct ucom_super_softc sc_super_ucom;
 169         struct ucom_softc sc_ucom;
 170
 171         struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER];
 172         struct usb_device *sc_udev;
 173         struct mtx sc_mtx;
 174
 175         uint8_t sc_dtr;                 /* local copy */
 176         uint8_t sc_rts;                 /* local copy */
 177         uint8_t sc_version;
 178         uint8_t sc_msr;
 179         uint8_t sc_lsr;                 /* local status register */
 180 };
 181
 182 struct uchcom_divider {
 183         uint8_t dv_prescaler;
 184         uint8_t dv_div;
 185         uint8_t dv_mod;
 186 };
 187
 188 struct uchcom_divider_record {
 189         uint32_t dvr_high;
 190         uint32_t dvr_low;
 191         uint32_t dvr_base_clock;
 192         struct uchcom_divider dvr_divider;
 193 };
 194
 195 static const struct uchcom_divider_record dividers[] =
 196 {
 197         {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}},
 198         {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}},
 199         {2999999, 23530, 6000000, {3, 0, 0}},
 200         {23529, 2942, 750000, {2, 0, 0}},
 201         {2941, 368, 93750, {1, 0, 0}},
 202         {367, 1, 11719, {0, 0, 0}},
 203 };
 204
 205 #define NUM_DIVIDERS    (sizeof (dividers) / sizeof (dividers[0]))
 206
 207 static const struct usb_device_id uchcom_devs[] = {
 208         {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)},
 209 };
 210
 211 /* protypes */
 212
 213 static int      uchcom_pre_param(struct ucom_softc *, struct termios *);
 214 static void     uchcom_cfg_get_status(struct ucom_softc *, uint8_t *,
 215                     uint8_t *);
 216 static void     uchcom_cfg_param(struct ucom_softc *, struct termios *);
 217 static void     uchcom_cfg_set_break(struct ucom_softc *, uint8_t);
 218 static void     uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t);
 219 static void     uchcom_cfg_set_rts(struct ucom_softc *, uint8_t);
 220 static void     uchcom_start_read(struct ucom_softc *);
 221 static void     uchcom_start_write(struct ucom_softc *);
 222 static void     uchcom_stop_read(struct ucom_softc *);
 223 static void     uchcom_stop_write(struct ucom_softc *);
 224 static void     uchcom_update_version(struct uchcom_softc *);
 225 static void     uchcom_convert_status(struct uchcom_softc *, uint8_t);
 226 static void     uchcom_update_status(struct uchcom_softc *);
 227 static void     uchcom_set_dtrrts(struct uchcom_softc *);
 228 static int      uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t);
 229 static void     uchcom_set_dte_rate(struct uchcom_softc *, uint32_t);
 230 static void     uchcom_set_line_control(struct uchcom_softc *, tcflag_t);
 231 static void     uchcom_clear_chip(struct uchcom_softc *);
 232 static void     uchcom_reset_chip(struct uchcom_softc *);
 233
 234 static device_probe_t uchcom_probe;
 235 static device_attach_t uchcom_attach;
 236 static device_detach_t uchcom_detach;
 237
 238 static usb_callback_t uchcom_intr_callback;
 239 static usb_callback_t uchcom_write_callback;
 240 static usb_callback_t uchcom_read_callback;
 241
 242 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = {
 243
 244         [UCHCOM_BULK_DT_WR] = {
 245                 .type = UE_BULK,
 246                 .endpoint = UE_ADDR_ANY,
 247                 .direction = UE_DIR_OUT,
 248                 .bufsize = UCHCOM_BULK_BUF_SIZE,
 249                 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
 250                 .callback = &uchcom_write_callback,
 251         },
 252
 253         [UCHCOM_BULK_DT_RD] = {
 254                 .type = UE_BULK,
 255                 .endpoint = UE_ADDR_ANY,
 256                 .direction = UE_DIR_IN,
 257                 .bufsize = UCHCOM_BULK_BUF_SIZE,
 258                 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
 259                 .callback = &uchcom_read_callback,
 260         },
 261
 262         [UCHCOM_INTR_DT_RD] = {
 263                 .type = UE_INTERRUPT,
 264                 .endpoint = UE_ADDR_ANY,
 265                 .direction = UE_DIR_IN,
 266                 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
 267                 .bufsize = 0,   /* use wMaxPacketSize */
 268                 .callback = &uchcom_intr_callback,
 269         },
 270 };
 271
 272 static struct ucom_callback uchcom_callback = {
 273         .ucom_cfg_get_status = &uchcom_cfg_get_status,
 274         .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr,
 275         .ucom_cfg_set_rts = &uchcom_cfg_set_rts,
 276         .ucom_cfg_set_break = &uchcom_cfg_set_break,
 277         .ucom_cfg_param = &uchcom_cfg_param,
 278         .ucom_pre_param = &uchcom_pre_param,
 279         .ucom_start_read = &uchcom_start_read,
 280         .ucom_stop_read = &uchcom_stop_read,
 281         .ucom_start_write = &uchcom_start_write,
 282         .ucom_stop_write = &uchcom_stop_write,
 283 };
 284
 285 /* ----------------------------------------------------------------------
 286  * driver entry points
 287  */
 288
 289 static int
 290 uchcom_probe(device_t dev)
 291 {
 292         struct usb_attach_arg *uaa = device_get_ivars(dev);
 293
 294         DPRINTFN(11, "\n");
 295
 296         if (uaa->usb_mode != USB_MODE_HOST) {
 297                 return (ENXIO);
 298         }
 299         if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) {
 300                 return (ENXIO);
 301         }
 302         if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) {
 303                 return (ENXIO);
 304         }
 305         return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa));
 306 }
 307
 308 static int
 309 uchcom_attach(device_t dev)
 310 {
 311         struct uchcom_softc *sc = device_get_softc(dev);
 312         struct usb_attach_arg *uaa = device_get_ivars(dev);
 313         int error;
 314         uint8_t iface_index;
 315
 316         DPRINTFN(11, "\n");
 317
 318         device_set_usb_desc(dev);
 319         mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF);
 320
 321         sc->sc_udev = uaa->device;
 322
 323         switch (uaa->info.bcdDevice) {
 324         case UCHCOM_REV_CH340:
 325                 device_printf(dev, "CH340 detected\n");
 326                 break;
 327         default:
 328                 device_printf(dev, "CH341 detected\n");
 329                 break;
 330         }
 331
 332         iface_index = UCHCOM_IFACE_INDEX;
 333         error = usbd_transfer_setup(uaa->device,
 334             &iface_index, sc->sc_xfer, uchcom_config_data,
 335             UCHCOM_N_TRANSFER, sc, &sc->sc_mtx);
 336
 337         if (error) {
 338                 DPRINTF("one or more missing USB endpoints, "
 339                     "error=%s\n", usbd_errstr(error));
 340                 goto detach;
 341         }
 342         /*
 343          * Do the initialization during attach so that the system does not
 344          * sleep during open:
 345          */
 346         uchcom_update_version(sc);
 347         uchcom_clear_chip(sc);
 348         uchcom_reset_chip(sc);
 349         uchcom_update_status(sc);
 350
 351         sc->sc_dtr = 1;
 352         sc->sc_rts = 1;
 353
 354         /* clear stall at first run */
 355         mtx_lock(&sc->sc_mtx);
 356         usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
 357         usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
 358         mtx_unlock(&sc->sc_mtx);
 359
 360         error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
 361             &uchcom_callback, &sc->sc_mtx);
 362         if (error) {
 363                 goto detach;
 364         }
 365         return (0);
 366
 367 detach:
 368         uchcom_detach(dev);
 369         return (ENXIO);
 370 }
 371
 372 static int
 373 uchcom_detach(device_t dev)
 374 {
 375         struct uchcom_softc *sc = device_get_softc(dev);
 376
 377         DPRINTFN(11, "\n");
 378
 379         ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1);
 380         usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER);
 381         mtx_destroy(&sc->sc_mtx);
 382
 383         return (0);
 384 }
 385
 386 /* ----------------------------------------------------------------------
 387  * low level i/o
 388  */
 389
 390 static void
 391 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno,
 392     uint16_t value, uint16_t index)
 393 {
 394         struct usb_device_request req;
 395
 396         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 397         req.bRequest = reqno;
 398         USETW(req.wValue, value);
 399         USETW(req.wIndex, index);
 400         USETW(req.wLength, 0);
 401
 402         ucom_cfg_do_request(sc->sc_udev,
 403             &sc->sc_ucom, &req, NULL, 0, 1000);
 404 }
 405
 406 static void
 407 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno,
 408     uint16_t value, uint16_t index, void *buf, uint16_t buflen)
 409 {
 410         struct usb_device_request req;
 411
 412         req.bmRequestType = UT_READ_VENDOR_DEVICE;
 413         req.bRequest = reqno;
 414         USETW(req.wValue, value);
 415         USETW(req.wIndex, index);
 416         USETW(req.wLength, buflen);
 417
 418         ucom_cfg_do_request(sc->sc_udev,
 419             &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000);
 420 }
 421
 422 static void
 423 uchcom_write_reg(struct uchcom_softc *sc,
 424     uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2)
 425 {
 426         DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n",
 427             (unsigned)reg1, (unsigned)val1,
 428             (unsigned)reg2, (unsigned)val2);
 429         uchcom_ctrl_write(
 430             sc, UCHCOM_REQ_WRITE_REG,
 431             reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8));
 432 }
 433
 434 static void
 435 uchcom_read_reg(struct uchcom_softc *sc,
 436     uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2)
 437 {
 438         uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
 439
 440         uchcom_ctrl_read(
 441             sc, UCHCOM_REQ_READ_REG,
 442             reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf));
 443
 444         DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n",
 445             (unsigned)reg1, (unsigned)buf[0],
 446             (unsigned)reg2, (unsigned)buf[1]);
 447
 448         if (rval1)
 449                 *rval1 = buf[0];
 450         if (rval2)
 451                 *rval2 = buf[1];
 452 }
 453
 454 static void
 455 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver)
 456 {
 457         uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
 458
 459         uchcom_ctrl_read(
 460             sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf));
 461
 462         if (rver)
 463                 *rver = buf[0];
 464 }
 465
 466 static void
 467 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval)
 468 {
 469         uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
 470 }
 471
 472 static void
 473 uchcom_set_dtrrts_10(struct uchcom_softc *sc, uint8_t val)
 474 {
 475         uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
 476 }
 477
 478 static void
 479 uchcom_set_dtrrts_20(struct uchcom_softc *sc, uint8_t val)
 480 {
 481         uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
 482 }
 483
 484
 485 /* ----------------------------------------------------------------------
 486  * middle layer
 487  */
 488
 489 static void
 490 uchcom_update_version(struct uchcom_softc *sc)
 491 {
 492         uchcom_get_version(sc, &sc->sc_version);
 493 }
 494
 495 static void
 496 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur)
 497 {
 498         sc->sc_dtr = !(cur & UCHCOM_DTR_MASK);
 499         sc->sc_rts = !(cur & UCHCOM_RTS_MASK);
 500
 501         cur = ~cur & 0x0F;
 502         sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur);
 503 }
 504
 505 static void
 506 uchcom_update_status(struct uchcom_softc *sc)
 507 {
 508         uint8_t cur;
 509
 510         uchcom_get_status(sc, &cur);
 511         uchcom_convert_status(sc, cur);
 512 }
 513
 514
 515 static void
 516 uchcom_set_dtrrts(struct uchcom_softc *sc)
 517 {
 518         uint8_t val = 0;
 519
 520         if (sc->sc_dtr)
 521                 val |= UCHCOM_DTR_MASK;
 522         if (sc->sc_rts)
 523                 val |= UCHCOM_RTS_MASK;
 524
 525         if (sc->sc_version < UCHCOM_VER_20)
 526                 uchcom_set_dtrrts_10(sc, ~val);
 527         else
 528                 uchcom_set_dtrrts_20(sc, ~val);
 529 }
 530
 531 static void
 532 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
 533 {
 534         struct uchcom_softc *sc = ucom->sc_parent;
 535         uint8_t brk1;
 536         uint8_t brk2;
 537
 538         uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_BREAK2, &brk2);
 539         if (onoff) {
 540                 /* on - clear bits */
 541                 brk1 &= ~UCHCOM_BRK1_MASK;
 542                 brk2 &= ~UCHCOM_BRK2_MASK;
 543         } else {
 544                 /* off - set bits */
 545                 brk1 |= UCHCOM_BRK1_MASK;
 546                 brk2 |= UCHCOM_BRK2_MASK;
 547         }
 548         uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_BREAK2, brk2);
 549 }
 550
 551 static int
 552 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate)
 553 {
 554         const struct uchcom_divider_record *rp;
 555         uint32_t div;
 556         uint32_t rem;
 557         uint32_t mod;
 558         uint8_t i;
 559
 560         /* find record */
 561         for (i = 0; i != NUM_DIVIDERS; i++) {
 562                 if (dividers[i].dvr_high >= rate &&
 563                     dividers[i].dvr_low <= rate) {
 564                         rp = &dividers[i];
 565                         goto found;
 566                 }
 567         }
 568         return (-1);
 569
 570 found:
 571         dp->dv_prescaler = rp->dvr_divider.dv_prescaler;
 572         if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN)
 573                 dp->dv_div = rp->dvr_divider.dv_div;
 574         else {
 575                 div = rp->dvr_base_clock / rate;
 576                 rem = rp->dvr_base_clock % rate;
 577                 if (div == 0 || div >= 0xFF)
 578                         return (-1);
 579                 if ((rem << 1) >= rate)
 580                         div += 1;
 581                 dp->dv_div = (uint8_t)-div;
 582         }
 583
 584         mod = UCHCOM_BPS_MOD_BASE / rate + UCHCOM_BPS_MOD_BASE_OFS;
 585         mod = mod + mod / 2;
 586
 587         dp->dv_mod = mod / 0x100;
 588
 589         return (0);
 590 }
 591
 592 static void
 593 uchcom_set_dte_rate(struct uchcom_softc *sc, uint32_t rate)
 594 {
 595         struct uchcom_divider dv;
 596
 597         if (uchcom_calc_divider_settings(&dv, rate))
 598                 return;
 599
 600         uchcom_write_reg(sc,
 601             UCHCOM_REG_BPS_PRE, dv.dv_prescaler,
 602             UCHCOM_REG_BPS_DIV, dv.dv_div);
 603         uchcom_write_reg(sc,
 604             UCHCOM_REG_BPS_MOD, dv.dv_mod,
 605             UCHCOM_REG_BPS_PAD, 0);
 606 }
 607
 608 static void
 609 uchcom_set_line_control(struct uchcom_softc *sc, tcflag_t cflag)
 610 {
 611         uint8_t lcr1 = 0;
 612         uint8_t lcr2 = 0;
 613
 614         uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2);
 615
 616         lcr1 &= ~UCHCOM_LCR1_MASK;
 617         lcr2 &= ~UCHCOM_LCR2_MASK;
 618
 619         /*
 620          * XXX: it is difficult to handle the line control appropriately:
 621          *   - CS8, !CSTOPB and any parity mode seems ok, but
 622          *   - the chip doesn't have the function to calculate parity
 623          *     in !CS8 mode.
 624          *   - it is unclear that the chip supports CS5,6 mode.
 625          *   - it is unclear how to handle stop bits.
 626          */
 627
 628         if (cflag & PARENB) {
 629                 lcr1 |= UCHCOM_LCR1_PARENB;
 630                 if (cflag & PARODD)
 631                         lcr2 |= UCHCOM_LCR2_PARODD;
 632                 else
 633                         lcr2 |= UCHCOM_LCR2_PAREVEN;
 634         }
 635         uchcom_write_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2, lcr2);
 636 }
 637
 638 static void
 639 uchcom_clear_chip(struct uchcom_softc *sc)
 640 {
 641         DPRINTF("\n");
 642         uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0);
 643 }
 644
 645 static void
 646 uchcom_reset_chip(struct uchcom_softc *sc)
 647 {
 648         uint16_t val;
 649         uint16_t idx;
 650         uint8_t lcr1;
 651         uint8_t lcr2;
 652         uint8_t pre;
 653         uint8_t div;
 654         uint8_t mod;
 655
 656         uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2);
 657         uchcom_read_reg(sc, UCHCOM_REG_BPS_PRE, &pre, UCHCOM_REG_BPS_DIV, &div);
 658         uchcom_read_reg(sc, UCHCOM_REG_BPS_MOD, &mod, UCHCOM_REG_BPS_PAD, NULL);
 659
 660         val = 0;
 661         idx = 0;
 662         val |= (uint16_t)(lcr1 & 0xF0) << 8;
 663         val |= 0x01;
 664         val |= (uint16_t)(lcr2 & 0x0F) << 8;
 665         val |= 0x02;
 666         idx |= pre & 0x07;
 667         val |= 0x04;
 668         idx |= (uint16_t)div << 8;
 669         val |= 0x08;
 670         idx |= mod & 0xF8;
 671         val |= 0x10;
 672
 673         DPRINTF("reset v=0x%04X, i=0x%04X\n", val, idx);
 674
 675         uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, val, idx);
 676 }
 677
 678 /* ----------------------------------------------------------------------
 679  * methods for ucom
 680  */
 681 static void
 682 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
 683 {
 684         struct uchcom_softc *sc = ucom->sc_parent;
 685
 686         DPRINTF("\n");
 687
 688         *lsr = sc->sc_lsr;
 689         *msr = sc->sc_msr;
 690 }
 691
 692 static void
 693 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
 694 {
 695         struct uchcom_softc *sc = ucom->sc_parent;
 696
 697         DPRINTF("onoff = %d\n", onoff);
 698
 699         sc->sc_dtr = onoff;
 700         uchcom_set_dtrrts(sc);
 701 }
 702
 703 static void
 704 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
 705 {
 706         struct uchcom_softc *sc = ucom->sc_parent;
 707
 708         DPRINTF("onoff = %d\n", onoff);
 709
 710         sc->sc_rts = onoff;
 711         uchcom_set_dtrrts(sc);
 712 }
 713
 714 static int
 715 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t)
 716 {
 717         struct uchcom_divider dv;
 718
 719         switch (t->c_cflag & CSIZE) {
 720         case CS5:
 721         case CS6:
 722         case CS7:
 723                 return (EIO);
 724         default:
 725                 break;
 726         }
 727
 728         if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) {
 729                 return (EIO);
 730         }
 731         return (0);                     /* success */
 732 }
 733
 734 static void
 735 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t)
 736 {
 737         struct uchcom_softc *sc = ucom->sc_parent;
 738
 739         uchcom_set_line_control(sc, t->c_cflag);
 740         uchcom_set_dte_rate(sc, t->c_ospeed);
 741 }
 742
 743 static void
 744 uchcom_start_read(struct ucom_softc *ucom)
 745 {
 746         struct uchcom_softc *sc = ucom->sc_parent;
 747
 748         /* start interrupt endpoint */
 749         usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
 750
 751         /* start read endpoint */
 752         usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
 753 }
 754
 755 static void
 756 uchcom_stop_read(struct ucom_softc *ucom)
 757 {
 758         struct uchcom_softc *sc = ucom->sc_parent;
 759
 760         /* stop interrupt endpoint */
 761         usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
 762
 763         /* stop read endpoint */
 764         usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
 765 }
 766
 767 static void
 768 uchcom_start_write(struct ucom_softc *ucom)
 769 {
 770         struct uchcom_softc *sc = ucom->sc_parent;
 771
 772         usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
 773 }
 774
 775 static void
 776 uchcom_stop_write(struct ucom_softc *ucom)
 777 {
 778         struct uchcom_softc *sc = ucom->sc_parent;
 779
 780         usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
 781 }
 782
 783 /* ----------------------------------------------------------------------
 784  * callback when the modem status is changed.
 785  */
 786 static void
 787 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error)
 788 {
 789         struct uchcom_softc *sc = usbd_xfer_softc(xfer);
 790         struct usb_page_cache *pc;
 791         uint8_t buf[UCHCOM_INTR_LEAST];
 792         int actlen;
 793
 794         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
 795
 796         switch (USB_GET_STATE(xfer)) {
 797         case USB_ST_TRANSFERRED:
 798
 799                 DPRINTF("actlen = %u\n", actlen);
 800
 801                 if (actlen >= UCHCOM_INTR_LEAST) {
 802                         pc = usbd_xfer_get_frame(xfer, 0);
 803                         usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST);
 804
 805                         DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n",
 806                             (unsigned)buf[0], (unsigned)buf[1],
 807                             (unsigned)buf[2], (unsigned)buf[3]);
 808
 809                         uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]);
 810                         ucom_status_change(&sc->sc_ucom);
 811                 }
 812         case USB_ST_SETUP:
 813 tr_setup:
 814                 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
 815                 usbd_transfer_submit(xfer);
 816                 break;
 817
 818         default:                        /* Error */
 819                 if (error != USB_ERR_CANCELLED) {
 820                         /* try to clear stall first */
 821                         usbd_xfer_set_stall(xfer);
 822                         goto tr_setup;
 823                 }
 824                 break;
 825         }
 826 }
 827
 828 static void
 829 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error)
 830 {
 831         struct uchcom_softc *sc = usbd_xfer_softc(xfer);
 832         struct usb_page_cache *pc;
 833         uint32_t actlen;
 834
 835         switch (USB_GET_STATE(xfer)) {
 836         case USB_ST_SETUP:
 837         case USB_ST_TRANSFERRED:
 838 tr_setup:
 839                 pc = usbd_xfer_get_frame(xfer, 0);
 840                 if (ucom_get_data(&sc->sc_ucom, pc, 0,
 841                     UCHCOM_BULK_BUF_SIZE, &actlen)) {
 842
 843                         DPRINTF("actlen = %d\n", actlen);
 844
 845                         usbd_xfer_set_frame_len(xfer, 0, actlen);
 846                         usbd_transfer_submit(xfer);
 847                 }
 848                 return;
 849
 850         default:                        /* Error */
 851                 if (error != USB_ERR_CANCELLED) {
 852                         /* try to clear stall first */
 853                         usbd_xfer_set_stall(xfer);
 854                         goto tr_setup;
 855                 }
 856                 return;
 857
 858         }
 859 }
 860
 861 static void
 862 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error)
 863 {
 864         struct uchcom_softc *sc = usbd_xfer_softc(xfer);
 865         struct usb_page_cache *pc;
 866         int actlen;
 867
 868         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
 869
 870         switch (USB_GET_STATE(xfer)) {
 871         case USB_ST_TRANSFERRED:
 872                 pc = usbd_xfer_get_frame(xfer, 0);
 873                 ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
 874
 875         case USB_ST_SETUP:
 876 tr_setup:
 877                 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
 878                 usbd_transfer_submit(xfer);
 879                 return;
 880
 881         default:                        /* Error */
 882                 if (error != USB_ERR_CANCELLED) {
 883                         /* try to clear stall first */
 884                         usbd_xfer_set_stall(xfer);
 885                         goto tr_setup;
 886                 }
 887                 return;
 888         }
 889 }
 890
 891 static device_method_t uchcom_methods[] = {
 892         /* Device interface */
 893         DEVMETHOD(device_probe, uchcom_probe),
 894         DEVMETHOD(device_attach, uchcom_attach),
 895         DEVMETHOD(device_detach, uchcom_detach),
 896
 897         {0, 0}
 898 };
 899
 900 static driver_t uchcom_driver = {
 901         "ucom",
 902         uchcom_methods,
 903         sizeof(struct uchcom_softc)
 904 };
 905
 906 static devclass_t uchcom_devclass;
 907
 908 DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0);
 909 MODULE_DEPEND(uchcom, ucom, 1, 1, 1);
 910 MODULE_DEPEND(uchcom, usb, 1, 1, 1);