2 * Copyright (C) 2002 Benno Rice.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/module.h>
33 #include <sys/kernel.h>
35 #include <dev/ofw/openfirm.h>
36 #include <dev/ofw/ofw_pci.h>
37 #include <dev/ofw/ofw_bus.h>
38 #include <dev/ofw/ofw_bus_subr.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcireg.h>
43 #include <machine/bus.h>
44 #include <machine/md_var.h>
45 #include <machine/pio.h>
46 #include <machine/resource.h>
50 #include <powerpc/powermac/uninorthvar.h>
57 #define UNINORTH_DEBUG 0
62 static int uninorth_probe(device_t);
63 static int uninorth_attach(device_t);
68 static int uninorth_read_ivar(device_t, device_t, int,
70 static struct resource * uninorth_alloc_resource(device_t bus,
71 device_t child, int type, int *rid, u_long start,
72 u_long end, u_long count, u_int flags);
73 static int uninorth_activate_resource(device_t bus, device_t child,
74 int type, int rid, struct resource *res);
79 static int uninorth_maxslots(device_t);
80 static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int,
82 static void uninorth_write_config(device_t, u_int, u_int, u_int,
83 u_int, u_int32_t, int);
84 static int uninorth_route_interrupt(device_t, device_t, int);
90 static phandle_t uninorth_get_node(device_t bus, device_t dev);
95 static int uninorth_enable_config(struct uninorth_softc *, u_int,
97 static void unin_enable_gmac(void);
102 static device_method_t uninorth_methods[] = {
103 /* Device interface */
104 DEVMETHOD(device_probe, uninorth_probe),
105 DEVMETHOD(device_attach, uninorth_attach),
108 DEVMETHOD(bus_print_child, bus_generic_print_child),
109 DEVMETHOD(bus_read_ivar, uninorth_read_ivar),
110 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
111 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
112 DEVMETHOD(bus_alloc_resource, uninorth_alloc_resource),
113 DEVMETHOD(bus_activate_resource, uninorth_activate_resource),
116 DEVMETHOD(pcib_maxslots, uninorth_maxslots),
117 DEVMETHOD(pcib_read_config, uninorth_read_config),
118 DEVMETHOD(pcib_write_config, uninorth_write_config),
119 DEVMETHOD(pcib_route_interrupt, uninorth_route_interrupt),
121 /* ofw_bus interface */
122 DEVMETHOD(ofw_bus_get_node, uninorth_get_node),
127 static driver_t uninorth_driver = {
130 sizeof(struct uninorth_softc)
133 static devclass_t uninorth_devclass;
135 DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
138 uninorth_probe(device_t dev)
140 const char *type, *compatible;
142 type = ofw_bus_get_type(dev);
143 compatible = ofw_bus_get_compat(dev);
145 if (type == NULL || compatible == NULL)
148 if (strcmp(type, "pci") != 0)
151 if (strcmp(compatible, "uni-north") == 0) {
152 device_set_desc(dev, "Apple UniNorth Host-PCI bridge");
154 } else if (strcmp(compatible,"u3-agp") == 0) {
155 device_set_desc(dev, "Apple U3 Host-AGP bridge");
163 uninorth_attach(device_t dev)
165 struct uninorth_softc *sc;
166 const char *compatible;
167 phandle_t node, child;
168 u_int32_t reg[2], busrange[2];
169 struct uninorth_range *rp, *io, *mem[2];
172 node = ofw_bus_get_node(dev);
173 sc = device_get_softc(dev);
175 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
178 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
182 compatible = ofw_bus_get_compat(dev);
183 if (strcmp(compatible,"u3-agp") == 0)
189 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE);
190 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE);
192 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
193 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
195 sc->sc_bus = busrange[0];
197 bzero(sc->sc_range, sizeof(sc->sc_range));
200 * On Apple U3 systems, we have an otherwise standard
201 * Uninorth controller driving AGP. The one difference
202 * is that it uses a new PCI ranges format, so do the
206 struct uninorth_range64 range64[6];
207 bzero(range64, sizeof(range64));
209 sc->sc_nrange = OF_getprop(node, "ranges", range64,
211 for (i = 0; range64[i].pci_hi != 0; i++) {
212 sc->sc_range[i].pci_hi = range64[i].pci_hi;
213 sc->sc_range[i].pci_mid = range64[i].pci_mid;
214 sc->sc_range[i].pci_lo = range64[i].pci_lo;
215 sc->sc_range[i].host = range64[i].host_lo;
216 sc->sc_range[i].size_hi = range64[i].size_hi;
217 sc->sc_range[i].size_lo = range64[i].size_lo;
220 sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
221 sizeof(sc->sc_range));
224 if (sc->sc_nrange == -1) {
225 device_printf(dev, "could not get ranges\n");
229 sc->sc_range[6].pci_hi = 0;
233 for (rp = sc->sc_range; rp->pci_hi != 0; rp++) {
234 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
235 case OFW_PCI_PHYS_HI_SPACE_CONFIG:
237 case OFW_PCI_PHYS_HI_SPACE_IO:
240 case OFW_PCI_PHYS_HI_SPACE_MEM32:
244 case OFW_PCI_PHYS_HI_SPACE_MEM64:
250 device_printf(dev, "can't find io range\n");
253 sc->sc_io_rman.rm_type = RMAN_ARRAY;
254 sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports";
255 sc->sc_iostart = io->host;
256 if (rman_init(&sc->sc_io_rman) != 0 ||
257 rman_manage_region(&sc->sc_io_rman, io->pci_lo,
258 io->pci_lo + io->size_lo - 1) != 0) {
259 panic("uninorth_attach: failed to set up I/O rman");
263 device_printf(dev, "can't find mem ranges\n");
266 sc->sc_mem_rman.rm_type = RMAN_ARRAY;
267 sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory";
268 error = rman_init(&sc->sc_mem_rman);
270 device_printf(dev, "rman_init() failed. error = %d\n", error);
273 for (i = 0; i < nmem; i++) {
274 error = rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
275 mem[i]->pci_lo + mem[i]->size_lo - 1);
278 "rman_manage_region() failed. error = %d\n", error);
284 * Enable the GMAC Ethernet cell if Open Firmware says it is
287 for (child = OF_child(node); child; child = OF_peer(child)) {
290 memset(compat, 0, sizeof(compat));
291 OF_getprop(child, "compatible", compat, sizeof(compat));
292 if (strcmp(compat, "gmac") == 0) {
297 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
299 device_add_child(dev, "pci", device_get_unit(dev));
300 return (bus_generic_attach(dev));
304 uninorth_maxslots(device_t dev)
307 return (PCI_SLOTMAX);
311 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
314 struct uninorth_softc *sc;
317 sc = device_get_softc(dev);
318 caoff = sc->sc_data + (reg & 0x07);
320 if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) {
323 return (in8rb(caoff));
326 return (in16rb(caoff));
329 return (in32rb(caoff));
338 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func,
339 u_int reg, u_int32_t val, int width)
341 struct uninorth_softc *sc;
344 sc = device_get_softc(dev);
345 caoff = sc->sc_data + (reg & 0x07);
347 if (uninorth_enable_config(sc, bus, slot, func, reg)) {
363 uninorth_route_interrupt(device_t bus, device_t dev, int pin)
365 struct uninorth_softc *sc;
366 struct ofw_pci_register reg;
367 uint32_t pintr, mintr;
368 uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
370 sc = device_get_softc(bus);
372 if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, ®,
373 sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), maskbuf))
376 /* Maybe it's a real interrupt, not an intpin */
380 device_printf(bus, "could not route pin %d for device %d.%d\n",
381 pin, pci_get_slot(dev), pci_get_function(dev));
382 return (PCI_INVALID_IRQ);
386 uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
388 struct uninorth_softc *sc;
390 sc = device_get_softc(dev);
393 case PCIB_IVAR_DOMAIN:
394 *result = device_get_unit(dev);
397 *result = sc->sc_bus;
404 static struct resource *
405 uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
406 u_long start, u_long end, u_long count, u_int flags)
408 struct uninorth_softc *sc;
413 needactivate = flags & RF_ACTIVE;
416 sc = device_get_softc(bus);
420 rm = &sc->sc_mem_rman;
424 rm = &sc->sc_io_rman;
428 return (bus_alloc_resource(bus, type, rid, start, end, count,
432 device_printf(bus, "unknown resource request from %s\n",
433 device_get_nameunit(child));
437 rv = rman_reserve_resource(rm, start, end, count, flags, child);
439 device_printf(bus, "failed to reserve resource for %s\n",
440 device_get_nameunit(child));
444 rman_set_rid(rv, *rid);
447 if (bus_activate_resource(child, type, *rid, rv) != 0) {
449 "failed to activate resource for %s\n",
450 device_get_nameunit(child));
451 rman_release_resource(rv);
460 uninorth_activate_resource(device_t bus, device_t child, int type, int rid,
461 struct resource *res)
464 struct uninorth_softc *sc;
466 sc = device_get_softc(bus);
468 if (type == SYS_RES_IRQ)
469 return (bus_activate_resource(bus, type, rid, res));
471 if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
474 start = (vm_offset_t)rman_get_start(res);
476 * For i/o-ports, convert the start address to the
477 * uninorth PCI i/o window
479 if (type == SYS_RES_IOPORT)
480 start += sc->sc_iostart;
483 printf("uninorth mapdev: start %x, len %ld\n", start,
486 p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
489 rman_set_virtual(res, p);
490 rman_set_bustag(res, &bs_le_tag);
491 rman_set_bushandle(res, (u_long)p);
494 return (rman_activate_resource(res));
498 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
499 u_int func, u_int reg)
504 if (resource_int_value(device_get_name(sc->sc_dev),
505 device_get_unit(sc->sc_dev), "skipslot", &pass) == 0) {
510 if (sc->sc_bus == bus) {
512 * No slots less than 11 on the primary bus
517 cfgval = (1 << slot) | (func << 8) | (reg & 0xfc);
519 cfgval = (bus << 16) | (slot << 11) | (func << 8) |
524 out32rb(sc->sc_addr, cfgval);
525 } while (in32rb(sc->sc_addr) != cfgval);
531 uninorth_get_node(device_t bus, device_t dev)
533 struct uninorth_softc *sc;
535 sc = device_get_softc(bus);
536 /* We only have one child, the PCI bus, which needs our own node. */
542 * Driver to swallow UniNorth host bridges from the PCI bus side.
545 unhb_probe(device_t dev)
548 if (pci_get_class(dev) == PCIC_BRIDGE &&
549 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
550 device_set_desc(dev, "Host to PCI bridge");
559 unhb_attach(device_t dev)
565 static device_method_t unhb_methods[] = {
566 /* Device interface */
567 DEVMETHOD(device_probe, unhb_probe),
568 DEVMETHOD(device_attach, unhb_attach),
573 static driver_t unhb_driver = {
578 static devclass_t unhb_devclass;
580 DRIVER_MODULE(unhb, pci, unhb_driver, unhb_devclass, 0, 0);
584 * Small stub driver for the Uninorth chip itself, to allow setting
585 * of various parameters and cell enables
587 static struct unin_chip_softc *uncsc;
590 unin_enable_gmac(void)
592 volatile u_int *clkreg;
596 panic("unin_enable_gmac: device not found");
598 clkreg = (void *)(uncsc->sc_addr + UNIN_CLOCKCNTL);
600 tmpl |= UNIN_CLOCKCNTL_GMAC;
605 unin_chip_probe(device_t dev)
609 name = ofw_bus_get_name(dev);
614 if (strcmp(name, "uni-n") != 0)
617 device_set_desc(dev, "Apple UniNorth System Controller");
622 unin_chip_attach(device_t dev)
627 uncsc = device_get_softc(dev);
628 node = ofw_bus_get_node(dev);
630 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
633 uncsc->sc_physaddr = reg[0];
634 uncsc->sc_size = reg[1];
637 * Only map the first page, since that is where the registers
640 uncsc->sc_addr = (vm_offset_t) pmap_mapdev(reg[0], PAGE_SIZE);
642 uncsc->sc_version = *(u_int *)uncsc->sc_addr;
643 device_printf(dev, "Version %d\n", uncsc->sc_version);
648 static device_method_t unin_chip_methods[] = {
649 /* Device interface */
650 DEVMETHOD(device_probe, unin_chip_probe),
651 DEVMETHOD(device_attach, unin_chip_attach),
656 static driver_t unin_chip_driver = {
659 sizeof(struct unin_chip_softc)
662 static devclass_t unin_chip_devclass;
664 DRIVER_MODULE(unin, nexus, unin_chip_driver, unin_chip_devclass, 0, 0);