2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1993 The Regents of the University of California.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 4. Neither the name of the University nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Functions to provide access to special i386 instructions.
35 * This in included in sys/systm.h, and that file should be
36 * used in preference to this.
39 #ifndef _MACHINE_CPUFUNC_H_
40 #define _MACHINE_CPUFUNC_H_
43 #error this file needs sys/cdefs.h as a prerequisite
46 struct region_descriptor;
48 #define readb(va) (*(volatile u_int8_t *) (va))
49 #define readw(va) (*(volatile u_int16_t *) (va))
50 #define readl(va) (*(volatile u_int32_t *) (va))
51 #define readq(va) (*(volatile u_int64_t *) (va))
53 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
54 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
55 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
56 #define writeq(va, d) (*(volatile u_int64_t *) (va) = (d))
58 #if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE)
63 __asm __volatile("int $3");
71 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
75 static __inline u_long
80 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
89 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
93 static __inline u_long
98 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
106 __asm __volatile("clflush %0" : : "m" (*(char *)addr));
112 __asm __volatile("cli" : : : "memory");
116 do_cpuid(u_int ax, u_int *p)
118 __asm __volatile("cpuid"
119 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
124 cpuid_count(u_int ax, u_int cx, u_int *p)
126 __asm __volatile("cpuid"
127 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
128 : "0" (ax), "c" (cx));
134 __asm __volatile("sti");
139 #define HAVE_INLINE_FFS
140 #define ffs(x) __builtin_ffs(x)
142 #define HAVE_INLINE_FFSL
147 return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
150 #define HAVE_INLINE_FLS
155 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
158 #define HAVE_INLINE_FLSL
163 return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
171 __asm __volatile("hlt");
174 static __inline u_char
179 __asm volatile("inb %w1, %0" : "=a" (data) : "Nd" (port));
183 static __inline u_int
188 __asm volatile("inl %w1, %0" : "=a" (data) : "Nd" (port));
193 insb(u_int port, void *addr, size_t cnt)
195 __asm __volatile("cld; rep; insb"
196 : "+D" (addr), "+c" (cnt)
202 insw(u_int port, void *addr, size_t cnt)
204 __asm __volatile("cld; rep; insw"
205 : "+D" (addr), "+c" (cnt)
211 insl(u_int port, void *addr, size_t cnt)
213 __asm __volatile("cld; rep; insl"
214 : "+D" (addr), "+c" (cnt)
222 __asm __volatile("invd");
225 static __inline u_short
230 __asm volatile("inw %w1, %0" : "=a" (data) : "Nd" (port));
235 outb(u_int port, u_char data)
237 __asm volatile("outb %0, %w1" : : "a" (data), "Nd" (port));
241 outl(u_int port, u_int data)
243 __asm volatile("outl %0, %w1" : : "a" (data), "Nd" (port));
247 outsb(u_int port, const void *addr, size_t cnt)
249 __asm __volatile("cld; rep; outsb"
250 : "+S" (addr), "+c" (cnt)
255 outsw(u_int port, const void *addr, size_t cnt)
257 __asm __volatile("cld; rep; outsw"
258 : "+S" (addr), "+c" (cnt)
263 outsl(u_int port, const void *addr, size_t cnt)
265 __asm __volatile("cld; rep; outsl"
266 : "+S" (addr), "+c" (cnt)
271 outw(u_int port, u_short data)
273 __asm volatile("outw %0, %w1" : : "a" (data), "Nd" (port));
280 __asm __volatile("mfence" : : : "memory");
286 __asm __volatile("pause");
289 static __inline u_long
294 __asm __volatile("pushfq; popq %0" : "=r" (rf));
298 static __inline u_int64_t
303 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
304 return (low | ((u_int64_t)high << 32));
307 static __inline u_int64_t
312 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
313 return (low | ((u_int64_t)high << 32));
316 static __inline u_int64_t
321 __asm __volatile("rdtsc" : "=a" (low), "=d" (high));
322 return (low | ((u_int64_t)high << 32));
328 __asm __volatile("wbinvd");
332 write_rflags(u_long rf)
334 __asm __volatile("pushq %0; popfq" : : "r" (rf));
338 wrmsr(u_int msr, u_int64_t newval)
344 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
348 load_cr0(u_long data)
351 __asm __volatile("movq %0,%%cr0" : : "r" (data));
354 static __inline u_long
359 __asm __volatile("movq %%cr0,%0" : "=r" (data));
363 static __inline u_long
368 __asm __volatile("movq %%cr2,%0" : "=r" (data));
373 load_cr3(u_long data)
376 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
379 static __inline u_long
384 __asm __volatile("movq %%cr3,%0" : "=r" (data));
389 load_cr4(u_long data)
391 __asm __volatile("movq %0,%%cr4" : : "r" (data));
394 static __inline u_long
399 __asm __volatile("movq %%cr4,%0" : "=r" (data));
404 * Global TLB flush (except for thise for pages marked PG_G)
414 * TLB flush for an individual page (even if it has PG_G).
415 * Only works on 486+ CPUs (i386 does not have PG_G).
421 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
424 static __inline u_int
428 __asm __volatile("mov %%fs,%0" : "=rm" (sel));
432 static __inline u_int
436 __asm __volatile("mov %%gs,%0" : "=rm" (sel));
440 static __inline u_int
444 __asm __volatile("mov %%ss,%0" : "=rm" (sel));
451 __asm __volatile("mov %0,%%ds" : : "rm" (sel));
457 __asm __volatile("mov %0,%%es" : : "rm" (sel));
461 cpu_monitor(const void *addr, int extensions, int hints)
463 __asm __volatile("monitor;"
464 : :"a" (addr), "c" (extensions), "d"(hints));
468 cpu_mwait(int extensions, int hints)
470 __asm __volatile("mwait;" : :"a" (hints), "c" (extensions));
474 /* This is defined in <machine/specialreg.h> but is too painful to get to */
476 #define MSR_FSBASE 0xc0000100
481 /* Preserve the fsbase value across the selector load */
482 __asm __volatile("rdmsr; mov %0,%%fs; wrmsr"
483 : : "rm" (sel), "c" (MSR_FSBASE) : "eax", "edx");
487 #define MSR_GSBASE 0xc0000101
493 * Preserve the gsbase value across the selector load.
494 * Note that we have to disable interrupts because the gsbase
495 * being trashed happens to be the kernel gsbase at the time.
497 __asm __volatile("pushfq; cli; rdmsr; mov %0,%%gs; wrmsr; popfq"
498 : : "rm" (sel), "c" (MSR_GSBASE) : "eax", "edx");
501 /* Usable by userland */
505 __asm __volatile("mov %0,%%fs" : : "rm" (sel));
511 __asm __volatile("mov %0,%%gs" : : "rm" (sel));
516 lidt(struct region_descriptor *addr)
518 __asm __volatile("lidt (%0)" : : "r" (addr));
524 __asm __volatile("lldt %0" : : "r" (sel));
530 __asm __volatile("ltr %0" : : "r" (sel));
533 static __inline u_int64_t
537 __asm __volatile("movq %%dr0,%0" : "=r" (data));
542 load_dr0(u_int64_t dr0)
544 __asm __volatile("movq %0,%%dr0" : : "r" (dr0));
547 static __inline u_int64_t
551 __asm __volatile("movq %%dr1,%0" : "=r" (data));
556 load_dr1(u_int64_t dr1)
558 __asm __volatile("movq %0,%%dr1" : : "r" (dr1));
561 static __inline u_int64_t
565 __asm __volatile("movq %%dr2,%0" : "=r" (data));
570 load_dr2(u_int64_t dr2)
572 __asm __volatile("movq %0,%%dr2" : : "r" (dr2));
575 static __inline u_int64_t
579 __asm __volatile("movq %%dr3,%0" : "=r" (data));
584 load_dr3(u_int64_t dr3)
586 __asm __volatile("movq %0,%%dr3" : : "r" (dr3));
589 static __inline u_int64_t
593 __asm __volatile("movq %%dr4,%0" : "=r" (data));
598 load_dr4(u_int64_t dr4)
600 __asm __volatile("movq %0,%%dr4" : : "r" (dr4));
603 static __inline u_int64_t
607 __asm __volatile("movq %%dr5,%0" : "=r" (data));
612 load_dr5(u_int64_t dr5)
614 __asm __volatile("movq %0,%%dr5" : : "r" (dr5));
617 static __inline u_int64_t
621 __asm __volatile("movq %%dr6,%0" : "=r" (data));
626 load_dr6(u_int64_t dr6)
628 __asm __volatile("movq %0,%%dr6" : : "r" (dr6));
631 static __inline u_int64_t
635 __asm __volatile("movq %%dr7,%0" : "=r" (data));
640 load_dr7(u_int64_t dr7)
642 __asm __volatile("movq %0,%%dr7" : : "r" (dr7));
645 static __inline register_t
650 rflags = read_rflags();
656 intr_restore(register_t rflags)
658 write_rflags(rflags);
661 #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
663 int breakpoint(void);
664 u_int bsfl(u_int mask);
665 u_int bsrl(u_int mask);
666 void disable_intr(void);
667 void do_cpuid(u_int ax, u_int *p);
668 void enable_intr(void);
670 void ia32_pause(void);
671 u_char inb(u_int port);
672 u_int inl(u_int port);
673 void insb(u_int port, void *addr, size_t cnt);
674 void insl(u_int port, void *addr, size_t cnt);
675 void insw(u_int port, void *addr, size_t cnt);
676 register_t intr_disable(void);
677 void intr_restore(register_t rf);
679 void invlpg(u_int addr);
681 u_short inw(u_int port);
682 void lidt(struct region_descriptor *addr);
683 void lldt(u_short sel);
684 void load_cr0(u_long cr0);
685 void load_cr3(u_long cr3);
686 void load_cr4(u_long cr4);
687 void load_dr0(u_int64_t dr0);
688 void load_dr1(u_int64_t dr1);
689 void load_dr2(u_int64_t dr2);
690 void load_dr3(u_int64_t dr3);
691 void load_dr4(u_int64_t dr4);
692 void load_dr5(u_int64_t dr5);
693 void load_dr6(u_int64_t dr6);
694 void load_dr7(u_int64_t dr7);
695 void load_fs(u_int sel);
696 void load_gs(u_int sel);
697 void ltr(u_short sel);
698 void outb(u_int port, u_char data);
699 void outl(u_int port, u_int data);
700 void outsb(u_int port, const void *addr, size_t cnt);
701 void outsl(u_int port, const void *addr, size_t cnt);
702 void outsw(u_int port, const void *addr, size_t cnt);
703 void outw(u_int port, u_short data);
708 u_int64_t rdmsr(u_int msr);
709 u_int64_t rdpmc(u_int pmc);
710 u_int64_t rdr0(void);
711 u_int64_t rdr1(void);
712 u_int64_t rdr2(void);
713 u_int64_t rdr3(void);
714 u_int64_t rdr4(void);
715 u_int64_t rdr5(void);
716 u_int64_t rdr6(void);
717 u_int64_t rdr7(void);
718 u_int64_t rdtsc(void);
719 u_int read_rflags(void);
723 void write_rflags(u_int rf);
724 void wrmsr(u_int msr, u_int64_t newval);
726 #endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */
728 void reset_dbregs(void);
731 int rdmsr_safe(u_int msr, uint64_t *val);
732 int wrmsr_safe(u_int msr, uint64_t newval);
735 #endif /* !_MACHINE_CPUFUNC_H_ */