sys/dev/ath/ath_hal/ar5212/ar5212_attach.c

   1 /*
   2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $FreeBSD$
  18  */
  19 #include "opt_ah.h"
  20
  21 #include "ah.h"
  22 #include "ah_internal.h"
  23 #include "ah_devid.h"
  24
  25 #include "ar5212/ar5212.h"
  26 #include "ar5212/ar5212reg.h"
  27 #include "ar5212/ar5212phy.h"
  28
  29 #define AH_5212_COMMON
  30 #include "ar5212/ar5212.ini"
  31
  32 static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
  33 static void ar5212DisablePCIE(struct ath_hal *ah);
  34
  35 static const struct ath_hal_private ar5212hal = {{
  36         .ah_magic                       = AR5212_MAGIC,
  37
  38         .ah_getRateTable                = ar5212GetRateTable,
  39         .ah_detach                      = ar5212Detach,
  40
  41         /* Reset Functions */
  42         .ah_reset                       = ar5212Reset,
  43         .ah_phyDisable                  = ar5212PhyDisable,
  44         .ah_disable                     = ar5212Disable,
  45         .ah_configPCIE                  = ar5212ConfigPCIE,
  46         .ah_disablePCIE                 = ar5212DisablePCIE,
  47         .ah_setPCUConfig                = ar5212SetPCUConfig,
  48         .ah_perCalibration              = ar5212PerCalibration,
  49         .ah_perCalibrationN             = ar5212PerCalibrationN,
  50         .ah_resetCalValid               = ar5212ResetCalValid,
  51         .ah_setTxPowerLimit             = ar5212SetTxPowerLimit,
  52         .ah_getChanNoise                = ath_hal_getChanNoise,
  53
  54         /* Transmit functions */
  55         .ah_updateTxTrigLevel           = ar5212UpdateTxTrigLevel,
  56         .ah_setupTxQueue                = ar5212SetupTxQueue,
  57         .ah_setTxQueueProps             = ar5212SetTxQueueProps,
  58         .ah_getTxQueueProps             = ar5212GetTxQueueProps,
  59         .ah_releaseTxQueue              = ar5212ReleaseTxQueue,
  60         .ah_resetTxQueue                = ar5212ResetTxQueue,
  61         .ah_getTxDP                     = ar5212GetTxDP,
  62         .ah_setTxDP                     = ar5212SetTxDP,
  63         .ah_numTxPending                = ar5212NumTxPending,
  64         .ah_startTxDma                  = ar5212StartTxDma,
  65         .ah_stopTxDma                   = ar5212StopTxDma,
  66         .ah_setupTxDesc                 = ar5212SetupTxDesc,
  67         .ah_setupXTxDesc                = ar5212SetupXTxDesc,
  68         .ah_fillTxDesc                  = ar5212FillTxDesc,
  69         .ah_procTxDesc                  = ar5212ProcTxDesc,
  70         .ah_getTxIntrQueue              = ar5212GetTxIntrQueue,
  71         .ah_reqTxIntrDesc               = ar5212IntrReqTxDesc,
  72
  73         /* RX Functions */
  74         .ah_getRxDP                     = ar5212GetRxDP,
  75         .ah_setRxDP                     = ar5212SetRxDP,
  76         .ah_enableReceive               = ar5212EnableReceive,
  77         .ah_stopDmaReceive              = ar5212StopDmaReceive,
  78         .ah_startPcuReceive             = ar5212StartPcuReceive,
  79         .ah_stopPcuReceive              = ar5212StopPcuReceive,
  80         .ah_setMulticastFilter          = ar5212SetMulticastFilter,
  81         .ah_setMulticastFilterIndex     = ar5212SetMulticastFilterIndex,
  82         .ah_clrMulticastFilterIndex     = ar5212ClrMulticastFilterIndex,
  83         .ah_getRxFilter                 = ar5212GetRxFilter,
  84         .ah_setRxFilter                 = ar5212SetRxFilter,
  85         .ah_setupRxDesc                 = ar5212SetupRxDesc,
  86         .ah_procRxDesc                  = ar5212ProcRxDesc,
  87         .ah_rxMonitor                   = ar5212AniPoll,
  88         .ah_procMibEvent                = ar5212ProcessMibIntr,
  89
  90         /* Misc Functions */
  91         .ah_getCapability               = ar5212GetCapability,
  92         .ah_setCapability               = ar5212SetCapability,
  93         .ah_getDiagState                = ar5212GetDiagState,
  94         .ah_getMacAddress               = ar5212GetMacAddress,
  95         .ah_setMacAddress               = ar5212SetMacAddress,
  96         .ah_getBssIdMask                = ar5212GetBssIdMask,
  97         .ah_setBssIdMask                = ar5212SetBssIdMask,
  98         .ah_setRegulatoryDomain         = ar5212SetRegulatoryDomain,
  99         .ah_setLedState                 = ar5212SetLedState,
 100         .ah_writeAssocid                = ar5212WriteAssocid,
 101         .ah_gpioCfgInput                = ar5212GpioCfgInput,
 102         .ah_gpioCfgOutput               = ar5212GpioCfgOutput,
 103         .ah_gpioGet                     = ar5212GpioGet,
 104         .ah_gpioSet                     = ar5212GpioSet,
 105         .ah_gpioSetIntr                 = ar5212GpioSetIntr,
 106         .ah_getTsf32                    = ar5212GetTsf32,
 107         .ah_getTsf64                    = ar5212GetTsf64,
 108         .ah_resetTsf                    = ar5212ResetTsf,
 109         .ah_detectCardPresent           = ar5212DetectCardPresent,
 110         .ah_updateMibCounters           = ar5212UpdateMibCounters,
 111         .ah_getRfGain                   = ar5212GetRfgain,
 112         .ah_getDefAntenna               = ar5212GetDefAntenna,
 113         .ah_setDefAntenna               = ar5212SetDefAntenna,
 114         .ah_getAntennaSwitch            = ar5212GetAntennaSwitch,
 115         .ah_setAntennaSwitch            = ar5212SetAntennaSwitch,
 116         .ah_setSifsTime                 = ar5212SetSifsTime,
 117         .ah_getSifsTime                 = ar5212GetSifsTime,
 118         .ah_setSlotTime                 = ar5212SetSlotTime,
 119         .ah_getSlotTime                 = ar5212GetSlotTime,
 120         .ah_setAckTimeout               = ar5212SetAckTimeout,
 121         .ah_getAckTimeout               = ar5212GetAckTimeout,
 122         .ah_setAckCTSRate               = ar5212SetAckCTSRate,
 123         .ah_getAckCTSRate               = ar5212GetAckCTSRate,
 124         .ah_setCTSTimeout               = ar5212SetCTSTimeout,
 125         .ah_getCTSTimeout               = ar5212GetCTSTimeout,
 126         .ah_setDecompMask               = ar5212SetDecompMask,
 127         .ah_setCoverageClass            = ar5212SetCoverageClass,
 128
 129         /* Key Cache Functions */
 130         .ah_getKeyCacheSize             = ar5212GetKeyCacheSize,
 131         .ah_resetKeyCacheEntry          = ar5212ResetKeyCacheEntry,
 132         .ah_isKeyCacheEntryValid        = ar5212IsKeyCacheEntryValid,
 133         .ah_setKeyCacheEntry            = ar5212SetKeyCacheEntry,
 134         .ah_setKeyCacheEntryMac         = ar5212SetKeyCacheEntryMac,
 135
 136         /* Power Management Functions */
 137         .ah_setPowerMode                = ar5212SetPowerMode,
 138         .ah_getPowerMode                = ar5212GetPowerMode,
 139
 140         /* Beacon Functions */
 141         .ah_setBeaconTimers             = ar5212SetBeaconTimers,
 142         .ah_beaconInit                  = ar5212BeaconInit,
 143         .ah_setStationBeaconTimers      = ar5212SetStaBeaconTimers,
 144         .ah_resetStationBeaconTimers    = ar5212ResetStaBeaconTimers,
 145
 146         /* Interrupt Functions */
 147         .ah_isInterruptPending          = ar5212IsInterruptPending,
 148         .ah_getPendingInterrupts        = ar5212GetPendingInterrupts,
 149         .ah_getInterrupts               = ar5212GetInterrupts,
 150         .ah_setInterrupts               = ar5212SetInterrupts },
 151
 152         .ah_getChannelEdges             = ar5212GetChannelEdges,
 153         .ah_getWirelessModes            = ar5212GetWirelessModes,
 154         .ah_eepromRead                  = ar5212EepromRead,
 155 #ifdef AH_SUPPORT_WRITE_EEPROM
 156         .ah_eepromWrite                 = ar5212EepromWrite,
 157 #endif
 158         .ah_getChipPowerLimits          = ar5212GetChipPowerLimits,
 159 };
 160
 161 uint32_t
 162 ar5212GetRadioRev(struct ath_hal *ah)
 163 {
 164         uint32_t val;
 165         int i;
 166
 167         /* Read Radio Chip Rev Extract */
 168         OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16);
 169         for (i = 0; i < 8; i++)
 170                 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
 171         val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
 172         val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
 173         return ath_hal_reverseBits(val, 8);
 174 }
 175
 176 static void
 177 ar5212AniSetup(struct ath_hal *ah)
 178 {
 179         static const struct ar5212AniParams aniparams = {
 180                 .maxNoiseImmunityLevel  = 4,    /* levels 0..4 */
 181                 .totalSizeDesired       = { -55, -55, -55, -55, -62 },
 182                 .coarseHigh             = { -14, -14, -14, -14, -12 },
 183                 .coarseLow              = { -64, -64, -64, -64, -70 },
 184                 .firpwr                 = { -78, -78, -78, -78, -80 },
 185                 .maxSpurImmunityLevel   = 2,    /* NB: depends on chip rev */
 186                 .cycPwrThr1             = { 2, 4, 6, 8, 10, 12, 14, 16 },
 187                 .maxFirstepLevel        = 2,    /* levels 0..2 */
 188                 .firstep                = { 0, 4, 8 },
 189                 .ofdmTrigHigh           = 500,
 190                 .ofdmTrigLow            = 200,
 191                 .cckTrigHigh            = 200,
 192                 .cckTrigLow             = 100,
 193                 .rssiThrHigh            = 40,
 194                 .rssiThrLow             = 7,
 195                 .period                 = 100,
 196         };
 197         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN) {
 198                 struct ar5212AniParams tmp;
 199                 OS_MEMCPY(&tmp, &aniparams, sizeof(struct ar5212AniParams));
 200                 tmp.maxSpurImmunityLevel = 7;   /* Venice and earlier */
 201                 ar5212AniAttach(ah, &tmp, &tmp, AH_TRUE);
 202         } else
 203                 ar5212AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
 204 }
 205
 206 /*
 207  * Attach for an AR5212 part.
 208  */
 209 void
 210 ar5212InitState(struct ath_hal_5212 *ahp, uint16_t devid, HAL_SOFTC sc,
 211         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
 212 {
 213 #define N(a)    (sizeof(a)/sizeof(a[0]))
 214         static const uint8_t defbssidmask[IEEE80211_ADDR_LEN] =
 215                 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 216         struct ath_hal *ah;
 217
 218         ah = &ahp->ah_priv.h;
 219         /* set initial values */
 220         OS_MEMCPY(&ahp->ah_priv, &ar5212hal, sizeof(struct ath_hal_private));
 221         ah->ah_sc = sc;
 222         ah->ah_st = st;
 223         ah->ah_sh = sh;
 224
 225         ah->ah_devid = devid;                   /* NB: for alq */
 226         AH_PRIVATE(ah)->ah_devid = devid;
 227         AH_PRIVATE(ah)->ah_subvendorid = 0;     /* XXX */
 228
 229         AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
 230         AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;  /* no scaling */
 231
 232         ahp->ah_antControl = HAL_ANT_VARIABLE;
 233         ahp->ah_diversity = AH_TRUE;
 234         ahp->ah_bIQCalibration = AH_FALSE;
 235         /*
 236          * Enable MIC handling.
 237          */
 238         ahp->ah_staId1Defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
 239         ahp->ah_rssiThr = INIT_RSSI_THR;
 240         ahp->ah_tpcEnabled = AH_FALSE;          /* disabled by default */
 241         ahp->ah_phyPowerOn = AH_FALSE;
 242         ahp->ah_macTPC = SM(MAX_RATE_POWER, AR_TPC_ACK)
 243                        | SM(MAX_RATE_POWER, AR_TPC_CTS)
 244                        | SM(MAX_RATE_POWER, AR_TPC_CHIRP);
 245         ahp->ah_beaconInterval = 100;           /* XXX [20..1000] */
 246         ahp->ah_enable32kHzClock = DONT_USE_32KHZ;/* XXX */
 247         ahp->ah_slottime = (u_int) -1;
 248         ahp->ah_acktimeout = (u_int) -1;
 249         ahp->ah_ctstimeout = (u_int) -1;
 250         ahp->ah_sifstime = (u_int) -1;
 251         ahp->ah_txTrigLev = INIT_TX_FIFO_THRESHOLD,
 252         ahp->ah_maxTxTrigLev = MAX_TX_FIFO_THRESHOLD,
 253
 254         OS_MEMCPY(&ahp->ah_bssidmask, defbssidmask, IEEE80211_ADDR_LEN);
 255 #undef N
 256 }
 257
 258 /*
 259  * Validate MAC version and revision.
 260  */
 261 static HAL_BOOL
 262 ar5212IsMacSupported(uint8_t macVersion, uint8_t macRev)
 263 {
 264 #define N(a)    (sizeof(a)/sizeof(a[0]))
 265         static const struct {
 266                 uint8_t version;
 267                 uint8_t revMin, revMax;
 268         } macs[] = {
 269             { AR_SREV_VERSION_VENICE,
 270               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 271             { AR_SREV_VERSION_GRIFFIN,
 272               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 273             { AR_SREV_5413,
 274               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 275             { AR_SREV_5424,
 276               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 277             { AR_SREV_2425,
 278               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 279             { AR_SREV_2417,
 280               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 281         };
 282         int i;
 283
 284         for (i = 0; i < N(macs); i++)
 285                 if (macs[i].version == macVersion &&
 286                     macs[i].revMin <= macRev && macRev <= macs[i].revMax)
 287                         return AH_TRUE;
 288         return AH_FALSE;
 289 #undef N
 290 }
 291
 292 /*
 293  * Attach for an AR5212 part.
 294  */
 295 static struct ath_hal *
 296 ar5212Attach(uint16_t devid, HAL_SOFTC sc,
 297         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
 298 {
 299 #define AH_EEPROM_PROTECT(ah) \
 300         (AH_PRIVATE(ah)->ah_ispcie)? AR_EEPROM_PROTECT_PCIE : AR_EEPROM_PROTECT)
 301         struct ath_hal_5212 *ahp;
 302         struct ath_hal *ah;
 303         struct ath_hal_rf *rf;
 304         uint32_t val;
 305         uint16_t eeval;
 306         HAL_STATUS ecode;
 307
 308         HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 309             __func__, sc, (void*) st, (void*) sh);
 310
 311         /* NB: memory is returned zero'd */
 312         ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));
 313         if (ahp == AH_NULL) {
 314                 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 315                     "%s: cannot allocate memory for state block\n", __func__);
 316                 *status = HAL_ENOMEM;
 317                 return AH_NULL;
 318         }
 319         ar5212InitState(ahp, devid, sc, st, sh, status);
 320         ah = &ahp->ah_priv.h;
 321
 322         if (!ar5212SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
 323                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
 324                     __func__);
 325                 ecode = HAL_EIO;
 326                 goto bad;
 327         }
 328         /* Read Revisions from Chips before taking out of reset */
 329         val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
 330         AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
 331         AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
 332         AH_PRIVATE(ah)->ah_ispcie = IS_5424(ah) || IS_2425(ah);
 333
 334         if (!ar5212IsMacSupported(AH_PRIVATE(ah)->ah_macVersion, AH_PRIVATE(ah)->ah_macRev)) {
 335                 HALDEBUG(ah, HAL_DEBUG_ANY,
 336                     "%s: Mac Chip Rev 0x%02x.%x not supported\n" ,
 337                     __func__, AH_PRIVATE(ah)->ah_macVersion,
 338                     AH_PRIVATE(ah)->ah_macRev);
 339                 ecode = HAL_ENOTSUPP;
 340                 goto bad;
 341         }
 342
 343         /* setup common ini data; rf backends handle remainder */
 344         HAL_INI_INIT(&ahp->ah_ini_modes, ar5212Modes, 6);
 345         HAL_INI_INIT(&ahp->ah_ini_common, ar5212Common, 2);
 346
 347         if (!ar5212ChipReset(ah, AH_NULL)) {    /* reset chip */
 348                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
 349                 ecode = HAL_EIO;
 350                 goto bad;
 351         }
 352
 353         AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
 354
 355         if (AH_PRIVATE(ah)->ah_ispcie) {
 356                 /* XXX: build flag to disable this? */
 357                 ath_hal_configPCIE(ah, AH_FALSE);
 358         }
 359
 360         if (!ar5212ChipTest(ah)) {
 361                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
 362                     __func__);
 363                 ecode = HAL_ESELFTEST;
 364                 goto bad;
 365         }
 366
 367         /* Enable PCI core retry fix in software for Hainan and up */
 368         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_VENICE)
 369                 OS_REG_SET_BIT(ah, AR_PCICFG, AR_PCICFG_RETRYFIXEN);
 370
 371         /*
 372          * Set correct Baseband to analog shift
 373          * setting to access analog chips.
 374          */
 375         OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 376
 377         /* Read Radio Chip Rev Extract */
 378         AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah);
 379
 380         rf = ath_hal_rfprobe(ah, &ecode);
 381         if (rf == AH_NULL)
 382                 goto bad;
 383
 384         /* NB: silently accept anything in release code per Atheros */
 385         switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
 386         case AR_RAD5111_SREV_MAJOR:
 387         case AR_RAD5112_SREV_MAJOR:
 388         case AR_RAD2112_SREV_MAJOR:
 389         case AR_RAD2111_SREV_MAJOR:
 390         case AR_RAD2413_SREV_MAJOR:
 391         case AR_RAD5413_SREV_MAJOR:
 392         case AR_RAD5424_SREV_MAJOR:
 393                 break;
 394         default:
 395                 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
 396                         /*
 397                          * When RF_Silent is used, the
 398                          * analog chip is reset.  So when the system boots
 399                          * up with the radio switch off we cannot determine
 400                          * the RF chip rev.  To workaround this check the
 401                          * mac+phy revs and if Hainan, set the radio rev
 402                          * to Derby.
 403                          */
 404                         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 405                             AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN &&
 406                             AH_PRIVATE(ah)->ah_phyRev == AR_PHYREV_HAINAN) {
 407                                 AH_PRIVATE(ah)->ah_analog5GhzRev = AR_ANALOG5REV_HAINAN;
 408                                 break;
 409                         }
 410                         if (IS_2413(ah)) {              /* Griffin */
 411                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 412                                     AR_RAD2413_SREV_MAJOR | 0x1;
 413                                 break;
 414                         }
 415                         if (IS_5413(ah)) {              /* Eagle */
 416                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 417                                     AR_RAD5413_SREV_MAJOR | 0x2;
 418                                 break;
 419                         }
 420                         if (IS_2425(ah) || IS_2417(ah)) {/* Swan or Nala */
 421                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 422                                     AR_RAD5424_SREV_MAJOR | 0x2;
 423                                 break;
 424                         }
 425                 }
 426 #ifdef AH_DEBUG
 427                 HALDEBUG(ah, HAL_DEBUG_ANY,
 428                     "%s: 5G Radio Chip Rev 0x%02X is not supported by "
 429                     "this driver\n",
 430                     __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
 431                 ecode = HAL_ENOTSUPP;
 432                 goto bad;
 433 #endif
 434         }
 435         if (IS_RAD5112_REV1(ah)) {
 436                 HALDEBUG(ah, HAL_DEBUG_ANY,
 437                     "%s: 5112 Rev 1 is not supported by this "
 438                     "driver (analog5GhzRev 0x%x)\n", __func__,
 439                     AH_PRIVATE(ah)->ah_analog5GhzRev);
 440                 ecode = HAL_ENOTSUPP;
 441                 goto bad;
 442         }
 443
 444         val = OS_REG_READ(ah, AR_PCICFG);
 445         val = MS(val, AR_PCICFG_EEPROM_SIZE);
 446         if (val == 0) {
 447                 if (!AH_PRIVATE(ah)->ah_ispcie) {
 448                         HALDEBUG(ah, HAL_DEBUG_ANY,
 449                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 450                             __func__, val, val);
 451                         ecode = HAL_EESIZE;
 452                         goto bad;
 453                 }
 454                 /* XXX AH_PRIVATE(ah)->ah_isPciExpress = AH_TRUE; */
 455         } else if (val != AR_PCICFG_EEPROM_SIZE_16K) {
 456                 if (AR_PCICFG_EEPROM_SIZE_FAILED == val) {
 457                         HALDEBUG(ah, HAL_DEBUG_ANY,
 458                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 459                             __func__, val, val);
 460                         ecode = HAL_EESIZE;
 461                         goto bad;
 462                 }
 463                 HALDEBUG(ah, HAL_DEBUG_ANY,
 464                     "%s: EEPROM size = %d. Must be %d (16k).\n",
 465                     __func__, val, AR_PCICFG_EEPROM_SIZE_16K);
 466                 ecode = HAL_EESIZE;
 467                 goto bad;
 468         }
 469         ecode = ath_hal_legacyEepromAttach(ah);
 470         if (ecode != HAL_OK) {
 471                 goto bad;
 472         }
 473         ahp->ah_isHb63 = IS_2425(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_ISTALON);
 474
 475         /*
 476          * If Bmode and AR5212, verify 2.4 analog exists
 477          */
 478         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) &&
 479             (AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD5111_SREV_MAJOR) {
 480                 /*
 481                  * Set correct Baseband to analog shift
 482                  * setting to access analog chips.
 483                  */
 484                 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
 485                 OS_DELAY(2000);
 486                 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5212GetRadioRev(ah);
 487
 488                 /* Set baseband for 5GHz chip */
 489                 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 490                 OS_DELAY(2000);
 491                 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != AR_RAD2111_SREV_MAJOR) {
 492                         HALDEBUG(ah, HAL_DEBUG_ANY,
 493                             "%s: 2G Radio Chip Rev 0x%02X is not "
 494                             "supported by this driver\n", __func__,
 495                             AH_PRIVATE(ah)->ah_analog2GhzRev);
 496                         ecode = HAL_ENOTSUPP;
 497                         goto bad;
 498                 }
 499         }
 500
 501         ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
 502         if (ecode != HAL_OK) {
 503                 HALDEBUG(ah, HAL_DEBUG_ANY,
 504                     "%s: cannot read regulatory domain from EEPROM\n",
 505                     __func__);
 506                 goto bad;
 507         }
 508         AH_PRIVATE(ah)->ah_currentRD = eeval;
 509         /* XXX record serial number */
 510
 511         /*
 512          * Got everything we need now to setup the capabilities.
 513          */
 514         if (!ar5212FillCapabilityInfo(ah)) {
 515                 HALDEBUG(ah, HAL_DEBUG_ANY,
 516                     "%s: failed ar5212FillCapabilityInfo\n", __func__);
 517                 ecode = HAL_EEREAD;
 518                 goto bad;
 519         }
 520
 521         if (!rf->attach(ah, &ecode)) {
 522                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
 523                     __func__, ecode);
 524                 goto bad;
 525         }
 526         /*
 527          * Set noise floor adjust method; we arrange a
 528          * direct call instead of thunking.
 529          */
 530         AH_PRIVATE(ah)->ah_getNfAdjust = ahp->ah_rfHal->getNfAdjust;
 531
 532         /* Initialize gain ladder thermal calibration structure */
 533         ar5212InitializeGainValues(ah);
 534
 535         ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
 536         if (ecode != HAL_OK) {
 537                 HALDEBUG(ah, HAL_DEBUG_ANY,
 538                     "%s: error getting mac address from EEPROM\n", __func__);
 539                 goto bad;
 540         }
 541
 542         ar5212AniSetup(ah);
 543         /* Setup of Radar/AR structures happens in ath_hal_initchannels*/
 544         ar5212InitNfCalHistBuffer(ah);
 545
 546         /* XXX EAR stuff goes here */
 547
 548         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
 549
 550         return ah;
 551
 552 bad:
 553         if (ahp)
 554                 ar5212Detach((struct ath_hal *) ahp);
 555         if (status)
 556                 *status = ecode;
 557         return AH_NULL;
 558 #undef AH_EEPROM_PROTECT
 559 }
 560
 561 void
 562 ar5212Detach(struct ath_hal *ah)
 563 {
 564         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
 565
 566         HALASSERT(ah != AH_NULL);
 567         HALASSERT(ah->ah_magic == AR5212_MAGIC);
 568
 569         ar5212AniDetach(ah);
 570         ar5212RfDetach(ah);
 571         ar5212Disable(ah);
 572         ar5212SetPowerMode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
 573
 574         ath_hal_eepromDetach(ah);
 575         ath_hal_free(ah);
 576 }
 577
 578 HAL_BOOL
 579 ar5212ChipTest(struct ath_hal *ah)
 580 {
 581         uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
 582         uint32_t regHold[2];
 583         uint32_t patternData[4] =
 584             { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
 585         int i, j;
 586
 587         /* Test PHY & MAC registers */
 588         for (i = 0; i < 2; i++) {
 589                 uint32_t addr = regAddr[i];
 590                 uint32_t wrData, rdData;
 591
 592                 regHold[i] = OS_REG_READ(ah, addr);
 593                 for (j = 0; j < 0x100; j++) {
 594                         wrData = (j << 16) | j;
 595                         OS_REG_WRITE(ah, addr, wrData);
 596                         rdData = OS_REG_READ(ah, addr);
 597                         if (rdData != wrData) {
 598                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 599 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 600                                 __func__, addr, wrData, rdData);
 601                                 return AH_FALSE;
 602                         }
 603                 }
 604                 for (j = 0; j < 4; j++) {
 605                         wrData = patternData[j];
 606                         OS_REG_WRITE(ah, addr, wrData);
 607                         rdData = OS_REG_READ(ah, addr);
 608                         if (wrData != rdData) {
 609                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 610 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 611                                         __func__, addr, wrData, rdData);
 612                                 return AH_FALSE;
 613                         }
 614                 }
 615                 OS_REG_WRITE(ah, regAddr[i], regHold[i]);
 616         }
 617         OS_DELAY(100);
 618         return AH_TRUE;
 619 }
 620
 621 /*
 622  * Store the channel edges for the requested operational mode
 623  */
 624 HAL_BOOL
 625 ar5212GetChannelEdges(struct ath_hal *ah,
 626         uint16_t flags, uint16_t *low, uint16_t *high)
 627 {
 628         if (flags & IEEE80211_CHAN_5GHZ) {
 629                 *low = 4915;
 630                 *high = 6100;
 631                 return AH_TRUE;
 632         }
 633         if ((flags & IEEE80211_CHAN_2GHZ) &&
 634             (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) ||
 635              ath_hal_eepromGetFlag(ah, AR_EEP_GMODE))) {
 636                 *low = 2312;
 637                 *high = 2732;
 638                 return AH_TRUE;
 639         }
 640         return AH_FALSE;
 641 }
 642
 643 /*
 644  * Disable PLL when in L0s as well as receiver clock when in L1.
 645  * This power saving option must be enabled through the Serdes.
 646  *
 647  * Programming the Serdes must go through the same 288 bit serial shift
 648  * register as the other analog registers.  Hence the 9 writes.
 649  *
 650  * XXX Clean up the magic numbers.
 651  */
 652 static void
 653 ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
 654 {
 655         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
 656         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
 657
 658         /* RX shut off when elecidle is asserted */
 659         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
 660         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
 661         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
 662
 663         /* Shut off PLL and CLKREQ active in L1 */
 664         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
 665         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
 666         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
 667         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
 668
 669         /* Load the new settings */
 670         OS_REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 671 }
 672
 673 static void
 674 ar5212DisablePCIE(struct ath_hal *ah)
 675 {
 676         /* NB: fill in for 9100 */
 677 }
 678
 679 /*
 680  * Fill all software cached or static hardware state information.
 681  * Return failure if capabilities are to come from EEPROM and
 682  * cannot be read.
 683  */
 684 HAL_BOOL
 685 ar5212FillCapabilityInfo(struct ath_hal *ah)
 686 {
 687 #define AR_KEYTABLE_SIZE        128
 688 #define IS_GRIFFIN_LITE(ah) \
 689     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_GRIFFIN && \
 690      AH_PRIVATE(ah)->ah_macRev == AR_SREV_GRIFFIN_LITE)
 691 #define IS_COBRA(ah) \
 692     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_COBRA)
 693 #define IS_2112(ah) \
 694         ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD2112_SREV_MAJOR)
 695
 696         struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
 697         HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
 698         uint16_t capField, val;
 699
 700         /* Read the capability EEPROM location */
 701         if (ath_hal_eepromGet(ah, AR_EEP_OPCAP, &capField) != HAL_OK) {
 702                 HALDEBUG(ah, HAL_DEBUG_ANY,
 703                     "%s: unable to read caps from eeprom\n", __func__);
 704                 return AH_FALSE;
 705         }
 706         if (IS_2112(ah))
 707                 ath_hal_eepromSet(ah, AR_EEP_AMODE, AH_FALSE);
 708         if (capField == 0 && IS_GRIFFIN_LITE(ah)) {
 709                 /*
 710                  * For griffin-lite cards with unprogrammed capabilities.
 711                  */
 712                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 713                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 714                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 715                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 716                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 717                     "%s: override caps for griffin-lite, now 0x%x (+!turbo)\n",
 718                     __func__, capField);
 719         }
 720
 721         /* Modify reg domain on newer cards that need to work with older sw */
 722         if (ahpriv->ah_opmode != HAL_M_HOSTAP &&
 723             ahpriv->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {
 724                 if (ahpriv->ah_currentRD == 0x64 ||
 725                     ahpriv->ah_currentRD == 0x65)
 726                         ahpriv->ah_currentRD += 5;
 727                 else if (ahpriv->ah_currentRD == 0x41)
 728                         ahpriv->ah_currentRD = 0x43;
 729                 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: regdomain mapped to 0x%x\n",
 730                     __func__, ahpriv->ah_currentRD);
 731         }
 732
 733         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2417 ||
 734             AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2425) {
 735                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 736                     "%s: enable Bmode and disable turbo for Swan/Nala\n",
 737                     __func__);
 738                 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_TRUE);
 739                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 740                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 741                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 742                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 743         }
 744
 745         /* Construct wireless mode from EEPROM */
 746         pCap->halWirelessModes = 0;
 747         if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
 748                 pCap->halWirelessModes |= HAL_MODE_11A;
 749                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
 750                         pCap->halWirelessModes |= HAL_MODE_TURBO;
 751         }
 752         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
 753                 pCap->halWirelessModes |= HAL_MODE_11B;
 754         if (ath_hal_eepromGetFlag(ah, AR_EEP_GMODE) &&
 755             ahpriv->ah_subvendorid != AR_SUBVENDOR_ID_NOG) {
 756                 pCap->halWirelessModes |= HAL_MODE_11G;
 757                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO2DISABLE))
 758                         pCap->halWirelessModes |= HAL_MODE_108G;
 759         }
 760
 761         pCap->halLow2GhzChan = 2312;
 762         /* XXX 2417 too? */
 763         if (IS_RAD5112_ANY(ah) || IS_5413(ah) || IS_2425(ah) ||  IS_2417(ah))
 764                 pCap->halHigh2GhzChan = 2500;
 765         else
 766                 pCap->halHigh2GhzChan = 2732;
 767
 768         pCap->halLow5GhzChan = 4915;
 769         pCap->halHigh5GhzChan = 6100;
 770
 771         pCap->halCipherCkipSupport = AH_FALSE;
 772         pCap->halCipherTkipSupport = AH_TRUE;
 773         pCap->halCipherAesCcmSupport =
 774                 (ath_hal_eepromGetFlag(ah, AR_EEP_AES) &&
 775                  ((AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) ||
 776                   ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE) &&
 777                    (AH_PRIVATE(ah)->ah_macRev >= AR_SREV_VERSION_OAHU))));
 778
 779         pCap->halMicCkipSupport    = AH_FALSE;
 780         pCap->halMicTkipSupport    = AH_TRUE;
 781         pCap->halMicAesCcmSupport  = ath_hal_eepromGetFlag(ah, AR_EEP_AES);
 782         /*
 783          * Starting with Griffin TX+RX mic keys can be combined
 784          * in one key cache slot.
 785          */
 786         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_GRIFFIN)
 787                 pCap->halTkipMicTxRxKeySupport = AH_TRUE;
 788         else
 789                 pCap->halTkipMicTxRxKeySupport = AH_FALSE;
 790         pCap->halChanSpreadSupport = AH_TRUE;
 791         pCap->halSleepAfterBeaconBroken = AH_TRUE;
 792
 793         if (ahpriv->ah_macRev > 1 || IS_COBRA(ah)) {
 794                 pCap->halCompressSupport   =
 795                         ath_hal_eepromGetFlag(ah, AR_EEP_COMPRESS) &&
 796                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 797                 pCap->halBurstSupport = ath_hal_eepromGetFlag(ah, AR_EEP_BURST);
 798                 pCap->halFastFramesSupport =
 799                         ath_hal_eepromGetFlag(ah, AR_EEP_FASTFRAME) &&
 800                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 801                 pCap->halChapTuningSupport = AH_TRUE;
 802                 pCap->halTurboPrimeSupport = AH_TRUE;
 803         }
 804         pCap->halTurboGSupport = pCap->halWirelessModes & HAL_MODE_108G;
 805
 806         pCap->halPSPollBroken = AH_TRUE;        /* XXX fixed in later revs? */
 807         pCap->halVEOLSupport = AH_TRUE;
 808         pCap->halBssIdMaskSupport = AH_TRUE;
 809         pCap->halMcastKeySrchSupport = AH_TRUE;
 810         if ((ahpriv->ah_macVersion == AR_SREV_VERSION_VENICE &&
 811              ahpriv->ah_macRev == 8) ||
 812             ahpriv->ah_macVersion > AR_SREV_VERSION_VENICE)
 813                 pCap->halTsfAddSupport = AH_TRUE;
 814
 815         if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
 816                 pCap->halTotalQueues = val;
 817         else
 818                 pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
 819
 820         if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
 821                 pCap->halKeyCacheSize = val;
 822         else
 823                 pCap->halKeyCacheSize = AR_KEYTABLE_SIZE;
 824
 825         pCap->halChanHalfRate = AH_TRUE;
 826         pCap->halChanQuarterRate = AH_TRUE;
 827
 828         if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
 829             ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
 830                 /* NB: enabled by default */
 831                 ahpriv->ah_rfkillEnabled = AH_TRUE;
 832                 pCap->halRfSilentSupport = AH_TRUE;
 833         }
 834
 835         /* NB: this is a guess, noone seems to know the answer */
 836         ahpriv->ah_rxornIsFatal =
 837             (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);
 838
 839         /* enable features that first appeared in Hainan */
 840         if ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 841              AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN) ||
 842             AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) {
 843                 /* h/w phy counters */
 844                 pCap->halHwPhyCounterSupport = AH_TRUE;
 845                 /* bssid match disable */
 846                 pCap->halBssidMatchSupport = AH_TRUE;
 847         }
 848
 849         pCap->halTstampPrecision = 15;
 850         pCap->halIntrMask = HAL_INT_COMMON
 851                         | HAL_INT_RX
 852                         | HAL_INT_TX
 853                         | HAL_INT_FATAL
 854                         | HAL_INT_BNR
 855                         | HAL_INT_BMISC
 856                         ;
 857         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN)
 858                 pCap->halIntrMask &= ~HAL_INT_TBTT;
 859
 860         return AH_TRUE;
 861 #undef IS_COBRA
 862 #undef IS_GRIFFIN_LITE
 863 #undef AR_KEYTABLE_SIZE
 864 }
 865
 866 static const char*
 867 ar5212Probe(uint16_t vendorid, uint16_t devid)
 868 {
 869         if (vendorid == ATHEROS_VENDOR_ID ||
 870             vendorid == ATHEROS_3COM_VENDOR_ID ||
 871             vendorid == ATHEROS_3COM2_VENDOR_ID) {
 872                 switch (devid) {
 873                 case AR5212_FPGA:
 874                         return "Atheros 5212 (FPGA)";
 875                 case AR5212_DEVID:
 876                 case AR5212_DEVID_IBM:
 877                 case AR5212_DEFAULT:
 878                         return "Atheros 5212";
 879                 case AR5212_AR2413:
 880                         return "Atheros 2413";
 881                 case AR5212_AR2417:
 882                         return "Atheros 2417";
 883                 case AR5212_AR5413:
 884                         return "Atheros 5413";
 885                 case AR5212_AR5424:
 886                         return "Atheros 5424/2424";
 887                 }
 888         }
 889         return AH_NULL;
 890 }
 891 AH_CHIP(AR5212, ar5212Probe, ar5212Attach);