2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Herb Peyerl.
16 * 4. The name of Herb Peyerl may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * Modified from the FreeBSD 1.1.5.1 version by:
37 * INRIA - Sophia Antipolis, France
38 * avega@sophia.inria.fr
42 * Promiscuous mode added and interrupt logic slightly changed
43 * to reduce the number of adapter failures. Transceiver select
44 * logic changed to use value from EEPROM. Autoconfiguration
48 * Chelindbank (Chelyabinsk, Russia)
49 * babkin@hq.icb.chel.su
53 * Pccard support for 3C589 by:
59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
63 #include <sys/param.h>
64 #include <sys/systm.h>
66 #include <sys/socket.h>
67 #include <sys/sockio.h>
70 #include <machine/bus.h>
71 #include <machine/resource.h>
75 #include <net/if_dl.h>
76 #include <net/if_media.h>
77 #include <net/if_types.h>
78 #include <net/ethernet.h>
81 #include <dev/ep/if_epreg.h>
82 #include <dev/ep/if_epvar.h>
84 /* Exported variables */
85 devclass_t ep_devclass;
87 static int ep_media2if_media[] =
88 {IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
91 static void epinit(void *);
92 static int epioctl(struct ifnet *, u_long, caddr_t);
93 static void epstart(struct ifnet *);
94 static void epwatchdog(struct ifnet *);
96 static void epstart_locked(struct ifnet *);
97 static void epinit_locked(struct ep_softc *);
99 /* if_media functions */
100 static int ep_ifmedia_upd(struct ifnet *);
101 static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
103 static void epstop(struct ep_softc *);
104 static void epread(struct ep_softc *);
105 static int eeprom_rdy(struct ep_softc *);
107 #define EP_FTST(sc, f) (sc->stat & (f))
108 #define EP_FSET(sc, f) (sc->stat |= (f))
109 #define EP_FRST(sc, f) (sc->stat &= ~(f))
112 eeprom_rdy(struct ep_softc *sc)
116 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
119 if (i >= MAX_EEPROMBUSY) {
120 device_printf(sc->dev, "eeprom failed to come ready.\n");
128 * get_e: gets a 16 bits word from the EEPROM. we must have set the window
132 ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
138 CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
139 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
144 (*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
150 ep_get_macaddr(struct ep_softc *sc, u_char *addr)
157 macaddr = (uint16_t *) addr;
160 for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
161 error = ep_get_e(sc, i, &result);
164 macaddr[i] = htons(result);
170 ep_alloc(device_t dev)
172 struct ep_softc *sc = device_get_softc(dev);
178 sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
181 device_printf(dev, "No I/O space?!\n");
186 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
188 device_printf(dev, "No irq?!\n");
193 sc->stat = 0; /* 16 bit access */
195 sc->bst = rman_get_bustag(sc->iobase);
196 sc->bsh = rman_get_bushandle(sc->iobase);
198 sc->ep_connectors = 0;
199 sc->ep_connector = 0;
203 error = ep_get_e(sc, EEPROM_PROD_ID, &result);
206 sc->epb.prod_id = result;
208 error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result);
211 sc->epb.res_cfg = result;
220 ep_get_media(struct ep_softc *sc)
225 config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
227 sc->ep_connectors |= AUI;
229 sc->ep_connectors |= BNC;
231 sc->ep_connectors |= UTP;
233 if (!(sc->ep_connectors & 7))
235 device_printf(sc->dev, "no connectors!\n");
238 * This works for most of the cards so we'll do it here.
239 * The cards that require something different can override
242 sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
246 ep_free(device_t dev)
248 struct ep_softc *sc = device_get_softc(dev);
251 bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
253 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
255 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
262 ep_setup_station(struct ep_softc *sc, u_char *enaddr)
267 * Setup the station address
270 for (i = 0; i < ETHER_ADDR_LEN; i++)
271 CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]);
275 ep_attach(struct ep_softc *sc)
277 struct ifnet *ifp = NULL;
278 struct ifmedia *ifm = NULL;
283 if (! (sc->stat & F_ENADDR_SKIP)) {
284 error = ep_get_macaddr(sc, sc->eaddr);
286 device_printf(sc->dev, "Unable to get MAC address!\n");
291 ep_setup_station(sc, sc->eaddr);
292 ifp = sc->ifp = if_alloc(IFT_ETHER);
294 device_printf(sc->dev, "if_alloc() failed\n");
300 if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
301 ifp->if_mtu = ETHERMTU;
302 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
303 ifp->if_start = epstart;
304 ifp->if_ioctl = epioctl;
305 ifp->if_watchdog = epwatchdog;
306 ifp->if_init = epinit;
307 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
308 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
309 IFQ_SET_READY(&ifp->if_snd);
311 if (!sc->epb.mii_trans) {
312 ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
314 if (sc->ep_connectors & AUI)
315 ifmedia_add(&sc->ifmedia,
316 IFM_ETHER | IFM_10_5, 0, NULL);
317 if (sc->ep_connectors & UTP)
318 ifmedia_add(&sc->ifmedia,
319 IFM_ETHER | IFM_10_T, 0, NULL);
320 if (sc->ep_connectors & BNC)
321 ifmedia_add(&sc->ifmedia,
322 IFM_ETHER | IFM_10_2, 0, NULL);
323 if (!sc->ep_connectors)
324 ifmedia_add(&sc->ifmedia,
325 IFM_ETHER | IFM_NONE, 0, NULL);
327 ifmedia_set(&sc->ifmedia,
328 IFM_ETHER | ep_media2if_media[sc->ep_connector]);
331 ifm->ifm_media = ifm->ifm_cur->ifm_media;
334 ether_ifattach(ifp, sc->eaddr);
336 #ifdef EP_LOCAL_STATS
337 sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
338 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
340 EP_FSET(sc, F_RX_FIRST);
341 sc->top = sc->mcur = 0;
349 ep_detach(device_t dev)
354 sc = device_get_softc(dev);
356 EP_ASSERT_UNLOCKED(sc);
358 if (bus_child_present(dev))
361 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
375 struct ep_softc *sc = xsc;
382 * The order in here seems important. Otherwise we may not receive
386 epinit_locked(struct ep_softc *sc)
388 struct ifnet *ifp = sc->ifp;
394 EP_ASSERT_LOCKED(sc);
398 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
400 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
403 /* Disable the card */
404 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
406 /* Enable the card */
407 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
410 /* Reload the ether_addr. */
411 ep_setup_station(sc, IF_LLADDR(sc->ifp));
413 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
414 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
417 /* Window 1 is operating window */
419 for (i = 0; i < 31; i++)
420 CSR_READ_1(sc, EP_W1_TX_STATUS);
422 /* get rid of stray intr's */
423 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
425 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
426 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
428 if (ifp->if_flags & IFF_PROMISC)
429 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
430 FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
432 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
433 FIL_MULTICAST | FIL_BRDCST);
435 if (!sc->epb.mii_trans)
438 if (sc->stat & F_HAS_TX_PLL)
439 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
440 CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
441 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
443 ifp->if_drv_flags |= IFF_DRV_RUNNING;
444 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; /* just in case */
446 #ifdef EP_LOCAL_STATS
447 sc->rx_no_first = sc->rx_no_mbuf =
448 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
450 EP_FSET(sc, F_RX_FIRST);
453 sc->top = sc->mcur = 0;
455 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
456 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
463 epstart(struct ifnet *ifp)
473 epstart_locked(struct ifnet *ifp)
483 EP_ASSERT_LOCKED(sc);
485 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
489 /* Sneak a peek at the next packet */
490 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
493 if (!started && (sc->stat & F_HAS_TX_PLL))
494 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
496 for (len = 0, m = m0; m != NULL; m = m->m_next)
502 * The 3c509 automatically pads short packets to minimum
503 * ethernet length, but we drop packets that are too large.
504 * Perhaps we should truncate them instead?
506 if (len + pad > ETHER_MAX_LEN) {
507 /* packet is obviously too large: toss it */
512 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
513 /* no room in FIFO */
514 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
516 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
517 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
518 IFQ_DRV_PREPEND(&ifp->if_snd, m0);
522 CSR_WRITE_2(sc, EP_COMMAND,
523 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
525 /* XXX 4.x and earlier would splhigh here */
527 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
528 /* Second dword meaningless */
529 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
531 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
532 for (m = m0; m != NULL; m = m->m_next) {
534 CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
535 mtod(m, uint32_t *), m->m_len / 4);
537 CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
538 mtod(m, uint8_t *)+(m->m_len & (~3)),
542 for (m = m0; m != NULL; m = m->m_next) {
544 CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
545 mtod(m, uint16_t *), m->m_len / 2);
547 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
548 *(mtod(m, uint8_t *)+m->m_len - 1));
553 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */
555 /* XXX and drop splhigh here */
564 * Is another packet coming in? We don't want to overflow
568 if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
570 * we check if we have packets left, in that case
571 * we prepare to come back later
573 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
574 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
589 sc = (struct ep_softc *) arg;
591 /* XXX 4.x splbio'd here to reduce interruptability */
594 * quick fix: Try to detect an interrupt when the card goes away.
596 if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) {
602 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
606 while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
608 /* first acknowledge all interrupt sources */
609 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
611 if (status & (S_RX_COMPLETE | S_RX_EARLY))
613 if (status & S_TX_AVAIL) {
616 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
618 CSR_READ_2(sc, EP_W1_FREE_TX);
621 if (status & S_CARD_FAILURE) {
623 #ifdef EP_LOCAL_STATS
624 device_printf(sc->dev, "\n\tStatus: %x\n", status);
626 printf("\tFIFO Diagnostic: %x\n",
627 CSR_READ_2(sc, EP_W4_FIFO_DIAG));
628 printf("\tStat: %x\n", sc->stat);
629 printf("\tIpackets=%d, Opackets=%d\n",
630 ifp->if_ipackets, ifp->if_opackets);
631 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
632 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
633 sc->rx_overrunl, sc->tx_underrun);
637 device_printf(sc->dev,
638 "Status: %x (input buffer overflow)\n", status);
648 if (status & S_TX_COMPLETE) {
651 * We need ACK. We do it at the end.
653 * We need to read TX_STATUS until we get a
654 * 0 status in order to turn off the interrupt flag.
656 while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
658 if (status & TXS_SUCCES_INTR_REQ)
661 (TXS_UNDERRUN | TXS_JABBER |
662 TXS_MAX_COLLISION)) {
663 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
664 if (status & TXS_UNDERRUN) {
665 #ifdef EP_LOCAL_STATS
669 if (status & TXS_JABBER);
671 ++ifp->if_collisions;
678 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
680 * To have a tx_avail_int but giving
681 * the chance to the Reception
683 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
684 CSR_WRITE_2(sc, EP_COMMAND,
685 SET_TX_AVAIL_THRESH | 8);
687 /* pops up the next status */
688 CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
690 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
692 CSR_READ_2(sc, EP_W1_FREE_TX);
694 } /* end TX_COMPLETE */
697 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
699 if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
703 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
708 epread(struct ep_softc *sc)
710 struct mbuf *top, *mcur, *m;
713 short rx_fifo2, status;
716 /* XXX Must be called with sc locked */
719 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
723 if (status & ERR_RX) {
725 if (status & ERR_RX_OVERRUN) {
727 * We can think the rx latency is actually
728 * greather than we expect
730 #ifdef EP_LOCAL_STATS
731 if (EP_FTST(sc, F_RX_FIRST))
739 rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
741 if (EP_FTST(sc, F_RX_FIRST)) {
742 MGETHDR(m, M_DONTWAIT, MT_DATA);
745 if (rx_fifo >= MINCLSIZE)
746 MCLGET(m, M_DONTWAIT);
747 sc->top = sc->mcur = top = m;
748 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
749 #define EOFF (EROUND - sizeof(struct ether_header))
752 /* Read what should be the header. */
753 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
754 mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
755 top->m_len = sizeof(struct ether_header);
756 rx_fifo -= sizeof(struct ether_header);
757 sc->cur_len = rx_fifo2;
759 /* come here if we didn't have a complete packet last time */
762 sc->cur_len += rx_fifo2;
765 /* Reads what is left in the RX FIFO */
766 while (rx_fifo > 0) {
767 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
768 if (lenthisone == 0) { /* no room in this one */
770 MGET(m, M_DONTWAIT, MT_DATA);
773 if (rx_fifo >= MINCLSIZE)
774 MCLGET(m, M_DONTWAIT);
777 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
779 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
780 /* default for EISA configured cards */
781 CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
782 (uint32_t *)(mtod(m, caddr_t)+m->m_len),
784 m->m_len += (lenthisone & ~3);
786 CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
787 mtod(m, caddr_t)+m->m_len, lenthisone & 3);
788 m->m_len += (lenthisone & 3);
790 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
791 (uint16_t *)(mtod(m, caddr_t)+m->m_len),
793 m->m_len += lenthisone;
795 *(mtod(m, caddr_t)+m->m_len - 1) =
796 CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
798 rx_fifo -= lenthisone;
801 if (status & ERR_RX_INCOMPLETE) {
802 /* we haven't received the complete packet */
804 #ifdef EP_LOCAL_STATS
805 /* to know how often we come here */
808 EP_FRST(sc, F_RX_FIRST);
809 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
810 if (!status & ERR_RX_INCOMPLETE) {
812 * We see if by now, the packet has completly
817 CSR_WRITE_2(sc, EP_COMMAND,
818 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
821 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
823 EP_FSET(sc, F_RX_FIRST);
824 top->m_pkthdr.rcvif = sc->ifp;
825 top->m_pkthdr.len = sc->cur_len;
828 * Drop locks before calling if_input() since it may re-enter
829 * ep_start() in the netisr case. This would result in a
830 * lock reversal. Better performance might be obtained by
831 * chaining all packets received, dropping the lock, and then
832 * calling if_input() on each one.
835 (*ifp->if_input) (ifp, top);
839 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
843 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
847 #ifdef EP_LOCAL_STATS
851 EP_FSET(sc, F_RX_FIRST);
853 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
857 ep_ifmedia_upd(struct ifnet *ifp)
859 struct ep_softc *sc = ifp->if_softc;
863 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
865 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
868 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
870 if (sc->ep_connectors & UTP) {
871 i = ACF_CONNECTOR_UTP;
873 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
877 if (sc->ep_connectors & BNC) {
878 i = ACF_CONNECTOR_BNC;
879 CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
880 DELAY(DELAY_MULTIPLE * 1000);
884 if (sc->ep_connectors & AUI)
885 i = ACF_CONNECTOR_AUI;
888 i = sc->ep_connector;
889 device_printf(sc->dev,
890 "strange connector type in EEPROM: assuming AUI\n");
894 j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
895 CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
901 ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
903 struct ep_softc *sc = ifp->if_softc;
906 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
909 ms = CSR_READ_2(sc, EP_W4_MEDIA_TYPE);
911 ifmr->ifm_status = IFM_AVALID;
913 ifmr->ifm_status |= IFM_ACTIVE;
914 ifmr->ifm_active = IFM_ETHER | IFM_10_T;
916 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
920 ifmr->ifm_active = sc->ifmedia.ifm_media;
926 epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
928 struct ep_softc *sc = ifp->if_softc;
929 struct ifreq *ifr = (struct ifreq *) data;
935 if (((ifp->if_flags & IFF_UP) == 0) &&
936 (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
937 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
940 /* reinitialize card on any parameter change */
947 * The Etherlink III has no programmable multicast
948 * filter. We always initialize the card to be
949 * promiscuous to multicast, since we're always a
950 * member of the ALL-SYSTEMS group, so there's no
951 * need to process SIOC*MULTI requests.
957 if (!sc->epb.mii_trans)
958 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
963 error = ether_ioctl(ifp, cmd, data);
970 epwatchdog(struct ifnet *ifp)
972 struct ep_softc *sc = ifp->if_softc;
976 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
978 ep_intr(ifp->if_softc);
982 epstop(struct ep_softc *sc)
984 CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
985 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
988 CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
989 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
992 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
994 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
997 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
998 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
999 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
1000 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);