1 /******************************************************************************
3 Copyright (c) 2001-2010, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ******************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
42 * ixgbe_init_shared_code - Initialize the shared code
43 * @hw: pointer to hardware structure
45 * This will assign function pointers and assign the MAC type and PHY code.
46 * Does not touch the hardware. This function must be called prior to any
47 * other function in the shared code. The ixgbe_hw structure should be
48 * memset to 0 prior to calling this function. The following fields in
49 * hw structure should be filled in prior to calling this function:
50 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
51 * subsystem_vendor_id, and revision_id
53 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
57 DEBUGFUNC("ixgbe_init_shared_code");
62 ixgbe_set_mac_type(hw);
64 switch (hw->mac.type) {
65 case ixgbe_mac_82598EB:
66 status = ixgbe_init_ops_82598(hw);
68 case ixgbe_mac_82599EB:
69 status = ixgbe_init_ops_82599(hw);
72 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
80 * ixgbe_set_mac_type - Sets MAC type
81 * @hw: pointer to the HW structure
83 * This function sets the mac type of the adapter based on the
84 * vendor ID and device ID stored in the hw structure.
86 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
88 s32 ret_val = IXGBE_SUCCESS;
90 DEBUGFUNC("ixgbe_set_mac_type\n");
92 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
93 switch (hw->device_id) {
94 case IXGBE_DEV_ID_82598:
95 case IXGBE_DEV_ID_82598_BX:
96 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
97 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
98 case IXGBE_DEV_ID_82598AT:
99 case IXGBE_DEV_ID_82598AT2:
100 case IXGBE_DEV_ID_82598EB_CX4:
101 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
102 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
103 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
104 case IXGBE_DEV_ID_82598EB_XF_LR:
105 case IXGBE_DEV_ID_82598EB_SFP_LOM:
106 hw->mac.type = ixgbe_mac_82598EB;
108 case IXGBE_DEV_ID_82599_KX4:
109 case IXGBE_DEV_ID_82599_KX4_MEZZ:
110 case IXGBE_DEV_ID_82599_XAUI_LOM:
111 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
112 case IXGBE_DEV_ID_82599_SFP:
113 case IXGBE_DEV_ID_82599_CX4:
114 case IXGBE_DEV_ID_82599_T3_LOM:
115 hw->mac.type = ixgbe_mac_82599EB;
118 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
122 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
126 hw->mac.type, ret_val);
131 * ixgbe_init_hw - Initialize the hardware
132 * @hw: pointer to hardware structure
134 * Initialize the hardware by resetting and then starting the hardware
136 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
138 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
139 IXGBE_NOT_IMPLEMENTED);
143 * ixgbe_reset_hw - Performs a hardware reset
144 * @hw: pointer to hardware structure
146 * Resets the hardware by resetting the transmit and receive units, masks and
147 * clears all interrupts, performs a PHY reset, and performs a MAC reset
149 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
151 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
152 IXGBE_NOT_IMPLEMENTED);
156 * ixgbe_start_hw - Prepares hardware for Rx/Tx
157 * @hw: pointer to hardware structure
159 * Starts the hardware by filling the bus info structure and media type,
160 * clears all on chip counters, initializes receive address registers,
161 * multicast table, VLAN filter table, calls routine to setup link and
162 * flow control settings, and leaves transmit and receive units disabled
165 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
167 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
168 IXGBE_NOT_IMPLEMENTED);
172 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
173 * which is disabled by default in ixgbe_start_hw();
175 * @hw: pointer to hardware structure
177 * Enable relaxed ordering;
179 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
181 if (hw->mac.ops.enable_relaxed_ordering)
182 hw->mac.ops.enable_relaxed_ordering(hw);
186 * ixgbe_clear_hw_cntrs - Clear hardware counters
187 * @hw: pointer to hardware structure
189 * Clears all hardware statistics counters by reading them from the hardware
190 * Statistics counters are clear on read.
192 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
194 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
195 IXGBE_NOT_IMPLEMENTED);
199 * ixgbe_get_media_type - Get media type
200 * @hw: pointer to hardware structure
202 * Returns the media type (fiber, copper, backplane)
204 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
206 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
207 ixgbe_media_type_unknown);
211 * ixgbe_get_mac_addr - Get MAC address
212 * @hw: pointer to hardware structure
213 * @mac_addr: Adapter MAC address
215 * Reads the adapter's MAC address from the first Receive Address Register
216 * (RAR0) A reset of the adapter must have been performed prior to calling
217 * this function in order for the MAC address to have been loaded from the
220 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
222 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
223 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
227 * ixgbe_get_san_mac_addr - Get SAN MAC address
228 * @hw: pointer to hardware structure
229 * @san_mac_addr: SAN MAC address
231 * Reads the SAN MAC address from the EEPROM, if it's available. This is
232 * per-port, so set_lan_id() must be called before reading the addresses.
234 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
236 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
237 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
241 * ixgbe_set_san_mac_addr - Write a SAN MAC address
242 * @hw: pointer to hardware structure
243 * @san_mac_addr: SAN MAC address
245 * Writes A SAN MAC address to the EEPROM.
247 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
249 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
250 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
254 * ixgbe_get_device_caps - Get additional device capabilities
255 * @hw: pointer to hardware structure
256 * @device_caps: the EEPROM word for device capabilities
258 * Reads the extra device capabilities from the EEPROM
260 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
262 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
263 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
267 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
268 * @hw: pointer to hardware structure
269 * @wwnn_prefix: the alternative WWNN prefix
270 * @wwpn_prefix: the alternative WWPN prefix
272 * This function will read the EEPROM from the alternative SAN MAC address
273 * block to check the support for the alternative WWNN/WWPN prefix support.
275 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
278 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
279 (hw, wwnn_prefix, wwpn_prefix),
280 IXGBE_NOT_IMPLEMENTED);
284 * ixgbe_get_bus_info - Set PCI bus info
285 * @hw: pointer to hardware structure
287 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
289 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
291 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
292 IXGBE_NOT_IMPLEMENTED);
296 * ixgbe_get_num_of_tx_queues - Get Tx queues
297 * @hw: pointer to hardware structure
299 * Returns the number of transmit queues for the given adapter.
301 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
303 return hw->mac.max_tx_queues;
307 * ixgbe_get_num_of_rx_queues - Get Rx queues
308 * @hw: pointer to hardware structure
310 * Returns the number of receive queues for the given adapter.
312 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
314 return hw->mac.max_rx_queues;
318 * ixgbe_stop_adapter - Disable Rx/Tx units
319 * @hw: pointer to hardware structure
321 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
322 * disables transmit and receive units. The adapter_stopped flag is used by
323 * the shared code and drivers to determine if the adapter is in a stopped
324 * state and should not touch the hardware.
326 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
328 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
329 IXGBE_NOT_IMPLEMENTED);
333 * ixgbe_read_pba_num - Reads part number from EEPROM
334 * @hw: pointer to hardware structure
335 * @pba_num: stores the part number from the EEPROM
337 * Reads the part number from the EEPROM.
339 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
341 return ixgbe_read_pba_num_generic(hw, pba_num);
345 * ixgbe_identify_phy - Get PHY type
346 * @hw: pointer to hardware structure
348 * Determines the physical layer module found on the current adapter.
350 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
352 s32 status = IXGBE_SUCCESS;
354 if (hw->phy.type == ixgbe_phy_unknown) {
355 status = ixgbe_call_func(hw,
356 hw->phy.ops.identify,
358 IXGBE_NOT_IMPLEMENTED);
365 * ixgbe_reset_phy - Perform a PHY reset
366 * @hw: pointer to hardware structure
368 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
370 s32 status = IXGBE_SUCCESS;
372 if (hw->phy.type == ixgbe_phy_unknown) {
373 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
374 status = IXGBE_ERR_PHY;
377 if (status == IXGBE_SUCCESS) {
378 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
379 IXGBE_NOT_IMPLEMENTED);
385 * ixgbe_get_phy_firmware_version -
386 * @hw: pointer to hardware structure
387 * @firmware_version: pointer to firmware version
389 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
391 s32 status = IXGBE_SUCCESS;
393 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
394 (hw, firmware_version),
395 IXGBE_NOT_IMPLEMENTED);
400 * ixgbe_read_phy_reg - Read PHY register
401 * @hw: pointer to hardware structure
402 * @reg_addr: 32 bit address of PHY register to read
403 * @phy_data: Pointer to read data from PHY register
405 * Reads a value from a specified PHY register
407 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
411 ixgbe_identify_phy(hw);
413 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
414 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
418 * ixgbe_write_phy_reg - Write PHY register
419 * @hw: pointer to hardware structure
420 * @reg_addr: 32 bit PHY register to write
421 * @phy_data: Data to write to the PHY register
423 * Writes a value to specified PHY register
425 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
429 ixgbe_identify_phy(hw);
431 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
432 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
436 * ixgbe_setup_phy_link - Restart PHY autoneg
437 * @hw: pointer to hardware structure
439 * Restart autonegotiation and PHY and waits for completion.
441 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
443 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
444 IXGBE_NOT_IMPLEMENTED);
448 * ixgbe_check_phy_link - Determine link and speed status
449 * @hw: pointer to hardware structure
451 * Reads a PHY register to determine if link is up and the current speed for
454 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
457 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
458 link_up), IXGBE_NOT_IMPLEMENTED);
462 * ixgbe_setup_phy_link_speed - Set auto advertise
463 * @hw: pointer to hardware structure
464 * @speed: new link speed
465 * @autoneg: TRUE if autonegotiation enabled
467 * Sets the auto advertised capabilities
469 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
471 bool autoneg_wait_to_complete)
473 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
474 autoneg, autoneg_wait_to_complete),
475 IXGBE_NOT_IMPLEMENTED);
479 * ixgbe_check_link - Get link and speed status
480 * @hw: pointer to hardware structure
482 * Reads the links register to determine if link is up and the current speed
484 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
485 bool *link_up, bool link_up_wait_to_complete)
487 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
488 link_up, link_up_wait_to_complete),
489 IXGBE_NOT_IMPLEMENTED);
493 * ixgbe_setup_link - Set link speed
494 * @hw: pointer to hardware structure
495 * @speed: new link speed
496 * @autoneg: TRUE if autonegotiation enabled
498 * Configures link settings. Restarts the link.
499 * Performs autonegotiation if needed.
501 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
503 bool autoneg_wait_to_complete)
505 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
506 autoneg, autoneg_wait_to_complete),
507 IXGBE_NOT_IMPLEMENTED);
511 * ixgbe_get_link_capabilities - Returns link capabilities
512 * @hw: pointer to hardware structure
514 * Determines the link capabilities of the current configuration.
516 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
519 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
520 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
524 * ixgbe_led_on - Turn on LEDs
525 * @hw: pointer to hardware structure
526 * @index: led number to turn on
528 * Turns on the software controllable LEDs.
530 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
532 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
533 IXGBE_NOT_IMPLEMENTED);
537 * ixgbe_led_off - Turn off LEDs
538 * @hw: pointer to hardware structure
539 * @index: led number to turn off
541 * Turns off the software controllable LEDs.
543 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
545 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
546 IXGBE_NOT_IMPLEMENTED);
550 * ixgbe_blink_led_start - Blink LEDs
551 * @hw: pointer to hardware structure
552 * @index: led number to blink
554 * Blink LED based on index.
556 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
558 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
559 IXGBE_NOT_IMPLEMENTED);
563 * ixgbe_blink_led_stop - Stop blinking LEDs
564 * @hw: pointer to hardware structure
566 * Stop blinking LED based on index.
568 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
570 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
571 IXGBE_NOT_IMPLEMENTED);
575 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
576 * @hw: pointer to hardware structure
578 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
579 * ixgbe_hw struct in order to set up EEPROM access.
581 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
583 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
584 IXGBE_NOT_IMPLEMENTED);
589 * ixgbe_write_eeprom - Write word to EEPROM
590 * @hw: pointer to hardware structure
591 * @offset: offset within the EEPROM to be written to
592 * @data: 16 bit word to be written to the EEPROM
594 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
595 * called after this function, the EEPROM will most likely contain an
598 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
600 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
601 IXGBE_NOT_IMPLEMENTED);
605 * ixgbe_read_eeprom - Read word from EEPROM
606 * @hw: pointer to hardware structure
607 * @offset: offset within the EEPROM to be read
608 * @data: read 16 bit value from EEPROM
610 * Reads 16 bit value from EEPROM
612 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
614 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
615 IXGBE_NOT_IMPLEMENTED);
619 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
620 * @hw: pointer to hardware structure
621 * @checksum_val: calculated checksum
623 * Performs checksum calculation and validates the EEPROM checksum
625 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
627 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
628 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
632 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
633 * @hw: pointer to hardware structure
635 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
637 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
638 IXGBE_NOT_IMPLEMENTED);
642 * ixgbe_insert_mac_addr - Find a RAR for this mac address
643 * @hw: pointer to hardware structure
644 * @addr: Address to put into receive address register
645 * @vmdq: VMDq pool to assign
647 * Puts an ethernet address into a receive address register, or
648 * finds the rar that it is aleady in; adds to the pool list
650 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
652 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
654 IXGBE_NOT_IMPLEMENTED);
658 * ixgbe_set_rar - Set Rx address register
659 * @hw: pointer to hardware structure
660 * @index: Receive address register to write
661 * @addr: Address to put into receive address register
663 * @enable_addr: set flag that address is active
665 * Puts an ethernet address into a receive address register.
667 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
670 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
671 enable_addr), IXGBE_NOT_IMPLEMENTED);
675 * ixgbe_clear_rar - Clear Rx address register
676 * @hw: pointer to hardware structure
677 * @index: Receive address register to write
679 * Puts an ethernet address into a receive address register.
681 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
683 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
684 IXGBE_NOT_IMPLEMENTED);
688 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
689 * @hw: pointer to hardware structure
690 * @rar: receive address register index to associate with VMDq index
691 * @vmdq: VMDq set or pool index
693 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
695 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
696 IXGBE_NOT_IMPLEMENTED);
700 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
701 * @hw: pointer to hardware structure
702 * @rar: receive address register index to disassociate with VMDq index
703 * @vmdq: VMDq set or pool index
705 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
707 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
708 IXGBE_NOT_IMPLEMENTED);
712 * ixgbe_init_rx_addrs - Initializes receive address filters.
713 * @hw: pointer to hardware structure
715 * Places the MAC address in receive address register 0 and clears the rest
716 * of the receive address registers. Clears the multicast table. Assumes
717 * the receiver is in reset when the routine is called.
719 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
721 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
722 IXGBE_NOT_IMPLEMENTED);
726 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
727 * @hw: pointer to hardware structure
729 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
731 return hw->mac.num_rar_entries;
735 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
736 * @hw: pointer to hardware structure
737 * @addr_list: the list of new multicast addresses
738 * @addr_count: number of addresses
739 * @func: iterator function to walk the multicast address list
741 * The given list replaces any existing list. Clears the secondary addrs from
742 * receive address registers. Uses unused receive address registers for the
743 * first secondary addresses, and falls back to promiscuous mode as needed.
745 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
746 u32 addr_count, ixgbe_mc_addr_itr func)
748 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
749 addr_list, addr_count, func),
750 IXGBE_NOT_IMPLEMENTED);
754 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
755 * @hw: pointer to hardware structure
756 * @mc_addr_list: the list of new multicast addresses
757 * @mc_addr_count: number of addresses
758 * @func: iterator function to walk the multicast address list
760 * The given list replaces any existing list. Clears the MC addrs from receive
761 * address registers and the multicast table. Uses unused receive address
762 * registers for the first multicast addresses, and hashes the rest into the
765 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
766 u32 mc_addr_count, ixgbe_mc_addr_itr func)
768 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
769 mc_addr_list, mc_addr_count, func),
770 IXGBE_NOT_IMPLEMENTED);
774 * ixgbe_enable_mc - Enable multicast address in RAR
775 * @hw: pointer to hardware structure
777 * Enables multicast address in RAR and the use of the multicast hash table.
779 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
781 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
782 IXGBE_NOT_IMPLEMENTED);
786 * ixgbe_disable_mc - Disable multicast address in RAR
787 * @hw: pointer to hardware structure
789 * Disables multicast address in RAR and the use of the multicast hash table.
791 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
793 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
794 IXGBE_NOT_IMPLEMENTED);
798 * ixgbe_clear_vfta - Clear VLAN filter table
799 * @hw: pointer to hardware structure
801 * Clears the VLAN filer table, and the VMDq index associated with the filter
803 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
805 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
806 IXGBE_NOT_IMPLEMENTED);
810 * ixgbe_set_vfta - Set VLAN filter table
811 * @hw: pointer to hardware structure
812 * @vlan: VLAN id to write to VLAN filter
813 * @vind: VMDq output index that maps queue to VLAN id in VFTA
814 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
816 * Turn on/off specified VLAN in the VLAN filter table.
818 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
820 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
821 vlan_on), IXGBE_NOT_IMPLEMENTED);
825 * ixgbe_fc_enable - Enable flow control
826 * @hw: pointer to hardware structure
827 * @packetbuf_num: packet buffer number (0-7)
829 * Configures the flow control settings based on SW configuration.
831 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
833 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num),
834 IXGBE_NOT_IMPLEMENTED);
838 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
839 * @hw: pointer to hardware structure
840 * @reg: analog register to read
843 * Performs write operation to analog register specified.
845 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
847 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
848 val), IXGBE_NOT_IMPLEMENTED);
852 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
853 * @hw: pointer to hardware structure
854 * @reg: analog register to write
855 * @val: value to write
857 * Performs write operation to Atlas analog register specified.
859 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
861 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
862 val), IXGBE_NOT_IMPLEMENTED);
866 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
867 * @hw: pointer to hardware structure
869 * Initializes the Unicast Table Arrays to zero on device load. This
870 * is part of the Rx init addr execution path.
872 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
874 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
875 IXGBE_NOT_IMPLEMENTED);
879 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
880 * @hw: pointer to hardware structure
881 * @byte_offset: byte offset to read
884 * Performs byte read operation to SFP module's EEPROM over I2C interface.
886 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
889 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
890 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
894 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
895 * @hw: pointer to hardware structure
896 * @byte_offset: byte offset to write
897 * @data: value to write
899 * Performs byte write operation to SFP module's EEPROM over I2C interface
900 * at a specified device address.
902 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
905 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
906 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
910 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
911 * @hw: pointer to hardware structure
912 * @byte_offset: EEPROM byte offset to write
913 * @eeprom_data: value to write
915 * Performs byte write operation to SFP module's EEPROM over I2C interface.
917 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
918 u8 byte_offset, u8 eeprom_data)
920 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
921 (hw, byte_offset, eeprom_data),
922 IXGBE_NOT_IMPLEMENTED);
926 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
927 * @hw: pointer to hardware structure
928 * @byte_offset: EEPROM byte offset to read
929 * @eeprom_data: value read
931 * Performs byte read operation to SFP module's EEPROM over I2C interface.
933 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
935 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
936 (hw, byte_offset, eeprom_data),
937 IXGBE_NOT_IMPLEMENTED);
941 * ixgbe_get_supported_physical_layer - Returns physical layer type
942 * @hw: pointer to hardware structure
944 * Determines physical layer capabilities of the current configuration.
946 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
948 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
949 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
953 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
954 * @hw: pointer to hardware structure
955 * @regval: bitfield to write to the Rx DMA register
957 * Enables the Rx DMA unit of the device.
959 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
961 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
962 (hw, regval), IXGBE_NOT_IMPLEMENTED);
966 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
967 * @hw: pointer to hardware structure
968 * @mask: Mask to specify which semaphore to acquire
970 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
971 * function (CSR, PHY0, PHY1, EEPROM, Flash)
973 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
975 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
976 (hw, mask), IXGBE_NOT_IMPLEMENTED);
980 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
981 * @hw: pointer to hardware structure
982 * @mask: Mask to specify which semaphore to release
984 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
985 * function (CSR, PHY0, PHY1, EEPROM, Flash)
987 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
989 if (hw->mac.ops.release_swfw_sync)
990 hw->mac.ops.release_swfw_sync(hw, mask);