1 /* $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $ */
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
41 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Manuel Bouyer.
54 * 4. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 #include <sys/cdefs.h>
70 __FBSDID("$FreeBSD$");
73 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
74 * Data Sheet available from www.national.com
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/kernel.h>
80 #include <sys/socket.h>
81 #include <sys/errno.h>
82 #include <sys/module.h>
86 #include <net/if_media.h>
88 #include <dev/mii/mii.h>
89 #include <dev/mii/miivar.h>
92 #include <dev/mii/nsphyreg.h>
94 #include "miibus_if.h"
96 static int nsphy_probe(device_t);
97 static int nsphy_attach(device_t);
99 static device_method_t nsphy_methods[] = {
100 /* device interface */
101 DEVMETHOD(device_probe, nsphy_probe),
102 DEVMETHOD(device_attach, nsphy_attach),
103 DEVMETHOD(device_detach, mii_phy_detach),
104 DEVMETHOD(device_shutdown, bus_generic_shutdown),
108 static devclass_t nsphy_devclass;
110 static driver_t nsphy_driver = {
113 sizeof(struct mii_softc)
116 DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
118 static int nsphy_service(struct mii_softc *, struct mii_data *, int);
119 static void nsphy_status(struct mii_softc *);
120 static void nsphy_reset(struct mii_softc *);
122 static const struct mii_phydesc nsphys[] = {
123 MII_PHY_DESC(NATSEMI, DP83840),
128 nsphy_probe(device_t dev)
131 return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
135 nsphy_attach(device_t dev)
137 struct mii_softc *sc;
138 struct mii_attach_args *ma;
139 struct mii_data *mii;
142 sc = device_get_softc(dev);
143 ma = device_get_ivars(dev);
144 sc->mii_dev = device_get_parent(dev);
145 mii = device_get_softc(sc->mii_dev);
146 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
148 sc->mii_inst = mii->mii_instance;
149 sc->mii_phy = ma->mii_phyno;
150 sc->mii_service = nsphy_service;
155 nic = device_get_name(device_get_parent(sc->mii_dev));
157 * Am79C971 and i82557 wedge when isolating all of their
160 if (strcmp(nic, "fxp") == 0 || strcmp(nic, "pcn") == 0)
161 sc->mii_flags |= MIIF_NOISOLATE;
164 * DP83840A used with HME chips don't advertise their media
165 * capabilities themselves properly so force writing the ANAR
166 * according to the BMSR in mii_phy_setmedia().
168 if (strcmp(nic, "hme") == 0)
169 sc->mii_flags |= MIIF_FORCEANEG;
171 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
174 * In order for MII loopback to work Am79C971 and greater PCnet
175 * chips additionally need to be placed into external loopback
176 * mode which pcn(4) doesn't do so far.
178 if (strcmp(nic, "pcn") != 0)
180 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
181 sc->mii_inst), MII_MEDIA_100_TX);
183 if (strcmp(nic, "pcn") == 0)
184 sc->mii_flags |= MIIF_NOLOOP;
189 sc->mii_capabilities =
190 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
191 device_printf(dev, " ");
192 mii_phy_add_media(sc);
196 MIIBUS_MEDIAINIT(sc->mii_dev);
201 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
203 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
209 * If we're not polling our PHY instance, just return.
211 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
217 * If the media indicates a different PHY instance,
220 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
221 reg = PHY_READ(sc, MII_BMCR);
222 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
227 * If the interface is not up, don't do anything.
229 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
232 reg = PHY_READ(sc, MII_NSPHY_PCR);
235 * Set up the PCR to use LED4 to indicate full-duplex
236 * in both 10baseT and 100baseTX modes.
241 * Make sure Carrier Integrity Monitor function is
242 * disabled (normal for Node operation, but sometimes
248 * Make sure "force link good" is set to normal mode.
249 * It's only intended for debugging.
254 * Mystery bits which are supposedly `reserved',
255 * but we seem to need to set them when the PHY
256 * is connected to some interfaces:
258 * 0x0400 is needed for fxp
259 * (Intel EtherExpress Pro 10+/100B, 82557 chip)
260 * (nsphy with a DP83840 chip)
261 * 0x0100 may be needed for some other card
263 reg |= 0x0100 | 0x0400;
265 if (strcmp(mii->mii_ifp->if_dname, "fxp") == 0)
266 PHY_WRITE(sc, MII_NSPHY_PCR, reg);
268 mii_phy_setmedia(sc);
273 * If we're not currently selected, just return.
275 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
277 if (mii_phy_tick(sc) == EJUSTRETURN)
282 /* Update the media status. */
285 /* Callback if something changed. */
286 mii_phy_update(sc, cmd);
291 nsphy_status(struct mii_softc *sc)
293 struct mii_data *mii = sc->mii_pdata;
294 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
295 int bmsr, bmcr, par, anlpar;
297 mii->mii_media_status = IFM_AVALID;
298 mii->mii_media_active = IFM_ETHER;
300 bmsr = PHY_READ(sc, MII_BMSR) |
301 PHY_READ(sc, MII_BMSR);
302 if (bmsr & BMSR_LINK)
303 mii->mii_media_status |= IFM_ACTIVE;
305 bmcr = PHY_READ(sc, MII_BMCR);
306 if (bmcr & BMCR_ISO) {
307 mii->mii_media_active |= IFM_NONE;
308 mii->mii_media_status = 0;
312 if (bmcr & BMCR_LOOP)
313 mii->mii_media_active |= IFM_LOOP;
315 if (bmcr & BMCR_AUTOEN) {
317 * The PAR status bits are only valid if autonegotiation
318 * has completed (or it's disabled).
320 if ((bmsr & BMSR_ACOMP) == 0) {
321 /* Erg, still trying, I guess... */
322 mii->mii_media_active |= IFM_NONE;
327 * Argh. The PAR doesn't seem to indicate duplex mode
328 * properly! Determine media based on link partner's
329 * advertised capabilities.
331 if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
332 anlpar = PHY_READ(sc, MII_ANAR) &
333 PHY_READ(sc, MII_ANLPAR);
334 if (anlpar & ANLPAR_TX_FD)
335 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
336 else if (anlpar & ANLPAR_T4)
337 mii->mii_media_active |= IFM_100_T4;
338 else if (anlpar & ANLPAR_TX)
339 mii->mii_media_active |= IFM_100_TX;
340 else if (anlpar & ANLPAR_10_FD)
341 mii->mii_media_active |= IFM_10_T|IFM_FDX;
342 else if (anlpar & ANLPAR_10)
343 mii->mii_media_active |= IFM_10_T;
345 mii->mii_media_active |= IFM_NONE;
350 * Link partner is not capable of autonegotiation.
351 * We will never be in full-duplex mode if this is
352 * the case, so reading the PAR is OK.
354 par = PHY_READ(sc, MII_NSPHY_PAR);
356 mii->mii_media_active |= IFM_10_T;
358 mii->mii_media_active |= IFM_100_TX;
361 mii->mii_media_active |= IFM_FDX;
364 mii->mii_media_active = ife->ifm_media;
368 nsphy_reset(struct mii_softc *sc)
370 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
373 if (sc->mii_flags & MIIF_NOISOLATE)
376 reg = BMCR_RESET | BMCR_ISO;
377 PHY_WRITE(sc, MII_BMCR, reg);
380 * It is best to allow a little time for the reset to settle
381 * in before we start polling the BMCR again. Notably, the
382 * DP83840A manuals state that there should be a 500us delay
383 * between asserting software reset and attempting MII serial
384 * operations. Be conservative.
389 * Wait another 2s for it to complete.
390 * This is only a little overkill as under normal circumstances
391 * the PHY can take up to 1s to complete reset.
392 * This is also a bit odd because after a reset, the BMCR will
393 * clear the reset bit and simply reports 0 even though the reset
394 * is not yet complete.
396 for (i = 0; i < 1000; i++) {
397 reg = PHY_READ(sc, MII_BMCR);
398 if (reg != 0 && (reg & BMCR_RESET) == 0)
403 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
404 if ((ife == NULL && sc->mii_inst != 0) ||
405 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
406 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);