5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD$");
24 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
25 * http://www.ralinktech.com/
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
40 #include <sys/endian.h>
41 #include <sys/firmware.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
49 #include <net/if_arp.h>
50 #include <net/ethernet.h>
51 #include <net/if_dl.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
55 #include <net80211/ieee80211_var.h>
56 #include <net80211/ieee80211_radiotap.h>
57 #include <net80211/ieee80211_regdomain.h>
58 #include <net80211/ieee80211_ratectl.h>
60 #include <netinet/in.h>
61 #include <netinet/in_systm.h>
62 #include <netinet/in_var.h>
63 #include <netinet/ip.h>
64 #include <netinet/if_ether.h>
66 #include <dev/ral/rt2661reg.h>
67 #include <dev/ral/rt2661var.h>
71 #define DPRINTF(sc, fmt, ...) do { \
72 if (sc->sc_debug > 0) \
73 printf(fmt, __VA_ARGS__); \
75 #define DPRINTFN(sc, n, fmt, ...) do { \
76 if (sc->sc_debug >= (n)) \
77 printf(fmt, __VA_ARGS__); \
80 #define DPRINTF(sc, fmt, ...)
81 #define DPRINTFN(sc, n, fmt, ...)
84 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
85 const char name[IFNAMSIZ], int unit, int opmode,
86 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
87 const uint8_t mac[IEEE80211_ADDR_LEN]);
88 static void rt2661_vap_delete(struct ieee80211vap *);
89 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
91 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
92 struct rt2661_tx_ring *, int);
93 static void rt2661_reset_tx_ring(struct rt2661_softc *,
94 struct rt2661_tx_ring *);
95 static void rt2661_free_tx_ring(struct rt2661_softc *,
96 struct rt2661_tx_ring *);
97 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
98 struct rt2661_rx_ring *, int);
99 static void rt2661_reset_rx_ring(struct rt2661_softc *,
100 struct rt2661_rx_ring *);
101 static void rt2661_free_rx_ring(struct rt2661_softc *,
102 struct rt2661_rx_ring *);
103 static void rt2661_newassoc(struct ieee80211_node *, int);
104 static int rt2661_newstate(struct ieee80211vap *,
105 enum ieee80211_state, int);
106 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
107 static void rt2661_rx_intr(struct rt2661_softc *);
108 static void rt2661_tx_intr(struct rt2661_softc *);
109 static void rt2661_tx_dma_intr(struct rt2661_softc *,
110 struct rt2661_tx_ring *);
111 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
112 static void rt2661_mcu_wakeup(struct rt2661_softc *);
113 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
114 static void rt2661_scan_start(struct ieee80211com *);
115 static void rt2661_scan_end(struct ieee80211com *);
116 static void rt2661_set_channel(struct ieee80211com *);
117 static void rt2661_setup_tx_desc(struct rt2661_softc *,
118 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
119 int, const bus_dma_segment_t *, int, int);
120 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
121 struct ieee80211_node *, int);
122 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
123 struct ieee80211_node *);
124 static void rt2661_start_locked(struct ifnet *);
125 static void rt2661_start(struct ifnet *);
126 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
127 const struct ieee80211_bpf_params *);
128 static void rt2661_watchdog(void *);
129 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t);
130 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
132 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
133 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
135 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
137 static void rt2661_select_antenna(struct rt2661_softc *);
138 static void rt2661_enable_mrr(struct rt2661_softc *);
139 static void rt2661_set_txpreamble(struct rt2661_softc *);
140 static void rt2661_set_basicrates(struct rt2661_softc *,
141 const struct ieee80211_rateset *);
142 static void rt2661_select_band(struct rt2661_softc *,
143 struct ieee80211_channel *);
144 static void rt2661_set_chan(struct rt2661_softc *,
145 struct ieee80211_channel *);
146 static void rt2661_set_bssid(struct rt2661_softc *,
148 static void rt2661_set_macaddr(struct rt2661_softc *,
150 static void rt2661_update_promisc(struct ifnet *);
151 static int rt2661_wme_update(struct ieee80211com *) __unused;
152 static void rt2661_update_slot(struct ifnet *);
153 static const char *rt2661_get_rf(int);
154 static void rt2661_read_eeprom(struct rt2661_softc *,
155 uint8_t macaddr[IEEE80211_ADDR_LEN]);
156 static int rt2661_bbp_init(struct rt2661_softc *);
157 static void rt2661_init_locked(struct rt2661_softc *);
158 static void rt2661_init(void *);
159 static void rt2661_stop_locked(struct rt2661_softc *);
160 static void rt2661_stop(void *);
161 static int rt2661_load_microcode(struct rt2661_softc *);
163 static void rt2661_rx_tune(struct rt2661_softc *);
164 static void rt2661_radar_start(struct rt2661_softc *);
165 static int rt2661_radar_stop(struct rt2661_softc *);
167 static int rt2661_prepare_beacon(struct rt2661_softc *,
168 struct ieee80211vap *);
169 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
170 static void rt2661_enable_tsf(struct rt2661_softc *);
171 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
173 static const struct {
176 } rt2661_def_mac[] = {
180 static const struct {
183 } rt2661_def_bbp[] = {
187 static const struct rfprog {
189 uint32_t r1, r2, r3, r4;
190 } rt2661_rf5225_1[] = {
192 }, rt2661_rf5225_2[] = {
197 rt2661_attach(device_t dev, int id)
199 struct rt2661_softc *sc = device_get_softc(dev);
200 struct ieee80211com *ic;
203 int error, ac, ntries;
205 uint8_t macaddr[IEEE80211_ADDR_LEN];
210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
212 device_printf(sc->sc_dev, "can not if_alloc()\n");
217 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
218 MTX_DEF | MTX_RECURSE);
220 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
222 /* wait for NIC to initialize */
223 for (ntries = 0; ntries < 1000; ntries++) {
224 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
228 if (ntries == 1000) {
229 device_printf(sc->sc_dev,
230 "timeout waiting for NIC to initialize\n");
235 /* retrieve RF rev. no and various other things from EEPROM */
236 rt2661_read_eeprom(sc, macaddr);
238 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
239 rt2661_get_rf(sc->rf_rev));
242 * Allocate Tx and Rx rings.
244 for (ac = 0; ac < 4; ac++) {
245 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
246 RT2661_TX_RING_COUNT);
248 device_printf(sc->sc_dev,
249 "could not allocate Tx ring %d\n", ac);
254 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
256 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
260 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
262 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
267 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
268 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
269 ifp->if_init = rt2661_init;
270 ifp->if_ioctl = rt2661_ioctl;
271 ifp->if_start = rt2661_start;
272 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
273 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
274 IFQ_SET_READY(&ifp->if_snd);
277 ic->ic_opmode = IEEE80211_M_STA;
278 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
280 /* set device capabilities */
282 IEEE80211_C_STA /* station mode */
283 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
284 | IEEE80211_C_HOSTAP /* hostap mode */
285 | IEEE80211_C_MONITOR /* monitor mode */
286 | IEEE80211_C_AHDEMO /* adhoc demo mode */
287 | IEEE80211_C_WDS /* 4-address traffic works */
288 | IEEE80211_C_MBSS /* mesh point link mode */
289 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
290 | IEEE80211_C_SHSLOT /* short slot time supported */
291 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
292 | IEEE80211_C_BGSCAN /* capable of bg scanning */
294 | IEEE80211_C_TXFRAG /* handle tx frags */
295 | IEEE80211_C_WME /* 802.11e */
300 setbit(&bands, IEEE80211_MODE_11B);
301 setbit(&bands, IEEE80211_MODE_11G);
302 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
303 setbit(&bands, IEEE80211_MODE_11A);
304 ieee80211_init_channels(ic, NULL, &bands);
306 ieee80211_ifattach(ic, macaddr);
307 ic->ic_newassoc = rt2661_newassoc;
309 ic->ic_wme.wme_update = rt2661_wme_update;
311 ic->ic_scan_start = rt2661_scan_start;
312 ic->ic_scan_end = rt2661_scan_end;
313 ic->ic_set_channel = rt2661_set_channel;
314 ic->ic_updateslot = rt2661_update_slot;
315 ic->ic_update_promisc = rt2661_update_promisc;
316 ic->ic_raw_xmit = rt2661_raw_xmit;
318 ic->ic_vap_create = rt2661_vap_create;
319 ic->ic_vap_delete = rt2661_vap_delete;
321 ieee80211_radiotap_attach(ic,
322 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
323 RT2661_TX_RADIOTAP_PRESENT,
324 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
325 RT2661_RX_RADIOTAP_PRESENT);
328 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
329 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
330 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
333 ieee80211_announce(ic);
337 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
338 fail2: while (--ac >= 0)
339 rt2661_free_tx_ring(sc, &sc->txq[ac]);
340 fail1: mtx_destroy(&sc->sc_mtx);
346 rt2661_detach(void *xsc)
348 struct rt2661_softc *sc = xsc;
349 struct ifnet *ifp = sc->sc_ifp;
350 struct ieee80211com *ic = ifp->if_l2com;
353 rt2661_stop_locked(sc);
356 ieee80211_ifdetach(ic);
358 rt2661_free_tx_ring(sc, &sc->txq[0]);
359 rt2661_free_tx_ring(sc, &sc->txq[1]);
360 rt2661_free_tx_ring(sc, &sc->txq[2]);
361 rt2661_free_tx_ring(sc, &sc->txq[3]);
362 rt2661_free_tx_ring(sc, &sc->mgtq);
363 rt2661_free_rx_ring(sc, &sc->rxq);
367 mtx_destroy(&sc->sc_mtx);
372 static struct ieee80211vap *
373 rt2661_vap_create(struct ieee80211com *ic,
374 const char name[IFNAMSIZ], int unit, int opmode, int flags,
375 const uint8_t bssid[IEEE80211_ADDR_LEN],
376 const uint8_t mac[IEEE80211_ADDR_LEN])
378 struct ifnet *ifp = ic->ic_ifp;
379 struct rt2661_vap *rvp;
380 struct ieee80211vap *vap;
383 case IEEE80211_M_STA:
384 case IEEE80211_M_IBSS:
385 case IEEE80211_M_AHDEMO:
386 case IEEE80211_M_MONITOR:
387 case IEEE80211_M_HOSTAP:
388 case IEEE80211_M_MBSS:
390 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
391 if_printf(ifp, "only 1 vap supported\n");
394 if (opmode == IEEE80211_M_STA)
395 flags |= IEEE80211_CLONE_NOBEACONS;
397 case IEEE80211_M_WDS:
398 if (TAILQ_EMPTY(&ic->ic_vaps) ||
399 ic->ic_opmode != IEEE80211_M_HOSTAP) {
400 if_printf(ifp, "wds only supported in ap mode\n");
404 * Silently remove any request for a unique
405 * bssid; WDS vap's always share the local
408 flags &= ~IEEE80211_CLONE_BSSID;
411 if_printf(ifp, "unknown opmode %d\n", opmode);
414 rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap),
415 M_80211_VAP, M_NOWAIT | M_ZERO);
419 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
421 /* override state transition machine */
422 rvp->ral_newstate = vap->iv_newstate;
423 vap->iv_newstate = rt2661_newstate;
425 vap->iv_update_beacon = rt2661_beacon_update;
428 ieee80211_ratectl_init(vap);
430 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
431 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
432 ic->ic_opmode = opmode;
437 rt2661_vap_delete(struct ieee80211vap *vap)
439 struct rt2661_vap *rvp = RT2661_VAP(vap);
441 ieee80211_ratectl_deinit(vap);
442 ieee80211_vap_detach(vap);
443 free(rvp, M_80211_VAP);
447 rt2661_shutdown(void *xsc)
449 struct rt2661_softc *sc = xsc;
455 rt2661_suspend(void *xsc)
457 struct rt2661_softc *sc = xsc;
463 rt2661_resume(void *xsc)
465 struct rt2661_softc *sc = xsc;
466 struct ifnet *ifp = sc->sc_ifp;
468 if (ifp->if_flags & IFF_UP)
473 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
478 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
480 *(bus_addr_t *)arg = segs[0].ds_addr;
484 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
491 ring->cur = ring->next = ring->stat = 0;
493 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
494 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
495 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
496 0, NULL, NULL, &ring->desc_dmat);
498 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
502 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
503 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
505 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
509 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
510 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
513 device_printf(sc->sc_dev, "could not load desc DMA map\n");
517 ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
519 if (ring->data == NULL) {
520 device_printf(sc->sc_dev, "could not allocate soft data\n");
525 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
526 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
527 RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
529 device_printf(sc->sc_dev, "could not create data DMA tag\n");
533 for (i = 0; i < count; i++) {
534 error = bus_dmamap_create(ring->data_dmat, 0,
537 device_printf(sc->sc_dev, "could not create DMA map\n");
544 fail: rt2661_free_tx_ring(sc, ring);
549 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
551 struct rt2661_tx_desc *desc;
552 struct rt2661_tx_data *data;
555 for (i = 0; i < ring->count; i++) {
556 desc = &ring->desc[i];
557 data = &ring->data[i];
559 if (data->m != NULL) {
560 bus_dmamap_sync(ring->data_dmat, data->map,
561 BUS_DMASYNC_POSTWRITE);
562 bus_dmamap_unload(ring->data_dmat, data->map);
567 if (data->ni != NULL) {
568 ieee80211_free_node(data->ni);
575 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
578 ring->cur = ring->next = ring->stat = 0;
582 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
584 struct rt2661_tx_data *data;
587 if (ring->desc != NULL) {
588 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
589 BUS_DMASYNC_POSTWRITE);
590 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
591 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
594 if (ring->desc_dmat != NULL)
595 bus_dma_tag_destroy(ring->desc_dmat);
597 if (ring->data != NULL) {
598 for (i = 0; i < ring->count; i++) {
599 data = &ring->data[i];
601 if (data->m != NULL) {
602 bus_dmamap_sync(ring->data_dmat, data->map,
603 BUS_DMASYNC_POSTWRITE);
604 bus_dmamap_unload(ring->data_dmat, data->map);
608 if (data->ni != NULL)
609 ieee80211_free_node(data->ni);
611 if (data->map != NULL)
612 bus_dmamap_destroy(ring->data_dmat, data->map);
615 free(ring->data, M_DEVBUF);
618 if (ring->data_dmat != NULL)
619 bus_dma_tag_destroy(ring->data_dmat);
623 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
626 struct rt2661_rx_desc *desc;
627 struct rt2661_rx_data *data;
632 ring->cur = ring->next = 0;
634 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
635 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
636 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
637 0, NULL, NULL, &ring->desc_dmat);
639 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
643 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
644 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
646 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
650 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
651 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
654 device_printf(sc->sc_dev, "could not load desc DMA map\n");
658 ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
660 if (ring->data == NULL) {
661 device_printf(sc->sc_dev, "could not allocate soft data\n");
667 * Pre-allocate Rx buffers and populate Rx ring.
669 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
670 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
671 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
673 device_printf(sc->sc_dev, "could not create data DMA tag\n");
677 for (i = 0; i < count; i++) {
678 desc = &sc->rxq.desc[i];
679 data = &sc->rxq.data[i];
681 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
683 device_printf(sc->sc_dev, "could not create DMA map\n");
687 data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
688 if (data->m == NULL) {
689 device_printf(sc->sc_dev,
690 "could not allocate rx mbuf\n");
695 error = bus_dmamap_load(ring->data_dmat, data->map,
696 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
699 device_printf(sc->sc_dev,
700 "could not load rx buf DMA map");
704 desc->flags = htole32(RT2661_RX_BUSY);
705 desc->physaddr = htole32(physaddr);
708 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
712 fail: rt2661_free_rx_ring(sc, ring);
717 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
721 for (i = 0; i < ring->count; i++)
722 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
724 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
726 ring->cur = ring->next = 0;
730 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
732 struct rt2661_rx_data *data;
735 if (ring->desc != NULL) {
736 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
737 BUS_DMASYNC_POSTWRITE);
738 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
739 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
742 if (ring->desc_dmat != NULL)
743 bus_dma_tag_destroy(ring->desc_dmat);
745 if (ring->data != NULL) {
746 for (i = 0; i < ring->count; i++) {
747 data = &ring->data[i];
749 if (data->m != NULL) {
750 bus_dmamap_sync(ring->data_dmat, data->map,
751 BUS_DMASYNC_POSTREAD);
752 bus_dmamap_unload(ring->data_dmat, data->map);
756 if (data->map != NULL)
757 bus_dmamap_destroy(ring->data_dmat, data->map);
760 free(ring->data, M_DEVBUF);
763 if (ring->data_dmat != NULL)
764 bus_dma_tag_destroy(ring->data_dmat);
768 rt2661_newassoc(struct ieee80211_node *ni, int isnew)
771 ieee80211_ratectl_node_init(ni);
775 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
777 struct rt2661_vap *rvp = RT2661_VAP(vap);
778 struct ieee80211com *ic = vap->iv_ic;
779 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
782 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
785 /* abort TSF synchronization */
786 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
787 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
790 error = rvp->ral_newstate(vap, nstate, arg);
792 if (error == 0 && nstate == IEEE80211_S_RUN) {
793 struct ieee80211_node *ni = vap->iv_bss;
795 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
796 rt2661_enable_mrr(sc);
797 rt2661_set_txpreamble(sc);
798 rt2661_set_basicrates(sc, &ni->ni_rates);
799 rt2661_set_bssid(sc, ni->ni_bssid);
802 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
803 vap->iv_opmode == IEEE80211_M_IBSS ||
804 vap->iv_opmode == IEEE80211_M_MBSS) {
805 error = rt2661_prepare_beacon(sc, vap);
809 if (vap->iv_opmode != IEEE80211_M_MONITOR)
810 rt2661_enable_tsf_sync(sc);
812 rt2661_enable_tsf(sc);
818 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
822 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
828 /* clock C once before the first command */
829 RT2661_EEPROM_CTL(sc, 0);
831 RT2661_EEPROM_CTL(sc, RT2661_S);
832 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
833 RT2661_EEPROM_CTL(sc, RT2661_S);
835 /* write start bit (1) */
836 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
837 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
839 /* write READ opcode (10) */
840 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
841 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
842 RT2661_EEPROM_CTL(sc, RT2661_S);
843 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
845 /* write address (A5-A0 or A7-A0) */
846 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
847 for (; n >= 0; n--) {
848 RT2661_EEPROM_CTL(sc, RT2661_S |
849 (((addr >> n) & 1) << RT2661_SHIFT_D));
850 RT2661_EEPROM_CTL(sc, RT2661_S |
851 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
854 RT2661_EEPROM_CTL(sc, RT2661_S);
856 /* read data Q15-Q0 */
858 for (n = 15; n >= 0; n--) {
859 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
860 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
861 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
862 RT2661_EEPROM_CTL(sc, RT2661_S);
865 RT2661_EEPROM_CTL(sc, 0);
867 /* clear Chip Select and clock C */
868 RT2661_EEPROM_CTL(sc, RT2661_S);
869 RT2661_EEPROM_CTL(sc, 0);
870 RT2661_EEPROM_CTL(sc, RT2661_C);
876 rt2661_tx_intr(struct rt2661_softc *sc)
878 struct ifnet *ifp = sc->sc_ifp;
879 struct rt2661_tx_ring *txq;
880 struct rt2661_tx_data *data;
883 struct ieee80211vap *vap;
886 struct ieee80211_node *ni;
889 val = RAL_READ(sc, RT2661_STA_CSR4);
890 if (!(val & RT2661_TX_STAT_VALID))
893 /* retrieve the queue in which this frame was sent */
894 qid = RT2661_TX_QID(val);
895 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
897 /* retrieve rate control algorithm context */
898 data = &txq->data[txq->stat];
904 /* if no frame has been sent, ignore */
910 switch (RT2661_TX_RESULT(val)) {
911 case RT2661_TX_SUCCESS:
912 retrycnt = RT2661_TX_RETRYCNT(val);
914 DPRINTFN(sc, 10, "data frame sent successfully after "
915 "%d retries\n", retrycnt);
916 if (data->rix != IEEE80211_FIXED_RATE_NONE)
917 ieee80211_ratectl_tx_complete(vap, ni,
918 IEEE80211_RATECTL_TX_SUCCESS,
923 case RT2661_TX_RETRY_FAIL:
924 retrycnt = RT2661_TX_RETRYCNT(val);
926 DPRINTFN(sc, 9, "%s\n",
927 "sending data frame failed (too much retries)");
928 if (data->rix != IEEE80211_FIXED_RATE_NONE)
929 ieee80211_ratectl_tx_complete(vap, ni,
930 IEEE80211_RATECTL_TX_FAILURE,
937 device_printf(sc->sc_dev,
938 "sending data frame failed 0x%08x\n", val);
942 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
945 if (++txq->stat >= txq->count) /* faster than % count */
948 if (m->m_flags & M_TXCB)
949 ieee80211_process_callback(ni, m,
950 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
952 ieee80211_free_node(ni);
956 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
958 rt2661_start_locked(ifp);
962 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
964 struct rt2661_tx_desc *desc;
965 struct rt2661_tx_data *data;
967 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
970 desc = &txq->desc[txq->next];
971 data = &txq->data[txq->next];
973 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
974 !(le32toh(desc->flags) & RT2661_TX_VALID))
977 bus_dmamap_sync(txq->data_dmat, data->map,
978 BUS_DMASYNC_POSTWRITE);
979 bus_dmamap_unload(txq->data_dmat, data->map);
981 /* descriptor is no longer valid */
982 desc->flags &= ~htole32(RT2661_TX_VALID);
984 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
986 if (++txq->next >= txq->count) /* faster than % count */
990 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
994 rt2661_rx_intr(struct rt2661_softc *sc)
996 struct ifnet *ifp = sc->sc_ifp;
997 struct ieee80211com *ic = ifp->if_l2com;
998 struct rt2661_rx_desc *desc;
999 struct rt2661_rx_data *data;
1000 bus_addr_t physaddr;
1001 struct ieee80211_frame *wh;
1002 struct ieee80211_node *ni;
1003 struct mbuf *mnew, *m;
1006 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1007 BUS_DMASYNC_POSTREAD);
1012 desc = &sc->rxq.desc[sc->rxq.cur];
1013 data = &sc->rxq.data[sc->rxq.cur];
1015 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1018 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1019 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1021 * This should not happen since we did not request
1022 * to receive those frames when we filled TXRX_CSR0.
1024 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1025 le32toh(desc->flags));
1030 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1036 * Try to allocate a new mbuf for this ring element and load it
1037 * before processing the current mbuf. If the ring element
1038 * cannot be loaded, drop the received packet and reuse the old
1039 * mbuf. In the unlikely case that the old mbuf can't be
1040 * reloaded either, explicitly panic.
1042 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1048 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1049 BUS_DMASYNC_POSTREAD);
1050 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1052 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1053 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1058 /* try to reload the old mbuf */
1059 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1060 mtod(data->m, void *), MCLBYTES,
1061 rt2661_dma_map_addr, &physaddr, 0);
1063 /* very unlikely that it will fail... */
1064 panic("%s: could not load old rx mbuf",
1065 device_get_name(sc->sc_dev));
1072 * New mbuf successfully loaded, update Rx ring and continue
1077 desc->physaddr = htole32(physaddr);
1080 m->m_pkthdr.rcvif = ifp;
1081 m->m_pkthdr.len = m->m_len =
1082 (le32toh(desc->flags) >> 16) & 0xfff;
1084 rssi = rt2661_get_rssi(sc, desc->rssi);
1085 /* Error happened during RSSI conversion. */
1087 rssi = -30; /* XXX ignored by net80211 */
1088 nf = RT2661_NOISE_FLOOR;
1090 if (ieee80211_radiotap_active(ic)) {
1091 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1092 uint32_t tsf_lo, tsf_hi;
1094 /* get timestamp (low and high 32 bits) */
1095 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1096 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1099 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1101 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1102 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1103 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1104 tap->wr_antsignal = nf + rssi;
1105 tap->wr_antnoise = nf;
1107 sc->sc_flags |= RAL_INPUT_RUNNING;
1109 wh = mtod(m, struct ieee80211_frame *);
1111 /* send the frame to the 802.11 layer */
1112 ni = ieee80211_find_rxnode(ic,
1113 (struct ieee80211_frame_min *)wh);
1115 (void) ieee80211_input(ni, m, rssi, nf);
1116 ieee80211_free_node(ni);
1118 (void) ieee80211_input_all(ic, m, rssi, nf);
1121 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1123 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1125 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1127 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1130 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1131 BUS_DMASYNC_PREWRITE);
1136 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1142 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1144 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1146 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1147 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1148 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1150 /* send wakeup command to MCU */
1151 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1155 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1157 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1158 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1162 rt2661_intr(void *arg)
1164 struct rt2661_softc *sc = arg;
1165 struct ifnet *ifp = sc->sc_ifp;
1170 /* disable MAC and MCU interrupts */
1171 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1172 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1174 /* don't re-enable interrupts if we're shutting down */
1175 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1180 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1181 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1183 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1184 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1186 if (r1 & RT2661_MGT_DONE)
1187 rt2661_tx_dma_intr(sc, &sc->mgtq);
1189 if (r1 & RT2661_RX_DONE)
1192 if (r1 & RT2661_TX0_DMA_DONE)
1193 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1195 if (r1 & RT2661_TX1_DMA_DONE)
1196 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1198 if (r1 & RT2661_TX2_DMA_DONE)
1199 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1201 if (r1 & RT2661_TX3_DMA_DONE)
1202 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1204 if (r1 & RT2661_TX_DONE)
1207 if (r2 & RT2661_MCU_CMD_DONE)
1208 rt2661_mcu_cmd_intr(sc);
1210 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1211 rt2661_mcu_beacon_expire(sc);
1213 if (r2 & RT2661_MCU_WAKEUP)
1214 rt2661_mcu_wakeup(sc);
1216 /* re-enable MAC and MCU interrupts */
1217 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1218 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1224 rt2661_plcp_signal(int rate)
1227 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1228 case 12: return 0xb;
1229 case 18: return 0xf;
1230 case 24: return 0xa;
1231 case 36: return 0xe;
1232 case 48: return 0x9;
1233 case 72: return 0xd;
1234 case 96: return 0x8;
1235 case 108: return 0xc;
1237 /* CCK rates (NB: not IEEE std, device-specific) */
1240 case 11: return 0x2;
1241 case 22: return 0x3;
1243 return 0xff; /* XXX unsupported/unknown rate */
1247 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1248 uint32_t flags, uint16_t xflags, int len, int rate,
1249 const bus_dma_segment_t *segs, int nsegs, int ac)
1251 struct ifnet *ifp = sc->sc_ifp;
1252 struct ieee80211com *ic = ifp->if_l2com;
1253 uint16_t plcp_length;
1256 desc->flags = htole32(flags);
1257 desc->flags |= htole32(len << 16);
1258 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1260 desc->xflags = htole16(xflags);
1261 desc->xflags |= htole16(nsegs << 13);
1263 desc->wme = htole16(
1266 RT2661_LOGCWMIN(4) |
1267 RT2661_LOGCWMAX(10));
1270 * Remember in which queue this frame was sent. This field is driver
1271 * private data only. It will be made available by the NIC in STA_CSR4
1276 /* setup PLCP fields */
1277 desc->plcp_signal = rt2661_plcp_signal(rate);
1278 desc->plcp_service = 4;
1280 len += IEEE80211_CRC_LEN;
1281 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1282 desc->flags |= htole32(RT2661_TX_OFDM);
1284 plcp_length = len & 0xfff;
1285 desc->plcp_length_hi = plcp_length >> 6;
1286 desc->plcp_length_lo = plcp_length & 0x3f;
1288 plcp_length = (16 * len + rate - 1) / rate;
1290 remainder = (16 * len) % 22;
1291 if (remainder != 0 && remainder < 7)
1292 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1294 desc->plcp_length_hi = plcp_length >> 8;
1295 desc->plcp_length_lo = plcp_length & 0xff;
1297 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1298 desc->plcp_signal |= 0x08;
1301 /* RT2x61 supports scatter with up to 5 segments */
1302 for (i = 0; i < nsegs; i++) {
1303 desc->addr[i] = htole32(segs[i].ds_addr);
1304 desc->len [i] = htole16(segs[i].ds_len);
1309 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1310 struct ieee80211_node *ni)
1312 struct ieee80211vap *vap = ni->ni_vap;
1313 struct ieee80211com *ic = ni->ni_ic;
1314 struct rt2661_tx_desc *desc;
1315 struct rt2661_tx_data *data;
1316 struct ieee80211_frame *wh;
1317 struct ieee80211_key *k;
1318 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1320 uint32_t flags = 0; /* XXX HWSEQ */
1321 int nsegs, rate, error;
1323 desc = &sc->mgtq.desc[sc->mgtq.cur];
1324 data = &sc->mgtq.data[sc->mgtq.cur];
1326 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1328 wh = mtod(m0, struct ieee80211_frame *);
1330 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1331 k = ieee80211_crypto_encap(ni, m0);
1338 error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1341 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1347 if (ieee80211_radiotap_active_vap(vap)) {
1348 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1351 tap->wt_rate = rate;
1353 ieee80211_radiotap_tx(vap, m0);
1358 /* management frames are not taken into account for amrr */
1359 data->rix = IEEE80211_FIXED_RATE_NONE;
1361 wh = mtod(m0, struct ieee80211_frame *);
1363 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1364 flags |= RT2661_TX_NEED_ACK;
1366 dur = ieee80211_ack_duration(ic->ic_rt,
1367 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1368 *(uint16_t *)wh->i_dur = htole16(dur);
1370 /* tell hardware to add timestamp in probe responses */
1372 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1373 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1374 flags |= RT2661_TX_TIMESTAMP;
1377 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1378 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1380 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1381 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1382 BUS_DMASYNC_PREWRITE);
1384 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1385 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1389 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1390 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1396 rt2661_sendprot(struct rt2661_softc *sc, int ac,
1397 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1399 struct ieee80211com *ic = ni->ni_ic;
1400 struct rt2661_tx_ring *txq = &sc->txq[ac];
1401 const struct ieee80211_frame *wh;
1402 struct rt2661_tx_desc *desc;
1403 struct rt2661_tx_data *data;
1405 int protrate, ackrate, pktlen, flags, isshort, error;
1407 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1410 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1411 ("protection %d", prot));
1413 wh = mtod(m, const struct ieee80211_frame *);
1414 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1416 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1417 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1419 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1420 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1421 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1422 flags = RT2661_TX_MORE_FRAG;
1423 if (prot == IEEE80211_PROT_RTSCTS) {
1424 /* NB: CTS is the same size as an ACK */
1425 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1426 flags |= RT2661_TX_NEED_ACK;
1427 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1429 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1431 if (mprot == NULL) {
1432 /* XXX stat + msg */
1436 data = &txq->data[txq->cur];
1437 desc = &txq->desc[txq->cur];
1439 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1442 device_printf(sc->sc_dev,
1443 "could not map mbuf (error %d)\n", error);
1449 data->ni = ieee80211_ref_node(ni);
1450 /* ctl frames are not taken into account for amrr */
1451 data->rix = IEEE80211_FIXED_RATE_NONE;
1453 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1454 protrate, segs, 1, ac);
1456 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1457 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1460 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1466 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1467 struct ieee80211_node *ni, int ac)
1469 struct ieee80211vap *vap = ni->ni_vap;
1470 struct ifnet *ifp = sc->sc_ifp;
1471 struct ieee80211com *ic = ifp->if_l2com;
1472 struct rt2661_tx_ring *txq = &sc->txq[ac];
1473 struct rt2661_tx_desc *desc;
1474 struct rt2661_tx_data *data;
1475 struct ieee80211_frame *wh;
1476 const struct ieee80211_txparam *tp;
1477 struct ieee80211_key *k;
1478 const struct chanAccParams *cap;
1480 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1483 int error, nsegs, rate, noack = 0;
1485 wh = mtod(m0, struct ieee80211_frame *);
1487 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1488 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1489 rate = tp->mcastrate;
1490 } else if (m0->m_flags & M_EAPOL) {
1491 rate = tp->mgmtrate;
1492 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1493 rate = tp->ucastrate;
1495 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1496 rate = ni->ni_txrate;
1498 rate &= IEEE80211_RATE_VAL;
1500 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1501 cap = &ic->ic_wme.wme_chanParams;
1502 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1505 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1506 k = ieee80211_crypto_encap(ni, m0);
1512 /* packet header may have moved, reset our local pointer */
1513 wh = mtod(m0, struct ieee80211_frame *);
1517 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1518 int prot = IEEE80211_PROT_NONE;
1519 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1520 prot = IEEE80211_PROT_RTSCTS;
1521 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1522 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1523 prot = ic->ic_protmode;
1524 if (prot != IEEE80211_PROT_NONE) {
1525 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1530 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1534 data = &txq->data[txq->cur];
1535 desc = &txq->desc[txq->cur];
1537 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1539 if (error != 0 && error != EFBIG) {
1540 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1546 mnew = m_defrag(m0, M_DONTWAIT);
1548 device_printf(sc->sc_dev,
1549 "could not defragment mbuf\n");
1555 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1558 device_printf(sc->sc_dev,
1559 "could not map mbuf (error %d)\n", error);
1564 /* packet header have moved, reset our local pointer */
1565 wh = mtod(m0, struct ieee80211_frame *);
1568 if (ieee80211_radiotap_active_vap(vap)) {
1569 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1572 tap->wt_rate = rate;
1574 ieee80211_radiotap_tx(vap, m0);
1580 /* remember link conditions for rate adaptation algorithm */
1581 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1582 data->rix = ni->ni_txrate;
1583 /* XXX probably need last rssi value and not avg */
1584 data->rssi = ic->ic_node_getrssi(ni);
1586 data->rix = IEEE80211_FIXED_RATE_NONE;
1588 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1589 flags |= RT2661_TX_NEED_ACK;
1591 dur = ieee80211_ack_duration(ic->ic_rt,
1592 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1593 *(uint16_t *)wh->i_dur = htole16(dur);
1596 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1599 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1600 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1602 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1603 m0->m_pkthdr.len, txq->cur, rate);
1607 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1608 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1614 rt2661_start_locked(struct ifnet *ifp)
1616 struct rt2661_softc *sc = ifp->if_softc;
1618 struct ieee80211_node *ni;
1621 RAL_LOCK_ASSERT(sc);
1623 /* prevent management frames from being sent if we're not ready */
1624 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid)
1628 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1632 ac = M_WME_GETAC(m);
1633 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1634 /* there is no place left in this ring */
1635 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1636 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1639 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1640 if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1641 ieee80211_free_node(ni);
1646 sc->sc_tx_timer = 5;
1651 rt2661_start(struct ifnet *ifp)
1653 struct rt2661_softc *sc = ifp->if_softc;
1656 rt2661_start_locked(ifp);
1661 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1662 const struct ieee80211_bpf_params *params)
1664 struct ieee80211com *ic = ni->ni_ic;
1665 struct ifnet *ifp = ic->ic_ifp;
1666 struct rt2661_softc *sc = ifp->if_softc;
1670 /* prevent management frames from being sent if we're not ready */
1671 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1674 ieee80211_free_node(ni);
1677 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1678 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1681 ieee80211_free_node(ni);
1682 return ENOBUFS; /* XXX */
1688 * Legacy path; interpret frame contents to decide
1689 * precisely how to send the frame.
1692 if (rt2661_tx_mgt(sc, m, ni) != 0)
1694 sc->sc_tx_timer = 5;
1701 ieee80211_free_node(ni);
1703 return EIO; /* XXX */
1707 rt2661_watchdog(void *arg)
1709 struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1710 struct ifnet *ifp = sc->sc_ifp;
1712 RAL_LOCK_ASSERT(sc);
1714 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
1716 if (sc->sc_invalid) /* card ejected */
1719 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1720 if_printf(ifp, "device timeout\n");
1721 rt2661_init_locked(sc);
1723 /* NB: callout is reset in rt2661_init() */
1726 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1730 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1732 struct rt2661_softc *sc = ifp->if_softc;
1733 struct ieee80211com *ic = ifp->if_l2com;
1734 struct ifreq *ifr = (struct ifreq *) data;
1735 int error = 0, startall = 0;
1740 if (ifp->if_flags & IFF_UP) {
1741 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1742 rt2661_init_locked(sc);
1745 rt2661_update_promisc(ifp);
1747 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1748 rt2661_stop_locked(sc);
1752 ieee80211_start_all(ic);
1755 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1758 error = ether_ioctl(ifp, cmd, data);
1768 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1773 for (ntries = 0; ntries < 100; ntries++) {
1774 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1778 if (ntries == 100) {
1779 device_printf(sc->sc_dev, "could not write to BBP\n");
1783 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1784 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1786 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1790 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1795 for (ntries = 0; ntries < 100; ntries++) {
1796 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1800 if (ntries == 100) {
1801 device_printf(sc->sc_dev, "could not read from BBP\n");
1805 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1806 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1808 for (ntries = 0; ntries < 100; ntries++) {
1809 val = RAL_READ(sc, RT2661_PHY_CSR3);
1810 if (!(val & RT2661_BBP_BUSY))
1815 device_printf(sc->sc_dev, "could not read from BBP\n");
1820 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1825 for (ntries = 0; ntries < 100; ntries++) {
1826 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1830 if (ntries == 100) {
1831 device_printf(sc->sc_dev, "could not write to RF\n");
1835 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1837 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1839 /* remember last written value in sc */
1840 sc->rf_regs[reg] = val;
1842 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1846 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1848 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1849 return EIO; /* there is already a command pending */
1851 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1852 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1854 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1860 rt2661_select_antenna(struct rt2661_softc *sc)
1862 uint8_t bbp4, bbp77;
1865 bbp4 = rt2661_bbp_read(sc, 4);
1866 bbp77 = rt2661_bbp_read(sc, 77);
1870 /* make sure Rx is disabled before switching antenna */
1871 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1872 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1874 rt2661_bbp_write(sc, 4, bbp4);
1875 rt2661_bbp_write(sc, 77, bbp77);
1877 /* restore Rx filter */
1878 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1882 * Enable multi-rate retries for frames sent at OFDM rates.
1883 * In 802.11b/g mode, allow fallback to CCK rates.
1886 rt2661_enable_mrr(struct rt2661_softc *sc)
1888 struct ifnet *ifp = sc->sc_ifp;
1889 struct ieee80211com *ic = ifp->if_l2com;
1892 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1894 tmp &= ~RT2661_MRR_CCK_FALLBACK;
1895 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1896 tmp |= RT2661_MRR_CCK_FALLBACK;
1897 tmp |= RT2661_MRR_ENABLED;
1899 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1903 rt2661_set_txpreamble(struct rt2661_softc *sc)
1905 struct ifnet *ifp = sc->sc_ifp;
1906 struct ieee80211com *ic = ifp->if_l2com;
1909 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1911 tmp &= ~RT2661_SHORT_PREAMBLE;
1912 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1913 tmp |= RT2661_SHORT_PREAMBLE;
1915 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1919 rt2661_set_basicrates(struct rt2661_softc *sc,
1920 const struct ieee80211_rateset *rs)
1922 #define RV(r) ((r) & IEEE80211_RATE_VAL)
1923 struct ifnet *ifp = sc->sc_ifp;
1924 struct ieee80211com *ic = ifp->if_l2com;
1929 for (i = 0; i < rs->rs_nrates; i++) {
1930 rate = rs->rs_rates[i];
1932 if (!(rate & IEEE80211_RATE_BASIC))
1936 * Find h/w rate index. We know it exists because the rate
1937 * set has already been negotiated.
1939 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
1944 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1946 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1951 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
1955 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1957 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1960 /* update all BBP registers that depend on the band */
1961 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1962 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
1963 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1964 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1965 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
1967 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1968 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1969 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1972 rt2661_bbp_write(sc, 17, bbp17);
1973 rt2661_bbp_write(sc, 96, bbp96);
1974 rt2661_bbp_write(sc, 104, bbp104);
1976 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1977 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1978 rt2661_bbp_write(sc, 75, 0x80);
1979 rt2661_bbp_write(sc, 86, 0x80);
1980 rt2661_bbp_write(sc, 88, 0x80);
1983 rt2661_bbp_write(sc, 35, bbp35);
1984 rt2661_bbp_write(sc, 97, bbp97);
1985 rt2661_bbp_write(sc, 98, bbp98);
1987 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1988 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1989 if (IEEE80211_IS_CHAN_2GHZ(c))
1990 tmp |= RT2661_PA_PE_2GHZ;
1992 tmp |= RT2661_PA_PE_5GHZ;
1993 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1997 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1999 struct ifnet *ifp = sc->sc_ifp;
2000 struct ieee80211com *ic = ifp->if_l2com;
2001 const struct rfprog *rfprog;
2002 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2006 chan = ieee80211_chan2ieee(ic, c);
2007 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2009 /* select the appropriate RF settings based on what EEPROM says */
2010 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2012 /* find the settings for this channel (we know it exists) */
2013 for (i = 0; rfprog[i].chan != chan; i++);
2015 power = sc->txpow[i];
2019 } else if (power > 31) {
2020 bbp94 += power - 31;
2025 * If we are switching from the 2GHz band to the 5GHz band or
2026 * vice-versa, BBP registers need to be reprogrammed.
2028 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2029 rt2661_select_band(sc, c);
2030 rt2661_select_antenna(sc);
2034 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2035 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2036 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2037 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2041 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2042 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2043 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2044 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2048 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2049 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2050 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2051 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2053 /* enable smart mode for MIMO-capable RFs */
2054 bbp3 = rt2661_bbp_read(sc, 3);
2056 bbp3 &= ~RT2661_SMART_MODE;
2057 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2058 bbp3 |= RT2661_SMART_MODE;
2060 rt2661_bbp_write(sc, 3, bbp3);
2062 if (bbp94 != RT2661_BBPR94_DEFAULT)
2063 rt2661_bbp_write(sc, 94, bbp94);
2065 /* 5GHz radio needs a 1ms delay here */
2066 if (IEEE80211_IS_CHAN_5GHZ(c))
2071 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2075 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2076 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2078 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2079 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2083 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2087 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2088 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2090 tmp = addr[4] | addr[5] << 8;
2091 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2095 rt2661_update_promisc(struct ifnet *ifp)
2097 struct rt2661_softc *sc = ifp->if_softc;
2100 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2102 tmp &= ~RT2661_DROP_NOT_TO_ME;
2103 if (!(ifp->if_flags & IFF_PROMISC))
2104 tmp |= RT2661_DROP_NOT_TO_ME;
2106 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2108 DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2109 "entering" : "leaving");
2113 * Update QoS (802.11e) settings for each h/w Tx ring.
2116 rt2661_wme_update(struct ieee80211com *ic)
2118 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2119 const struct wmeParams *wmep;
2121 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2123 /* XXX: not sure about shifts. */
2124 /* XXX: the reference driver plays with AC_VI settings too. */
2127 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2128 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2129 wmep[WME_AC_BK].wmep_txopLimit);
2130 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2131 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2132 wmep[WME_AC_VO].wmep_txopLimit);
2135 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2136 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2137 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2138 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2139 wmep[WME_AC_VO].wmep_logcwmin);
2142 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2143 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2144 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2145 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2146 wmep[WME_AC_VO].wmep_logcwmax);
2149 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2150 wmep[WME_AC_BE].wmep_aifsn << 12 |
2151 wmep[WME_AC_BK].wmep_aifsn << 8 |
2152 wmep[WME_AC_VI].wmep_aifsn << 4 |
2153 wmep[WME_AC_VO].wmep_aifsn);
2159 rt2661_update_slot(struct ifnet *ifp)
2161 struct rt2661_softc *sc = ifp->if_softc;
2162 struct ieee80211com *ic = ifp->if_l2com;
2166 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2168 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2169 tmp = (tmp & ~0xff) | slottime;
2170 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2174 rt2661_get_rf(int rev)
2177 case RT2661_RF_5225: return "RT5225";
2178 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2179 case RT2661_RF_2527: return "RT2527";
2180 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2181 default: return "unknown";
2186 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2191 /* read MAC address */
2192 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2193 macaddr[0] = val & 0xff;
2194 macaddr[1] = val >> 8;
2196 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2197 macaddr[2] = val & 0xff;
2198 macaddr[3] = val >> 8;
2200 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2201 macaddr[4] = val & 0xff;
2202 macaddr[5] = val >> 8;
2204 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2205 /* XXX: test if different from 0xffff? */
2206 sc->rf_rev = (val >> 11) & 0x1f;
2207 sc->hw_radio = (val >> 10) & 0x1;
2208 sc->rx_ant = (val >> 4) & 0x3;
2209 sc->tx_ant = (val >> 2) & 0x3;
2210 sc->nb_ant = val & 0x3;
2212 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2214 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2215 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2216 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2218 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2219 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2221 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2222 if ((val & 0xff) != 0xff)
2223 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2225 /* Only [-10, 10] is valid */
2226 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2227 sc->rssi_2ghz_corr = 0;
2229 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2230 if ((val & 0xff) != 0xff)
2231 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2233 /* Only [-10, 10] is valid */
2234 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2235 sc->rssi_5ghz_corr = 0;
2237 /* adjust RSSI correction for external low-noise amplifier */
2238 if (sc->ext_2ghz_lna)
2239 sc->rssi_2ghz_corr -= 14;
2240 if (sc->ext_5ghz_lna)
2241 sc->rssi_5ghz_corr -= 14;
2243 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2244 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2246 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2247 if ((val >> 8) != 0xff)
2248 sc->rfprog = (val >> 8) & 0x3;
2249 if ((val & 0xff) != 0xff)
2250 sc->rffreq = val & 0xff;
2252 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2254 /* read Tx power for all a/b/g channels */
2255 for (i = 0; i < 19; i++) {
2256 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2257 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2258 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2259 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2260 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2261 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2262 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2265 /* read vendor-specific BBP values */
2266 for (i = 0; i < 16; i++) {
2267 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2268 if (val == 0 || val == 0xffff)
2269 continue; /* skip invalid entries */
2270 sc->bbp_prom[i].reg = val >> 8;
2271 sc->bbp_prom[i].val = val & 0xff;
2272 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2273 sc->bbp_prom[i].val);
2278 rt2661_bbp_init(struct rt2661_softc *sc)
2280 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2284 /* wait for BBP to be ready */
2285 for (ntries = 0; ntries < 100; ntries++) {
2286 val = rt2661_bbp_read(sc, 0);
2287 if (val != 0 && val != 0xff)
2291 if (ntries == 100) {
2292 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2296 /* initialize BBP registers to default values */
2297 for (i = 0; i < N(rt2661_def_bbp); i++) {
2298 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2299 rt2661_def_bbp[i].val);
2302 /* write vendor-specific BBP values (from EEPROM) */
2303 for (i = 0; i < 16; i++) {
2304 if (sc->bbp_prom[i].reg == 0)
2306 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2314 rt2661_init_locked(struct rt2661_softc *sc)
2316 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2317 struct ifnet *ifp = sc->sc_ifp;
2318 struct ieee80211com *ic = ifp->if_l2com;
2319 uint32_t tmp, sta[3];
2320 int i, error, ntries;
2322 RAL_LOCK_ASSERT(sc);
2324 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2325 error = rt2661_load_microcode(sc);
2328 "%s: could not load 8051 microcode, error %d\n",
2332 sc->sc_flags |= RAL_FW_LOADED;
2335 rt2661_stop_locked(sc);
2337 /* initialize Tx rings */
2338 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2339 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2340 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2341 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2343 /* initialize Mgt ring */
2344 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2346 /* initialize Rx ring */
2347 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2349 /* initialize Tx rings sizes */
2350 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2351 RT2661_TX_RING_COUNT << 24 |
2352 RT2661_TX_RING_COUNT << 16 |
2353 RT2661_TX_RING_COUNT << 8 |
2354 RT2661_TX_RING_COUNT);
2356 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2357 RT2661_TX_DESC_WSIZE << 16 |
2358 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2359 RT2661_MGT_RING_COUNT);
2361 /* initialize Rx rings */
2362 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2363 RT2661_RX_DESC_BACK << 16 |
2364 RT2661_RX_DESC_WSIZE << 8 |
2365 RT2661_RX_RING_COUNT);
2367 /* XXX: some magic here */
2368 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2370 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2371 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2373 /* load base address of Rx ring */
2374 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2376 /* initialize MAC registers to default values */
2377 for (i = 0; i < N(rt2661_def_mac); i++)
2378 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2380 rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2382 /* set host ready */
2383 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2384 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2386 /* wait for BBP/RF to wakeup */
2387 for (ntries = 0; ntries < 1000; ntries++) {
2388 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2392 if (ntries == 1000) {
2393 printf("timeout waiting for BBP/RF to wakeup\n");
2394 rt2661_stop_locked(sc);
2398 if (rt2661_bbp_init(sc) != 0) {
2399 rt2661_stop_locked(sc);
2403 /* select default channel */
2404 sc->sc_curchan = ic->ic_curchan;
2405 rt2661_select_band(sc, sc->sc_curchan);
2406 rt2661_select_antenna(sc);
2407 rt2661_set_chan(sc, sc->sc_curchan);
2409 /* update Rx filter */
2410 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2412 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2413 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2414 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2416 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2417 ic->ic_opmode != IEEE80211_M_MBSS)
2418 tmp |= RT2661_DROP_TODS;
2419 if (!(ifp->if_flags & IFF_PROMISC))
2420 tmp |= RT2661_DROP_NOT_TO_ME;
2423 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2425 /* clear STA registers */
2426 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2428 /* initialize ASIC */
2429 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2431 /* clear any pending interrupt */
2432 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2434 /* enable interrupts */
2435 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2436 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2439 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2441 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2442 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2444 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2449 rt2661_init(void *priv)
2451 struct rt2661_softc *sc = priv;
2452 struct ifnet *ifp = sc->sc_ifp;
2453 struct ieee80211com *ic = ifp->if_l2com;
2456 rt2661_init_locked(sc);
2459 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2460 ieee80211_start_all(ic); /* start all vap's */
2464 rt2661_stop_locked(struct rt2661_softc *sc)
2466 struct ifnet *ifp = sc->sc_ifp;
2468 volatile int *flags = &sc->sc_flags;
2470 while (*flags & RAL_INPUT_RUNNING)
2471 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2473 callout_stop(&sc->watchdog_ch);
2474 sc->sc_tx_timer = 0;
2476 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2477 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2479 /* abort Tx (for all 5 Tx rings) */
2480 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2482 /* disable Rx (value remains after reset!) */
2483 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2484 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2487 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2488 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2490 /* disable interrupts */
2491 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2492 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2494 /* clear any pending interrupt */
2495 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2496 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2498 /* reset Tx and Rx rings */
2499 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2500 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2501 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2502 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2503 rt2661_reset_tx_ring(sc, &sc->mgtq);
2504 rt2661_reset_rx_ring(sc, &sc->rxq);
2509 rt2661_stop(void *priv)
2511 struct rt2661_softc *sc = priv;
2514 rt2661_stop_locked(sc);
2519 rt2661_load_microcode(struct rt2661_softc *sc)
2521 struct ifnet *ifp = sc->sc_ifp;
2522 const struct firmware *fp;
2523 const char *imagename;
2526 RAL_LOCK_ASSERT(sc);
2528 switch (sc->sc_id) {
2529 case 0x0301: imagename = "rt2561sfw"; break;
2530 case 0x0302: imagename = "rt2561fw"; break;
2531 case 0x0401: imagename = "rt2661fw"; break;
2533 if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2534 "don't know how to retrieve firmware\n",
2535 __func__, sc->sc_id);
2539 fp = firmware_get(imagename);
2542 if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2543 __func__, imagename);
2548 * Load 8051 microcode into NIC.
2551 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2553 /* cancel any pending Host to MCU command */
2554 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2555 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2556 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2558 /* write 8051's microcode */
2559 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2560 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2561 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2563 /* kick 8051's ass */
2564 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2566 /* wait for 8051 to initialize */
2567 for (ntries = 0; ntries < 500; ntries++) {
2568 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2572 if (ntries == 500) {
2573 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2579 firmware_put(fp, FIRMWARE_UNLOAD);
2585 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2586 * false CCA count. This function is called periodically (every seconds) when
2587 * in the RUN state. Values taken from the reference driver.
2590 rt2661_rx_tune(struct rt2661_softc *sc)
2597 * Tuning range depends on operating band and on the presence of an
2598 * external low-noise amplifier.
2601 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2603 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2604 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2608 /* retrieve false CCA count since last call (clear on read) */
2609 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2613 } else if (dbm >= -58) {
2615 } else if (dbm >= -66) {
2617 } else if (dbm >= -74) {
2620 /* RSSI < -74dBm, tune using false CCA count */
2622 bbp17 = sc->bbp17; /* current value */
2624 hi -= 2 * (-74 - dbm);
2631 } else if (cca > 512) {
2634 } else if (cca < 100) {
2640 if (bbp17 != sc->bbp17) {
2641 rt2661_bbp_write(sc, 17, bbp17);
2647 * Enter/Leave radar detection mode.
2648 * This is for 802.11h additional regulatory domains.
2651 rt2661_radar_start(struct rt2661_softc *sc)
2656 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2657 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2659 rt2661_bbp_write(sc, 82, 0x20);
2660 rt2661_bbp_write(sc, 83, 0x00);
2661 rt2661_bbp_write(sc, 84, 0x40);
2663 /* save current BBP registers values */
2664 sc->bbp18 = rt2661_bbp_read(sc, 18);
2665 sc->bbp21 = rt2661_bbp_read(sc, 21);
2666 sc->bbp22 = rt2661_bbp_read(sc, 22);
2667 sc->bbp16 = rt2661_bbp_read(sc, 16);
2668 sc->bbp17 = rt2661_bbp_read(sc, 17);
2669 sc->bbp64 = rt2661_bbp_read(sc, 64);
2671 rt2661_bbp_write(sc, 18, 0xff);
2672 rt2661_bbp_write(sc, 21, 0x3f);
2673 rt2661_bbp_write(sc, 22, 0x3f);
2674 rt2661_bbp_write(sc, 16, 0xbd);
2675 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2676 rt2661_bbp_write(sc, 64, 0x21);
2678 /* restore Rx filter */
2679 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2683 rt2661_radar_stop(struct rt2661_softc *sc)
2687 /* read radar detection result */
2688 bbp66 = rt2661_bbp_read(sc, 66);
2690 /* restore BBP registers values */
2691 rt2661_bbp_write(sc, 16, sc->bbp16);
2692 rt2661_bbp_write(sc, 17, sc->bbp17);
2693 rt2661_bbp_write(sc, 18, sc->bbp18);
2694 rt2661_bbp_write(sc, 21, sc->bbp21);
2695 rt2661_bbp_write(sc, 22, sc->bbp22);
2696 rt2661_bbp_write(sc, 64, sc->bbp64);
2703 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2705 struct ieee80211com *ic = vap->iv_ic;
2706 struct ieee80211_beacon_offsets bo;
2707 struct rt2661_tx_desc desc;
2711 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2713 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2717 /* send beacons at the lowest available rate */
2718 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2720 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2721 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2723 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2724 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2726 /* copy beacon header and payload into NIC memory */
2727 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2728 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2736 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2737 * and HostAP operating modes.
2740 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2742 struct ifnet *ifp = sc->sc_ifp;
2743 struct ieee80211com *ic = ifp->if_l2com;
2744 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2747 if (vap->iv_opmode != IEEE80211_M_STA) {
2749 * Change default 16ms TBTT adjustment to 8ms.
2750 * Must be done before enabling beacon generation.
2752 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2755 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2757 /* set beacon interval (in 1/16ms unit) */
2758 tmp |= vap->iv_bss->ni_intval * 16;
2760 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2761 if (vap->iv_opmode == IEEE80211_M_STA)
2762 tmp |= RT2661_TSF_MODE(1);
2764 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2766 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2770 rt2661_enable_tsf(struct rt2661_softc *sc)
2772 RAL_WRITE(sc, RT2661_TXRX_CSR9,
2773 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2774 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2778 * Retrieve the "Received Signal Strength Indicator" from the raw values
2779 * contained in Rx descriptors. The computation depends on which band the
2780 * frame was received. Correction values taken from the reference driver.
2783 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2787 lna = (raw >> 5) & 0x3;
2792 * No mapping available.
2794 * NB: Since RSSI is relative to noise floor, -1 is
2795 * adequate for caller to know error happened.
2800 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2802 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2803 rssi += sc->rssi_2ghz_corr;
2812 rssi += sc->rssi_5ghz_corr;
2825 rt2661_scan_start(struct ieee80211com *ic)
2827 struct ifnet *ifp = ic->ic_ifp;
2828 struct rt2661_softc *sc = ifp->if_softc;
2831 /* abort TSF synchronization */
2832 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2833 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2834 rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2838 rt2661_scan_end(struct ieee80211com *ic)
2840 struct ifnet *ifp = ic->ic_ifp;
2841 struct rt2661_softc *sc = ifp->if_softc;
2842 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2844 rt2661_enable_tsf_sync(sc);
2845 /* XXX keep local copy */
2846 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2850 rt2661_set_channel(struct ieee80211com *ic)
2852 struct ifnet *ifp = ic->ic_ifp;
2853 struct rt2661_softc *sc = ifp->if_softc;
2856 rt2661_set_chan(sc, ic->ic_curchan);