sys/dev/sound/pci/hda/hda_reg.h

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef _HDA_REG_H_
  30 #define _HDA_REG_H_
  31
  32 /****************************************************************************
  33  * HDA Device Verbs
  34  ****************************************************************************/
  35
  36 /* HDA Command */
  37 #define HDA_CMD_VERB_MASK                               0x000fffff
  38 #define HDA_CMD_VERB_SHIFT                              0
  39 #define HDA_CMD_NID_MASK                                0x0ff00000
  40 #define HDA_CMD_NID_SHIFT                               20
  41 #define HDA_CMD_CAD_MASK                                0xf0000000
  42 #define HDA_CMD_CAD_SHIFT                               28
  43
  44 #define HDA_CMD_VERB_4BIT_SHIFT                         16
  45 #define HDA_CMD_VERB_12BIT_SHIFT                        8
  46
  47 #define HDA_CMD_VERB_4BIT(verb, payload)                                \
  48     (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload))
  49 #define HDA_CMD_4BIT(cad, nid, verb, payload)                           \
  50     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  51     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  52     (HDA_CMD_VERB_4BIT((verb), (payload))))
  53
  54 #define HDA_CMD_VERB_12BIT(verb, payload)                               \
  55     (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload))
  56 #define HDA_CMD_12BIT(cad, nid, verb, payload)                          \
  57     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  58     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  59     (HDA_CMD_VERB_12BIT((verb), (payload))))
  60
  61 /* Get Parameter */
  62 #define HDA_CMD_VERB_GET_PARAMETER                      0xf00
  63
  64 #define HDA_CMD_GET_PARAMETER(cad, nid, payload)                        \
  65     (HDA_CMD_12BIT((cad), (nid),                                        \
  66     HDA_CMD_VERB_GET_PARAMETER, (payload)))
  67
  68 /* Connection Select Control */
  69 #define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL            0xf01
  70 #define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL            0x701
  71
  72 #define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid)                       \
  73     (HDA_CMD_12BIT((cad), (nid),                                        \
  74     HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0))
  75 #define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload)        \
  76     (HDA_CMD_12BIT((cad), (nid),                                        \
  77     HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, (payload)))
  78
  79 /* Connection List Entry */
  80 #define HDA_CMD_VERB_GET_CONN_LIST_ENTRY                0xf02
  81
  82 #define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload)                  \
  83     (HDA_CMD_12BIT((cad), (nid),                                        \
  84     HDA_CMD_VERB_GET_CONN_LIST_ENTRY, (payload)))
  85
  86 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT          1
  87 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG           2
  88
  89 /* Processing State */
  90 #define HDA_CMD_VERB_GET_PROCESSING_STATE               0xf03
  91 #define HDA_CMD_VERB_SET_PROCESSING_STATE               0x703
  92
  93 #define HDA_CMD_GET_PROCESSING_STATE(cad, nid)                          \
  94     (HDA_CMD_12BIT((cad), (nid),                                        \
  95     HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0))
  96 #define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload)                 \
  97     (HDA_CMD_12BIT((cad), (nid),                                        \
  98     HDA_CMD_VERB_SET_PROCESSING_STATE, (payload)))
  99
 100 #define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF          0x00
 101 #define HDA_CMD_GET_PROCESSING_STATE_STATE_ON           0x01
 102 #define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN       0x02
 103
 104 /* Coefficient Index */
 105 #define HDA_CMD_VERB_GET_COEFF_INDEX                    0xd
 106 #define HDA_CMD_VERB_SET_COEFF_INDEX                    0x5
 107
 108 #define HDA_CMD_GET_COEFF_INDEX(cad, nid)                               \
 109     (HDA_CMD_4BIT((cad), (nid),                                         \
 110     HDA_CMD_VERB_GET_COEFF_INDEX, 0x0))
 111 #define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload)                      \
 112     (HDA_CMD_4BIT((cad), (nid),                                         \
 113     HDA_CMD_VERB_SET_COEFF_INDEX, (payload)))
 114
 115 /* Processing Coefficient */
 116 #define HDA_CMD_VERB_GET_PROCESSING_COEFF               0xc
 117 #define HDA_CMD_VERB_SET_PROCESSING_COEFF               0x4
 118
 119 #define HDA_CMD_GET_PROCESSING_COEFF(cad, nid)                          \
 120     (HDA_CMD_4BIT((cad), (nid),                                         \
 121     HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0))
 122 #define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload)                 \
 123     (HDA_CMD_4BIT((cad), (nid),                                         \
 124     HDA_CMD_VERB_SET_PROCESSING_COEFF, (payload)))
 125
 126 /* Amplifier Gain/Mute */
 127 #define HDA_CMD_VERB_GET_AMP_GAIN_MUTE                  0xb
 128 #define HDA_CMD_VERB_SET_AMP_GAIN_MUTE                  0x3
 129
 130 #define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 131     (HDA_CMD_4BIT((cad), (nid),                                         \
 132     HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload)))
 133 #define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 134     (HDA_CMD_4BIT((cad), (nid),                                         \
 135     HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload)))
 136
 137 #define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT         0x0000
 138 #define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT        0x8000
 139 #define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT         0x0000
 140 #define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT          0x2000
 141
 142 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK     0x00000008
 143 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT    7
 144 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK     0x00000007
 145 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 146
 147 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp)                             \
 148     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >>                   \
 149     HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT)
 150 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp)                             \
 151     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >>                   \
 152     HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT)
 153
 154 #define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT        0x8000
 155 #define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT         0x4000
 156 #define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT          0x2000
 157 #define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT         0x1000
 158 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK    0x0f00
 159 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT   8
 160 #define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE          0x0080
 161 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK     0x0007
 162 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 163
 164 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index)                          \
 165     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) &               \
 166     HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK)
 167 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index)                           \
 168     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) &                \
 169     HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK)
 170
 171 /* Converter format */
 172 #define HDA_CMD_VERB_GET_CONV_FMT                       0xa
 173 #define HDA_CMD_VERB_SET_CONV_FMT                       0x2
 174
 175 #define HDA_CMD_GET_CONV_FMT(cad, nid)                                  \
 176     (HDA_CMD_4BIT((cad), (nid),                                         \
 177     HDA_CMD_VERB_GET_CONV_FMT, 0x0))
 178 #define HDA_CMD_SET_CONV_FMT(cad, nid, payload)                         \
 179     (HDA_CMD_4BIT((cad), (nid),                                         \
 180     HDA_CMD_VERB_SET_CONV_FMT, (payload)))
 181
 182 /* Digital Converter Control */
 183 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1              0xf0d
 184 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2              0xf0e
 185 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1              0x70d
 186 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2              0x70e
 187
 188 #define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid)                          \
 189     (HDA_CMD_12BIT((cad), (nid),                                        \
 190     HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1, 0x0))
 191 #define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload)                \
 192     (HDA_CMD_12BIT((cad), (nid),                                        \
 193     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, (payload)))
 194 #define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload)                \
 195     (HDA_CMD_12BIT((cad), (nid),                                        \
 196     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, (payload)))
 197
 198 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK            0x7f00
 199 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT           8
 200 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK             0x0080
 201 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT            7
 202 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK           0x0040
 203 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT          6
 204 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK        0x0020
 205 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT       5
 206 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK          0x0010
 207 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT         4
 208 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK           0x0008
 209 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT          3
 210 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK          0x0004
 211 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT         2
 212 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK             0x0002
 213 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT            1
 214 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK         0x0001
 215 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT        0
 216
 217 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp)                            \
 218     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >>                  \
 219     HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT)
 220 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp)                             \
 221     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >>                   \
 222     HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT)
 223 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp)                           \
 224     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >>                 \
 225     HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT)
 226 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp)                        \
 227     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >>              \
 228     HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT)
 229 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp)                          \
 230     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >>                \
 231     HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT)
 232 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp)                           \
 233     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >>                 \
 234     HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT)
 235 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp)                          \
 236     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >>                \
 237     HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT)
 238 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp)                             \
 239     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >>                   \
 240     HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT)
 241 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp)                         \
 242     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >>               \
 243     HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT)
 244
 245 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_L                 0x80
 246 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO               0x40
 247 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO            0x20
 248 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY              0x10
 249 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE               0x08
 250 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG              0x04
 251 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_V                 0x02
 252 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN             0x01
 253
 254 /* Power State */
 255 #define HDA_CMD_VERB_GET_POWER_STATE                    0xf05
 256 #define HDA_CMD_VERB_SET_POWER_STATE                    0x705
 257
 258 #define HDA_CMD_GET_POWER_STATE(cad, nid)                               \
 259     (HDA_CMD_12BIT((cad), (nid),                                        \
 260     HDA_CMD_VERB_GET_POWER_STATE, 0x0))
 261 #define HDA_CMD_SET_POWER_STATE(cad, nid, payload)                      \
 262     (HDA_CMD_12BIT((cad), (nid),                                        \
 263     HDA_CMD_VERB_SET_POWER_STATE, (payload)))
 264
 265 #define HDA_CMD_POWER_STATE_D0                          0x00
 266 #define HDA_CMD_POWER_STATE_D1                          0x01
 267 #define HDA_CMD_POWER_STATE_D2                          0x02
 268 #define HDA_CMD_POWER_STATE_D3                          0x03
 269
 270 #define HDA_CMD_POWER_STATE_ACT_MASK                    0x000000f0
 271 #define HDA_CMD_POWER_STATE_ACT_SHIFT                   4
 272 #define HDA_CMD_POWER_STATE_SET_MASK                    0x0000000f
 273 #define HDA_CMD_POWER_STATE_SET_SHIFT                   0
 274
 275 #define HDA_CMD_GET_POWER_STATE_ACT(rsp)                                \
 276     (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >>                          \
 277     HDA_CMD_POWER_STATE_ACT_SHIFT)
 278 #define HDA_CMD_GET_POWER_STATE_SET(rsp)                                \
 279     (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >>                          \
 280     HDA_CMD_POWER_STATE_SET_SHIFT)
 281
 282 #define HDA_CMD_SET_POWER_STATE_ACT(ps)                                 \
 283     (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) &                          \
 284     HDA_CMD_POWER_STATE_ACT_MASK)
 285 #define HDA_CMD_SET_POWER_STATE_SET(ps)                                 \
 286     (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) &                          \
 287     HDA_CMD_POWER_STATE_ACT_MASK)
 288
 289 /* Converter Stream, Channel */
 290 #define HDA_CMD_VERB_GET_CONV_STREAM_CHAN               0xf06
 291 #define HDA_CMD_VERB_SET_CONV_STREAM_CHAN               0x706
 292
 293 #define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid)                          \
 294     (HDA_CMD_12BIT((cad), (nid),                                        \
 295     HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0))
 296 #define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload)                 \
 297     (HDA_CMD_12BIT((cad), (nid),                                        \
 298     HDA_CMD_VERB_SET_CONV_STREAM_CHAN, (payload)))
 299
 300 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK            0x000000f0
 301 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT           4
 302 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK              0x0000000f
 303 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT             0
 304
 305 #define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp)                        \
 306     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >>                  \
 307     HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT)
 308 #define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp)                          \
 309     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >>                    \
 310     HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT)
 311
 312 #define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param)                      \
 313     (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) &               \
 314     HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK)
 315 #define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param)                        \
 316     (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) &                 \
 317     HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK)
 318
 319 /* Input Converter SDI Select */
 320 #define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT     0xf04
 321 #define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT     0x704
 322
 323 #define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid)                \
 324     (HDA_CMD_12BIT((cad), (nid),                                        \
 325     HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0))
 326 #define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload)       \
 327     (HDA_CMD_12BIT((cad), (nid),                                        \
 328     HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload)))
 329
 330 /* Pin Widget Control */
 331 #define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL                0xf07
 332 #define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL                0x707
 333
 334 #define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid)                           \
 335     (HDA_CMD_12BIT((cad), (nid),                                        \
 336     HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0))
 337 #define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload)                  \
 338     (HDA_CMD_12BIT((cad), (nid),                                        \
 339     HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, (payload)))
 340
 341 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK    0x00000080
 342 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT   7
 343 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK     0x00000040
 344 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT    6
 345 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK      0x00000020
 346 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT     5
 347 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x00000007
 348 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 349
 350 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp)                    \
 351     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >>          \
 352     HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT)
 353 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp)                     \
 354     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >>           \
 355     HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT)
 356 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp)                      \
 357     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >>            \
 358     HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT)
 359 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp)                    \
 360     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >>          \
 361     HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT)
 362
 363 #define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE         0x80
 364 #define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE          0x40
 365 #define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE           0x20
 366 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x07
 367 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 368
 369 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param)                  \
 370     (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) &       \
 371     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
 372
 373 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ         0
 374 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50          1
 375 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND      2
 376 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80          4
 377 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100         5
 378
 379 /* Unsolicited Response */
 380 #define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE           0xf08
 381 #define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE           0x708
 382
 383 #define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid)                      \
 384     (HDA_CMD_12BIT((cad), (nid),                                        \
 385     HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, 0x0))
 386 #define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload)             \
 387     (HDA_CMD_12BIT((cad), (nid),                                        \
 388     HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, (payload)))
 389
 390 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK    0x00000080
 391 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT   7
 392 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK       0x0000001f
 393 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 394
 395 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp)                    \
 396     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >>          \
 397     HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT)
 398 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp)                       \
 399     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >>             \
 400     HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT)
 401
 402 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE         0x80
 403 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK       0x1f
 404 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 405
 406 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param)                     \
 407     (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) &          \
 408     HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK)
 409
 410 /* Pin Sense */
 411 #define HDA_CMD_VERB_GET_PIN_SENSE                      0xf09
 412 #define HDA_CMD_VERB_SET_PIN_SENSE                      0x709
 413
 414 #define HDA_CMD_GET_PIN_SENSE(cad, nid)                                 \
 415     (HDA_CMD_12BIT((cad), (nid),                                        \
 416     HDA_CMD_VERB_GET_PIN_SENSE, 0x0))
 417 #define HDA_CMD_SET_PIN_SENSE(cad, nid, payload)                        \
 418     (HDA_CMD_12BIT((cad), (nid),                                        \
 419     HDA_CMD_VERB_SET_PIN_SENSE, (payload)))
 420
 421 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_MASK      0x80000000
 422 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_SHIFT     31
 423 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK            0x7fffffff
 424 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT           0
 425
 426 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(rsp)                      \
 427     (((rsp) & HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_MASK) >>            \
 428     HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_SHIFT)
 429 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp)                            \
 430     (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >>                  \
 431     HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT)
 432
 433 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID         0x7fffffff
 434
 435 #define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL              0x00
 436 #define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL             0x01
 437
 438 /* EAPD/BTL Enable */
 439 #define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE                0xf0c
 440 #define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE                0x70c
 441
 442 #define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid)                           \
 443     (HDA_CMD_12BIT((cad), (nid),                                        \
 444     HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0))
 445 #define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload)                  \
 446     (HDA_CMD_12BIT((cad), (nid),                                        \
 447     HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, (payload)))
 448
 449 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK        0x00000004
 450 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT       2
 451 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK           0x00000002
 452 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT          1
 453 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK            0x00000001
 454 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT           0
 455
 456 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp)                        \
 457     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >>              \
 458     HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT)
 459 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp)                           \
 460     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >>                 \
 461     HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT)
 462 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp)                            \
 463     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >>                  \
 464     HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT)
 465
 466 #define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP             0x04
 467 #define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD                0x02
 468 #define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL                 0x01
 469
 470 /* GPI Data */
 471 #define HDA_CMD_VERB_GET_GPI_DATA                       0xf10
 472 #define HDA_CMD_VERB_SET_GPI_DATA                       0x710
 473
 474 #define HDA_CMD_GET_GPI_DATA(cad, nid)                                  \
 475     (HDA_CMD_12BIT((cad), (nid),                                        \
 476     HDA_CMD_VERB_GET_GPI_DATA, 0x0))
 477 #define HDA_CMD_SET_GPI_DATA(cad, nid)                                  \
 478     (HDA_CMD_12BIT((cad), (nid),                                        \
 479     HDA_CMD_VERB_SET_GPI_DATA, (payload)))
 480
 481 /* GPI Wake Enable Mask */
 482 #define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK           0xf11
 483 #define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK           0x711
 484
 485 #define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid)                      \
 486     (HDA_CMD_12BIT((cad), (nid),                                        \
 487     HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, 0x0))
 488 #define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload)             \
 489     (HDA_CMD_12BIT((cad), (nid),                                        \
 490     HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, (payload)))
 491
 492 /* GPI Unsolicited Enable Mask */
 493 #define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK    0xf12
 494 #define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK    0x712
 495
 496 #define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid)               \
 497     (HDA_CMD_12BIT((cad), (nid),                                        \
 498     HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0))
 499 #define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload)      \
 500     (HDA_CMD_12BIT((cad), (nid),                                        \
 501     HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload)))
 502
 503 /* GPI Sticky Mask */
 504 #define HDA_CMD_VERB_GET_GPI_STICKY_MASK                0xf13
 505 #define HDA_CMD_VERB_SET_GPI_STICKY_MASK                0x713
 506
 507 #define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid)                           \
 508     (HDA_CMD_12BIT((cad), (nid),                                        \
 509     HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0))
 510 #define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload)                  \
 511     (HDA_CMD_12BIT((cad), (nid),                                        \
 512     HDA_CMD_VERB_SET_GPI_STICKY_MASK, (payload)))
 513
 514 /* GPO Data */
 515 #define HDA_CMD_VERB_GET_GPO_DATA                       0xf14
 516 #define HDA_CMD_VERB_SET_GPO_DATA                       0x714
 517
 518 #define HDA_CMD_GET_GPO_DATA(cad, nid)                                  \
 519     (HDA_CMD_12BIT((cad), (nid),                                        \
 520     HDA_CMD_VERB_GET_GPO_DATA, 0x0))
 521 #define HDA_CMD_SET_GPO_DATA(cad, nid, payload)                         \
 522     (HDA_CMD_12BIT((cad), (nid),                                        \
 523     HDA_CMD_VERB_SET_GPO_DATA, (payload)))
 524
 525 /* GPIO Data */
 526 #define HDA_CMD_VERB_GET_GPIO_DATA                      0xf15
 527 #define HDA_CMD_VERB_SET_GPIO_DATA                      0x715
 528
 529 #define HDA_CMD_GET_GPIO_DATA(cad, nid)                                 \
 530     (HDA_CMD_12BIT((cad), (nid),                                        \
 531     HDA_CMD_VERB_GET_GPIO_DATA, 0x0))
 532 #define HDA_CMD_SET_GPIO_DATA(cad, nid, payload)                        \
 533     (HDA_CMD_12BIT((cad), (nid),                                        \
 534     HDA_CMD_VERB_SET_GPIO_DATA, (payload)))
 535
 536 /* GPIO Enable Mask */
 537 #define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK               0xf16
 538 #define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK               0x716
 539
 540 #define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid)                          \
 541     (HDA_CMD_12BIT((cad), (nid),                                        \
 542     HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0))
 543 #define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload)                 \
 544     (HDA_CMD_12BIT((cad), (nid),                                        \
 545     HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, (payload)))
 546
 547 /* GPIO Direction */
 548 #define HDA_CMD_VERB_GET_GPIO_DIRECTION                 0xf17
 549 #define HDA_CMD_VERB_SET_GPIO_DIRECTION                 0x717
 550
 551 #define HDA_CMD_GET_GPIO_DIRECTION(cad, nid)                            \
 552     (HDA_CMD_12BIT((cad), (nid),                                        \
 553     HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0))
 554 #define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload)                   \
 555     (HDA_CMD_12BIT((cad), (nid),                                        \
 556     HDA_CMD_VERB_SET_GPIO_DIRECTION, (payload)))
 557
 558 /* GPIO Wake Enable Mask */
 559 #define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK          0xf18
 560 #define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK          0x718
 561
 562 #define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid)                     \
 563     (HDA_CMD_12BIT((cad), (nid),                                        \
 564     HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, 0x0))
 565 #define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload)            \
 566     (HDA_CMD_12BIT((cad), (nid),                                        \
 567     HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, (payload)))
 568
 569 /* GPIO Unsolicited Enable Mask */
 570 #define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK   0xf19
 571 #define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK   0x719
 572
 573 #define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid)              \
 574     (HDA_CMD_12BIT((cad), (nid),                                        \
 575     HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0))
 576 #define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload)     \
 577     (HDA_CMD_12BIT((cad), (nid),                                        \
 578     HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload)))
 579
 580 /* GPIO_STICKY_MASK */
 581 #define HDA_CMD_VERB_GET_GPIO_STICKY_MASK               0xf1a
 582 #define HDA_CMD_VERB_SET_GPIO_STICKY_MASK               0x71a
 583
 584 #define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid)                          \
 585     (HDA_CMD_12BIT((cad), (nid),                                        \
 586     HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0))
 587 #define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload)                 \
 588     (HDA_CMD_12BIT((cad), (nid),                                        \
 589     HDA_CMD_VERB_SET_GPIO_STICKY_MASK, (payload)))
 590
 591 /* Beep Generation */
 592 #define HDA_CMD_VERB_GET_BEEP_GENERATION                0xf0a
 593 #define HDA_CMD_VERB_SET_BEEP_GENERATION                0x70a
 594
 595 #define HDA_CMD_GET_BEEP_GENERATION(cad, nid)                           \
 596     (HDA_CMD_12BIT((cad), (nid),                                        \
 597     HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0))
 598 #define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload)                  \
 599     (HDA_CMD_12BIT((cad), (nid),                                        \
 600     HDA_CMD_VERB_SET_BEEP_GENERATION, (payload)))
 601
 602 /* Volume Knob */
 603 #define HDA_CMD_VERB_GET_VOLUME_KNOB                    0xf0f
 604 #define HDA_CMD_VERB_SET_VOLUME_KNOB                    0x70f
 605
 606 #define HDA_CMD_GET_VOLUME_KNOB(cad, nid)                               \
 607     (HDA_CMD_12BIT((cad), (nid),                                        \
 608     HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0))
 609 #define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload)                      \
 610     (HDA_CMD_12BIT((cad), (nid),                                        \
 611     HDA_CMD_VERB_SET_VOLUME_KNOB, (payload)))
 612
 613 /* Subsystem ID */
 614 #define HDA_CMD_VERB_GET_SUBSYSTEM_ID                   0xf20
 615 #define HDA_CMD_VERB_SET_SUSBYSTEM_ID1                  0x720
 616 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID2                  0x721
 617 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID3                  0x722
 618 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID4                  0x723
 619
 620 #define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid)                              \
 621     (HDA_CMD_12BIT((cad), (nid),                                        \
 622     HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0))
 623 #define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload)                    \
 624     (HDA_CMD_12BIT((cad), (nid),                                        \
 625     HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload)))
 626 #define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload)                    \
 627     (HDA_CMD_12BIT((cad), (nid),                                        \
 628     HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload)))
 629 #define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload)                    \
 630     (HDA_CMD_12BIT((cad), (nid),                                        \
 631     HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload)))
 632 #define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload)                    \
 633     (HDA_CMD_12BIT((cad), (nid),                                        \
 634     HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload)))
 635
 636 /* Configuration Default */
 637 #define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT          0xf1c
 638 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1         0x71c
 639 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2         0x71d
 640 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3         0x71e
 641 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4         0x71f
 642
 643 #define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid)                     \
 644     (HDA_CMD_12BIT((cad), (nid),                                        \
 645     HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, 0x0))
 646 #define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload)           \
 647     (HDA_CMD_12BIT((cad), (nid),                                        \
 648     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, (payload)))
 649 #define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload)           \
 650     (HDA_CMD_12BIT((cad), (nid),                                        \
 651     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, (payload)))
 652 #define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload)           \
 653     (HDA_CMD_12BIT((cad), (nid),                                        \
 654     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, (payload)))
 655 #define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload)           \
 656     (HDA_CMD_12BIT((cad), (nid),                                        \
 657     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, (payload)))
 658
 659 /* Stripe Control */
 660 #define HDA_CMD_VERB_GET_STRIPE_CONTROL                 0xf24
 661 #define HDA_CMD_VERB_SET_STRIPE_CONTROL                 0x724
 662
 663 #define HDA_CMD_GET_STRIPE_CONTROL(cad, nid)                            \
 664     (HDA_CMD_12BIT((cad), (nid),                                        \
 665     HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0))
 666 #define HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload)                   \
 667     (HDA_CMD_12BIT((cad), (nid),                                        \
 668     HDA_CMD_VERB_SET_STRIPE_CONTROL, (payload)))
 669
 670 /* Channel Count Control */
 671 #define HDA_CMD_VERB_GET_CONV_CHAN_COUNT                        0xf2d
 672 #define HDA_CMD_VERB_SET_CONV_CHAN_COUNT                        0x72d
 673
 674 #define HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid)                           \
 675     (HDA_CMD_12BIT((cad), (nid),                                        \
 676     HDA_CMD_VERB_GET_CONV_CHAN_COUNT, 0x0))
 677 #define HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload)                  \
 678     (HDA_CMD_12BIT((cad), (nid),                                        \
 679     HDA_CMD_VERB_SET_CONV_CHAN_COUNT, (payload)))
 680
 681 #define HDA_CMD_VERB_GET_HDMI_DIP_SIZE                  0xf2e
 682 #define HDA_CMD_VERB_GET_HDMI_ELDD                      0xf2f
 683
 684 #define HDA_CMD_VERB_GET_HDMI_DIP_INDEX                 0xf30
 685 #define HDA_CMD_VERB_SET_HDMI_DIP_INDEX                 0x730
 686
 687 #define HDA_CMD_VERB_GET_HDMI_DIP_DATA                  0xf31
 688 #define HDA_CMD_VERB_SET_HDMI_DIP_DATA                  0x731
 689
 690 #define HDA_CMD_VERB_GET_HDMI_DIP_XMIT                  0xf32
 691 #define HDA_CMD_VERB_SET_HDMI_DIP_XMIT                  0x732
 692
 693 #define HDA_CMD_VERB_GET_HDMI_CP_CTRL                   0xf33
 694 #define HDA_CMD_VERB_SET_HDMI_CP_CTRL                   0x733
 695
 696 #define HDA_CMD_VERB_GET_HDMI_CHAN_SLOT                 0xf34
 697 #define HDA_CMD_VERB_SET_HDMI_CHAN_SLOT                 0x734
 698
 699 #define HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid)                            \
 700     (HDA_CMD_12BIT((cad), (nid),                                        \
 701     HDA_CMD_VERB_GET_HDMI_CHAN_SLOT, 0x0))
 702 #define HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload)                   \
 703     (HDA_CMD_12BIT((cad), (nid),                                        \
 704     HDA_CMD_VERB_SET_HDMI_CHAN_SLOT, (payload)))
 705
 706 /* Function Reset */
 707 #define HDA_CMD_VERB_FUNCTION_RESET                     0x7ff
 708
 709 #define HDA_CMD_FUNCTION_RESET(cad, nid)                                \
 710     (HDA_CMD_12BIT((cad), (nid),                                        \
 711     HDA_CMD_VERB_FUNCTION_RESET, 0x0))
 712
 713
 714 /****************************************************************************
 715  * HDA Device Parameters
 716  ****************************************************************************/
 717
 718 /* Vendor ID */
 719 #define HDA_PARAM_VENDOR_ID                             0x00
 720
 721 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK              0xffff0000
 722 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT             16
 723 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK              0x0000ffff
 724 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT             0
 725
 726 #define HDA_PARAM_VENDOR_ID_VENDOR_ID(param)                            \
 727     (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >>                  \
 728     HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT)
 729 #define HDA_PARAM_VENDOR_ID_DEVICE_ID(param)                            \
 730     (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >>                  \
 731     HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT)
 732
 733 /* Revision ID */
 734 #define HDA_PARAM_REVISION_ID                           0x02
 735
 736 #define HDA_PARAM_REVISION_ID_MAJREV_MASK               0x00f00000
 737 #define HDA_PARAM_REVISION_ID_MAJREV_SHIFT              20
 738 #define HDA_PARAM_REVISION_ID_MINREV_MASK               0x000f0000
 739 #define HDA_PARAM_REVISION_ID_MINREV_SHIFT              16
 740 #define HDA_PARAM_REVISION_ID_REVISION_ID_MASK          0x0000ff00
 741 #define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT         8
 742 #define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK          0x000000ff
 743 #define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT         0
 744
 745 #define HDA_PARAM_REVISION_ID_MAJREV(param)                             \
 746     (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >>                   \
 747     HDA_PARAM_REVISION_ID_MAJREV_SHIFT)
 748 #define HDA_PARAM_REVISION_ID_MINREV(param)                             \
 749     (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >>                   \
 750     HDA_PARAM_REVISION_ID_MINREV_SHIFT)
 751 #define HDA_PARAM_REVISION_ID_REVISION_ID(param)                        \
 752     (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >>              \
 753     HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT)
 754 #define HDA_PARAM_REVISION_ID_STEPPING_ID(param)                        \
 755     (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >>              \
 756     HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT)
 757
 758 /* Subordinate Node Cound */
 759 #define HDA_PARAM_SUB_NODE_COUNT                        0x04
 760
 761 #define HDA_PARAM_SUB_NODE_COUNT_START_MASK             0x00ff0000
 762 #define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT            16
 763 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK             0x000000ff
 764 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT            0
 765
 766 #define HDA_PARAM_SUB_NODE_COUNT_START(param)                           \
 767     (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >>                 \
 768     HDA_PARAM_SUB_NODE_COUNT_START_SHIFT)
 769 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param)                           \
 770     (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >>                 \
 771     HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT)
 772
 773 /* Function Group Type */
 774 #define HDA_PARAM_FCT_GRP_TYPE                          0x05
 775
 776 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK               0x00000100
 777 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT              8
 778 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK           0x000000ff
 779 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT  0
 780
 781 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param)                             \
 782     (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >>                   \
 783     HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT)
 784 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param)                         \
 785     (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >>               \
 786     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT)
 787
 788 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO          0x01
 789 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM          0x02
 790
 791 /* Audio Function Group Capabilities */
 792 #define HDA_PARAM_AUDIO_FCT_GRP_CAP                     0x08
 793
 794 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK       0x00010000
 795 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT      16
 796 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK    0x00000f00
 797 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT   8
 798 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK   0x0000000f
 799 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT  0
 800
 801 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param)                     \
 802     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >>           \
 803     HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT)
 804 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param)                  \
 805     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >>        \
 806     HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT)
 807 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param)                 \
 808     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >>       \
 809     HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT)
 810
 811 /* Audio Widget Capabilities */
 812 #define HDA_PARAM_AUDIO_WIDGET_CAP                      0x09
 813
 814 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK            0x00f00000
 815 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT           20
 816 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK           0x000f0000
 817 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT          16
 818 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK          0x0000e000
 819 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT         13
 820 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK              0x00001000
 821 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT             12
 822 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK         0x00000800
 823 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT        11
 824 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK      0x00000400
 825 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT     10
 826 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK         0x00000200
 827 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT        9
 828 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK       0x00000100
 829 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT      8
 830 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK       0x00000080
 831 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT      7
 832 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK     0x00000040
 833 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT    6
 834 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK          0x00000020
 835 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT         5
 836 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK      0x00000010
 837 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT     4
 838 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK         0x00000008
 839 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT        3
 840 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK         0x00000004
 841 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT        2
 842 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK          0x00000002
 843 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT         1
 844 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK          0x00000001
 845 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT         0
 846
 847 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param)                          \
 848     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >>                \
 849     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT)
 850 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param)                         \
 851     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >>               \
 852     HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT)
 853 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC(param)                            \
 854     ((((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK) >>             \
 855     (HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT - 1)) |                    \
 856     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 857     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT))
 858 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP(param)                            \
 859     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK) >>                  \
 860     HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT)
 861 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param)                       \
 862     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >>             \
 863     HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT)
 864 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param)                    \
 865     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >>          \
 866     HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT)
 867 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param)                       \
 868     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >>             \
 869     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT)
 870 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param)                     \
 871     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >>           \
 872     HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT)
 873 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param)                     \
 874     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >>           \
 875     HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT)
 876 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param)                   \
 877     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >>         \
 878     HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT)
 879 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param)                        \
 880     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >>              \
 881     HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT)
 882 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param)                    \
 883     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >>          \
 884     HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT)
 885 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param)                       \
 886     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >>             \
 887     HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT)
 888 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param)                       \
 889     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >>             \
 890     HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT)
 891 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param)                        \
 892     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >>              \
 893     HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT)
 894 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param)                        \
 895     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 896     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)
 897
 898 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT    0x0
 899 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT     0x1
 900 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER     0x2
 901 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR  0x3
 902 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX     0x4
 903 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET    0x5
 904 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET   0x6
 905 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET     0x7
 906 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET   0xf
 907
 908 /* Supported PCM Size, Rates */
 909
 910 #define HDA_PARAM_SUPP_PCM_SIZE_RATE                    0x0a
 911
 912 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK         0x00100000
 913 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT        20
 914 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK         0x00080000
 915 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT        19
 916 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK         0x00040000
 917 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT        18
 918 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK         0x00020000
 919 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT        17
 920 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK          0x00010000
 921 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT         16
 922 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK          0x00000001
 923 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT         0
 924 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK         0x00000002
 925 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT        1
 926 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK         0x00000004
 927 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT        2
 928 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK         0x00000008
 929 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT        3
 930 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK         0x00000010
 931 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT        4
 932 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK         0x00000020
 933 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT        5
 934 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK         0x00000040
 935 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT        6
 936 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK         0x00000080
 937 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT        7
 938 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK         0x00000100
 939 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT        8
 940 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK        0x00000200
 941 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT       9
 942 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK        0x00000400
 943 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT       10
 944 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK        0x00000800
 945 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT       11
 946
 947 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param)                       \
 948     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >>             \
 949     HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT)
 950 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param)                       \
 951     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >>             \
 952     HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT)
 953 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param)                       \
 954     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >>             \
 955     HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT)
 956 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param)                       \
 957     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >>             \
 958     HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT)
 959 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param)                        \
 960     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >>              \
 961     HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT)
 962 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param)                        \
 963     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >>              \
 964     HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT)
 965 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param)                       \
 966     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >>             \
 967     HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT)
 968 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param)                       \
 969     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >>             \
 970     HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT)
 971 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param)                       \
 972     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >>             \
 973     HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT)
 974 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param)                       \
 975     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >>             \
 976     HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT)
 977 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param)                       \
 978     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >>             \
 979     HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT)
 980 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param)                       \
 981     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >>             \
 982     HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT)
 983 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param)                       \
 984     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >>             \
 985     HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT)
 986 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param)                       \
 987     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >>             \
 988     HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT)
 989 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param)                      \
 990     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >>            \
 991     HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT)
 992 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param)                      \
 993     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >>            \
 994     HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT)
 995 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param)                      \
 996     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >>            \
 997     HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT)
 998
 999 /* Supported Stream Formats */
1000 #define HDA_PARAM_SUPP_STREAM_FORMATS                   0x0b
1001
1002 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK          0x00000004
1003 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT         2
1004 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK      0x00000002
1005 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT     1
1006 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK          0x00000001
1007 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT         0
1008
1009 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param)                        \
1010     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >>              \
1011     HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT)
1012 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param)                    \
1013     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >>          \
1014     HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT)
1015 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param)                        \
1016     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >>              \
1017     HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT)
1018
1019 /* Pin Capabilities */
1020 #define HDA_PARAM_PIN_CAP                               0x0c
1021
1022 #define HDA_PARAM_PIN_CAP_HBR_MASK                      0x08000000
1023 #define HDA_PARAM_PIN_CAP_HBR_SHIFT                     27
1024 #define HDA_PARAM_PIN_CAP_DP_MASK                       0x01000000
1025 #define HDA_PARAM_PIN_CAP_DP_SHIFT                      24
1026 #define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK                 0x00010000
1027 #define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT                16
1028 #define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK                0x0000ff00
1029 #define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT               8
1030 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK            0x00002000
1031 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT           13
1032 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK             0x00001000
1033 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT            12
1034 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK         0x00000400
1035 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT        10
1036 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK             0x00000200
1037 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT            9
1038 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK            0x00000100
1039 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT           8
1040 #define HDA_PARAM_PIN_CAP_HDMI_MASK                     0x00000080
1041 #define HDA_PARAM_PIN_CAP_HDMI_SHIFT                    7
1042 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK         0x00000040
1043 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT        6
1044 #define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK                0x00000020
1045 #define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT               5
1046 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK               0x00000010
1047 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT              4
1048 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK            0x00000008
1049 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT           3
1050 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK      0x00000004
1051 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT     2
1052 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK             0x00000002
1053 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT            1
1054 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK            0x00000001
1055 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT           0
1056
1057 #define HDA_PARAM_PIN_CAP_HBR(param)                                    \
1058     (((param) & HDA_PARAM_PIN_CAP_HBR_MASK) >>                          \
1059     HDA_PARAM_PIN_CAP_HBR_SHIFT)
1060 #define HDA_PARAM_PIN_CAP_DP(param)                                     \
1061     (((param) & HDA_PARAM_PIN_CAP_DP_MASK) >>                           \
1062     HDA_PARAM_PIN_CAP_DP_SHIFT)
1063 #define HDA_PARAM_PIN_CAP_EAPD_CAP(param)                               \
1064     (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >>                     \
1065     HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT)
1066 #define HDA_PARAM_PIN_CAP_VREF_CTRL(param)                              \
1067     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >>                    \
1068     HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT)
1069 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param)                          \
1070     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >>                \
1071     HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT)
1072 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param)                           \
1073     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >>                 \
1074     HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT)
1075 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param)                       \
1076     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >>             \
1077     HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT)
1078 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param)                           \
1079     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >>                 \
1080     HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT)
1081 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param)                          \
1082     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >>                \
1083     HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT)
1084 #define HDA_PARAM_PIN_CAP_HDMI(param)                                   \
1085     (((param) & HDA_PARAM_PIN_CAP_HDMI_MASK) >>                         \
1086     HDA_PARAM_PIN_CAP_HDMI_SHIFT)
1087 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param)                       \
1088     (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >>             \
1089     HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT)
1090 #define HDA_PARAM_PIN_CAP_INPUT_CAP(param)                              \
1091     (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >>                    \
1092     HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT)
1093 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param)                             \
1094     (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >>                   \
1095     HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT)
1096 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param)                          \
1097     (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >>                \
1098     HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT)
1099 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param)                    \
1100     (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >>          \
1101     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT)
1102 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param)                           \
1103     (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >>                 \
1104     HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT)
1105 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param)                          \
1106     (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >>                \
1107     HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT)
1108
1109 /* Input Amplifier Capabilities */
1110 #define HDA_PARAM_INPUT_AMP_CAP                         0x0d
1111
1112 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK           0x80000000
1113 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT          31
1114 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK           0x007f0000
1115 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT          16
1116 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK           0x00007f00
1117 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT          8
1118 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK             0x0000007f
1119 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT            0
1120
1121 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param)                         \
1122     (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >>               \
1123     HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT)
1124 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param)                         \
1125     (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >>               \
1126     HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT)
1127 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param)                         \
1128     (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >>               \
1129     HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT)
1130 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param)                           \
1131     (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >>                 \
1132     HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT)
1133
1134 /* Output Amplifier Capabilities */
1135 #define HDA_PARAM_OUTPUT_AMP_CAP                        0x12
1136
1137 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK          0x80000000
1138 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT         31
1139 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK          0x007f0000
1140 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT         16
1141 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK          0x00007f00
1142 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT         8
1143 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK            0x0000007f
1144 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT           0
1145
1146 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param)                        \
1147     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >>              \
1148     HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT)
1149 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param)                        \
1150     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >>              \
1151     HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT)
1152 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param)                        \
1153     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >>              \
1154     HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT)
1155 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param)                          \
1156     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >>                \
1157     HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT)
1158
1159 /* Connection List Length */
1160 #define HDA_PARAM_CONN_LIST_LENGTH                      0x0e
1161
1162 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK       0x00000080
1163 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT      7
1164 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK     0x0000007f
1165 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT    0
1166
1167 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param)                     \
1168     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >>           \
1169     HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT)
1170 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param)                   \
1171     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >>         \
1172     HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT)
1173
1174 /* Supported Power States */
1175 #define HDA_PARAM_SUPP_POWER_STATES                     0x0f
1176
1177 #define HDA_PARAM_SUPP_POWER_STATES_D3_MASK             0x00000008
1178 #define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT            3
1179 #define HDA_PARAM_SUPP_POWER_STATES_D2_MASK             0x00000004
1180 #define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT            2
1181 #define HDA_PARAM_SUPP_POWER_STATES_D1_MASK             0x00000002
1182 #define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT            1
1183 #define HDA_PARAM_SUPP_POWER_STATES_D0_MASK             0x00000001
1184 #define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT            0
1185
1186 #define HDA_PARAM_SUPP_POWER_STATES_D3(param)                           \
1187     (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >>                 \
1188     HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT)
1189 #define HDA_PARAM_SUPP_POWER_STATES_D2(param)                           \
1190     (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >>                 \
1191     HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT)
1192 #define HDA_PARAM_SUPP_POWER_STATES_D1(param)                           \
1193     (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >>                 \
1194     HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT)
1195 #define HDA_PARAM_SUPP_POWER_STATES_D0(param)                           \
1196     (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >>                 \
1197     HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT)
1198
1199 /* Processing Capabilities */
1200 #define HDA_PARAM_PROCESSING_CAP                        0x10
1201
1202 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK          0x0000ff00
1203 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT         8
1204 #define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK            0x00000001
1205 #define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT           0
1206
1207 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param)                        \
1208     (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >>              \
1209     HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT)
1210 #define HDA_PARAM_PROCESSING_CAP_BENIGN(param)                          \
1211     (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >>                \
1212     HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT)
1213
1214 /* GPIO Count */
1215 #define HDA_PARAM_GPIO_COUNT                            0x11
1216
1217 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK              0x80000000
1218 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT             31
1219 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK             0x40000000
1220 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT            30
1221 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK               0x00ff0000
1222 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT              16
1223 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK               0x0000ff00
1224 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT              8
1225 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK              0x000000ff
1226 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT             0
1227
1228 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param)                            \
1229     (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >>                  \
1230     HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT)
1231 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param)                           \
1232     (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >>                 \
1233     HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT)
1234 #define HDA_PARAM_GPIO_COUNT_NUM_GPI(param)                             \
1235     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >>                   \
1236     HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT)
1237 #define HDA_PARAM_GPIO_COUNT_NUM_GPO(param)                             \
1238     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >>                   \
1239     HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT)
1240 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param)                            \
1241     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >>                  \
1242     HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT)
1243
1244 /* Volume Knob Capabilities */
1245 #define HDA_PARAM_VOLUME_KNOB_CAP                       0x13
1246
1247 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK            0x00000080
1248 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT           7
1249 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK        0x0000007f
1250 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT       0
1251
1252 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param)                          \
1253     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >>                \
1254     HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT)
1255 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param)                      \
1256     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >>            \
1257     HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT)
1258
1259
1260 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK            0x0000000f
1261 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT           0
1262 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK         0x000000f0
1263 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT        4
1264 #define HDA_CONFIG_DEFAULTCONF_MISC_MASK                0x00000f00
1265 #define HDA_CONFIG_DEFAULTCONF_MISC_SHIFT               8
1266 #define HDA_CONFIG_DEFAULTCONF_COLOR_MASK               0x0000f000
1267 #define HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT              12
1268 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK     0x000f0000
1269 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT    16
1270 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK              0x00f00000
1271 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT             20
1272 #define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK            0x3f000000
1273 #define HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT           24
1274 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK        0xc0000000
1275 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT       30
1276
1277 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf)                           \
1278     (((conf) & HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK) >>                 \
1279     HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT)
1280 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf)                        \
1281     (((conf) & HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) >>              \
1282     HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT)
1283 #define HDA_CONFIG_DEFAULTCONF_MISC(conf)                               \
1284     (((conf) & HDA_CONFIG_DEFAULTCONF_MISC_MASK) >>                     \
1285     HDA_CONFIG_DEFAULTCONF_MISC_SHIFT)
1286 #define HDA_CONFIG_DEFAULTCONF_COLOR(conf)                              \
1287     (((conf) & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >>                    \
1288     HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT)
1289 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf)                    \
1290     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK) >>          \
1291     HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT)
1292 #define HDA_CONFIG_DEFAULTCONF_DEVICE(conf)                             \
1293     (((conf) & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >>                   \
1294     HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT)
1295 #define HDA_CONFIG_DEFAULTCONF_LOCATION(conf)                           \
1296     (((conf) & HDA_CONFIG_DEFAULTCONF_LOCATION_MASK) >>                 \
1297     HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT)
1298 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)                       \
1299     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >>             \
1300     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT)
1301
1302 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK                (0<<30)
1303 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE                (1<<30)
1304 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED               (2<<30)
1305 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH                (3<<30)
1306
1307 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT                  (0<<20)
1308 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER                   (1<<20)
1309 #define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT                    (2<<20)
1310 #define HDA_CONFIG_DEFAULTCONF_DEVICE_CD                        (3<<20)
1311 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT                 (4<<20)
1312 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT         (5<<20)
1313 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE                (6<<20)
1314 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET             (7<<20)
1315 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN                   (8<<20)
1316 #define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX                       (9<<20)
1317 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN                    (10<<20)
1318 #define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY                 (11<<20)
1319 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN                  (12<<20)
1320 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN          (13<<20)
1321 #define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER                     (15<<20)
1322
1323 #endif