sys/dev/twa/tw_cl.h

   1 /*
   2  * Copyright (c) 2004-07 Applied Micro Circuits Corporation.
   3  * Copyright (c) 2004-05 Vinod Kashyap
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *      $FreeBSD$
  28  */
  29
  30 /*
  31  * AMCC'S 3ware driver for 9000 series storage controllers.
  32  *
  33  * Author: Vinod Kashyap
  34  * Modifications by: Adam Radford
  35  */
  36
  37
  38
  39 #ifndef TW_CL_H
  40
  41 #define TW_CL_H
  42
  43
  44 /*
  45  * Common Layer internal macros, structures and functions.
  46  */
  47
  48
  49 #define TW_CLI_SECTOR_SIZE              0x200
  50 #define TW_CLI_REQUEST_TIMEOUT_PERIOD   60 /* seconds */
  51 #define TW_CLI_RESET_TIMEOUT_PERIOD     60 /* seconds */
  52 #define TW_CLI_MAX_RESET_ATTEMPTS       2
  53
  54 /* Possible values of ctlr->state. */
  55 /* Initialization done, and controller is active. */
  56 #define TW_CLI_CTLR_STATE_ACTIVE                (1<<0)
  57 /* Interrupts on controller enabled. */
  58 #define TW_CLI_CTLR_STATE_INTR_ENABLED          (1<<1)
  59 /* Data buffer for internal requests in use. */
  60 #define TW_CLI_CTLR_STATE_INTERNAL_REQ_BUSY     (1<<2)
  61 /* More AEN's need to be retrieved. */
  62 #define TW_CLI_CTLR_STATE_GET_MORE_AENS         (1<<3)
  63 /* Controller is being reset. */
  64 #define TW_CLI_CTLR_STATE_RESET_IN_PROGRESS     (1<<4)
  65 /* G133 controller is in 'phase 1' of being reset. */
  66 #define TW_CLI_CTLR_STATE_RESET_PHASE1_IN_PROGRESS      (1<<5)
  67 /* G66 register write access bug needs to be worked around. */
  68 #define TW_CLI_CTLR_STATE_G66_WORKAROUND_NEEDED (1<<6)
  69
  70 /* Possible values of ctlr->ioctl_lock.lock. */
  71 #define TW_CLI_LOCK_FREE                0x0     /* lock is free */
  72 #define TW_CLI_LOCK_HELD                0x1     /* lock is held */
  73
  74 /* Possible values of req->state. */
  75 #define TW_CLI_REQ_STATE_INIT           0x0     /* being initialized */
  76 #define TW_CLI_REQ_STATE_BUSY           0x1     /* submitted to controller */
  77 #define TW_CLI_REQ_STATE_PENDING        0x2     /* in pending queue */
  78 #define TW_CLI_REQ_STATE_COMPLETE       0x3     /* completed by controller */
  79
  80 /* Possible values of req->flags. */
  81 #define TW_CLI_REQ_FLAGS_7K             (1<<0)  /* 7000 cmd pkt */
  82 #define TW_CLI_REQ_FLAGS_9K             (1<<1)  /* 9000 cmd pkt */
  83 #define TW_CLI_REQ_FLAGS_INTERNAL       (1<<2)  /* internal request */
  84 #define TW_CLI_REQ_FLAGS_PASSTHRU       (1<<3)  /* passthru request */
  85 #define TW_CLI_REQ_FLAGS_EXTERNAL       (1<<4)  /* external request */
  86
  87 #ifdef TW_OSL_PCI_CONFIG_ACCESSIBLE
  88 /* Register offsets in PCI config space. */
  89 #define TW_CLI_PCI_CONFIG_COMMAND_OFFSET        0x4 /* cmd register offset */
  90 #define TW_CLI_PCI_CONFIG_STATUS_OFFSET         0x6 /* status register offset */
  91 #endif /* TW_OSL_PCI_CONFIG_ACCESSIBLE */
  92
  93 #pragma pack(1)
  94
  95 #ifdef TW_OSL_DEBUG
  96 struct tw_cli_q_stats {
  97         TW_UINT32       cur_len;/* current # of entries in q */
  98         TW_UINT32       max_len;         /* max # of entries in q, ever reached */
  99 };
 100 #endif /* TW_OSL_DEBUG */
 101
 102
 103 /* Queues of CL internal request context packets. */
 104 #define TW_CLI_FREE_Q           0       /* free q */
 105 #define TW_CLI_BUSY_Q           1       /* q of reqs submitted to fw */
 106 #define TW_CLI_PENDING_Q        2       /* q of reqs deferred due to 'q full' */
 107 #define TW_CLI_COMPLETE_Q       3       /* q of reqs completed by fw */
 108 #define TW_CLI_Q_COUNT          4       /* total number of queues */
 109
 110
 111 /* CL's internal request context. */
 112 struct tw_cli_req_context {
 113         struct tw_cl_req_handle *req_handle;/* handle to track requests between
 114                                                 OSL & CL */
 115         struct tw_cli_ctlr_context  *ctlr; /* ptr to CL's controller context */
 116         struct tw_cl_command_packet *cmd_pkt;/* ptr to ctlr cmd pkt */
 117         TW_UINT64       cmd_pkt_phys;   /* cmd pkt physical address */
 118         TW_VOID         *data;          /* ptr to data being passed to fw */
 119         TW_UINT32       length;         /* length of data being passed to fw */
 120         TW_UINT64       data_phys;      /* physical address of data */
 121
 122         TW_UINT32       state;          /* request state */
 123         TW_UINT32       flags;          /* request flags */
 124
 125         TW_UINT32       error_code;     /* error encountered before submission
 126                                         of request to fw, if any */
 127
 128         TW_VOID         *orig_req;      /* ptr to original request for use
 129                                         during callback */
 130         TW_VOID         (*tw_cli_callback)(struct tw_cli_req_context *req);
 131                                         /* CL internal callback */
 132         TW_UINT32       request_id;     /* request id for tracking with fw */
 133         struct tw_cl_link link;         /* to link this request in a list */
 134 };
 135
 136
 137 /* CL's internal controller context. */
 138 struct tw_cli_ctlr_context {
 139         struct tw_cl_ctlr_handle *ctlr_handle;  /* handle to track ctlr between
 140                                                         OSL & CL. */
 141         struct tw_cli_req_context *req_ctxt_buf;/* pointer to the array of CL's
 142                                                 internal request context pkts */
 143         struct tw_cl_command_packet *cmd_pkt_buf;/* ptr to array of cmd pkts */
 144
 145         TW_UINT64               cmd_pkt_phys;   /* phys addr of cmd_pkt_buf */
 146
 147         TW_UINT32               device_id;      /* controller device id */
 148         TW_UINT32               arch_id;        /* controller architecture id */
 149         TW_UINT32               state;          /* controller state */
 150         TW_UINT32               flags;          /* controller settings */
 151         TW_UINT32               sg_size_factor; /* SG element size should be a
 152                                                         multiple of this */
 153
 154         /* Request queues and arrays. */
 155         struct tw_cl_link       req_q_head[TW_CLI_Q_COUNT];
 156
 157         TW_UINT8                *internal_req_data;/* internal req data buf */
 158         TW_UINT64               internal_req_data_phys;/* phys addr of internal
 159                                                         req data buf */
 160         TW_UINT32               max_simult_reqs; /* max simultaneous requests
 161                                                         supported */
 162         TW_UINT32               max_aens_supported;/* max AEN's supported */
 163         /* AEN handler fields. */
 164         struct tw_cl_event_packet *aen_queue;   /* circular queue of AENs from
 165                                                         firmware/CL/OSL */
 166         TW_UINT32               aen_head;       /* AEN queue head */
 167         TW_UINT32               aen_tail;       /* AEN queue tail */
 168         TW_UINT32               aen_cur_seq_id; /* index of the last event+1 */
 169         TW_UINT32               aen_q_overflow; /* indicates if unretrieved
 170                                                 events were overwritten */
 171         TW_UINT32               aen_q_wrapped;  /* indicates if AEN queue ever
 172                                                         wrapped */
 173
 174         TW_UINT16               working_srl;    /* driver & firmware negotiated
 175                                                         srl */
 176         TW_UINT16               working_branch; /* branch # of the firmware
 177                                         that the driver is compatible with */
 178         TW_UINT16               working_build;  /* build # of the firmware
 179                                         that the driver is compatible with */
 180         TW_UINT16               fw_on_ctlr_srl; /* srl of running firmware */
 181         TW_UINT16               fw_on_ctlr_branch;/* branch # of running
 182                                                         firmware */
 183         TW_UINT16               fw_on_ctlr_build;/* build # of running
 184                                                         firmware */
 185         TW_UINT32               operating_mode; /* base mode/current mode */
 186
 187         TW_INT32                host_intr_pending;/* host intr processing
 188                                                         needed */
 189         TW_INT32                attn_intr_pending;/* attn intr processing
 190                                                         needed */
 191         TW_INT32                cmd_intr_pending;/* cmd intr processing
 192                                                         needed */
 193         TW_INT32                resp_intr_pending;/* resp intr processing
 194                                                         needed */
 195
 196         TW_LOCK_HANDLE          gen_lock_handle;/* general purpose lock */
 197         TW_LOCK_HANDLE          *gen_lock;/* ptr to general purpose lock */
 198         TW_LOCK_HANDLE          io_lock_handle; /* lock held during cmd
 199                                                 submission */
 200         TW_LOCK_HANDLE          *io_lock;/* ptr to lock held during cmd
 201                                                 submission */
 202         TW_LOCK_HANDLE          intr_lock_handle;/* lock held during
 203                                                 ISR/response intr processing */
 204         TW_LOCK_HANDLE          *intr_lock;/* ptr to lock held during ISR/
 205                                                 response intr processing */
 206
 207 #ifdef TW_OSL_CAN_SLEEP
 208         TW_SLEEP_HANDLE         sleep_handle;   /* handle to co-ordinate sleeps
 209                                                 & wakeups */
 210 #endif /* TW_OSL_CAN_SLEEP */
 211
 212         struct {
 213                 TW_UINT32       lock;           /* lock state */
 214                 TW_TIME         timeout;        /* time at which the lock will
 215                                                 become available, even if not
 216                                                 explicitly released */
 217         } ioctl_lock;           /* lock for use by user applications, for
 218                                 synchronization between ioctl calls */
 219 #ifdef TW_OSL_DEBUG
 220         struct tw_cli_q_stats   q_stats[TW_CLI_Q_COUNT];/* queue statistics */
 221 #endif /* TW_OSL_DEBUG */
 222 };
 223
 224 #pragma pack()
 225
 226
 227 /*
 228  * Queue primitives
 229  */
 230
 231 #ifdef TW_OSL_DEBUG
 232
 233 #define TW_CLI_Q_INIT(ctlr, q_type)     do {                            \
 234         (ctlr)->q_stats[q_type].cur_len = 0;                            \
 235         (ctlr)->q_stats[q_type].max_len = 0;                            \
 236 } while (0)
 237
 238
 239 #define TW_CLI_Q_INSERT(ctlr, q_type)   do {                            \
 240         struct tw_cli_q_stats *q_stats = &((ctlr)->q_stats[q_type]);    \
 241                                                                         \
 242         if (++(q_stats->cur_len) > q_stats->max_len)                    \
 243                 q_stats->max_len = q_stats->cur_len;                    \
 244 } while (0)
 245
 246
 247 #define TW_CLI_Q_REMOVE(ctlr, q_type)                                   \
 248         (ctlr)->q_stats[q_type].cur_len--
 249
 250 #else /* TW_OSL_DEBUG */
 251
 252 #define TW_CLI_Q_INIT(ctlr, q_index)
 253 #define TW_CLI_Q_INSERT(ctlr, q_index)
 254 #define TW_CLI_Q_REMOVE(ctlr, q_index)
 255
 256 #endif /* TW_OSL_DEBUG */
 257
 258
 259 /* Initialize a queue of requests. */
 260 static __inline TW_VOID
 261 tw_cli_req_q_init(struct tw_cli_ctlr_context *ctlr, TW_UINT8 q_type)
 262 {
 263         TW_CL_Q_INIT(&(ctlr->req_q_head[q_type]));
 264         TW_CLI_Q_INIT(ctlr, q_type);
 265 }
 266
 267
 268
 269 /* Insert the given request at the head of the given queue (q_type). */
 270 static __inline TW_VOID
 271 tw_cli_req_q_insert_head(struct tw_cli_req_context *req, TW_UINT8 q_type)
 272 {
 273         struct tw_cli_ctlr_context      *ctlr = req->ctlr;
 274
 275         tw_osl_get_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 276         TW_CL_Q_INSERT_HEAD(&(ctlr->req_q_head[q_type]), &(req->link));
 277         TW_CLI_Q_INSERT(ctlr, q_type);
 278         tw_osl_free_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 279 }
 280
 281
 282
 283 /* Insert the given request at the tail of the given queue (q_type). */
 284 static __inline TW_VOID
 285 tw_cli_req_q_insert_tail(struct tw_cli_req_context *req, TW_UINT8 q_type)
 286 {
 287         struct tw_cli_ctlr_context      *ctlr = req->ctlr;
 288
 289         tw_osl_get_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 290         TW_CL_Q_INSERT_TAIL(&(ctlr->req_q_head[q_type]), &(req->link));
 291         TW_CLI_Q_INSERT(ctlr, q_type);
 292         tw_osl_free_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 293 }
 294
 295
 296
 297 /* Remove and return the request at the head of the given queue (q_type). */
 298 static __inline struct tw_cli_req_context *
 299 tw_cli_req_q_remove_head(struct tw_cli_ctlr_context *ctlr, TW_UINT8 q_type)
 300 {
 301         struct tw_cli_req_context       *req = TW_CL_NULL;
 302         struct tw_cl_link               *link;
 303
 304         tw_osl_get_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 305         if ((link = TW_CL_Q_FIRST_ITEM(&(ctlr->req_q_head[q_type]))) !=
 306                 TW_CL_NULL) {
 307                 req = TW_CL_STRUCT_HEAD(link,
 308                         struct tw_cli_req_context, link);
 309                 TW_CL_Q_REMOVE_ITEM(&(ctlr->req_q_head[q_type]), &(req->link));
 310                 TW_CLI_Q_REMOVE(ctlr, q_type);
 311         }
 312         tw_osl_free_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 313         return(req);
 314 }
 315
 316
 317
 318 /* Remove the given request from the given queue (q_type). */
 319 static __inline TW_VOID
 320 tw_cli_req_q_remove_item(struct tw_cli_req_context *req, TW_UINT8 q_type)
 321 {
 322         struct tw_cli_ctlr_context      *ctlr = req->ctlr;
 323
 324         tw_osl_get_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 325         TW_CL_Q_REMOVE_ITEM(&(ctlr->req_q_head[q_type]), &(req->link));
 326         TW_CLI_Q_REMOVE(ctlr, q_type);
 327         tw_osl_free_lock(ctlr->ctlr_handle, ctlr->gen_lock);
 328 }
 329
 330
 331
 332 /* Create an event packet for an event/error posted by the controller. */
 333 #define tw_cli_create_ctlr_event(ctlr, event_src, cmd_hdr)      do {    \
 334         TW_UINT8 severity =                                             \
 335                 GET_SEVERITY((cmd_hdr)->status_block.res__severity);    \
 336                                                                         \
 337         tw_cl_create_event(ctlr->ctlr_handle, TW_CL_TRUE, event_src,    \
 338                 (cmd_hdr)->status_block.error,                          \
 339                 severity,                                               \
 340                 tw_cli_severity_string_table[severity],                 \
 341                 (cmd_hdr)->err_specific_desc +                          \
 342                 tw_osl_strlen((cmd_hdr)->err_specific_desc) + 1,        \
 343                 (cmd_hdr)->err_specific_desc);                          \
 344         /* Print 18 bytes of sense information. */                      \
 345         tw_cli_dbg_printf(2, ctlr->ctlr_handle,                         \
 346                 tw_osl_cur_func(),                                      \
 347                 "sense info: %x %x %x %x %x %x %x %x %x "               \
 348                 "%x %x %x %x %x %x %x %x %x",                           \
 349                 (cmd_hdr)->sense_data[0], (cmd_hdr)->sense_data[1],     \
 350                 (cmd_hdr)->sense_data[2], (cmd_hdr)->sense_data[3],     \
 351                 (cmd_hdr)->sense_data[4], (cmd_hdr)->sense_data[5],     \
 352                 (cmd_hdr)->sense_data[6], (cmd_hdr)->sense_data[7],     \
 353                 (cmd_hdr)->sense_data[8], (cmd_hdr)->sense_data[9],     \
 354                 (cmd_hdr)->sense_data[10], (cmd_hdr)->sense_data[11],   \
 355                 (cmd_hdr)->sense_data[12], (cmd_hdr)->sense_data[13],   \
 356                 (cmd_hdr)->sense_data[14], (cmd_hdr)->sense_data[15],   \
 357                 (cmd_hdr)->sense_data[16], (cmd_hdr)->sense_data[17]);  \
 358 } while (0)
 359
 360
 361
 362 #endif /* TW_CL_H */