sys/dev/usb/controller/avr32dci.c

   1 #include <sys/cdefs.h>
   2 __FBSDID("$FreeBSD$");
   3
   4 /*-
   5  * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * This file contains the driver for the AVR32 series USB Device
  31  * Controller
  32  */
  33
  34 /*
  35  * NOTE: When the chip detects BUS-reset it will also reset the
  36  * endpoints, Function-address and more.
  37  */
  38
  39 #include <sys/stdint.h>
  40 #include <sys/stddef.h>
  41 #include <sys/param.h>
  42 #include <sys/queue.h>
  43 #include <sys/types.h>
  44 #include <sys/systm.h>
  45 #include <sys/kernel.h>
  46 #include <sys/bus.h>
  47 #include <sys/linker_set.h>
  48 #include <sys/module.h>
  49 #include <sys/lock.h>
  50 #include <sys/mutex.h>
  51 #include <sys/condvar.h>
  52 #include <sys/sysctl.h>
  53 #include <sys/sx.h>
  54 #include <sys/unistd.h>
  55 #include <sys/callout.h>
  56 #include <sys/malloc.h>
  57 #include <sys/priv.h>
  58
  59 #include <dev/usb/usb.h>
  60 #include <dev/usb/usbdi.h>
  61
  62 #define USB_DEBUG_VAR avr32dci_debug
  63
  64 #include <dev/usb/usb_core.h>
  65 #include <dev/usb/usb_debug.h>
  66 #include <dev/usb/usb_busdma.h>
  67 #include <dev/usb/usb_process.h>
  68 #include <dev/usb/usb_transfer.h>
  69 #include <dev/usb/usb_device.h>
  70 #include <dev/usb/usb_hub.h>
  71 #include <dev/usb/usb_util.h>
  72
  73 #include <dev/usb/usb_controller.h>
  74 #include <dev/usb/usb_bus.h>
  75 #include <dev/usb/controller/avr32dci.h>
  76
  77 #define AVR32_BUS2SC(bus) \
  78    ((struct avr32dci_softc *)(((uint8_t *)(bus)) - \
  79     ((uint8_t *)&(((struct avr32dci_softc *)0)->sc_bus))))
  80
  81 #define AVR32_PC2SC(pc) \
  82    AVR32_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
  83
  84 #ifdef USB_DEBUG
  85 static int avr32dci_debug = 0;
  86
  87 SYSCTL_NODE(_hw_usb, OID_AUTO, avr32dci, CTLFLAG_RW, 0, "USB AVR32 DCI");
  88 SYSCTL_INT(_hw_usb_avr32dci, OID_AUTO, debug, CTLFLAG_RW,
  89     &avr32dci_debug, 0, "AVR32 DCI debug level");
  90 #endif
  91
  92 #define AVR32_INTR_ENDPT 1
  93
  94 /* prototypes */
  95
  96 struct usb_bus_methods avr32dci_bus_methods;
  97 struct usb_pipe_methods avr32dci_device_non_isoc_methods;
  98 struct usb_pipe_methods avr32dci_device_isoc_fs_methods;
  99
 100 static avr32dci_cmd_t avr32dci_setup_rx;
 101 static avr32dci_cmd_t avr32dci_data_rx;
 102 static avr32dci_cmd_t avr32dci_data_tx;
 103 static avr32dci_cmd_t avr32dci_data_tx_sync;
 104 static void avr32dci_device_done(struct usb_xfer *, usb_error_t);
 105 static void avr32dci_do_poll(struct usb_bus *);
 106 static void avr32dci_standard_done(struct usb_xfer *);
 107 static void avr32dci_root_intr(struct avr32dci_softc *sc);
 108
 109 /*
 110  * Here is a list of what the chip supports:
 111  */
 112 static const struct usb_hw_ep_profile
 113         avr32dci_ep_profile[4] = {
 114
 115         [0] = {
 116                 .max_in_frame_size = 64,
 117                 .max_out_frame_size = 64,
 118                 .is_simplex = 1,
 119                 .support_control = 1,
 120         },
 121
 122         [1] = {
 123                 .max_in_frame_size = 512,
 124                 .max_out_frame_size = 512,
 125                 .is_simplex = 1,
 126                 .support_bulk = 1,
 127                 .support_interrupt = 1,
 128                 .support_isochronous = 1,
 129                 .support_in = 1,
 130                 .support_out = 1,
 131         },
 132
 133         [2] = {
 134                 .max_in_frame_size = 64,
 135                 .max_out_frame_size = 64,
 136                 .is_simplex = 1,
 137                 .support_bulk = 1,
 138                 .support_interrupt = 1,
 139                 .support_in = 1,
 140                 .support_out = 1,
 141         },
 142
 143         [3] = {
 144                 .max_in_frame_size = 1024,
 145                 .max_out_frame_size = 1024,
 146                 .is_simplex = 1,
 147                 .support_bulk = 1,
 148                 .support_interrupt = 1,
 149                 .support_isochronous = 1,
 150                 .support_in = 1,
 151                 .support_out = 1,
 152         },
 153 };
 154
 155 static void
 156 avr32dci_get_hw_ep_profile(struct usb_device *udev,
 157     const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
 158 {
 159         if (ep_addr == 0)
 160                 *ppf = avr32dci_ep_profile;
 161         else if (ep_addr < 3)
 162                 *ppf = avr32dci_ep_profile + 1;
 163         else if (ep_addr < 5)
 164                 *ppf = avr32dci_ep_profile + 2;
 165         else if (ep_addr < 7)
 166                 *ppf = avr32dci_ep_profile + 3;
 167         else
 168                 *ppf = NULL;
 169 }
 170
 171 static void
 172 avr32dci_mod_ctrl(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 173 {
 174         uint32_t temp;
 175
 176         temp = AVR32_READ_4(sc, AVR32_CTRL);
 177         temp |= set;
 178         temp &= ~clear;
 179         AVR32_WRITE_4(sc, AVR32_CTRL, temp);
 180 }
 181
 182 static void
 183 avr32dci_mod_ien(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 184 {
 185         uint32_t temp;
 186
 187         temp = AVR32_READ_4(sc, AVR32_IEN);
 188         temp |= set;
 189         temp &= ~clear;
 190         AVR32_WRITE_4(sc, AVR32_IEN, temp);
 191 }
 192
 193 static void
 194 avr32dci_clocks_on(struct avr32dci_softc *sc)
 195 {
 196         if (sc->sc_flags.clocks_off &&
 197             sc->sc_flags.port_powered) {
 198
 199                 DPRINTFN(5, "\n");
 200
 201                 /* turn on clocks */
 202                 (sc->sc_clocks_on) (&sc->sc_bus);
 203
 204                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
 205
 206                 sc->sc_flags.clocks_off = 0;
 207         }
 208 }
 209
 210 static void
 211 avr32dci_clocks_off(struct avr32dci_softc *sc)
 212 {
 213         if (!sc->sc_flags.clocks_off) {
 214
 215                 DPRINTFN(5, "\n");
 216
 217                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_EN_USBA);
 218
 219                 /* turn clocks off */
 220                 (sc->sc_clocks_off) (&sc->sc_bus);
 221
 222                 sc->sc_flags.clocks_off = 1;
 223         }
 224 }
 225
 226 static void
 227 avr32dci_pull_up(struct avr32dci_softc *sc)
 228 {
 229         /* pullup D+, if possible */
 230
 231         if (!sc->sc_flags.d_pulled_up &&
 232             sc->sc_flags.port_powered) {
 233                 sc->sc_flags.d_pulled_up = 1;
 234                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_DETACH);
 235         }
 236 }
 237
 238 static void
 239 avr32dci_pull_down(struct avr32dci_softc *sc)
 240 {
 241         /* pulldown D+, if possible */
 242
 243         if (sc->sc_flags.d_pulled_up) {
 244                 sc->sc_flags.d_pulled_up = 0;
 245                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
 246         }
 247 }
 248
 249 static void
 250 avr32dci_wakeup_peer(struct avr32dci_softc *sc)
 251 {
 252         if (!sc->sc_flags.status_suspend) {
 253                 return;
 254         }
 255         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_REWAKEUP, 0);
 256
 257         /* wait 8 milliseconds */
 258         /* Wait for reset to complete. */
 259         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 125);
 260
 261         /* hardware should have cleared RMWKUP bit */
 262 }
 263
 264 static void
 265 avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
 266 {
 267         DPRINTFN(5, "addr=%d\n", addr);
 268
 269         avr32dci_mod_ctrl(sc, AVR32_UDADDR_ADDEN | addr, 0);
 270 }
 271
 272 static uint8_t
 273 avr32dci_setup_rx(struct avr32dci_td *td)
 274 {
 275         struct avr32dci_softc *sc;
 276         struct usb_device_request req;
 277         uint16_t count;
 278         uint32_t temp;
 279
 280         /* get pointer to softc */
 281         sc = AVR32_PC2SC(td->pc);
 282
 283         /* check endpoint status */
 284         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 285
 286         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 287
 288         if (!(temp & AVR32_EPTSTA_RX_SETUP)) {
 289                 goto not_complete;
 290         }
 291         /* clear did stall */
 292         td->did_stall = 0;
 293         /* get the packet byte count */
 294         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 295
 296         /* verify data length */
 297         if (count != td->remainder) {
 298                 DPRINTFN(0, "Invalid SETUP packet "
 299                     "length, %d bytes\n", count);
 300                 goto not_complete;
 301         }
 302         if (count != sizeof(req)) {
 303                 DPRINTFN(0, "Unsupported SETUP packet "
 304                     "length, %d bytes\n", count);
 305                 goto not_complete;
 306         }
 307         /* receive data */
 308         memcpy(&req, sc->physdata, sizeof(req));
 309
 310         /* copy data into real buffer */
 311         usbd_copy_in(td->pc, 0, &req, sizeof(req));
 312
 313         td->offset = sizeof(req);
 314         td->remainder = 0;
 315
 316         /* sneak peek the set address */
 317         if ((req.bmRequestType == UT_WRITE_DEVICE) &&
 318             (req.bRequest == UR_SET_ADDRESS)) {
 319                 sc->sc_dv_addr = req.wValue[0] & 0x7F;
 320                 /* must write address before ZLP */
 321                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_FADDR_EN |
 322                     AVR32_CTRL_DEV_ADDR);
 323                 avr32dci_mod_ctrl(sc, sc->sc_dv_addr, 0);
 324         } else {
 325                 sc->sc_dv_addr = 0xFF;
 326         }
 327
 328         /* clear SETUP packet interrupt */
 329         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 330         return (0);                     /* complete */
 331
 332 not_complete:
 333         if (temp & AVR32_EPTSTA_RX_SETUP) {
 334                 /* clear SETUP packet interrupt */
 335                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 336         }
 337         /* abort any ongoing transfer */
 338         if (!td->did_stall) {
 339                 DPRINTFN(5, "stalling\n");
 340                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(td->ep_no),
 341                     AVR32_EPTSTA_FRCESTALL);
 342                 td->did_stall = 1;
 343         }
 344         return (1);                     /* not complete */
 345 }
 346
 347 static uint8_t
 348 avr32dci_data_rx(struct avr32dci_td *td)
 349 {
 350         struct avr32dci_softc *sc;
 351         struct usb_page_search buf_res;
 352         uint16_t count;
 353         uint32_t temp;
 354         uint8_t to;
 355         uint8_t got_short;
 356
 357         to = 4;                         /* don't loop forever! */
 358         got_short = 0;
 359
 360         /* get pointer to softc */
 361         sc = AVR32_PC2SC(td->pc);
 362
 363 repeat:
 364         /* check if any of the FIFO banks have data */
 365         /* check endpoint status */
 366         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 367
 368         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 369
 370         if (temp & AVR32_EPTSTA_RX_SETUP) {
 371                 if (td->remainder == 0) {
 372                         /*
 373                          * We are actually complete and have
 374                          * received the next SETUP
 375                          */
 376                         DPRINTFN(5, "faking complete\n");
 377                         return (0);     /* complete */
 378                 }
 379                 /*
 380                  * USB Host Aborted the transfer.
 381                  */
 382                 td->error = 1;
 383                 return (0);             /* complete */
 384         }
 385         /* check status */
 386         if (!(temp & AVR32_EPTSTA_RX_BK_RDY)) {
 387                 /* no data */
 388                 goto not_complete;
 389         }
 390         /* get the packet byte count */
 391         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 392
 393         /* verify the packet byte count */
 394         if (count != td->max_packet_size) {
 395                 if (count < td->max_packet_size) {
 396                         /* we have a short packet */
 397                         td->short_pkt = 1;
 398                         got_short = 1;
 399                 } else {
 400                         /* invalid USB packet */
 401                         td->error = 1;
 402                         return (0);     /* we are complete */
 403                 }
 404         }
 405         /* verify the packet byte count */
 406         if (count > td->remainder) {
 407                 /* invalid USB packet */
 408                 td->error = 1;
 409                 return (0);             /* we are complete */
 410         }
 411         while (count > 0) {
 412                 usbd_get_page(td->pc, td->offset, &buf_res);
 413
 414                 /* get correct length */
 415                 if (buf_res.length > count) {
 416                         buf_res.length = count;
 417                 }
 418                 /* receive data */
 419                 bcopy(sc->physdata +
 420                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 421                     (td->ep_no << 16) + (td->offset % td->max_packet_size),
 422                     buf_res.buffer, buf_res.length)
 423                 /* update counters */
 424                     count -= buf_res.length;
 425                 td->offset += buf_res.length;
 426                 td->remainder -= buf_res.length;
 427         }
 428
 429         /* clear OUT packet interrupt */
 430         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_BK_RDY);
 431
 432         /* check if we are complete */
 433         if ((td->remainder == 0) || got_short) {
 434                 if (td->short_pkt) {
 435                         /* we are complete */
 436                         return (0);
 437                 }
 438                 /* else need to receive a zero length packet */
 439         }
 440         if (--to) {
 441                 goto repeat;
 442         }
 443 not_complete:
 444         return (1);                     /* not complete */
 445 }
 446
 447 static uint8_t
 448 avr32dci_data_tx(struct avr32dci_td *td)
 449 {
 450         struct avr32dci_softc *sc;
 451         struct usb_page_search buf_res;
 452         uint16_t count;
 453         uint8_t to;
 454         uint32_t temp;
 455
 456         to = 4;                         /* don't loop forever! */
 457
 458         /* get pointer to softc */
 459         sc = AVR32_PC2SC(td->pc);
 460
 461 repeat:
 462
 463         /* check endpoint status */
 464         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 465
 466         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 467
 468         if (temp & AVR32_EPTSTA_RX_SETUP) {
 469                 /*
 470                  * The current transfer was aborted
 471                  * by the USB Host
 472                  */
 473                 td->error = 1;
 474                 return (0);             /* complete */
 475         }
 476         if (temp & AVR32_EPTSTA_TX_PK_RDY) {
 477                 /* cannot write any data - all banks are busy */
 478                 goto not_complete;
 479         }
 480         count = td->max_packet_size;
 481         if (td->remainder < count) {
 482                 /* we have a short packet */
 483                 td->short_pkt = 1;
 484                 count = td->remainder;
 485         }
 486         while (count > 0) {
 487
 488                 usbd_get_page(td->pc, td->offset, &buf_res);
 489
 490                 /* get correct length */
 491                 if (buf_res.length > count) {
 492                         buf_res.length = count;
 493                 }
 494                 /* transmit data */
 495                 bcopy(buf_res.buffer, sc->physdata +
 496                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 497                     (td->ep_no << 16) + (td->offset % td->max_packet_size),
 498                     buf_res.length)
 499                 /* update counters */
 500                     count -= buf_res.length;
 501                 td->offset += buf_res.length;
 502                 td->remainder -= buf_res.length;
 503         }
 504
 505         /* allocate FIFO bank */
 506         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_TX_BK_RDY);
 507
 508         /* check remainder */
 509         if (td->remainder == 0) {
 510                 if (td->short_pkt) {
 511                         return (0);     /* complete */
 512                 }
 513                 /* else we need to transmit a short packet */
 514         }
 515         if (--to) {
 516                 goto repeat;
 517         }
 518 not_complete:
 519         return (1);                     /* not complete */
 520 }
 521
 522 static uint8_t
 523 avr32dci_data_tx_sync(struct avr32dci_td *td)
 524 {
 525         struct avr32dci_softc *sc;
 526         uint32_t temp;
 527
 528         /* get pointer to softc */
 529         sc = AVR32_PC2SC(td->pc);
 530
 531         /* check endpoint status */
 532         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 533
 534         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 535
 536         if (temp & AVR32_EPTSTA_RX_SETUP) {
 537                 DPRINTFN(5, "faking complete\n");
 538                 /* Race condition */
 539                 return (0);             /* complete */
 540         }
 541         /*
 542          * The control endpoint has only got one bank, so if that bank
 543          * is free the packet has been transferred!
 544          */
 545         if (AVR32_EPTSTA_BUSY_BANK_STA(temp) != 0) {
 546                 /* cannot write any data - a bank is busy */
 547                 goto not_complete;
 548         }
 549         if (sc->sc_dv_addr != 0xFF) {
 550                 /* set new address */
 551                 avr32dci_set_address(sc, sc->sc_dv_addr);
 552         }
 553         return (0);                     /* complete */
 554
 555 not_complete:
 556         return (1);                     /* not complete */
 557 }
 558
 559 static uint8_t
 560 avr32dci_xfer_do_fifo(struct usb_xfer *xfer)
 561 {
 562         struct avr32dci_td *td;
 563
 564         DPRINTFN(9, "\n");
 565
 566         td = xfer->td_transfer_cache;
 567         while (1) {
 568                 if ((td->func) (td)) {
 569                         /* operation in progress */
 570                         break;
 571                 }
 572                 if (((void *)td) == xfer->td_transfer_last) {
 573                         goto done;
 574                 }
 575                 if (td->error) {
 576                         goto done;
 577                 } else if (td->remainder > 0) {
 578                         /*
 579                          * We had a short transfer. If there is no alternate
 580                          * next, stop processing !
 581                          */
 582                         if (!td->alt_next) {
 583                                 goto done;
 584                         }
 585                 }
 586                 /*
 587                  * Fetch the next transfer descriptor and transfer
 588                  * some flags to the next transfer descriptor
 589                  */
 590                 td = td->obj_next;
 591                 xfer->td_transfer_cache = td;
 592         }
 593         return (1);                     /* not complete */
 594
 595 done:
 596         /* compute all actual lengths */
 597
 598         avr32dci_standard_done(xfer);
 599         return (0);                     /* complete */
 600 }
 601
 602 static void
 603 avr32dci_interrupt_poll(struct avr32dci_softc *sc)
 604 {
 605         struct usb_xfer *xfer;
 606
 607 repeat:
 608         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
 609                 if (!avr32dci_xfer_do_fifo(xfer)) {
 610                         /* queue has been modified */
 611                         goto repeat;
 612                 }
 613         }
 614 }
 615
 616 void
 617 avr32dci_vbus_interrupt(struct avr32dci_softc *sc, uint8_t is_on)
 618 {
 619         DPRINTFN(5, "vbus = %u\n", is_on);
 620
 621         if (is_on) {
 622                 if (!sc->sc_flags.status_vbus) {
 623                         sc->sc_flags.status_vbus = 1;
 624
 625                         /* complete root HUB interrupt endpoint */
 626
 627                         avr32dci_root_intr(sc);
 628                 }
 629         } else {
 630                 if (sc->sc_flags.status_vbus) {
 631                         sc->sc_flags.status_vbus = 0;
 632                         sc->sc_flags.status_bus_reset = 0;
 633                         sc->sc_flags.status_suspend = 0;
 634                         sc->sc_flags.change_suspend = 0;
 635                         sc->sc_flags.change_connect = 1;
 636
 637                         /* complete root HUB interrupt endpoint */
 638
 639                         avr32dci_root_intr(sc);
 640                 }
 641         }
 642 }
 643
 644 void
 645 avr32dci_interrupt(struct avr32dci_softc *sc)
 646 {
 647         uint32_t status;
 648
 649         USB_BUS_LOCK(&sc->sc_bus);
 650
 651         /* read interrupt status */
 652         status = AVR32_READ_4(sc, AVR32_INTSTA);
 653
 654         /* clear all set interrupts */
 655         AVR32_WRITE_4(sc, AVR32_CLRINT, status);
 656
 657         DPRINTFN(14, "INTSTA=0x%08x\n", status);
 658
 659         /* check for any bus state change interrupts */
 660         if (status & AVR32_INT_ENDRESET) {
 661
 662                 DPRINTFN(5, "end of reset\n");
 663
 664                 /* set correct state */
 665                 sc->sc_flags.status_bus_reset = 1;
 666                 sc->sc_flags.status_suspend = 0;
 667                 sc->sc_flags.change_suspend = 0;
 668                 sc->sc_flags.change_connect = 1;
 669
 670                 /* disable resume interrupt */
 671                 avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 672                     AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 673
 674                 /* complete root HUB interrupt endpoint */
 675                 avr32dci_root_intr(sc);
 676         }
 677         /*
 678          * If resume and suspend is set at the same time we interpret
 679          * that like RESUME. Resume is set when there is at least 3
 680          * milliseconds of inactivity on the USB BUS.
 681          */
 682         if (status & AVR32_INT_WAKE_UP) {
 683
 684                 DPRINTFN(5, "resume interrupt\n");
 685
 686                 if (sc->sc_flags.status_suspend) {
 687                         /* update status bits */
 688                         sc->sc_flags.status_suspend = 0;
 689                         sc->sc_flags.change_suspend = 1;
 690
 691                         /* disable resume interrupt */
 692                         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 693                             AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 694
 695                         /* complete root HUB interrupt endpoint */
 696                         avr32dci_root_intr(sc);
 697                 }
 698         } else if (status & AVR32_INT_DET_SUSPD) {
 699
 700                 DPRINTFN(5, "suspend interrupt\n");
 701
 702                 if (!sc->sc_flags.status_suspend) {
 703                         /* update status bits */
 704                         sc->sc_flags.status_suspend = 1;
 705                         sc->sc_flags.change_suspend = 1;
 706
 707                         /* disable suspend interrupt */
 708                         avr32dci_mod_ien(sc, AVR32_INT_WAKE_UP |
 709                             AVR32_INT_ENDRESET, AVR32_INT_DET_SUSPD);
 710
 711                         /* complete root HUB interrupt endpoint */
 712                         avr32dci_root_intr(sc);
 713                 }
 714         }
 715         /* check for any endpoint interrupts */
 716         if (status & -AVR32_INT_EPT_INT(0)) {
 717
 718                 DPRINTFN(5, "real endpoint interrupt\n");
 719
 720                 avr32dci_interrupt_poll(sc);
 721         }
 722         USB_BUS_UNLOCK(&sc->sc_bus);
 723 }
 724
 725 static void
 726 avr32dci_setup_standard_chain_sub(struct avr32dci_std_temp *temp)
 727 {
 728         struct avr32dci_td *td;
 729
 730         /* get current Transfer Descriptor */
 731         td = temp->td_next;
 732         temp->td = td;
 733
 734         /* prepare for next TD */
 735         temp->td_next = td->obj_next;
 736
 737         /* fill out the Transfer Descriptor */
 738         td->func = temp->func;
 739         td->pc = temp->pc;
 740         td->offset = temp->offset;
 741         td->remainder = temp->len;
 742         td->error = 0;
 743         td->did_stall = temp->did_stall;
 744         td->short_pkt = temp->short_pkt;
 745         td->alt_next = temp->setup_alt_next;
 746 }
 747
 748 static void
 749 avr32dci_setup_standard_chain(struct usb_xfer *xfer)
 750 {
 751         struct avr32dci_std_temp temp;
 752         struct avr32dci_softc *sc;
 753         struct avr32dci_td *td;
 754         uint32_t x;
 755         uint8_t ep_no;
 756         uint8_t need_sync;
 757
 758         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
 759             xfer->address, UE_GET_ADDR(xfer->endpoint),
 760             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
 761
 762         temp.max_frame_size = xfer->max_frame_size;
 763
 764         td = xfer->td_start[0];
 765         xfer->td_transfer_first = td;
 766         xfer->td_transfer_cache = td;
 767
 768         /* setup temp */
 769
 770         temp.pc = NULL;
 771         temp.td = NULL;
 772         temp.td_next = xfer->td_start[0];
 773         temp.offset = 0;
 774         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
 775         temp.did_stall = !xfer->flags_int.control_stall;
 776
 777         sc = AVR32_BUS2SC(xfer->xroot->bus);
 778         ep_no = (xfer->endpoint & UE_ADDR);
 779
 780         /* check if we should prepend a setup message */
 781
 782         if (xfer->flags_int.control_xfr) {
 783                 if (xfer->flags_int.control_hdr) {
 784
 785                         temp.func = &avr32dci_setup_rx;
 786                         temp.len = xfer->frlengths[0];
 787                         temp.pc = xfer->frbuffers + 0;
 788                         temp.short_pkt = temp.len ? 1 : 0;
 789                         /* check for last frame */
 790                         if (xfer->nframes == 1) {
 791                                 /* no STATUS stage yet, SETUP is last */
 792                                 if (xfer->flags_int.control_act)
 793                                         temp.setup_alt_next = 0;
 794                         }
 795                         avr32dci_setup_standard_chain_sub(&temp);
 796                 }
 797                 x = 1;
 798         } else {
 799                 x = 0;
 800         }
 801
 802         if (x != xfer->nframes) {
 803                 if (xfer->endpoint & UE_DIR_IN) {
 804                         temp.func = &avr32dci_data_tx;
 805                         need_sync = 1;
 806                 } else {
 807                         temp.func = &avr32dci_data_rx;
 808                         need_sync = 0;
 809                 }
 810
 811                 /* setup "pc" pointer */
 812                 temp.pc = xfer->frbuffers + x;
 813         } else {
 814                 need_sync = 0;
 815         }
 816         while (x != xfer->nframes) {
 817
 818                 /* DATA0 / DATA1 message */
 819
 820                 temp.len = xfer->frlengths[x];
 821
 822                 x++;
 823
 824                 if (x == xfer->nframes) {
 825                         if (xfer->flags_int.control_xfr) {
 826                                 if (xfer->flags_int.control_act) {
 827                                         temp.setup_alt_next = 0;
 828                                 }
 829                         } else {
 830                                 temp.setup_alt_next = 0;
 831                         }
 832                 }
 833                 if (temp.len == 0) {
 834
 835                         /* make sure that we send an USB packet */
 836
 837                         temp.short_pkt = 0;
 838
 839                 } else {
 840
 841                         /* regular data transfer */
 842
 843                         temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
 844                 }
 845
 846                 avr32dci_setup_standard_chain_sub(&temp);
 847
 848                 if (xfer->flags_int.isochronous_xfr) {
 849                         temp.offset += temp.len;
 850                 } else {
 851                         /* get next Page Cache pointer */
 852                         temp.pc = xfer->frbuffers + x;
 853                 }
 854         }
 855
 856         if (xfer->flags_int.control_xfr) {
 857
 858                 /* always setup a valid "pc" pointer for status and sync */
 859                 temp.pc = xfer->frbuffers + 0;
 860                 temp.len = 0;
 861                 temp.short_pkt = 0;
 862                 temp.setup_alt_next = 0;
 863
 864                 /* check if we need to sync */
 865                 if (need_sync) {
 866                         /* we need a SYNC point after TX */
 867                         temp.func = &avr32dci_data_tx_sync;
 868                         avr32dci_setup_standard_chain_sub(&temp);
 869                 }
 870                 /* check if we should append a status stage */
 871                 if (!xfer->flags_int.control_act) {
 872
 873                         /*
 874                          * Send a DATA1 message and invert the current
 875                          * endpoint direction.
 876                          */
 877                         if (xfer->endpoint & UE_DIR_IN) {
 878                                 temp.func = &avr32dci_data_rx;
 879                                 need_sync = 0;
 880                         } else {
 881                                 temp.func = &avr32dci_data_tx;
 882                                 need_sync = 1;
 883                         }
 884
 885                         avr32dci_setup_standard_chain_sub(&temp);
 886                         if (need_sync) {
 887                                 /* we need a SYNC point after TX */
 888                                 temp.func = &avr32dci_data_tx_sync;
 889                                 avr32dci_setup_standard_chain_sub(&temp);
 890                         }
 891                 }
 892         }
 893         /* must have at least one frame! */
 894         td = temp.td;
 895         xfer->td_transfer_last = td;
 896 }
 897
 898 static void
 899 avr32dci_timeout(void *arg)
 900 {
 901         struct usb_xfer *xfer = arg;
 902
 903         DPRINTF("xfer=%p\n", xfer);
 904
 905         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
 906
 907         /* transfer is transferred */
 908         avr32dci_device_done(xfer, USB_ERR_TIMEOUT);
 909 }
 910
 911 static void
 912 avr32dci_start_standard_chain(struct usb_xfer *xfer)
 913 {
 914         DPRINTFN(9, "\n");
 915
 916         /* poll one time - will turn on interrupts */
 917         if (avr32dci_xfer_do_fifo(xfer)) {
 918                 uint8_t ep_no = xfer->endpoint & UE_ADDR_MASK;
 919
 920                 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
 921
 922                 /* put transfer on interrupt queue */
 923                 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
 924
 925                 /* start timeout, if any */
 926                 if (xfer->timeout != 0) {
 927                         usbd_transfer_timeout_ms(xfer,
 928                             &avr32dci_timeout, xfer->timeout);
 929                 }
 930         }
 931 }
 932
 933 static void
 934 avr32dci_root_intr(struct avr32dci_softc *sc)
 935 {
 936         DPRINTFN(9, "\n");
 937
 938         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
 939
 940         /* set port bit */
 941         sc->sc_hub_idata[0] = 0x02;     /* we only have one port */
 942
 943         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
 944             sizeof(sc->sc_hub_idata));
 945 }
 946
 947 static usb_error_t
 948 avr32dci_standard_done_sub(struct usb_xfer *xfer)
 949 {
 950         struct avr32dci_td *td;
 951         uint32_t len;
 952         uint8_t error;
 953
 954         DPRINTFN(9, "\n");
 955
 956         td = xfer->td_transfer_cache;
 957
 958         do {
 959                 len = td->remainder;
 960
 961                 if (xfer->aframes != xfer->nframes) {
 962                         /*
 963                          * Verify the length and subtract
 964                          * the remainder from "frlengths[]":
 965                          */
 966                         if (len > xfer->frlengths[xfer->aframes]) {
 967                                 td->error = 1;
 968                         } else {
 969                                 xfer->frlengths[xfer->aframes] -= len;
 970                         }
 971                 }
 972                 /* Check for transfer error */
 973                 if (td->error) {
 974                         /* the transfer is finished */
 975                         error = 1;
 976                         td = NULL;
 977                         break;
 978                 }
 979                 /* Check for short transfer */
 980                 if (len > 0) {
 981                         if (xfer->flags_int.short_frames_ok) {
 982                                 /* follow alt next */
 983                                 if (td->alt_next) {
 984                                         td = td->obj_next;
 985                                 } else {
 986                                         td = NULL;
 987                                 }
 988                         } else {
 989                                 /* the transfer is finished */
 990                                 td = NULL;
 991                         }
 992                         error = 0;
 993                         break;
 994                 }
 995                 td = td->obj_next;
 996
 997                 /* this USB frame is complete */
 998                 error = 0;
 999                 break;
1000
1001         } while (0);
1002
1003         /* update transfer cache */
1004
1005         xfer->td_transfer_cache = td;
1006
1007         return (error ?
1008             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1009 }
1010
1011 static void
1012 avr32dci_standard_done(struct usb_xfer *xfer)
1013 {
1014         usb_error_t err = 0;
1015
1016         DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1017             xfer, xfer->pipe);
1018
1019         /* reset scanner */
1020
1021         xfer->td_transfer_cache = xfer->td_transfer_first;
1022
1023         if (xfer->flags_int.control_xfr) {
1024
1025                 if (xfer->flags_int.control_hdr) {
1026
1027                         err = avr32dci_standard_done_sub(xfer);
1028                 }
1029                 xfer->aframes = 1;
1030
1031                 if (xfer->td_transfer_cache == NULL) {
1032                         goto done;
1033                 }
1034         }
1035         while (xfer->aframes != xfer->nframes) {
1036
1037                 err = avr32dci_standard_done_sub(xfer);
1038                 xfer->aframes++;
1039
1040                 if (xfer->td_transfer_cache == NULL) {
1041                         goto done;
1042                 }
1043         }
1044
1045         if (xfer->flags_int.control_xfr &&
1046             !xfer->flags_int.control_act) {
1047
1048                 err = avr32dci_standard_done_sub(xfer);
1049         }
1050 done:
1051         avr32dci_device_done(xfer, err);
1052 }
1053
1054 /*------------------------------------------------------------------------*
1055  *      avr32dci_device_done
1056  *
1057  * NOTE: this function can be called more than one time on the
1058  * same USB transfer!
1059  *------------------------------------------------------------------------*/
1060 static void
1061 avr32dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1062 {
1063         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1064         uint8_t ep_no;
1065
1066         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1067
1068         DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1069             xfer, xfer->pipe, error);
1070
1071         if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1072                 ep_no = (xfer->endpoint & UE_ADDR);
1073
1074                 /* disable endpoint interrupt */
1075                 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1076
1077                 DPRINTFN(15, "disabled interrupts!\n");
1078         }
1079         /* dequeue transfer and start next transfer */
1080         usbd_transfer_done(xfer, error);
1081 }
1082
1083 static void
1084 avr32dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1085     struct usb_endpoint *ep, uint8_t *did_stall)
1086 {
1087         struct avr32dci_softc *sc;
1088         uint8_t ep_no;
1089
1090         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1091
1092         DPRINTFN(5, "pipe=%p\n", pipe);
1093
1094         if (xfer) {
1095                 /* cancel any ongoing transfers */
1096                 avr32dci_device_done(xfer, USB_ERR_STALLED);
1097         }
1098         sc = AVR32_BUS2SC(udev->bus);
1099         /* get endpoint number */
1100         ep_no = (pipe->edesc->bEndpointAddress & UE_ADDR);
1101         /* set stall */
1102         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1103 }
1104
1105 static void
1106 avr32dci_clear_stall_sub(struct avr32dci_softc *sc, uint8_t ep_no,
1107     uint8_t ep_type, uint8_t ep_dir)
1108 {
1109         const struct usb_hw_ep_profile *pf;
1110         uint32_t temp;
1111         uint32_t epsize;
1112         uint8_t n;
1113
1114         if (ep_type == UE_CONTROL) {
1115                 /* clearing stall is not needed */
1116                 return;
1117         }
1118         /* set endpoint reset */
1119         AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(ep_no));
1120
1121         /* set stall */
1122         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1123
1124         /* reset data toggle */
1125         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_TOGGLESQ);
1126
1127         /* clear stall */
1128         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1129
1130         if (ep_type == UE_BULK) {
1131                 temp = AVR32_EPTCFG_TYPE_BULK;
1132         } else if (ep_type == UE_INTERRUPT) {
1133                 temp = AVR32_EPTCFG_TYPE_INTR;
1134         } else {
1135                 temp = AVR32_EPTCFG_TYPE_ISOC |
1136                     AVR32_EPTCFG_NB_TRANS(1);
1137         }
1138         if (ep_dir & UE_DIR_IN) {
1139                 temp |= AVR32_EPTCFG_EPDIR_IN;
1140         }
1141         avr32dci_get_hw_ep_profile(NULL, &pf, ep_no);
1142
1143         /* compute endpoint size (use maximum) */
1144         epsize = pf->max_in_frame_size | pf->max_out_frame_size;
1145         n = 0;
1146         while ((epsize /= 2))
1147                 n++;
1148         temp |= AVR32_EPTCFG_EPSIZE(n);
1149
1150         /* use the maximum number of banks supported */
1151         if (ep_no < 1)
1152                 temp |= AVR32_EPTCFG_NBANK(1);
1153         else if (ep_no < 3)
1154                 temp |= AVR32_EPTCFG_NBANK(2);
1155         else
1156                 temp |= AVR32_EPTCFG_NBANK(3);
1157
1158         AVR32_WRITE_4(sc, AVR32_EPTCFG(ep_no), temp);
1159
1160         temp = AVR32_READ_4(sc, AVR32_EPTCFG(ep_no));
1161
1162         if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1163                 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1164         } else {
1165                 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1166                     AVR32_EPTCTL_EPT_ENABL);
1167         }
1168 }
1169
1170 static void
1171 avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1172 {
1173         struct avr32dci_softc *sc;
1174         struct usb_endpoint_descriptor *ed;
1175
1176         DPRINTFN(5, "pipe=%p\n", pipe);
1177
1178         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1179
1180         /* check mode */
1181         if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1182                 /* not supported */
1183                 return;
1184         }
1185         /* get softc */
1186         sc = AVR32_BUS2SC(udev->bus);
1187
1188         /* get endpoint descriptor */
1189         ed = pipe->edesc;
1190
1191         /* reset endpoint */
1192         avr32dci_clear_stall_sub(sc,
1193             (ed->bEndpointAddress & UE_ADDR),
1194             (ed->bmAttributes & UE_XFERTYPE),
1195             (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1196 }
1197
1198 usb_error_t
1199 avr32dci_init(struct avr32dci_softc *sc)
1200 {
1201         uint8_t n;
1202
1203         DPRINTF("start\n");
1204
1205         /* set up the bus structure */
1206         sc->sc_bus.usbrev = USB_REV_1_1;
1207         sc->sc_bus.methods = &avr32dci_bus_methods;
1208
1209         USB_BUS_LOCK(&sc->sc_bus);
1210
1211         /* make sure USB is enabled */
1212         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
1213
1214         /* turn on clocks */
1215         (sc->sc_clocks_on) (&sc->sc_bus);
1216
1217         /* make sure device is re-enumerated */
1218         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
1219
1220         /* wait a little for things to stabilise */
1221         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
1222
1223         /* disable interrupts */
1224         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1225
1226         /* enable interrupts */
1227         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
1228             AVR32_INT_ENDRESET, 0);
1229
1230         /* reset all endpoints */
1231 /**INDENT** Warning@1207: Extra ) */
1232         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1233
1234         /* disable all endpoints */
1235         for (n = 0; n != AVR32_EP_MAX; n++) {
1236                 /* disable endpoint */
1237                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1238         }
1239
1240         /* turn off clocks */
1241
1242         avr32dci_clocks_off(sc);
1243
1244         USB_BUS_UNLOCK(&sc->sc_bus);
1245
1246         /* catch any lost interrupts */
1247
1248         avr32dci_do_poll(&sc->sc_bus);
1249
1250         return (0);                     /* success */
1251 }
1252
1253 void
1254 avr32dci_uninit(struct avr32dci_softc *sc)
1255 {
1256         uint8_t n;
1257
1258         USB_BUS_LOCK(&sc->sc_bus);
1259
1260         /* turn on clocks */
1261         (sc->sc_clocks_on) (&sc->sc_bus);
1262
1263         /* disable interrupts */
1264         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1265
1266         /* reset all endpoints */
1267 /**INDENT** Warning@1242: Extra ) */
1268         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1269
1270         /* disable all endpoints */
1271         for (n = 0; n != AVR32_EP_MAX; n++) {
1272                 /* disable endpoint */
1273                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1274         }
1275
1276         sc->sc_flags.port_powered = 0;
1277         sc->sc_flags.status_vbus = 0;
1278         sc->sc_flags.status_bus_reset = 0;
1279         sc->sc_flags.status_suspend = 0;
1280         sc->sc_flags.change_suspend = 0;
1281         sc->sc_flags.change_connect = 1;
1282
1283         avr32dci_pull_down(sc);
1284         avr32dci_clocks_off(sc);
1285
1286         USB_BUS_UNLOCK(&sc->sc_bus);
1287 }
1288
1289 void
1290 avr32dci_suspend(struct avr32dci_softc *sc)
1291 {
1292         return;
1293 }
1294
1295 void
1296 avr32dci_resume(struct avr32dci_softc *sc)
1297 {
1298         return;
1299 }
1300
1301 static void
1302 avr32dci_do_poll(struct usb_bus *bus)
1303 {
1304         struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1305
1306         USB_BUS_LOCK(&sc->sc_bus);
1307         avr32dci_interrupt_poll(sc);
1308         USB_BUS_UNLOCK(&sc->sc_bus);
1309 }
1310
1311 /*------------------------------------------------------------------------*
1312  * at91dci bulk support
1313  * at91dci control support
1314  * at91dci interrupt support
1315  *------------------------------------------------------------------------*/
1316 static void
1317 avr32dci_device_non_isoc_open(struct usb_xfer *xfer)
1318 {
1319         return;
1320 }
1321
1322 static void
1323 avr32dci_device_non_isoc_close(struct usb_xfer *xfer)
1324 {
1325         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1326 }
1327
1328 static void
1329 avr32dci_device_non_isoc_enter(struct usb_xfer *xfer)
1330 {
1331         return;
1332 }
1333
1334 static void
1335 avr32dci_device_non_isoc_start(struct usb_xfer *xfer)
1336 {
1337         /* setup TDs */
1338         avr32dci_setup_standard_chain(xfer);
1339         avr32dci_start_standard_chain(xfer);
1340 }
1341
1342 struct usb_pipe_methods avr32dci_device_non_isoc_methods =
1343 {
1344         .open = avr32dci_device_non_isoc_open,
1345         .close = avr32dci_device_non_isoc_close,
1346         .enter = avr32dci_device_non_isoc_enter,
1347         .start = avr32dci_device_non_isoc_start,
1348 };
1349
1350 /*------------------------------------------------------------------------*
1351  * at91dci full speed isochronous support
1352  *------------------------------------------------------------------------*/
1353 static void
1354 avr32dci_device_isoc_fs_open(struct usb_xfer *xfer)
1355 {
1356         return;
1357 }
1358
1359 static void
1360 avr32dci_device_isoc_fs_close(struct usb_xfer *xfer)
1361 {
1362         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1363 }
1364
1365 static void
1366 avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1367 {
1368         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1369         uint32_t temp;
1370         uint32_t nframes;
1371         uint8_t ep_no;
1372
1373         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1374             xfer, xfer->pipe->isoc_next, xfer->nframes);
1375
1376         /* get the current frame index */
1377         ep_no = xfer->endpoint & UE_ADDR_MASK;
1378         nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1379
1380         nframes &= AVR32_FRAME_MASK;
1381
1382         /*
1383          * check if the frame index is within the window where the frames
1384          * will be inserted
1385          */
1386         temp = (nframes - xfer->pipe->isoc_next) & AVR32_FRAME_MASK;
1387
1388         if ((xfer->pipe->is_synced == 0) ||
1389             (temp < xfer->nframes)) {
1390                 /*
1391                  * If there is data underflow or the pipe queue is
1392                  * empty we schedule the transfer a few frames ahead
1393                  * of the current frame position. Else two isochronous
1394                  * transfers might overlap.
1395                  */
1396                 xfer->pipe->isoc_next = (nframes + 3) & AVR32_FRAME_MASK;
1397                 xfer->pipe->is_synced = 1;
1398                 DPRINTFN(3, "start next=%d\n", xfer->pipe->isoc_next);
1399         }
1400         /*
1401          * compute how many milliseconds the insertion is ahead of the
1402          * current frame position:
1403          */
1404         temp = (xfer->pipe->isoc_next - nframes) & AVR32_FRAME_MASK;
1405
1406         /*
1407          * pre-compute when the isochronous transfer will be finished:
1408          */
1409         xfer->isoc_time_complete =
1410             usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1411             xfer->nframes;
1412
1413         /* compute frame number for next insertion */
1414         xfer->pipe->isoc_next += xfer->nframes;
1415
1416         /* setup TDs */
1417         avr32dci_setup_standard_chain(xfer);
1418 }
1419
1420 static void
1421 avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
1422 {
1423         /* start TD chain */
1424         avr32dci_start_standard_chain(xfer);
1425 }
1426
1427 struct usb_pipe_methods avr32dci_device_isoc_fs_methods =
1428 {
1429         .open = avr32dci_device_isoc_fs_open,
1430         .close = avr32dci_device_isoc_fs_close,
1431         .enter = avr32dci_device_isoc_fs_enter,
1432         .start = avr32dci_device_isoc_fs_start,
1433 };
1434
1435 /*------------------------------------------------------------------------*
1436  * at91dci root control support
1437  *------------------------------------------------------------------------*
1438  * Simulate a hardware HUB by handling all the necessary requests.
1439  *------------------------------------------------------------------------*/
1440
1441 static const struct usb_device_descriptor avr32dci_devd = {
1442         .bLength = sizeof(struct usb_device_descriptor),
1443         .bDescriptorType = UDESC_DEVICE,
1444         .bcdUSB = {0x00, 0x02},
1445         .bDeviceClass = UDCLASS_HUB,
1446         .bDeviceSubClass = UDSUBCLASS_HUB,
1447         .bDeviceProtocol = UDPROTO_HSHUBSTT,
1448         .bMaxPacketSize = 64,
1449         .bcdDevice = {0x00, 0x01},
1450         .iManufacturer = 1,
1451         .iProduct = 2,
1452         .bNumConfigurations = 1,
1453 };
1454
1455 static const struct usb_device_qualifier avr32dci_odevd = {
1456         .bLength = sizeof(struct usb_device_qualifier),
1457         .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1458         .bcdUSB = {0x00, 0x02},
1459         .bDeviceClass = UDCLASS_HUB,
1460         .bDeviceSubClass = UDSUBCLASS_HUB,
1461         .bDeviceProtocol = UDPROTO_FSHUB,
1462         .bMaxPacketSize0 = 0,
1463         .bNumConfigurations = 0,
1464 };
1465
1466 static const struct avr32dci_config_desc avr32dci_confd = {
1467         .confd = {
1468                 .bLength = sizeof(struct usb_config_descriptor),
1469                 .bDescriptorType = UDESC_CONFIG,
1470                 .wTotalLength[0] = sizeof(avr32dci_confd),
1471                 .bNumInterface = 1,
1472                 .bConfigurationValue = 1,
1473                 .iConfiguration = 0,
1474                 .bmAttributes = UC_SELF_POWERED,
1475                 .bMaxPower = 0,
1476         },
1477         .ifcd = {
1478                 .bLength = sizeof(struct usb_interface_descriptor),
1479                 .bDescriptorType = UDESC_INTERFACE,
1480                 .bNumEndpoints = 1,
1481                 .bInterfaceClass = UICLASS_HUB,
1482                 .bInterfaceSubClass = UISUBCLASS_HUB,
1483                 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
1484         },
1485         .endpd = {
1486                 .bLength = sizeof(struct usb_endpoint_descriptor),
1487                 .bDescriptorType = UDESC_ENDPOINT,
1488                 .bEndpointAddress = (UE_DIR_IN | AVR32_INTR_ENDPT),
1489                 .bmAttributes = UE_INTERRUPT,
1490                 .wMaxPacketSize[0] = 8,
1491                 .bInterval = 255,
1492         },
1493 };
1494
1495 static const struct usb_hub_descriptor_min avr32dci_hubd = {
1496         .bDescLength = sizeof(avr32dci_hubd),
1497         .bDescriptorType = UDESC_HUB,
1498         .bNbrPorts = 1,
1499         .wHubCharacteristics[0] =
1500         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) & 0xFF,
1501         .wHubCharacteristics[1] =
1502         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) >> 8,
1503         .bPwrOn2PwrGood = 50,
1504         .bHubContrCurrent = 0,
1505         .DeviceRemovable = {0},         /* port is removable */
1506 };
1507
1508 #define STRING_LANG \
1509   0x09, 0x04,                           /* American English */
1510
1511 #define STRING_VENDOR \
1512   'A', 0, 'V', 0, 'R', 0, '3', 0, '2', 0
1513
1514 #define STRING_PRODUCT \
1515   'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
1516   'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
1517   'U', 0, 'B', 0,
1518
1519 USB_MAKE_STRING_DESC(STRING_LANG, avr32dci_langtab);
1520 USB_MAKE_STRING_DESC(STRING_VENDOR, avr32dci_vendor);
1521 USB_MAKE_STRING_DESC(STRING_PRODUCT, avr32dci_product);
1522
1523 static usb_error_t
1524 avr32dci_roothub_exec(struct usb_device *udev,
1525     struct usb_device_request *req, const void **pptr, uint16_t *plength)
1526 {
1527         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
1528         const void *ptr;
1529         uint16_t len;
1530         uint16_t value;
1531         uint16_t index;
1532         uint32_t temp;
1533         usb_error_t err;
1534
1535         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1536
1537         /* buffer reset */
1538         ptr = (const void *)&sc->sc_hub_temp;
1539         len = 0;
1540         err = 0;
1541
1542         value = UGETW(req->wValue);
1543         index = UGETW(req->wIndex);
1544
1545         /* demultiplex the control request */
1546
1547         switch (req->bmRequestType) {
1548         case UT_READ_DEVICE:
1549                 switch (req->bRequest) {
1550                 case UR_GET_DESCRIPTOR:
1551                         goto tr_handle_get_descriptor;
1552                 case UR_GET_CONFIG:
1553                         goto tr_handle_get_config;
1554                 case UR_GET_STATUS:
1555                         goto tr_handle_get_status;
1556                 default:
1557                         goto tr_stalled;
1558                 }
1559                 break;
1560
1561         case UT_WRITE_DEVICE:
1562                 switch (req->bRequest) {
1563                 case UR_SET_ADDRESS:
1564                         goto tr_handle_set_address;
1565                 case UR_SET_CONFIG:
1566                         goto tr_handle_set_config;
1567                 case UR_CLEAR_FEATURE:
1568                         goto tr_valid;  /* nop */
1569                 case UR_SET_DESCRIPTOR:
1570                         goto tr_valid;  /* nop */
1571                 case UR_SET_FEATURE:
1572                 default:
1573                         goto tr_stalled;
1574                 }
1575                 break;
1576
1577         case UT_WRITE_ENDPOINT:
1578                 switch (req->bRequest) {
1579                 case UR_CLEAR_FEATURE:
1580                         switch (UGETW(req->wValue)) {
1581                         case UF_ENDPOINT_HALT:
1582                                 goto tr_handle_clear_halt;
1583                         case UF_DEVICE_REMOTE_WAKEUP:
1584                                 goto tr_handle_clear_wakeup;
1585                         default:
1586                                 goto tr_stalled;
1587                         }
1588                         break;
1589                 case UR_SET_FEATURE:
1590                         switch (UGETW(req->wValue)) {
1591                         case UF_ENDPOINT_HALT:
1592                                 goto tr_handle_set_halt;
1593                         case UF_DEVICE_REMOTE_WAKEUP:
1594                                 goto tr_handle_set_wakeup;
1595                         default:
1596                                 goto tr_stalled;
1597                         }
1598                         break;
1599                 case UR_SYNCH_FRAME:
1600                         goto tr_valid;  /* nop */
1601                 default:
1602                         goto tr_stalled;
1603                 }
1604                 break;
1605
1606         case UT_READ_ENDPOINT:
1607                 switch (req->bRequest) {
1608                 case UR_GET_STATUS:
1609                         goto tr_handle_get_ep_status;
1610                 default:
1611                         goto tr_stalled;
1612                 }
1613                 break;
1614
1615         case UT_WRITE_INTERFACE:
1616                 switch (req->bRequest) {
1617                 case UR_SET_INTERFACE:
1618                         goto tr_handle_set_interface;
1619                 case UR_CLEAR_FEATURE:
1620                         goto tr_valid;  /* nop */
1621                 case UR_SET_FEATURE:
1622                 default:
1623                         goto tr_stalled;
1624                 }
1625                 break;
1626
1627         case UT_READ_INTERFACE:
1628                 switch (req->bRequest) {
1629                 case UR_GET_INTERFACE:
1630                         goto tr_handle_get_interface;
1631                 case UR_GET_STATUS:
1632                         goto tr_handle_get_iface_status;
1633                 default:
1634                         goto tr_stalled;
1635                 }
1636                 break;
1637
1638         case UT_WRITE_CLASS_INTERFACE:
1639         case UT_WRITE_VENDOR_INTERFACE:
1640                 /* XXX forward */
1641                 break;
1642
1643         case UT_READ_CLASS_INTERFACE:
1644         case UT_READ_VENDOR_INTERFACE:
1645                 /* XXX forward */
1646                 break;
1647
1648         case UT_WRITE_CLASS_DEVICE:
1649                 switch (req->bRequest) {
1650                 case UR_CLEAR_FEATURE:
1651                         goto tr_valid;
1652                 case UR_SET_DESCRIPTOR:
1653                 case UR_SET_FEATURE:
1654                         break;
1655                 default:
1656                         goto tr_stalled;
1657                 }
1658                 break;
1659
1660         case UT_WRITE_CLASS_OTHER:
1661                 switch (req->bRequest) {
1662                 case UR_CLEAR_FEATURE:
1663                         goto tr_handle_clear_port_feature;
1664                 case UR_SET_FEATURE:
1665                         goto tr_handle_set_port_feature;
1666                 case UR_CLEAR_TT_BUFFER:
1667                 case UR_RESET_TT:
1668                 case UR_STOP_TT:
1669                         goto tr_valid;
1670
1671                 default:
1672                         goto tr_stalled;
1673                 }
1674                 break;
1675
1676         case UT_READ_CLASS_OTHER:
1677                 switch (req->bRequest) {
1678                 case UR_GET_TT_STATE:
1679                         goto tr_handle_get_tt_state;
1680                 case UR_GET_STATUS:
1681                         goto tr_handle_get_port_status;
1682                 default:
1683                         goto tr_stalled;
1684                 }
1685                 break;
1686
1687         case UT_READ_CLASS_DEVICE:
1688                 switch (req->bRequest) {
1689                 case UR_GET_DESCRIPTOR:
1690                         goto tr_handle_get_class_descriptor;
1691                 case UR_GET_STATUS:
1692                         goto tr_handle_get_class_status;
1693
1694                 default:
1695                         goto tr_stalled;
1696                 }
1697                 break;
1698         default:
1699                 goto tr_stalled;
1700         }
1701         goto tr_valid;
1702
1703 tr_handle_get_descriptor:
1704         switch (value >> 8) {
1705         case UDESC_DEVICE:
1706                 if (value & 0xff) {
1707                         goto tr_stalled;
1708                 }
1709                 len = sizeof(avr32dci_devd);
1710                 ptr = (const void *)&avr32dci_devd;
1711                 goto tr_valid;
1712         case UDESC_CONFIG:
1713                 if (value & 0xff) {
1714                         goto tr_stalled;
1715                 }
1716                 len = sizeof(avr32dci_confd);
1717                 ptr = (const void *)&avr32dci_confd;
1718                 goto tr_valid;
1719         case UDESC_STRING:
1720                 switch (value & 0xff) {
1721                 case 0:         /* Language table */
1722                         len = sizeof(avr32dci_langtab);
1723                         ptr = (const void *)&avr32dci_langtab;
1724                         goto tr_valid;
1725
1726                 case 1:         /* Vendor */
1727                         len = sizeof(avr32dci_vendor);
1728                         ptr = (const void *)&avr32dci_vendor;
1729                         goto tr_valid;
1730
1731                 case 2:         /* Product */
1732                         len = sizeof(avr32dci_product);
1733                         ptr = (const void *)&avr32dci_product;
1734                         goto tr_valid;
1735                 default:
1736                         break;
1737                 }
1738                 break;
1739         default:
1740                 goto tr_stalled;
1741         }
1742         goto tr_stalled;
1743
1744 tr_handle_get_config:
1745         len = 1;
1746         sc->sc_hub_temp.wValue[0] = sc->sc_conf;
1747         goto tr_valid;
1748
1749 tr_handle_get_status:
1750         len = 2;
1751         USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
1752         goto tr_valid;
1753
1754 tr_handle_set_address:
1755         if (value & 0xFF00) {
1756                 goto tr_stalled;
1757         }
1758         sc->sc_rt_addr = value;
1759         goto tr_valid;
1760
1761 tr_handle_set_config:
1762         if (value >= 2) {
1763                 goto tr_stalled;
1764         }
1765         sc->sc_conf = value;
1766         goto tr_valid;
1767
1768 tr_handle_get_interface:
1769         len = 1;
1770         sc->sc_hub_temp.wValue[0] = 0;
1771         goto tr_valid;
1772
1773 tr_handle_get_tt_state:
1774 tr_handle_get_class_status:
1775 tr_handle_get_iface_status:
1776 tr_handle_get_ep_status:
1777         len = 2;
1778         USETW(sc->sc_hub_temp.wValue, 0);
1779         goto tr_valid;
1780
1781 tr_handle_set_halt:
1782 tr_handle_set_interface:
1783 tr_handle_set_wakeup:
1784 tr_handle_clear_wakeup:
1785 tr_handle_clear_halt:
1786         goto tr_valid;
1787
1788 tr_handle_clear_port_feature:
1789         if (index != 1) {
1790                 goto tr_stalled;
1791         }
1792         DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
1793
1794         switch (value) {
1795         case UHF_PORT_SUSPEND:
1796                 avr32dci_wakeup_peer(sc);
1797                 break;
1798
1799         case UHF_PORT_ENABLE:
1800                 sc->sc_flags.port_enabled = 0;
1801                 break;
1802
1803         case UHF_PORT_TEST:
1804         case UHF_PORT_INDICATOR:
1805         case UHF_C_PORT_ENABLE:
1806         case UHF_C_PORT_OVER_CURRENT:
1807         case UHF_C_PORT_RESET:
1808                 /* nops */
1809                 break;
1810         case UHF_PORT_POWER:
1811                 sc->sc_flags.port_powered = 0;
1812                 avr32dci_pull_down(sc);
1813                 avr32dci_clocks_off(sc);
1814                 break;
1815         case UHF_C_PORT_CONNECTION:
1816                 /* clear connect change flag */
1817                 sc->sc_flags.change_connect = 0;
1818
1819                 if (!sc->sc_flags.status_bus_reset) {
1820                         /* we are not connected */
1821                         break;
1822                 }
1823                 /* configure the control endpoint */
1824                 /* set endpoint reset */
1825                 AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(0));
1826
1827                 /* set stall */
1828                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(0), AVR32_EPTSTA_FRCESTALL);
1829
1830                 /* reset data toggle */
1831                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_TOGGLESQ);
1832
1833                 /* clear stall */
1834                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_FRCESTALL);
1835
1836                 /* configure */
1837                 AVR32_WRITE_4(sc, AVR32_EPTCFG(0), AVR32_EPTCFG_TYPE_CONTROL |
1838                     AVR32_EPTCFG_NBANK(1) | AVR32_EPTCFG_EPSIZE(6));
1839
1840                 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1841
1842                 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1843                         device_printf(sc->sc_bus.bdev,
1844                             "Chip rejected configuration\n");
1845                 } else {
1846                         AVR32_WRITE_4(sc, AVR32_EPTCTLENB(0),
1847                             AVR32_EPTCTL_EPT_ENABL);
1848                 }
1849                 break;
1850         case UHF_C_PORT_SUSPEND:
1851                 sc->sc_flags.change_suspend = 0;
1852                 break;
1853         default:
1854                 err = USB_ERR_IOERROR;
1855                 goto done;
1856         }
1857         goto tr_valid;
1858
1859 tr_handle_set_port_feature:
1860         if (index != 1) {
1861                 goto tr_stalled;
1862         }
1863         DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
1864
1865         switch (value) {
1866         case UHF_PORT_ENABLE:
1867                 sc->sc_flags.port_enabled = 1;
1868                 break;
1869         case UHF_PORT_SUSPEND:
1870         case UHF_PORT_RESET:
1871         case UHF_PORT_TEST:
1872         case UHF_PORT_INDICATOR:
1873                 /* nops */
1874                 break;
1875         case UHF_PORT_POWER:
1876                 sc->sc_flags.port_powered = 1;
1877                 break;
1878         default:
1879                 err = USB_ERR_IOERROR;
1880                 goto done;
1881         }
1882         goto tr_valid;
1883
1884 tr_handle_get_port_status:
1885
1886         DPRINTFN(9, "UR_GET_PORT_STATUS\n");
1887
1888         if (index != 1) {
1889                 goto tr_stalled;
1890         }
1891         if (sc->sc_flags.status_vbus) {
1892                 avr32dci_clocks_on(sc);
1893                 avr32dci_pull_up(sc);
1894         } else {
1895                 avr32dci_pull_down(sc);
1896                 avr32dci_clocks_off(sc);
1897         }
1898
1899         /* Select Device Side Mode */
1900
1901         value = UPS_PORT_MODE_DEVICE;
1902
1903         /* Check for High Speed */
1904         if (AVR32_READ_4(sc, AVR32_INTSTA) & AVR32_INT_SPEED)
1905                 value |= UPS_HIGH_SPEED;
1906
1907         if (sc->sc_flags.port_powered) {
1908                 value |= UPS_PORT_POWER;
1909         }
1910         if (sc->sc_flags.port_enabled) {
1911                 value |= UPS_PORT_ENABLED;
1912         }
1913         if (sc->sc_flags.status_vbus &&
1914             sc->sc_flags.status_bus_reset) {
1915                 value |= UPS_CURRENT_CONNECT_STATUS;
1916         }
1917         if (sc->sc_flags.status_suspend) {
1918                 value |= UPS_SUSPEND;
1919         }
1920         USETW(sc->sc_hub_temp.ps.wPortStatus, value);
1921
1922         value = 0;
1923
1924         if (sc->sc_flags.change_connect) {
1925                 value |= UPS_C_CONNECT_STATUS;
1926         }
1927         if (sc->sc_flags.change_suspend) {
1928                 value |= UPS_C_SUSPEND;
1929         }
1930         USETW(sc->sc_hub_temp.ps.wPortChange, value);
1931         len = sizeof(sc->sc_hub_temp.ps);
1932         goto tr_valid;
1933
1934 tr_handle_get_class_descriptor:
1935         if (value & 0xFF) {
1936                 goto tr_stalled;
1937         }
1938         ptr = (const void *)&avr32dci_hubd;
1939         len = sizeof(avr32dci_hubd);
1940         goto tr_valid;
1941
1942 tr_stalled:
1943         err = USB_ERR_STALLED;
1944 tr_valid:
1945 done:
1946         *plength = len;
1947         *pptr = ptr;
1948         return (err);
1949 }
1950
1951 static void
1952 avr32dci_xfer_setup(struct usb_setup_params *parm)
1953 {
1954         const struct usb_hw_ep_profile *pf;
1955         struct avr32dci_softc *sc;
1956         struct usb_xfer *xfer;
1957         void *last_obj;
1958         uint32_t ntd;
1959         uint32_t n;
1960         uint8_t ep_no;
1961
1962         sc = AVR32_BUS2SC(parm->udev->bus);
1963         xfer = parm->curr_xfer;
1964
1965         /*
1966          * NOTE: This driver does not use any of the parameters that
1967          * are computed from the following values. Just set some
1968          * reasonable dummies:
1969          */
1970         parm->hc_max_packet_size = 0x400;
1971         parm->hc_max_packet_count = 1;
1972         parm->hc_max_frame_size = 0x400;
1973
1974         usbd_transfer_setup_sub(parm);
1975
1976         /*
1977          * compute maximum number of TDs
1978          */
1979         if ((xfer->pipe->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1980
1981                 ntd = xfer->nframes + 1 /* STATUS */ + 1        /* SYNC 1 */
1982                     + 1 /* SYNC 2 */ ;
1983         } else {
1984
1985                 ntd = xfer->nframes + 1 /* SYNC */ ;
1986         }
1987
1988         /*
1989          * check if "usbd_transfer_setup_sub" set an error
1990          */
1991         if (parm->err)
1992                 return;
1993
1994         /*
1995          * allocate transfer descriptors
1996          */
1997         last_obj = NULL;
1998
1999         /*
2000          * get profile stuff
2001          */
2002         ep_no = xfer->endpoint & UE_ADDR;
2003         avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2004
2005         if (pf == NULL) {
2006                 /* should not happen */
2007                 parm->err = USB_ERR_INVAL;
2008                 return;
2009         }
2010         /* align data */
2011         parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2012
2013         for (n = 0; n != ntd; n++) {
2014
2015                 struct avr32dci_td *td;
2016
2017                 if (parm->buf) {
2018                         uint32_t temp;
2019
2020                         td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2021
2022                         /* init TD */
2023                         td->max_packet_size = xfer->max_packet_size;
2024                         td->ep_no = ep_no;
2025                         temp = pf->max_in_frame_size | pf->max_out_frame_size;
2026                         td->bank_shift = 0;
2027                         while ((temp /= 2))
2028                                 td->bank_shift++;
2029                         if (pf->support_multi_buffer) {
2030                                 td->support_multi_buffer = 1;
2031                         }
2032                         td->obj_next = last_obj;
2033
2034                         last_obj = td;
2035                 }
2036                 parm->size[0] += sizeof(*td);
2037         }
2038
2039         xfer->td_start[0] = last_obj;
2040 }
2041
2042 static void
2043 avr32dci_xfer_unsetup(struct usb_xfer *xfer)
2044 {
2045         return;
2046 }
2047
2048 static void
2049 avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2050     struct usb_endpoint *ep)
2051 {
2052         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2053
2054         DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2055             pipe, udev->address,
2056             edesc->bEndpointAddress, udev->flags.usb_mode,
2057             sc->sc_rt_addr, udev->device_index);
2058
2059         if (udev->device_index != sc->sc_rt_addr) {
2060
2061                 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
2062                         /* not supported */
2063                         return;
2064                 }
2065                 if ((udev->speed != USB_SPEED_FULL) &&
2066                     (udev->speed != USB_SPEED_HIGH)) {
2067                         /* not supported */
2068                         return;
2069                 }
2070                 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2071                         pipe->methods = &avr32dci_device_isoc_fs_methods;
2072                 else
2073                         pipe->methods = &avr32dci_device_non_isoc_methods;
2074         }
2075 }
2076
2077 struct usb_bus_methods avr32dci_bus_methods =
2078 {
2079         .endpoint_init = &avr32dci_ep_init,
2080         .xfer_setup = &avr32dci_xfer_setup,
2081         .xfer_unsetup = &avr32dci_xfer_unsetup,
2082         .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2083         .set_stall = &avr32dci_set_stall,
2084         .clear_stall = &avr32dci_clear_stall,
2085         .roothub_exec = &avr32dci_roothub_exec,
2086         .xfer_poll = &avr32dci_do_poll,
2087 };