2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * USB Open Host Controller driver.
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/linker_set.h>
47 #include <sys/module.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51 #include <sys/sysctl.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
58 #include <dev/usb/usb.h>
59 #include <dev/usb/usbdi.h>
61 #define USB_DEBUG_VAR ohcidebug
63 #include <dev/usb/usb_core.h>
64 #include <dev/usb/usb_debug.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_transfer.h>
68 #include <dev/usb/usb_device.h>
69 #include <dev/usb/usb_hub.h>
70 #include <dev/usb/usb_util.h>
72 #include <dev/usb/usb_controller.h>
73 #include <dev/usb/usb_bus.h>
74 #include <dev/usb/controller/ohci.h>
75 #include <dev/usb/controller/ohcireg.h>
77 #define OHCI_BUS2SC(bus) \
78 ((ohci_softc_t *)(((uint8_t *)(bus)) - \
79 ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
82 static int ohcidebug = 0;
84 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
85 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
86 &ohcidebug, 0, "ohci debug level");
88 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
90 static void ohci_dumpregs(ohci_softc_t *);
91 static void ohci_dump_tds(ohci_td_t *);
92 static uint8_t ohci_dump_td(ohci_td_t *);
93 static void ohci_dump_ed(ohci_ed_t *);
94 static uint8_t ohci_dump_itd(ohci_itd_t *);
95 static void ohci_dump_itds(ohci_itd_t *);
99 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
100 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
101 #define OWRITE1(sc, r, x) \
102 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
103 #define OWRITE2(sc, r, x) \
104 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
105 #define OWRITE4(sc, r, x) \
106 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
107 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
109 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
111 #define OHCI_INTR_ENDPT 1
113 extern struct usb_bus_methods ohci_bus_methods;
114 extern struct usb_pipe_methods ohci_device_bulk_methods;
115 extern struct usb_pipe_methods ohci_device_ctrl_methods;
116 extern struct usb_pipe_methods ohci_device_intr_methods;
117 extern struct usb_pipe_methods ohci_device_isoc_methods;
119 static void ohci_do_poll(struct usb_bus *bus);
120 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
121 static void ohci_timeout(void *arg);
122 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
123 static void ohci_root_intr(ohci_softc_t *sc);
125 struct ohci_std_temp {
126 struct usb_page_cache *pc;
132 uint16_t max_frame_size;
134 uint8_t setup_alt_next;
138 static struct ohci_hcca *
139 ohci_get_hcca(ohci_softc_t *sc)
141 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
142 return (sc->sc_hcca_p);
146 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
148 struct ohci_softc *sc = OHCI_BUS2SC(bus);
151 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
152 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
154 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
155 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
157 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
158 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
160 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
161 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
163 for (i = 0; i != OHCI_NO_EDS; i++) {
164 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
165 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
170 ohci_controller_init(ohci_softc_t *sc)
172 struct usb_page_search buf_res;
181 /* Determine in what context we are running. */
182 ctl = OREAD4(sc, OHCI_CONTROL);
184 /* SMM active, request change */
185 DPRINTF("SMM active, request owner change\n");
186 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
187 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
188 usb_pause_mtx(NULL, hz / 1000);
189 ctl = OREAD4(sc, OHCI_CONTROL);
192 device_printf(sc->sc_bus.bdev,
193 "SMM does not respond, resetting\n");
194 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
198 DPRINTF("cold started\n");
200 /* controller was cold started */
202 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
206 * This reset should not be necessary according to the OHCI spec, but
207 * without it some controllers do not start.
209 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
210 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
213 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
215 /* we now own the host controller and the bus has been reset */
216 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
218 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
219 /* nominal time for a reset is 10 us */
220 for (i = 0; i < 10; i++) {
222 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
228 device_printf(sc->sc_bus.bdev, "reset timeout\n");
229 return (USB_ERR_IOERROR);
232 if (ohcidebug > 15) {
237 /* The controller is now in SUSPEND state, we have 2ms to finish. */
239 /* set up HC registers */
240 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
241 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
243 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
244 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
246 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
247 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
249 /* disable all interrupts and then switch on all desired interrupts */
250 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
251 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
252 /* switch on desired functional features */
253 ctl = OREAD4(sc, OHCI_CONTROL);
254 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
255 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
256 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
257 /* And finally start it! */
258 OWRITE4(sc, OHCI_CONTROL, ctl);
261 * The controller is now OPERATIONAL. Set a some final
262 * registers that should be set earlier, but that the
263 * controller ignores when in the SUSPEND state.
265 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
266 fm |= OHCI_FSMPS(ival) | ival;
267 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
268 per = OHCI_PERIODIC(ival); /* 90% periodic */
269 OWRITE4(sc, OHCI_PERIODIC_START, per);
271 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
272 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
273 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
274 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
276 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
277 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
280 * The AMD756 requires a delay before re-reading the register,
281 * otherwise it will occasionally report 0 ports.
284 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
286 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
287 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
295 return (USB_ERR_NORMAL_COMPLETION);
298 static struct ohci_ed *
299 ohci_init_ed(struct usb_page_cache *pc)
301 struct usb_page_search buf_res;
304 usbd_get_page(pc, 0, &buf_res);
308 ed->ed_self = htole32(buf_res.physaddr);
309 ed->ed_flags = htole32(OHCI_ED_SKIP);
316 ohci_init(ohci_softc_t *sc)
318 struct usb_page_search buf_res;
326 sc->sc_eintrs = OHCI_NORMAL_INTRS;
333 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
336 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
339 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
341 for (i = 0; i != OHCI_NO_EDS; i++) {
342 sc->sc_intr_p_last[i] =
343 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
347 * the QHs are arranged to give poll intervals that are
348 * powers of 2 times 1ms
350 bit = OHCI_NO_EDS / 2;
357 y = (x ^ bit) | (bit / 2);
360 * the next QH has half the poll interval
362 ed_x = sc->sc_intr_p_last[x];
363 ed_y = sc->sc_intr_p_last[y];
366 ed_x->ed_next = ed_y->ed_self;
378 ed_int = sc->sc_intr_p_last[0];
379 ed_isc = sc->sc_isoc_p_last;
381 /* the last (1ms) QH */
382 ed_int->next = ed_isc;
383 ed_int->ed_next = ed_isc->ed_self;
385 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
387 sc->sc_hcca_p = buf_res.buffer;
390 * Fill HCCA interrupt table. The bit reversal is to get
391 * the tree set up properly to spread the interrupts.
393 for (i = 0; i != OHCI_NO_INTRS; i++) {
394 sc->sc_hcca_p->hcca_interrupt_table[i] =
395 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
397 /* flush all cache into memory */
399 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
401 /* set up the bus struct */
402 sc->sc_bus.methods = &ohci_bus_methods;
404 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
407 if (ohcidebug > 15) {
408 for (i = 0; i != OHCI_NO_EDS; i++) {
410 ohci_dump_ed(sc->sc_intr_p_last[i]);
413 ohci_dump_ed(sc->sc_isoc_p_last);
417 sc->sc_bus.usbrev = USB_REV_1_0;
419 if (ohci_controller_init(sc)) {
420 return (USB_ERR_INVAL);
422 /* catch any lost interrupts */
423 ohci_do_poll(&sc->sc_bus);
424 return (USB_ERR_NORMAL_COMPLETION);
429 * shut down the controller when the system is going down
432 ohci_detach(struct ohci_softc *sc)
434 USB_BUS_LOCK(&sc->sc_bus);
436 usb_callout_stop(&sc->sc_tmo_rhsc);
438 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
439 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
441 USB_BUS_UNLOCK(&sc->sc_bus);
443 /* XXX let stray task complete */
444 usb_pause_mtx(NULL, hz / 20);
446 usb_callout_drain(&sc->sc_tmo_rhsc);
449 /* NOTE: suspend/resume is called from
450 * interrupt context and cannot sleep!
453 ohci_suspend(ohci_softc_t *sc)
457 USB_BUS_LOCK(&sc->sc_bus);
466 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
467 if (sc->sc_control == 0) {
469 * Preserve register values, in case that APM BIOS
470 * does not recover them.
472 sc->sc_control = ctl;
473 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
475 ctl |= OHCI_HCFS_SUSPEND;
476 OWRITE4(sc, OHCI_CONTROL, ctl);
478 usb_pause_mtx(&sc->sc_bus.bus_mtx,
479 USB_MS_TO_TICKS(USB_RESUME_WAIT));
481 USB_BUS_UNLOCK(&sc->sc_bus);
485 ohci_resume(ohci_softc_t *sc)
495 /* some broken BIOSes never initialize the Controller chip */
496 ohci_controller_init(sc);
498 USB_BUS_LOCK(&sc->sc_bus);
500 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
501 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
504 ctl = sc->sc_control;
506 ctl = OREAD4(sc, OHCI_CONTROL);
507 ctl |= OHCI_HCFS_RESUME;
508 OWRITE4(sc, OHCI_CONTROL, ctl);
509 usb_pause_mtx(&sc->sc_bus.bus_mtx,
510 USB_MS_TO_TICKS(USB_RESUME_DELAY));
511 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
512 OWRITE4(sc, OHCI_CONTROL, ctl);
513 usb_pause_mtx(&sc->sc_bus.bus_mtx,
514 USB_MS_TO_TICKS(USB_RESUME_RECOVERY));
515 sc->sc_control = sc->sc_intre = 0;
517 USB_BUS_UNLOCK(&sc->sc_bus);
519 /* catch any lost interrupts */
520 ohci_do_poll(&sc->sc_bus);
525 ohci_dumpregs(ohci_softc_t *sc)
527 struct ohci_hcca *hcca;
529 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
530 OREAD4(sc, OHCI_REVISION),
531 OREAD4(sc, OHCI_CONTROL),
532 OREAD4(sc, OHCI_COMMAND_STATUS));
533 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
534 OREAD4(sc, OHCI_INTERRUPT_STATUS),
535 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
536 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
537 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
538 OREAD4(sc, OHCI_HCCA),
539 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
540 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
541 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
542 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
543 OREAD4(sc, OHCI_BULK_HEAD_ED),
544 OREAD4(sc, OHCI_BULK_CURRENT_ED));
545 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
546 OREAD4(sc, OHCI_DONE_HEAD),
547 OREAD4(sc, OHCI_FM_INTERVAL),
548 OREAD4(sc, OHCI_FM_REMAINING));
549 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
550 OREAD4(sc, OHCI_FM_NUMBER),
551 OREAD4(sc, OHCI_PERIODIC_START),
552 OREAD4(sc, OHCI_LS_THRESHOLD));
553 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
554 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
555 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
556 OREAD4(sc, OHCI_RH_STATUS));
557 DPRINTF(" port1=0x%08x port2=0x%08x\n",
558 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
559 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
561 hcca = ohci_get_hcca(sc);
563 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
564 le32toh(hcca->hcca_frame_number),
565 le32toh(hcca->hcca_done_head));
568 ohci_dump_tds(ohci_td_t *std)
570 for (; std; std = std->obj_next) {
571 if (ohci_dump_td(std)) {
578 ohci_dump_td(ohci_td_t *std)
583 usb_pc_cpu_invalidate(std->page_cache);
585 td_flags = le32toh(std->td_flags);
586 temp = (std->td_next == 0);
588 printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
589 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
590 std, le32toh(std->td_self),
591 (td_flags & OHCI_TD_R) ? "-R" : "",
592 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
593 (td_flags & OHCI_TD_IN) ? "-IN" : "",
594 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
595 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
596 OHCI_TD_GET_DI(td_flags),
597 OHCI_TD_GET_EC(td_flags),
598 OHCI_TD_GET_CC(td_flags),
599 le32toh(std->td_cbp),
600 le32toh(std->td_next),
601 le32toh(std->td_be));
607 ohci_dump_itd(ohci_itd_t *sitd)
613 usb_pc_cpu_invalidate(sitd->page_cache);
615 itd_flags = le32toh(sitd->itd_flags);
616 temp = (sitd->itd_next == 0);
618 printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
619 "bp0=0x%08x next=0x%08x be=0x%08x\n",
620 sitd, le32toh(sitd->itd_self),
621 OHCI_ITD_GET_SF(itd_flags),
622 OHCI_ITD_GET_DI(itd_flags),
623 OHCI_ITD_GET_FC(itd_flags),
624 OHCI_ITD_GET_CC(itd_flags),
625 le32toh(sitd->itd_bp0),
626 le32toh(sitd->itd_next),
627 le32toh(sitd->itd_be));
628 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
629 printf("offs[%d]=0x%04x ", i,
630 (uint32_t)le16toh(sitd->itd_offset[i]));
638 ohci_dump_itds(ohci_itd_t *sitd)
640 for (; sitd; sitd = sitd->obj_next) {
641 if (ohci_dump_itd(sitd)) {
648 ohci_dump_ed(ohci_ed_t *sed)
653 usb_pc_cpu_invalidate(sed->page_cache);
655 ed_flags = le32toh(sed->ed_flags);
656 ed_headp = le32toh(sed->ed_headp);
658 printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
659 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
660 sed, le32toh(sed->ed_self),
661 OHCI_ED_GET_FA(ed_flags),
662 OHCI_ED_GET_EN(ed_flags),
663 OHCI_ED_GET_MAXP(ed_flags),
664 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
665 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
666 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
667 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
668 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
669 le32toh(sed->ed_tailp),
670 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
671 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
672 le32toh(sed->ed_headp),
673 le32toh(sed->ed_next));
679 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
681 /* check for early completion */
682 if (ohci_check_transfer(xfer)) {
685 /* put transfer on interrupt queue */
686 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
688 /* start timeout, if any */
689 if (xfer->timeout != 0) {
690 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
694 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
696 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
698 DPRINTFN(11, "%p to %p\n", sed, last);
700 if (sed->prev != NULL) {
701 /* should not happen */
702 DPRINTFN(0, "ED already linked!\n");
705 /* (sc->sc_bus.bus_mtx) must be locked */
707 sed->next = last->next;
708 sed->ed_next = last->ed_next;
713 usb_pc_cpu_flush(sed->page_cache);
716 * the last->next->prev is never followed: sed->next->prev = sed;
720 last->ed_next = sed->ed_self;
722 usb_pc_cpu_flush(last->page_cache);
727 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
729 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
731 DPRINTFN(11, "%p from %p\n", sed, last);
733 /* (sc->sc_bus.bus_mtx) must be locked */
735 /* only remove if not removed from a queue */
738 sed->prev->next = sed->next;
739 sed->prev->ed_next = sed->ed_next;
741 usb_pc_cpu_flush(sed->prev->page_cache);
744 sed->next->prev = sed->prev;
745 usb_pc_cpu_flush(sed->next->page_cache);
747 last = ((last == sed) ? sed->prev : last);
751 usb_pc_cpu_flush(sed->page_cache);
757 ohci_isoc_done(struct usb_xfer *xfer)
760 uint32_t *plen = xfer->frlengths;
761 volatile uint16_t *olen;
763 ohci_itd_t *td = xfer->td_transfer_first;
767 panic("%s:%d: out of TD's\n",
768 __FUNCTION__, __LINE__);
772 DPRINTF("isoc TD\n");
776 usb_pc_cpu_invalidate(td->page_cache);
778 nframes = td->frames;
779 olen = &td->itd_offset[0];
785 len = le16toh(*olen);
787 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
790 len &= ((1 << 12) - 1);
794 len = 0;/* invalid length */
801 if (((void *)td) == xfer->td_transfer_last) {
807 xfer->aframes = xfer->nframes;
808 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
812 static const char *const
818 "DATA_TOGGLE_MISMATCH",
821 "DEVICE_NOT_RESPONDING",
839 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
842 ohci_td_t *td_alt_next;
849 td = xfer->td_transfer_cache;
850 td_alt_next = td->alt_next;
853 if (xfer->aframes != xfer->nframes) {
854 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
858 usb_pc_cpu_invalidate(td->page_cache);
859 phy_start = le32toh(td->td_cbp);
860 td_flags = le32toh(td->td_flags);
861 cc = OHCI_TD_GET_CC(td_flags);
865 * short transfer - compute the number of remaining
866 * bytes in the hardware buffer:
868 phy_end = le32toh(td->td_be);
869 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
870 (OHCI_PAGE_SIZE + 1) : 0x0001);
871 temp += OHCI_PAGE_OFFSET(phy_end);
872 temp -= OHCI_PAGE_OFFSET(phy_start);
874 if (temp > td->len) {
875 /* guard against corruption */
877 } else if (xfer->aframes != xfer->nframes) {
879 * Sum up total transfer length
882 xfer->frlengths[xfer->aframes] += td->len - temp;
885 if (xfer->aframes != xfer->nframes) {
886 /* transfer was complete */
887 xfer->frlengths[xfer->aframes] += td->len;
890 /* Check for last transfer */
891 if (((void *)td) == xfer->td_transfer_last) {
895 /* Check transfer status */
897 /* the transfer is finished */
901 /* Check for short transfer */
903 if (xfer->flags_int.short_frames_ok) {
904 /* follow alt next */
907 /* the transfer is finished */
914 if (td->alt_next != td_alt_next) {
915 /* this USB frame is complete */
920 /* update transfer cache */
922 xfer->td_transfer_cache = td;
924 DPRINTFN(16, "error cc=%d (%s)\n",
925 cc, ohci_cc_strs[cc]);
927 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
928 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
932 ohci_non_isoc_done(struct usb_xfer *xfer)
936 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
937 xfer, xfer->endpoint);
940 if (ohcidebug > 10) {
941 ohci_dump_tds(xfer->td_transfer_first);
947 xfer->td_transfer_cache = xfer->td_transfer_first;
949 if (xfer->flags_int.control_xfr) {
951 if (xfer->flags_int.control_hdr) {
953 err = ohci_non_isoc_done_sub(xfer);
957 if (xfer->td_transfer_cache == NULL) {
961 while (xfer->aframes != xfer->nframes) {
963 err = ohci_non_isoc_done_sub(xfer);
966 if (xfer->td_transfer_cache == NULL) {
971 if (xfer->flags_int.control_xfr &&
972 !xfer->flags_int.control_act) {
974 err = ohci_non_isoc_done_sub(xfer);
977 ohci_device_done(xfer, err);
980 /*------------------------------------------------------------------------*
981 * ohci_check_transfer_sub
982 *------------------------------------------------------------------------*/
984 ohci_check_transfer_sub(struct usb_xfer *xfer)
993 td = xfer->td_transfer_cache;
997 usb_pc_cpu_invalidate(td->page_cache);
998 phy_start = le32toh(td->td_cbp);
999 td_flags = le32toh(td->td_flags);
1000 td_next = le32toh(td->td_next);
1002 /* Check for last transfer */
1003 if (((void *)td) == xfer->td_transfer_last) {
1004 /* the transfer is finished */
1008 /* Check transfer status */
1009 cc = OHCI_TD_GET_CC(td_flags);
1011 /* the transfer is finished */
1016 * Check if we reached the last packet
1017 * or if there is a short packet:
1020 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
1021 /* follow alt next */
1028 /* update transfer cache */
1030 xfer->td_transfer_cache = td;
1034 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1036 ed->ed_headp = td->td_self;
1037 usb_pc_cpu_flush(ed->page_cache);
1039 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1042 * Make sure that the OHCI re-scans the schedule by
1043 * writing the BLF and CLF bits:
1046 if (xfer->xroot->udev->flags.self_suspended) {
1048 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1049 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1051 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1052 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1053 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1055 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1060 /*------------------------------------------------------------------------*
1061 * ohci_check_transfer
1064 * 0: USB transfer is not finished
1065 * Else: USB transfer is finished
1066 *------------------------------------------------------------------------*/
1068 ohci_check_transfer(struct usb_xfer *xfer)
1074 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1076 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1078 usb_pc_cpu_invalidate(ed->page_cache);
1079 ed_headp = le32toh(ed->ed_headp);
1080 ed_tailp = le32toh(ed->ed_tailp);
1082 if ((ed_headp & OHCI_HALTED) ||
1083 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1084 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1085 /* isochronous transfer */
1086 ohci_isoc_done(xfer);
1088 if (xfer->flags_int.short_frames_ok) {
1089 ohci_check_transfer_sub(xfer);
1090 if (xfer->td_transfer_cache) {
1091 /* not finished yet */
1095 /* store data-toggle */
1096 if (ed_headp & OHCI_TOGGLECARRY) {
1097 xfer->endpoint->toggle_next = 1;
1099 xfer->endpoint->toggle_next = 0;
1102 /* non-isochronous transfer */
1103 ohci_non_isoc_done(xfer);
1107 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1112 ohci_rhsc_enable(ohci_softc_t *sc)
1116 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1118 sc->sc_eintrs |= OHCI_RHSC;
1119 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1121 /* acknowledge any RHSC interrupt */
1122 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1128 ohci_interrupt_poll(ohci_softc_t *sc)
1130 struct usb_xfer *xfer;
1133 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1135 * check if transfer is transferred
1137 if (ohci_check_transfer(xfer)) {
1138 /* queue has been modified */
1144 /*------------------------------------------------------------------------*
1145 * ohci_interrupt - OHCI interrupt handler
1147 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1148 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1150 *------------------------------------------------------------------------*/
1152 ohci_interrupt(ohci_softc_t *sc)
1154 struct ohci_hcca *hcca;
1158 USB_BUS_LOCK(&sc->sc_bus);
1160 hcca = ohci_get_hcca(sc);
1162 DPRINTFN(16, "real interrupt\n");
1165 if (ohcidebug > 15) {
1170 done = le32toh(hcca->hcca_done_head);
1173 * The LSb of done is used to inform the HC Driver that an interrupt
1174 * condition exists for both the Done list and for another event
1175 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1176 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1177 * the interrupt was caused by other than the HccaDoneHead update
1178 * and the HcInterruptStatus register needs to be accessed to
1179 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1180 * then a Done list update interrupt is indicated and if the LSb of
1181 * done is nonzero, then an additional interrupt event is indicated
1182 * and HcInterruptStatus should be checked to determine its cause.
1187 if (done & ~OHCI_DONE_INTRS) {
1190 if (done & OHCI_DONE_INTRS) {
1191 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1193 hcca->hcca_done_head = 0;
1195 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1197 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1200 status &= ~OHCI_MIE;
1203 * nothing to be done (PCI shared
1208 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1210 status &= sc->sc_eintrs;
1214 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1216 if (status & OHCI_SO) {
1220 if (status & OHCI_RD) {
1221 printf("%s: resume detect\n", __FUNCTION__);
1222 /* XXX process resume detect */
1224 if (status & OHCI_UE) {
1225 printf("%s: unrecoverable error, "
1226 "controller halted\n", __FUNCTION__);
1227 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1230 if (status & OHCI_RHSC) {
1232 * Disable RHSC interrupt for now, because it will be
1233 * on until the port has been reset.
1235 sc->sc_eintrs &= ~OHCI_RHSC;
1236 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1240 /* do not allow RHSC interrupts > 1 per second */
1241 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1242 (void *)&ohci_rhsc_enable, sc);
1245 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1247 /* Block unprocessed interrupts. XXX */
1248 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1249 sc->sc_eintrs &= ~status;
1250 printf("%s: blocking intrs 0x%x\n",
1251 __FUNCTION__, status);
1253 /* poll all the USB transfers */
1254 ohci_interrupt_poll(sc);
1257 USB_BUS_UNLOCK(&sc->sc_bus);
1261 * called when a request does not complete
1264 ohci_timeout(void *arg)
1266 struct usb_xfer *xfer = arg;
1268 DPRINTF("xfer=%p\n", xfer);
1270 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1272 /* transfer is transferred */
1273 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1277 ohci_do_poll(struct usb_bus *bus)
1279 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1281 USB_BUS_LOCK(&sc->sc_bus);
1282 ohci_interrupt_poll(sc);
1283 USB_BUS_UNLOCK(&sc->sc_bus);
1287 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1289 struct usb_page_search buf_res;
1292 ohci_td_t *td_alt_next;
1293 uint32_t buf_offset;
1296 uint8_t shortpkt_old;
1301 shortpkt_old = temp->shortpkt;
1302 len_old = temp->len;
1305 /* software is used to detect short incoming transfers */
1307 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1308 temp->td_flags |= htole32(OHCI_TD_R);
1310 temp->td_flags &= ~htole32(OHCI_TD_R);
1316 td_next = temp->td_next;
1320 if (temp->len == 0) {
1322 if (temp->shortpkt) {
1325 /* send a Zero Length Packet, ZLP, last */
1332 average = temp->average;
1334 if (temp->len < average) {
1335 if (temp->len % temp->max_frame_size) {
1338 average = temp->len;
1342 if (td_next == NULL) {
1343 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1348 td_next = td->obj_next;
1350 /* check if we are pre-computing */
1354 /* update remaining length */
1356 temp->len -= average;
1360 /* fill out current TD */
1361 td->td_flags = temp->td_flags;
1363 /* the next TD uses TOGGLE_CARRY */
1364 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1368 * The buffer start and end phys addresses should be
1369 * 0x0 for a zero length packet.
1377 usbd_get_page(temp->pc, buf_offset, &buf_res);
1378 td->td_cbp = htole32(buf_res.physaddr);
1379 buf_offset += (average - 1);
1381 usbd_get_page(temp->pc, buf_offset, &buf_res);
1382 td->td_be = htole32(buf_res.physaddr);
1387 /* update remaining length */
1389 temp->len -= average;
1392 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1393 /* we need to receive these frames one by one ! */
1394 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1395 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1396 td->td_next = htole32(OHCI_TD_NEXT_END);
1399 /* link the current TD with the next one */
1400 td->td_next = td_next->td_self;
1404 td->alt_next = td_alt_next;
1406 usb_pc_cpu_flush(td->page_cache);
1412 /* setup alt next pointer, if any */
1413 if (temp->last_frame) {
1414 /* no alternate next */
1417 /* we use this field internally */
1418 td_alt_next = td_next;
1422 temp->shortpkt = shortpkt_old;
1423 temp->len = len_old;
1427 temp->td_next = td_next;
1431 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1433 struct ohci_std_temp temp;
1434 struct usb_pipe_methods *methods;
1440 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1441 xfer->address, UE_GET_ADDR(xfer->endpointno),
1442 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1444 temp.average = xfer->max_hc_frame_size;
1445 temp.max_frame_size = xfer->max_frame_size;
1447 /* toggle the DMA set we are using */
1448 xfer->flags_int.curr_dma_set ^= 1;
1450 /* get next DMA set */
1451 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1453 xfer->td_transfer_first = td;
1454 xfer->td_transfer_cache = td;
1458 temp.last_frame = 0;
1459 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1461 methods = xfer->endpoint->methods;
1463 /* check if we should prepend a setup message */
1465 if (xfer->flags_int.control_xfr) {
1466 if (xfer->flags_int.control_hdr) {
1468 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1469 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1471 temp.len = xfer->frlengths[0];
1472 temp.pc = xfer->frbuffers + 0;
1473 temp.shortpkt = temp.len ? 1 : 0;
1474 /* check for last frame */
1475 if (xfer->nframes == 1) {
1476 /* no STATUS stage yet, SETUP is last */
1477 if (xfer->flags_int.control_act) {
1478 temp.last_frame = 1;
1479 temp.setup_alt_next = 0;
1482 ohci_setup_standard_chain_sub(&temp);
1485 * XXX assume that the setup message is
1486 * contained within one USB packet:
1488 xfer->endpoint->toggle_next = 1;
1494 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1496 /* set data toggle */
1498 if (xfer->endpoint->toggle_next) {
1499 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1501 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1504 /* set endpoint direction */
1506 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1507 temp.td_flags |= htole32(OHCI_TD_IN);
1509 temp.td_flags |= htole32(OHCI_TD_OUT);
1512 while (x != xfer->nframes) {
1514 /* DATA0 / DATA1 message */
1516 temp.len = xfer->frlengths[x];
1517 temp.pc = xfer->frbuffers + x;
1521 if (x == xfer->nframes) {
1522 if (xfer->flags_int.control_xfr) {
1523 /* no STATUS stage yet, DATA is last */
1524 if (xfer->flags_int.control_act) {
1525 temp.last_frame = 1;
1526 temp.setup_alt_next = 0;
1529 temp.last_frame = 1;
1530 temp.setup_alt_next = 0;
1533 if (temp.len == 0) {
1535 /* make sure that we send an USB packet */
1541 /* regular data transfer */
1543 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1546 ohci_setup_standard_chain_sub(&temp);
1549 /* check if we should append a status stage */
1551 if (xfer->flags_int.control_xfr &&
1552 !xfer->flags_int.control_act) {
1555 * Send a DATA1 message and invert the current endpoint
1559 /* set endpoint direction and data toggle */
1561 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1562 temp.td_flags = htole32(OHCI_TD_OUT |
1563 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1565 temp.td_flags = htole32(OHCI_TD_IN |
1566 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1572 temp.last_frame = 1;
1573 temp.setup_alt_next = 0;
1575 ohci_setup_standard_chain_sub(&temp);
1579 /* Ensure that last TD is terminating: */
1580 td->td_next = htole32(OHCI_TD_NEXT_END);
1581 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1582 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1584 usb_pc_cpu_flush(td->page_cache);
1586 /* must have at least one frame! */
1588 xfer->td_transfer_last = td;
1591 if (ohcidebug > 8) {
1592 DPRINTF("nexttog=%d; data before transfer:\n",
1593 xfer->endpoint->toggle_next);
1594 ohci_dump_tds(xfer->td_transfer_first);
1598 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1600 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1601 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1602 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1604 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1606 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1607 ed_flags |= OHCI_ED_SPEED;
1609 ed->ed_flags = htole32(ed_flags);
1611 td = xfer->td_transfer_first;
1613 ed->ed_headp = td->td_self;
1615 if (xfer->xroot->udev->flags.self_suspended == 0) {
1616 /* the append function will flush the endpoint descriptor */
1617 OHCI_APPEND_QH(ed, *ed_last);
1619 if (methods == &ohci_device_bulk_methods) {
1620 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1622 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1624 if (methods == &ohci_device_ctrl_methods) {
1625 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1627 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1630 usb_pc_cpu_flush(ed->page_cache);
1635 ohci_root_intr(ohci_softc_t *sc)
1641 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1643 /* clear any old interrupt data */
1644 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1646 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1647 DPRINTF("sc=%p hstatus=0x%08x\n",
1651 m = (sc->sc_noport + 1);
1652 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1653 m = (8 * sizeof(sc->sc_hub_idata));
1655 for (i = 1; i < m; i++) {
1656 /* pick out CHANGE bits from the status register */
1657 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1658 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1659 DPRINTF("port %d changed\n", i);
1663 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1664 sizeof(sc->sc_hub_idata));
1667 /* NOTE: "done" can be run two times in a row,
1668 * from close and from interrupt
1671 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1673 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1674 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1677 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1680 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1681 xfer, xfer->endpoint, error);
1683 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1685 usb_pc_cpu_invalidate(ed->page_cache);
1687 if (methods == &ohci_device_bulk_methods) {
1688 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1690 if (methods == &ohci_device_ctrl_methods) {
1691 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1693 if (methods == &ohci_device_intr_methods) {
1694 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1696 if (methods == &ohci_device_isoc_methods) {
1697 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1699 xfer->td_transfer_first = NULL;
1700 xfer->td_transfer_last = NULL;
1702 /* dequeue transfer and start next transfer */
1703 usbd_transfer_done(xfer, error);
1706 /*------------------------------------------------------------------------*
1708 *------------------------------------------------------------------------*/
1710 ohci_device_bulk_open(struct usb_xfer *xfer)
1716 ohci_device_bulk_close(struct usb_xfer *xfer)
1718 ohci_device_done(xfer, USB_ERR_CANCELLED);
1722 ohci_device_bulk_enter(struct usb_xfer *xfer)
1728 ohci_device_bulk_start(struct usb_xfer *xfer)
1730 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1732 /* setup TD's and QH */
1733 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1735 /* put transfer on interrupt queue */
1736 ohci_transfer_intr_enqueue(xfer);
1739 struct usb_pipe_methods ohci_device_bulk_methods =
1741 .open = ohci_device_bulk_open,
1742 .close = ohci_device_bulk_close,
1743 .enter = ohci_device_bulk_enter,
1744 .start = ohci_device_bulk_start,
1747 /*------------------------------------------------------------------------*
1748 * ohci control support
1749 *------------------------------------------------------------------------*/
1751 ohci_device_ctrl_open(struct usb_xfer *xfer)
1757 ohci_device_ctrl_close(struct usb_xfer *xfer)
1759 ohci_device_done(xfer, USB_ERR_CANCELLED);
1763 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1769 ohci_device_ctrl_start(struct usb_xfer *xfer)
1771 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1773 /* setup TD's and QH */
1774 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1776 /* put transfer on interrupt queue */
1777 ohci_transfer_intr_enqueue(xfer);
1780 struct usb_pipe_methods ohci_device_ctrl_methods =
1782 .open = ohci_device_ctrl_open,
1783 .close = ohci_device_ctrl_close,
1784 .enter = ohci_device_ctrl_enter,
1785 .start = ohci_device_ctrl_start,
1788 /*------------------------------------------------------------------------*
1789 * ohci interrupt support
1790 *------------------------------------------------------------------------*/
1792 ohci_device_intr_open(struct usb_xfer *xfer)
1794 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1800 bit = OHCI_NO_EDS / 2;
1802 if (xfer->interval >= bit) {
1806 if (sc->sc_intr_stat[x] <
1807 sc->sc_intr_stat[best]) {
1817 sc->sc_intr_stat[best]++;
1818 xfer->qh_pos = best;
1820 DPRINTFN(3, "best=%d interval=%d\n",
1821 best, xfer->interval);
1825 ohci_device_intr_close(struct usb_xfer *xfer)
1827 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1829 sc->sc_intr_stat[xfer->qh_pos]--;
1831 ohci_device_done(xfer, USB_ERR_CANCELLED);
1835 ohci_device_intr_enter(struct usb_xfer *xfer)
1841 ohci_device_intr_start(struct usb_xfer *xfer)
1843 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1845 /* setup TD's and QH */
1846 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1848 /* put transfer on interrupt queue */
1849 ohci_transfer_intr_enqueue(xfer);
1852 struct usb_pipe_methods ohci_device_intr_methods =
1854 .open = ohci_device_intr_open,
1855 .close = ohci_device_intr_close,
1856 .enter = ohci_device_intr_enter,
1857 .start = ohci_device_intr_start,
1860 /*------------------------------------------------------------------------*
1861 * ohci isochronous support
1862 *------------------------------------------------------------------------*/
1864 ohci_device_isoc_open(struct usb_xfer *xfer)
1870 ohci_device_isoc_close(struct usb_xfer *xfer)
1873 ohci_device_done(xfer, USB_ERR_CANCELLED);
1877 ohci_device_isoc_enter(struct usb_xfer *xfer)
1879 struct usb_page_search buf_res;
1880 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1881 struct ohci_hcca *hcca;
1882 uint32_t buf_offset;
1886 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1890 ohci_itd_t *td_last = NULL;
1893 hcca = ohci_get_hcca(sc);
1895 nframes = le32toh(hcca->hcca_frame_number);
1897 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1898 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1900 if ((xfer->endpoint->is_synced == 0) ||
1901 (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1902 (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1904 * If there is data underflow or the pipe queue is empty we
1905 * schedule the transfer a few frames ahead of the current
1906 * frame position. Else two isochronous transfers might
1909 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1910 xfer->endpoint->is_synced = 1;
1911 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1914 * compute how many milliseconds the insertion is ahead of the
1915 * current frame position:
1917 buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1920 * pre-compute when the isochronous transfer will be finished:
1922 xfer->isoc_time_complete =
1923 (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1926 /* get the real number of frames */
1928 nframes = xfer->nframes;
1932 plen = xfer->frlengths;
1934 /* toggle the DMA set we are using */
1935 xfer->flags_int.curr_dma_set ^= 1;
1937 /* get next DMA set */
1938 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1940 xfer->td_transfer_first = td;
1947 panic("%s:%d: out of TD's\n",
1948 __FUNCTION__, __LINE__);
1950 itd_offset[ncur] = length;
1951 buf_offset += *plen;
1956 if ( /* check if the ITD is full */
1957 (ncur == OHCI_ITD_NOFFSET) ||
1958 /* check if we have put more than 4K into the ITD */
1959 (length & 0xF000) ||
1960 /* check if it is the last frame */
1963 /* fill current ITD */
1964 td->itd_flags = htole32(
1966 OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1968 OHCI_ITD_SET_FC(ncur));
1971 xfer->endpoint->isoc_next += ncur;
1979 td->itd_offset[ncur] =
1980 htole16(OHCI_ITD_MK_OFFS(0));
1983 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1984 length = OHCI_PAGE_MASK(buf_res.physaddr);
1986 OHCI_PAGE(buf_res.physaddr);
1987 td->itd_bp0 = htole32(buf_res.physaddr);
1988 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1989 td->itd_be = htole32(buf_res.physaddr);
1992 itd_offset[ncur] += length;
1994 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1995 td->itd_offset[ncur] =
1996 htole16(itd_offset[ncur]);
2005 /* link the last TD with the next one */
2006 td_last->itd_next = td->itd_self;
2008 usb_pc_cpu_flush(td_last->page_cache);
2012 /* update the last TD */
2013 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
2014 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
2015 td_last->itd_next = 0;
2017 usb_pc_cpu_flush(td_last->page_cache);
2019 xfer->td_transfer_last = td_last;
2022 if (ohcidebug > 8) {
2023 DPRINTF("data before transfer:\n");
2024 ohci_dump_itds(xfer->td_transfer_first);
2027 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2029 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2030 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
2032 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
2034 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
2035 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
2036 OHCI_ED_SET_MAXP(xfer->max_frame_size));
2038 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2039 ed_flags |= OHCI_ED_SPEED;
2041 ed->ed_flags = htole32(ed_flags);
2043 td = xfer->td_transfer_first;
2045 ed->ed_headp = td->itd_self;
2047 /* isochronous transfers are not affected by suspend / resume */
2048 /* the append function will flush the endpoint descriptor */
2050 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2054 ohci_device_isoc_start(struct usb_xfer *xfer)
2056 /* put transfer on interrupt queue */
2057 ohci_transfer_intr_enqueue(xfer);
2060 struct usb_pipe_methods ohci_device_isoc_methods =
2062 .open = ohci_device_isoc_open,
2063 .close = ohci_device_isoc_close,
2064 .enter = ohci_device_isoc_enter,
2065 .start = ohci_device_isoc_start,
2068 /*------------------------------------------------------------------------*
2069 * ohci root control support
2070 *------------------------------------------------------------------------*
2071 * Simulate a hardware hub by handling all the necessary requests.
2072 *------------------------------------------------------------------------*/
2075 struct usb_device_descriptor ohci_devd =
2077 sizeof(struct usb_device_descriptor),
2078 UDESC_DEVICE, /* type */
2079 {0x00, 0x01}, /* USB version */
2080 UDCLASS_HUB, /* class */
2081 UDSUBCLASS_HUB, /* subclass */
2082 UDPROTO_FSHUB, /* protocol */
2083 64, /* max packet */
2084 {0}, {0}, {0x00, 0x01}, /* device id */
2085 1, 2, 0, /* string indicies */
2086 1 /* # of configurations */
2090 struct ohci_config_desc ohci_confd =
2093 .bLength = sizeof(struct usb_config_descriptor),
2094 .bDescriptorType = UDESC_CONFIG,
2095 .wTotalLength[0] = sizeof(ohci_confd),
2097 .bConfigurationValue = 1,
2098 .iConfiguration = 0,
2099 .bmAttributes = UC_SELF_POWERED,
2100 .bMaxPower = 0, /* max power */
2103 .bLength = sizeof(struct usb_interface_descriptor),
2104 .bDescriptorType = UDESC_INTERFACE,
2106 .bInterfaceClass = UICLASS_HUB,
2107 .bInterfaceSubClass = UISUBCLASS_HUB,
2108 .bInterfaceProtocol = UIPROTO_FSHUB,
2111 .bLength = sizeof(struct usb_endpoint_descriptor),
2112 .bDescriptorType = UDESC_ENDPOINT,
2113 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2114 .bmAttributes = UE_INTERRUPT,
2115 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2121 struct usb_hub_descriptor ohci_hubd =
2123 0, /* dynamic length */
2133 ohci_roothub_exec(struct usb_device *udev,
2134 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2136 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2138 const char *str_ptr;
2147 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2150 ptr = (const void *)&sc->sc_hub_desc.temp;
2154 value = UGETW(req->wValue);
2155 index = UGETW(req->wIndex);
2157 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2158 "wValue=0x%04x wIndex=0x%04x\n",
2159 req->bmRequestType, req->bRequest,
2160 UGETW(req->wLength), value, index);
2162 #define C(x,y) ((x) | ((y) << 8))
2163 switch (C(req->bRequest, req->bmRequestType)) {
2164 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2165 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2166 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2168 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2169 * for the integrated root hub.
2172 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2174 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2176 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2177 switch (value >> 8) {
2179 if ((value & 0xff) != 0) {
2180 err = USB_ERR_IOERROR;
2183 len = sizeof(ohci_devd);
2184 ptr = (const void *)&ohci_devd;
2188 if ((value & 0xff) != 0) {
2189 err = USB_ERR_IOERROR;
2192 len = sizeof(ohci_confd);
2193 ptr = (const void *)&ohci_confd;
2197 switch (value & 0xff) {
2198 case 0: /* Language table */
2202 case 1: /* Vendor */
2203 str_ptr = sc->sc_vendor;
2206 case 2: /* Product */
2207 str_ptr = "OHCI root HUB";
2215 len = usb_make_str_desc(
2216 sc->sc_hub_desc.temp,
2217 sizeof(sc->sc_hub_desc.temp),
2222 err = USB_ERR_IOERROR;
2226 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2228 sc->sc_hub_desc.temp[0] = 0;
2230 case C(UR_GET_STATUS, UT_READ_DEVICE):
2232 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2234 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2235 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2237 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2239 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2240 if (value >= OHCI_MAX_DEVICES) {
2241 err = USB_ERR_IOERROR;
2244 sc->sc_addr = value;
2246 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2247 if ((value != 0) && (value != 1)) {
2248 err = USB_ERR_IOERROR;
2251 sc->sc_conf = value;
2253 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2255 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2256 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2257 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2258 err = USB_ERR_IOERROR;
2260 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2262 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2265 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2267 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2268 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2269 "port=%d feature=%d\n",
2272 (index > sc->sc_noport)) {
2273 err = USB_ERR_IOERROR;
2276 port = OHCI_RH_PORT_STATUS(index);
2278 case UHF_PORT_ENABLE:
2279 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2281 case UHF_PORT_SUSPEND:
2282 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2284 case UHF_PORT_POWER:
2285 /* Yes, writing to the LOW_SPEED bit clears power. */
2286 OWRITE4(sc, port, UPS_LOW_SPEED);
2288 case UHF_C_PORT_CONNECTION:
2289 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2291 case UHF_C_PORT_ENABLE:
2292 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2294 case UHF_C_PORT_SUSPEND:
2295 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2297 case UHF_C_PORT_OVER_CURRENT:
2298 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2300 case UHF_C_PORT_RESET:
2301 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2304 err = USB_ERR_IOERROR;
2308 case UHF_C_PORT_CONNECTION:
2309 case UHF_C_PORT_ENABLE:
2310 case UHF_C_PORT_SUSPEND:
2311 case UHF_C_PORT_OVER_CURRENT:
2312 case UHF_C_PORT_RESET:
2313 /* enable RHSC interrupt if condition is cleared. */
2314 if ((OREAD4(sc, port) >> 16) == 0)
2315 ohci_rhsc_enable(sc);
2321 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2322 if ((value & 0xff) != 0) {
2323 err = USB_ERR_IOERROR;
2326 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2328 sc->sc_hub_desc.hubd = ohci_hubd;
2329 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2330 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2331 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2332 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2333 /* XXX overcurrent */
2335 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2336 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2338 for (l = 0; l < sc->sc_noport; l++) {
2340 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2344 sc->sc_hub_desc.hubd.bDescLength =
2345 8 + ((sc->sc_noport + 7) / 8);
2346 len = sc->sc_hub_desc.hubd.bDescLength;
2349 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2351 bzero(sc->sc_hub_desc.temp, 16);
2353 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2354 DPRINTFN(9, "get port status i=%d\n",
2357 (index > sc->sc_noport)) {
2358 err = USB_ERR_IOERROR;
2361 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2362 DPRINTFN(9, "port status=0x%04x\n", v);
2363 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2364 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2365 len = sizeof(sc->sc_hub_desc.ps);
2367 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2368 err = USB_ERR_IOERROR;
2370 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2372 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2374 (index > sc->sc_noport)) {
2375 err = USB_ERR_IOERROR;
2378 port = OHCI_RH_PORT_STATUS(index);
2380 case UHF_PORT_ENABLE:
2381 OWRITE4(sc, port, UPS_PORT_ENABLED);
2383 case UHF_PORT_SUSPEND:
2384 OWRITE4(sc, port, UPS_SUSPEND);
2386 case UHF_PORT_RESET:
2387 DPRINTFN(6, "reset port %d\n", index);
2388 OWRITE4(sc, port, UPS_RESET);
2391 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2392 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2394 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2398 err = USB_ERR_TIMEOUT;
2402 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2403 index, OREAD4(sc, port));
2405 case UHF_PORT_POWER:
2406 DPRINTFN(3, "set port power %d\n", index);
2407 OWRITE4(sc, port, UPS_PORT_POWER);
2410 err = USB_ERR_IOERROR;
2415 err = USB_ERR_IOERROR;
2425 ohci_xfer_setup(struct usb_setup_params *parm)
2427 struct usb_page_search page_info;
2428 struct usb_page_cache *pc;
2430 struct usb_xfer *xfer;
2437 sc = OHCI_BUS2SC(parm->udev->bus);
2438 xfer = parm->curr_xfer;
2440 parm->hc_max_packet_size = 0x500;
2441 parm->hc_max_packet_count = 1;
2442 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2445 * calculate ntd and nqh
2447 if (parm->methods == &ohci_device_ctrl_methods) {
2448 xfer->flags_int.bdma_enable = 1;
2450 usbd_transfer_setup_sub(parm);
2453 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2454 + (xfer->max_data_length / xfer->max_hc_frame_size));
2457 } else if (parm->methods == &ohci_device_bulk_methods) {
2458 xfer->flags_int.bdma_enable = 1;
2460 usbd_transfer_setup_sub(parm);
2463 ntd = ((2 * xfer->nframes)
2464 + (xfer->max_data_length / xfer->max_hc_frame_size));
2467 } else if (parm->methods == &ohci_device_intr_methods) {
2468 xfer->flags_int.bdma_enable = 1;
2470 usbd_transfer_setup_sub(parm);
2473 ntd = ((2 * xfer->nframes)
2474 + (xfer->max_data_length / xfer->max_hc_frame_size));
2477 } else if (parm->methods == &ohci_device_isoc_methods) {
2478 xfer->flags_int.bdma_enable = 1;
2480 usbd_transfer_setup_sub(parm);
2482 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2483 ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2490 usbd_transfer_setup_sub(parm);
2504 if (usbd_transfer_setup_sub_malloc(
2505 parm, &pc, sizeof(ohci_td_t),
2506 OHCI_TD_ALIGN, ntd)) {
2507 parm->err = USB_ERR_NOMEM;
2511 for (n = 0; n != ntd; n++) {
2514 usbd_get_page(pc + n, 0, &page_info);
2516 td = page_info.buffer;
2519 td->td_self = htole32(page_info.physaddr);
2520 td->obj_next = last_obj;
2521 td->page_cache = pc + n;
2525 usb_pc_cpu_flush(pc + n);
2528 if (usbd_transfer_setup_sub_malloc(
2529 parm, &pc, sizeof(ohci_itd_t),
2530 OHCI_ITD_ALIGN, nitd)) {
2531 parm->err = USB_ERR_NOMEM;
2535 for (n = 0; n != nitd; n++) {
2538 usbd_get_page(pc + n, 0, &page_info);
2540 itd = page_info.buffer;
2543 itd->itd_self = htole32(page_info.physaddr);
2544 itd->obj_next = last_obj;
2545 itd->page_cache = pc + n;
2549 usb_pc_cpu_flush(pc + n);
2552 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2556 if (usbd_transfer_setup_sub_malloc(
2557 parm, &pc, sizeof(ohci_ed_t),
2558 OHCI_ED_ALIGN, nqh)) {
2559 parm->err = USB_ERR_NOMEM;
2563 for (n = 0; n != nqh; n++) {
2566 usbd_get_page(pc + n, 0, &page_info);
2568 ed = page_info.buffer;
2571 ed->ed_self = htole32(page_info.physaddr);
2572 ed->obj_next = last_obj;
2573 ed->page_cache = pc + n;
2577 usb_pc_cpu_flush(pc + n);
2580 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2582 if (!xfer->flags_int.curr_dma_set) {
2583 xfer->flags_int.curr_dma_set = 1;
2589 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2590 struct usb_endpoint *ep)
2592 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2594 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2596 edesc->bEndpointAddress, udev->flags.usb_mode,
2599 if (udev->flags.usb_mode != USB_MODE_HOST) {
2603 if (udev->device_index != sc->sc_addr) {
2604 switch (edesc->bmAttributes & UE_XFERTYPE) {
2606 ep->methods = &ohci_device_ctrl_methods;
2609 ep->methods = &ohci_device_intr_methods;
2611 case UE_ISOCHRONOUS:
2612 if (udev->speed == USB_SPEED_FULL) {
2613 ep->methods = &ohci_device_isoc_methods;
2617 if (udev->speed != USB_SPEED_LOW) {
2618 ep->methods = &ohci_device_bulk_methods;
2629 ohci_xfer_unsetup(struct usb_xfer *xfer)
2635 ohci_get_dma_delay(struct usb_bus *bus, uint32_t *pus)
2638 * Wait until hardware has finished any possible use of the
2639 * transfer descriptor(s) and QH
2641 *pus = (1125); /* microseconds */
2645 ohci_device_resume(struct usb_device *udev)
2647 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2648 struct usb_xfer *xfer;
2649 struct usb_pipe_methods *methods;
2654 USB_BUS_LOCK(udev->bus);
2656 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2658 if (xfer->xroot->udev == udev) {
2660 methods = xfer->endpoint->methods;
2661 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2663 if (methods == &ohci_device_bulk_methods) {
2664 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2665 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2667 if (methods == &ohci_device_ctrl_methods) {
2668 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2669 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2671 if (methods == &ohci_device_intr_methods) {
2672 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2677 USB_BUS_UNLOCK(udev->bus);
2683 ohci_device_suspend(struct usb_device *udev)
2685 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2686 struct usb_xfer *xfer;
2687 struct usb_pipe_methods *methods;
2692 USB_BUS_LOCK(udev->bus);
2694 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2696 if (xfer->xroot->udev == udev) {
2698 methods = xfer->endpoint->methods;
2699 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2701 if (methods == &ohci_device_bulk_methods) {
2702 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2704 if (methods == &ohci_device_ctrl_methods) {
2705 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2707 if (methods == &ohci_device_intr_methods) {
2708 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2713 USB_BUS_UNLOCK(udev->bus);
2719 ohci_set_hw_power(struct usb_bus *bus)
2721 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2729 flags = bus->hw_power_state;
2731 temp = OREAD4(sc, OHCI_CONTROL);
2732 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2734 if (flags & USB_HW_POWER_CONTROL)
2737 if (flags & USB_HW_POWER_BULK)
2740 if (flags & USB_HW_POWER_INTERRUPT)
2743 if (flags & USB_HW_POWER_ISOC)
2744 temp |= OHCI_IE | OHCI_PLE;
2746 OWRITE4(sc, OHCI_CONTROL, temp);
2748 USB_BUS_UNLOCK(bus);
2753 struct usb_bus_methods ohci_bus_methods =
2755 .endpoint_init = ohci_ep_init,
2756 .xfer_setup = ohci_xfer_setup,
2757 .xfer_unsetup = ohci_xfer_unsetup,
2758 .get_dma_delay = ohci_get_dma_delay,
2759 .device_resume = ohci_device_resume,
2760 .device_suspend = ohci_device_suspend,
2761 .set_hw_power = ohci_set_hw_power,
2762 .roothub_exec = ohci_roothub_exec,
2763 .xfer_poll = ohci_do_poll,