2 * Copyright (c) 1997, 1998, 1999, 2000-2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver.
38 * Used in the LinkSys USB200M and various other adapters.
40 * Manuals available from:
41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
43 * controller) to find the definitions for the RX control register.
44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
46 * Written by Bill Paul <wpaul@windriver.com>
52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
53 * It uses an external PHY (reference designs use a RealTek chip),
54 * and has a 64-bit multicast hash filter. There is some information
55 * missing from the manual which one needs to know in order to make
58 * - You must set bit 7 in the RX control register, otherwise the
59 * chip won't receive any packets.
60 * - You must initialize all 3 IPG registers, or you won't be able
61 * to send any packets.
63 * Note that this device appears to only support loading the station
64 * address via autload from the EEPROM (i.e. there's no way to manaully
67 * (Adam Weinberger wanted me to name this driver if_gir.c.)
71 * Ax88178 and Ax88772 support backported from the OpenBSD driver.
72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com
75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf
76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf
79 #include <sys/stdint.h>
80 #include <sys/stddef.h>
81 #include <sys/param.h>
82 #include <sys/queue.h>
83 #include <sys/types.h>
84 #include <sys/systm.h>
85 #include <sys/kernel.h>
87 #include <sys/linker_set.h>
88 #include <sys/module.h>
90 #include <sys/mutex.h>
91 #include <sys/condvar.h>
92 #include <sys/sysctl.h>
94 #include <sys/unistd.h>
95 #include <sys/callout.h>
96 #include <sys/malloc.h>
99 #include <dev/usb/usb.h>
100 #include <dev/usb/usbdi.h>
101 #include <dev/usb/usbdi_util.h>
104 #define USB_DEBUG_VAR axe_debug
105 #include <dev/usb/usb_debug.h>
106 #include <dev/usb/usb_process.h>
108 #include <dev/usb/net/usb_ethernet.h>
109 #include <dev/usb/net/if_axereg.h>
112 * AXE_178_MAX_FRAME_BURST
113 * max frame burst size for Ax88178 and Ax88772
118 * use the largest your system can handle without USB stalling.
120 * NB: 88772 parts appear to generate lots of input errors with
121 * a 2K rx buffer and 8K is only slightly faster than 4K on an
122 * EHCI port on a T42 so change at your own risk.
124 #define AXE_178_MAX_FRAME_BURST 1
127 static int axe_debug = 0;
129 SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe");
130 SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0,
135 * Various supported device vendors/products.
137 static const struct usb_device_id axe_devs[] = {
138 #define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
139 AXE_DEV(ABOCOM, UF200, 0),
140 AXE_DEV(ACERCM, EP1427X2, 0),
141 AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772),
142 AXE_DEV(ASIX, AX88172, 0),
143 AXE_DEV(ASIX, AX88178, AXE_FLAG_178),
144 AXE_DEV(ASIX, AX88772, AXE_FLAG_772),
145 AXE_DEV(ASIX, AX88772A, AXE_FLAG_772),
146 AXE_DEV(ATEN, UC210T, 0),
147 AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178),
148 AXE_DEV(BILLIONTON, USB2AR, 0),
149 AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772),
150 AXE_DEV(COREGA, FETHER_USB2_TX, 0),
151 AXE_DEV(DLINK, DUBE100, 0),
152 AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772),
153 AXE_DEV(GOODWAY, GWUSB2E, 0),
154 AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178),
155 AXE_DEV(JVC, MP_PRX1, 0),
156 AXE_DEV(LINKSYS2, USB200M, 0),
157 AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178),
158 AXE_DEV(MELCO, LUAU2KTX, 0),
159 AXE_DEV(NETGEAR, FA120, 0),
160 AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772),
161 AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178),
162 AXE_DEV(SITECOM, LN029, 0),
163 AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178),
164 AXE_DEV(SYSTEMTALKS, SGCX2UL, 0),
168 static device_probe_t axe_probe;
169 static device_attach_t axe_attach;
170 static device_detach_t axe_detach;
172 static usb_callback_t axe_intr_callback;
173 static usb_callback_t axe_bulk_read_callback;
174 static usb_callback_t axe_bulk_write_callback;
176 static miibus_readreg_t axe_miibus_readreg;
177 static miibus_writereg_t axe_miibus_writereg;
178 static miibus_statchg_t axe_miibus_statchg;
180 static uether_fn_t axe_attach_post;
181 static uether_fn_t axe_init;
182 static uether_fn_t axe_stop;
183 static uether_fn_t axe_start;
184 static uether_fn_t axe_tick;
185 static uether_fn_t axe_setmulti;
186 static uether_fn_t axe_setpromisc;
188 static int axe_ifmedia_upd(struct ifnet *);
189 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
190 static int axe_cmd(struct axe_softc *, int, int, int, void *);
191 static void axe_ax88178_init(struct axe_softc *);
192 static void axe_ax88772_init(struct axe_softc *);
193 static int axe_get_phyno(struct axe_softc *, int);
195 static const struct usb_config axe_config[AXE_N_TRANSFER] = {
199 .endpoint = UE_ADDR_ANY,
200 .direction = UE_DIR_OUT,
201 .bufsize = AXE_BULK_BUF_SIZE,
202 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
203 .callback = axe_bulk_write_callback,
204 .timeout = 10000, /* 10 seconds */
209 .endpoint = UE_ADDR_ANY,
210 .direction = UE_DIR_IN,
211 .bufsize = 16384, /* bytes */
212 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
213 .callback = axe_bulk_read_callback,
214 .timeout = 0, /* no timeout */
218 .type = UE_INTERRUPT,
219 .endpoint = UE_ADDR_ANY,
220 .direction = UE_DIR_IN,
221 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
222 .bufsize = 0, /* use wMaxPacketSize */
223 .callback = axe_intr_callback,
227 static device_method_t axe_methods[] = {
228 /* Device interface */
229 DEVMETHOD(device_probe, axe_probe),
230 DEVMETHOD(device_attach, axe_attach),
231 DEVMETHOD(device_detach, axe_detach),
234 DEVMETHOD(bus_print_child, bus_generic_print_child),
235 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
238 DEVMETHOD(miibus_readreg, axe_miibus_readreg),
239 DEVMETHOD(miibus_writereg, axe_miibus_writereg),
240 DEVMETHOD(miibus_statchg, axe_miibus_statchg),
245 static driver_t axe_driver = {
247 .methods = axe_methods,
248 .size = sizeof(struct axe_softc),
251 static devclass_t axe_devclass;
253 DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0);
254 DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0);
255 MODULE_DEPEND(axe, uether, 1, 1, 1);
256 MODULE_DEPEND(axe, usb, 1, 1, 1);
257 MODULE_DEPEND(axe, ether, 1, 1, 1);
258 MODULE_DEPEND(axe, miibus, 1, 1, 1);
260 static const struct usb_ether_methods axe_ue_methods = {
261 .ue_attach_post = axe_attach_post,
262 .ue_start = axe_start,
266 .ue_setmulti = axe_setmulti,
267 .ue_setpromisc = axe_setpromisc,
268 .ue_mii_upd = axe_ifmedia_upd,
269 .ue_mii_sts = axe_ifmedia_sts,
273 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
275 struct usb_device_request req;
278 AXE_LOCK_ASSERT(sc, MA_OWNED);
280 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ?
281 UT_WRITE_VENDOR_DEVICE :
282 UT_READ_VENDOR_DEVICE);
283 req.bRequest = AXE_CMD_CMD(cmd);
284 USETW(req.wValue, val);
285 USETW(req.wIndex, index);
286 USETW(req.wLength, AXE_CMD_LEN(cmd));
288 err = uether_do_request(&sc->sc_ue, &req, buf, 1000);
294 axe_miibus_readreg(device_t dev, int phy, int reg)
296 struct axe_softc *sc = device_get_softc(dev);
300 if (sc->sc_phyno != phy)
303 locked = mtx_owned(&sc->sc_mtx);
307 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
308 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
309 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
312 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) {
314 * BMSR of AX88772 indicates that it supports extended
315 * capability but the extended status register is
316 * revered for embedded ethernet PHY. So clear the
317 * extended capability bit of BMSR.
328 axe_miibus_writereg(device_t dev, int phy, int reg, int val)
330 struct axe_softc *sc = device_get_softc(dev);
335 if (sc->sc_phyno != phy)
338 locked = mtx_owned(&sc->sc_mtx);
342 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
343 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
344 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
352 axe_miibus_statchg(device_t dev)
354 struct axe_softc *sc = device_get_softc(dev);
355 struct mii_data *mii = GET_MII(sc);
360 locked = mtx_owned(&sc->sc_mtx);
364 ifp = uether_getifp(&sc->sc_ue);
365 if (mii == NULL || ifp == NULL ||
366 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
369 sc->sc_flags &= ~AXE_FLAG_LINK;
370 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
371 (IFM_ACTIVE | IFM_AVALID)) {
372 switch (IFM_SUBTYPE(mii->mii_media_active)) {
375 sc->sc_flags |= AXE_FLAG_LINK;
378 if ((sc->sc_flags & AXE_FLAG_178) == 0)
380 sc->sc_flags |= AXE_FLAG_LINK;
387 /* Lost link, do nothing. */
388 if ((sc->sc_flags & AXE_FLAG_LINK) == 0)
392 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
393 val |= AXE_MEDIA_FULL_DUPLEX;
394 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
395 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
396 if ((sc->sc_flags & AXE_FLAG_178) != 0)
397 val |= AXE_178_MEDIA_ENCK;
398 switch (IFM_SUBTYPE(mii->mii_media_active)) {
400 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
403 val |= AXE_178_MEDIA_100TX;
406 /* doesn't need to be handled */
410 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
412 device_printf(dev, "media change failed, error %d\n", err);
422 axe_ifmedia_upd(struct ifnet *ifp)
424 struct axe_softc *sc = ifp->if_softc;
425 struct mii_data *mii = GET_MII(sc);
428 AXE_LOCK_ASSERT(sc, MA_OWNED);
430 if (mii->mii_instance) {
431 struct mii_softc *miisc;
433 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
434 mii_phy_reset(miisc);
436 error = mii_mediachg(mii);
441 * Report current media status.
444 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
446 struct axe_softc *sc = ifp->if_softc;
447 struct mii_data *mii = GET_MII(sc);
452 ifmr->ifm_active = mii->mii_media_active;
453 ifmr->ifm_status = mii->mii_media_status;
457 axe_setmulti(struct usb_ether *ue)
459 struct axe_softc *sc = uether_getsc(ue);
460 struct ifnet *ifp = uether_getifp(ue);
461 struct ifmultiaddr *ifma;
464 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
466 AXE_LOCK_ASSERT(sc, MA_OWNED);
468 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
469 rxmode = le16toh(rxmode);
471 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
472 rxmode |= AXE_RXCMD_ALLMULTI;
473 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
476 rxmode &= ~AXE_RXCMD_ALLMULTI;
479 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
481 if (ifma->ifma_addr->sa_family != AF_LINK)
483 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
484 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
485 hashtbl[h / 8] |= 1 << (h % 8);
487 if_maddr_runlock(ifp);
489 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
490 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
494 axe_get_phyno(struct axe_softc *sc, int sel)
498 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) {
499 case PHY_TYPE_100_HOME:
501 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]);
503 case PHY_TYPE_SPECIAL:
507 case PHY_TYPE_NON_SUP:
518 axe_ax88178_init(struct axe_softc *sc)
520 int gpio0 = 0, phymode = 0;
523 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
525 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
526 eeprom = le16toh(eeprom);
527 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
529 /* if EEPROM is invalid we have to use to GPIO0 */
530 if (eeprom == 0xffff) {
534 phymode = eeprom & 7;
535 gpio0 = (eeprom & 0x80) ? 0 : 1;
538 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
539 uether_pause(&sc->sc_ue, hz / 16);
541 if ((eeprom >> 8) != 0x01) {
542 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
543 uether_pause(&sc->sc_ue, hz / 32);
545 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
546 uether_pause(&sc->sc_ue, hz / 3);
548 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
549 uether_pause(&sc->sc_ue, hz / 32);
551 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
552 uether_pause(&sc->sc_ue, hz / 32);
554 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
555 uether_pause(&sc->sc_ue, hz / 32);
559 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
560 uether_pause(&sc->sc_ue, hz / 4);
562 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
563 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
564 uether_pause(&sc->sc_ue, hz / 4);
565 /* Enable MII/GMII/RGMII interface to work with external PHY. */
566 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
567 uether_pause(&sc->sc_ue, hz / 4);
569 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
573 axe_ax88772_init(struct axe_softc *sc)
575 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
576 uether_pause(&sc->sc_ue, hz / 16);
578 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) {
579 /* ask for the embedded PHY */
580 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
581 uether_pause(&sc->sc_ue, hz / 64);
583 /* power down and reset state, pin reset state */
584 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
585 AXE_SW_RESET_CLEAR, NULL);
586 uether_pause(&sc->sc_ue, hz / 16);
588 /* power down/reset state, pin operating state */
589 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
590 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
591 uether_pause(&sc->sc_ue, hz / 4);
593 /* power up, reset */
594 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
596 /* power up, operating */
597 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
598 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
600 /* ask for external PHY */
601 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
602 uether_pause(&sc->sc_ue, hz / 64);
604 /* power down internal PHY */
605 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
606 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
609 uether_pause(&sc->sc_ue, hz / 4);
610 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
614 axe_reset(struct axe_softc *sc)
616 struct usb_config_descriptor *cd;
619 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
621 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
622 cd->bConfigurationValue);
624 DPRINTF("reset failed (ignored)\n");
626 /* Wait a little while for the chip to get its brains in order. */
627 uether_pause(&sc->sc_ue, hz / 100);
631 axe_attach_post(struct usb_ether *ue)
633 struct axe_softc *sc = uether_getsc(ue);
636 * Load PHY indexes first. Needed by axe_xxx_init().
638 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs);
640 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n",
641 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]);
643 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
644 if (sc->sc_phyno == -1)
645 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
646 if (sc->sc_phyno == -1) {
647 device_printf(sc->sc_ue.ue_dev,
648 "no valid PHY address found, assuming PHY address 0\n");
652 if (sc->sc_flags & AXE_FLAG_178)
653 axe_ax88178_init(sc);
654 else if (sc->sc_flags & AXE_FLAG_772)
655 axe_ax88772_init(sc);
658 * Get station address.
660 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
661 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
663 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
668 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs);
672 * Probe for a AX88172 chip.
675 axe_probe(device_t dev)
677 struct usb_attach_arg *uaa = device_get_ivars(dev);
679 if (uaa->usb_mode != USB_MODE_HOST)
681 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX)
683 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX)
686 return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa));
690 * Attach the interface. Allocate softc structures, do ifmedia
691 * setup and ethernet/BPF attach.
694 axe_attach(device_t dev)
696 struct usb_attach_arg *uaa = device_get_ivars(dev);
697 struct axe_softc *sc = device_get_softc(dev);
698 struct usb_ether *ue = &sc->sc_ue;
702 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
704 device_set_usb_desc(dev);
706 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
708 iface_index = AXE_IFACE_IDX;
709 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
710 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx);
712 device_printf(dev, "allocating USB transfers failed\n");
718 ue->ue_udev = uaa->device;
719 ue->ue_mtx = &sc->sc_mtx;
720 ue->ue_methods = &axe_ue_methods;
722 error = uether_ifattach(ue);
724 device_printf(dev, "could not attach interface\n");
727 return (0); /* success */
731 return (ENXIO); /* failure */
735 axe_detach(device_t dev)
737 struct axe_softc *sc = device_get_softc(dev);
738 struct usb_ether *ue = &sc->sc_ue;
740 usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER);
742 mtx_destroy(&sc->sc_mtx);
748 axe_intr_callback(struct usb_xfer *xfer, usb_error_t error)
750 switch (USB_GET_STATE(xfer)) {
751 case USB_ST_TRANSFERRED:
754 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
755 usbd_transfer_submit(xfer);
759 if (error != USB_ERR_CANCELLED) {
760 /* try to clear stall first */
761 usbd_xfer_set_stall(xfer);
768 #if (AXE_BULK_BUF_SIZE >= 0x10000)
769 #error "Please update axe_bulk_read_callback()!"
773 axe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
775 struct axe_softc *sc = usbd_xfer_softc(xfer);
776 struct usb_ether *ue = &sc->sc_ue;
777 struct ifnet *ifp = uether_getifp(ue);
778 struct axe_sframe_hdr hdr;
779 struct usb_page_cache *pc;
783 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
785 switch (USB_GET_STATE(xfer)) {
786 case USB_ST_TRANSFERRED:
791 pc = usbd_xfer_get_frame(xfer, 0);
792 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
793 while (pos < actlen) {
794 if ((pos + sizeof(hdr)) > actlen) {
795 /* too little data */
799 usbd_copy_out(pc, pos, &hdr, sizeof(hdr));
801 if ((hdr.len ^ hdr.ilen) != 0xFFFF) {
808 len = le16toh(hdr.len);
809 if ((pos + len) > actlen) {
814 err = uether_rxbuf(ue, pc, pos, len);
816 pos += len + (len % 2);
819 err = uether_rxbuf(ue, pc, 0, actlen);
828 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
829 usbd_transfer_submit(xfer);
834 DPRINTF("bulk read error, %s\n", usbd_errstr(error));
836 if (error != USB_ERR_CANCELLED) {
837 /* try to clear stall first */
838 usbd_xfer_set_stall(xfer);
846 #if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4)))
847 #error "Please update axe_bulk_write_callback()!"
851 axe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
853 struct axe_softc *sc = usbd_xfer_softc(xfer);
854 struct axe_sframe_hdr hdr;
855 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
856 struct usb_page_cache *pc;
860 switch (USB_GET_STATE(xfer)) {
861 case USB_ST_TRANSFERRED:
862 DPRINTFN(11, "transfer complete\n");
867 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
869 * don't send anything if there is no link !
874 pc = usbd_xfer_get_frame(xfer, 0);
878 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
882 break; /* send out data */
885 if (m->m_pkthdr.len > MCLBYTES) {
886 m->m_pkthdr.len = MCLBYTES;
888 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
890 hdr.len = htole16(m->m_pkthdr.len);
893 usbd_copy_in(pc, pos, &hdr, sizeof(hdr));
898 * NOTE: Some drivers force a short packet
899 * by appending a dummy header with zero
900 * length at then end of the USB transfer.
901 * This driver uses the
902 * USB_FORCE_SHORT_XFER flag instead.
905 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
906 pos += m->m_pkthdr.len;
909 * if there's a BPF listener, bounce a copy
910 * of this frame to him:
916 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
917 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) {
918 /* send out frame(s) */
927 usbd_xfer_set_frame_len(xfer, 0, pos);
928 usbd_transfer_submit(xfer);
932 DPRINTFN(11, "transfer error, %s\n",
937 if (error != USB_ERR_CANCELLED) {
938 /* try to clear stall first */
939 usbd_xfer_set_stall(xfer);
948 axe_tick(struct usb_ether *ue)
950 struct axe_softc *sc = uether_getsc(ue);
951 struct mii_data *mii = GET_MII(sc);
953 AXE_LOCK_ASSERT(sc, MA_OWNED);
956 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
957 axe_miibus_statchg(ue->ue_dev);
958 if ((sc->sc_flags & AXE_FLAG_LINK) != 0)
964 axe_start(struct usb_ether *ue)
966 struct axe_softc *sc = uether_getsc(ue);
969 * start the USB transfers, if not already started:
971 usbd_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]);
972 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]);
973 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]);
977 axe_init(struct usb_ether *ue)
979 struct axe_softc *sc = uether_getsc(ue);
980 struct ifnet *ifp = uether_getifp(ue);
983 AXE_LOCK_ASSERT(sc, MA_OWNED);
985 /* Cancel pending I/O */
988 /* Set MAC address. */
989 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
990 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
992 axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
994 /* Set transmitter IPG values */
995 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
996 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2],
997 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL);
999 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL);
1000 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL);
1001 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL);
1004 /* Enable receiver, set RX mode */
1005 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE);
1006 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
1008 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */
1011 * Default Rx buffer size is too small to get
1012 * maximum performance.
1014 rxmode |= AXE_178_RXCMD_MFB_16384;
1017 rxmode |= AXE_172_RXCMD_UNICAST;
1020 /* If we want promiscuous mode, set the allframes bit. */
1021 if (ifp->if_flags & IFF_PROMISC)
1022 rxmode |= AXE_RXCMD_PROMISC;
1024 if (ifp->if_flags & IFF_BROADCAST)
1025 rxmode |= AXE_RXCMD_BROADCAST;
1027 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1029 /* Load the multicast filter. */
1032 usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]);
1034 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1039 axe_setpromisc(struct usb_ether *ue)
1041 struct axe_softc *sc = uether_getsc(ue);
1042 struct ifnet *ifp = uether_getifp(ue);
1045 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
1047 rxmode = le16toh(rxmode);
1049 if (ifp->if_flags & IFF_PROMISC) {
1050 rxmode |= AXE_RXCMD_PROMISC;
1052 rxmode &= ~AXE_RXCMD_PROMISC;
1055 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1061 axe_stop(struct usb_ether *ue)
1063 struct axe_softc *sc = uether_getsc(ue);
1064 struct ifnet *ifp = uether_getifp(ue);
1066 AXE_LOCK_ASSERT(sc, MA_OWNED);
1068 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1069 sc->sc_flags &= ~AXE_FLAG_LINK;
1072 * stop all the transfers, if not already stopped:
1074 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]);
1075 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]);
1076 usbd_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]);