sys/dev/vr/if_vr.c

   1 /*-
   2  * Copyright (c) 1997, 1998
   3  *      Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. All advertising materials mentioning features or use of this software
  14  *    must display the following acknowledgement:
  15  *      This product includes software developed by Bill Paul.
  16  * 4. Neither the name of the author nor the names of any co-contributors
  17  *    may be used to endorse or promote products derived from this software
  18  *    without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  30  * THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __FBSDID("$FreeBSD$");
  35
  36 /*
  37  * VIA Rhine fast ethernet PCI NIC driver
  38  *
  39  * Supports various network adapters based on the VIA Rhine
  40  * and Rhine II PCI controllers, including the D-Link DFE530TX.
  41  * Datasheets are available at http://www.via.com.tw.
  42  *
  43  * Written by Bill Paul <wpaul@ctr.columbia.edu>
  44  * Electrical Engineering Department
  45  * Columbia University, New York City
  46  */
  47
  48 /*
  49  * The VIA Rhine controllers are similar in some respects to the
  50  * the DEC tulip chips, except less complicated. The controller
  51  * uses an MII bus and an external physical layer interface. The
  52  * receiver has a one entry perfect filter and a 64-bit hash table
  53  * multicast filter. Transmit and receive descriptors are similar
  54  * to the tulip.
  55  *
  56  * Some Rhine chips has a serious flaw in its transmit DMA mechanism:
  57  * transmit buffers must be longword aligned. Unfortunately,
  58  * FreeBSD doesn't guarantee that mbufs will be filled in starting
  59  * at longword boundaries, so we have to do a buffer copy before
  60  * transmission.
  61  */
  62
  63 #ifdef HAVE_KERNEL_OPTION_HEADERS
  64 #include "opt_device_polling.h"
  65 #endif
  66
  67 #include <sys/param.h>
  68 #include <sys/systm.h>
  69 #include <sys/bus.h>
  70 #include <sys/endian.h>
  71 #include <sys/kernel.h>
  72 #include <sys/malloc.h>
  73 #include <sys/mbuf.h>
  74 #include <sys/module.h>
  75 #include <sys/rman.h>
  76 #include <sys/socket.h>
  77 #include <sys/sockio.h>
  78 #include <sys/sysctl.h>
  79 #include <sys/taskqueue.h>
  80
  81 #include <net/bpf.h>
  82 #include <net/if.h>
  83 #include <net/ethernet.h>
  84 #include <net/if_dl.h>
  85 #include <net/if_media.h>
  86 #include <net/if_types.h>
  87 #include <net/if_vlan_var.h>
  88
  89 #include <dev/mii/mii.h>
  90 #include <dev/mii/miivar.h>
  91
  92 #include <dev/pci/pcireg.h>
  93 #include <dev/pci/pcivar.h>
  94
  95 #include <machine/bus.h>
  96
  97 #include <dev/vr/if_vrreg.h>
  98
  99 /* "device miibus" required.  See GENERIC if you get errors here. */
 100 #include "miibus_if.h"
 101
 102 MODULE_DEPEND(vr, pci, 1, 1, 1);
 103 MODULE_DEPEND(vr, ether, 1, 1, 1);
 104 MODULE_DEPEND(vr, miibus, 1, 1, 1);
 105
 106 /* Define to show Rx/Tx error status. */
 107 #undef  VR_SHOW_ERRORS
 108 #define VR_CSUM_FEATURES        (CSUM_IP | CSUM_TCP | CSUM_UDP)
 109
 110 /*
 111  * Various supported device vendors/types, their names & quirks.
 112  */
 113 #define VR_Q_NEEDALIGN          (1<<0)
 114 #define VR_Q_CSUM               (1<<1)
 115 #define VR_Q_CAM                (1<<2)
 116
 117 static struct vr_type {
 118         u_int16_t               vr_vid;
 119         u_int16_t               vr_did;
 120         int                     vr_quirks;
 121         char                    *vr_name;
 122 } vr_devs[] = {
 123         { VIA_VENDORID, VIA_DEVICEID_RHINE,
 124             VR_Q_NEEDALIGN,
 125             "VIA VT3043 Rhine I 10/100BaseTX" },
 126         { VIA_VENDORID, VIA_DEVICEID_RHINE_II,
 127             VR_Q_NEEDALIGN,
 128             "VIA VT86C100A Rhine II 10/100BaseTX" },
 129         { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2,
 130             0,
 131             "VIA VT6102 Rhine II 10/100BaseTX" },
 132         { VIA_VENDORID, VIA_DEVICEID_RHINE_III,
 133             0,
 134             "VIA VT6105 Rhine III 10/100BaseTX" },
 135         { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M,
 136             VR_Q_CSUM,
 137             "VIA VT6105M Rhine III 10/100BaseTX" },
 138         { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II,
 139             VR_Q_NEEDALIGN,
 140             "Delta Electronics Rhine II 10/100BaseTX" },
 141         { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II,
 142             VR_Q_NEEDALIGN,
 143             "Addtron Technology Rhine II 10/100BaseTX" },
 144         { 0, 0, 0, NULL }
 145 };
 146
 147 static int vr_probe(device_t);
 148 static int vr_attach(device_t);
 149 static int vr_detach(device_t);
 150 static int vr_shutdown(device_t);
 151 static int vr_suspend(device_t);
 152 static int vr_resume(device_t);
 153
 154 static void vr_dmamap_cb(void *, bus_dma_segment_t *, int, int);
 155 static int vr_dma_alloc(struct vr_softc *);
 156 static void vr_dma_free(struct vr_softc *);
 157 static __inline void vr_discard_rxbuf(struct vr_rxdesc *);
 158 static int vr_newbuf(struct vr_softc *, int);
 159
 160 #ifndef __NO_STRICT_ALIGNMENT
 161 static __inline void vr_fixup_rx(struct mbuf *);
 162 #endif
 163 static int vr_rxeof(struct vr_softc *);
 164 static void vr_txeof(struct vr_softc *);
 165 static void vr_tick(void *);
 166 static int vr_error(struct vr_softc *, uint16_t);
 167 static void vr_tx_underrun(struct vr_softc *);
 168 static void vr_intr(void *);
 169 static void vr_start(struct ifnet *);
 170 static void vr_start_locked(struct ifnet *);
 171 static int vr_encap(struct vr_softc *, struct mbuf **);
 172 static int vr_ioctl(struct ifnet *, u_long, caddr_t);
 173 static void vr_init(void *);
 174 static void vr_init_locked(struct vr_softc *);
 175 static void vr_tx_start(struct vr_softc *);
 176 static void vr_rx_start(struct vr_softc *);
 177 static int vr_tx_stop(struct vr_softc *);
 178 static int vr_rx_stop(struct vr_softc *);
 179 static void vr_stop(struct vr_softc *);
 180 static void vr_watchdog(struct vr_softc *);
 181 static int vr_ifmedia_upd(struct ifnet *);
 182 static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 183
 184 static int vr_miibus_readreg(device_t, int, int);
 185 static int vr_miibus_writereg(device_t, int, int, int);
 186 static void vr_miibus_statchg(device_t);
 187
 188 static void vr_link_task(void *, int);
 189 static void vr_cam_mask(struct vr_softc *, uint32_t, int);
 190 static int vr_cam_data(struct vr_softc *, int, int, uint8_t *);
 191 static void vr_set_filter(struct vr_softc *);
 192 static void vr_reset(const struct vr_softc *);
 193 static int vr_tx_ring_init(struct vr_softc *);
 194 static int vr_rx_ring_init(struct vr_softc *);
 195 static void vr_setwol(struct vr_softc *);
 196 static void vr_clrwol(struct vr_softc *);
 197 static int vr_sysctl_stats(SYSCTL_HANDLER_ARGS);
 198
 199 static struct vr_tx_threshold_table {
 200         int tx_cfg;
 201         int bcr_cfg;
 202         int value;
 203 } vr_tx_threshold_tables[] = {
 204         { VR_TXTHRESH_64BYTES, VR_BCR1_TXTHRESH64BYTES, 64 },
 205         { VR_TXTHRESH_128BYTES, VR_BCR1_TXTHRESH128BYTES, 128 },
 206         { VR_TXTHRESH_256BYTES, VR_BCR1_TXTHRESH256BYTES, 256 },
 207         { VR_TXTHRESH_512BYTES, VR_BCR1_TXTHRESH512BYTES, 512 },
 208         { VR_TXTHRESH_1024BYTES, VR_BCR1_TXTHRESH1024BYTES, 1024 },
 209         { VR_TXTHRESH_STORENFWD, VR_BCR1_TXTHRESHSTORENFWD, 2048 }
 210 };
 211
 212 static device_method_t vr_methods[] = {
 213         /* Device interface */
 214         DEVMETHOD(device_probe,         vr_probe),
 215         DEVMETHOD(device_attach,        vr_attach),
 216         DEVMETHOD(device_detach,        vr_detach),
 217         DEVMETHOD(device_shutdown,      vr_shutdown),
 218         DEVMETHOD(device_suspend,       vr_suspend),
 219         DEVMETHOD(device_resume,        vr_resume),
 220
 221         /* bus interface */
 222         DEVMETHOD(bus_print_child,      bus_generic_print_child),
 223         DEVMETHOD(bus_driver_added,     bus_generic_driver_added),
 224
 225         /* MII interface */
 226         DEVMETHOD(miibus_readreg,       vr_miibus_readreg),
 227         DEVMETHOD(miibus_writereg,      vr_miibus_writereg),
 228         DEVMETHOD(miibus_statchg,       vr_miibus_statchg),
 229         DEVMETHOD(miibus_linkchg,       vr_miibus_statchg),
 230
 231         { NULL, NULL }
 232 };
 233
 234 static driver_t vr_driver = {
 235         "vr",
 236         vr_methods,
 237         sizeof(struct vr_softc)
 238 };
 239
 240 static devclass_t vr_devclass;
 241
 242 DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
 243 DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
 244
 245 static int
 246 vr_miibus_readreg(device_t dev, int phy, int reg)
 247 {
 248         struct vr_softc         *sc;
 249         int                     i;
 250
 251         sc = device_get_softc(dev);
 252         if (sc->vr_phyaddr != phy)
 253                 return (0);
 254
 255         /* Set the register address. */
 256         CSR_WRITE_1(sc, VR_MIIADDR, reg);
 257         VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB);
 258
 259         for (i = 0; i < VR_MII_TIMEOUT; i++) {
 260                 DELAY(1);
 261                 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0)
 262                         break;
 263         }
 264         if (i == VR_MII_TIMEOUT)
 265                 device_printf(sc->vr_dev, "phy read timeout %d:%d\n", phy, reg);
 266
 267         return (CSR_READ_2(sc, VR_MIIDATA));
 268 }
 269
 270 static int
 271 vr_miibus_writereg(device_t dev, int phy, int reg, int data)
 272 {
 273         struct vr_softc         *sc;
 274         int                     i;
 275
 276         sc = device_get_softc(dev);
 277         if (sc->vr_phyaddr != phy)
 278                 return (0);
 279
 280         /* Set the register address and data to write. */
 281         CSR_WRITE_1(sc, VR_MIIADDR, reg);
 282         CSR_WRITE_2(sc, VR_MIIDATA, data);
 283         VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB);
 284
 285         for (i = 0; i < VR_MII_TIMEOUT; i++) {
 286                 DELAY(1);
 287                 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0)
 288                         break;
 289         }
 290         if (i == VR_MII_TIMEOUT)
 291                 device_printf(sc->vr_dev, "phy write timeout %d:%d\n", phy,
 292                     reg);
 293
 294         return (0);
 295 }
 296
 297 static void
 298 vr_miibus_statchg(device_t dev)
 299 {
 300         struct vr_softc         *sc;
 301
 302         sc = device_get_softc(dev);
 303         taskqueue_enqueue(taskqueue_swi, &sc->vr_link_task);
 304 }
 305
 306 /*
 307  * In order to fiddle with the
 308  * 'full-duplex' and '100Mbps' bits in the netconfig register, we
 309  * first have to put the transmit and/or receive logic in the idle state.
 310  */
 311 static void
 312 vr_link_task(void *arg, int pending)
 313 {
 314         struct vr_softc         *sc;
 315         struct mii_data         *mii;
 316         struct ifnet            *ifp;
 317         int                     lfdx, mfdx;
 318         uint8_t                 cr0, cr1, fc;
 319
 320         sc = (struct vr_softc *)arg;
 321
 322         VR_LOCK(sc);
 323         mii = device_get_softc(sc->vr_miibus);
 324         ifp = sc->vr_ifp;
 325         if (mii == NULL || ifp == NULL ||
 326             (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
 327                 VR_UNLOCK(sc);
 328                 return;
 329         }
 330
 331         if (mii->mii_media_status & IFM_ACTIVE) {
 332                 if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
 333                         sc->vr_link = 1;
 334         } else
 335                 sc->vr_link = 0;
 336
 337         if (sc->vr_link != 0) {
 338                 cr0 = CSR_READ_1(sc, VR_CR0);
 339                 cr1 = CSR_READ_1(sc, VR_CR1);
 340                 mfdx = (cr1 & VR_CR1_FULLDUPLEX) != 0;
 341                 lfdx = (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0;
 342                 if (mfdx != lfdx) {
 343                         if ((cr0 & (VR_CR0_TX_ON | VR_CR0_RX_ON)) != 0) {
 344                                 if (vr_tx_stop(sc) != 0 ||
 345                                     vr_rx_stop(sc) != 0) {
 346                                         device_printf(sc->vr_dev,
 347                                             "%s: Tx/Rx shutdown error -- "
 348                                             "resetting\n", __func__);
 349                                         sc->vr_flags |= VR_F_RESTART;
 350                                         VR_UNLOCK(sc);
 351                                         return;
 352                                 }
 353                         }
 354                         if (lfdx)
 355                                 cr1 |= VR_CR1_FULLDUPLEX;
 356                         else
 357                                 cr1 &= ~VR_CR1_FULLDUPLEX;
 358                         CSR_WRITE_1(sc, VR_CR1, cr1);
 359                 }
 360                 fc = 0;
 361 #ifdef notyet
 362                 /* Configure flow-control. */
 363                 if (sc->vr_revid >= REV_ID_VT6105_A0) {
 364                         fc = CSR_READ_1(sc, VR_FLOWCR1);
 365                         fc &= ~(VR_FLOWCR1_TXPAUSE | VR_FLOWCR1_RXPAUSE);
 366                         if ((IFM_OPTIONS(mii->mii_media_active) &
 367                             IFM_ETH_RXPAUSE) != 0)
 368                                 fc |= VR_FLOWCR1_RXPAUSE;
 369                         if ((IFM_OPTIONS(mii->mii_media_active) &
 370                             IFM_ETH_TXPAUSE) != 0)
 371                                 fc |= VR_FLOWCR1_TXPAUSE;
 372                         CSR_WRITE_1(sc, VR_FLOWCR1, fc);
 373                 } else if (sc->vr_revid >= REV_ID_VT6102_A) {
 374                         /* No Tx puase capability available for Rhine II. */
 375                         fc = CSR_READ_1(sc, VR_MISC_CR0);
 376                         fc &= ~VR_MISCCR0_RXPAUSE;
 377                         if ((IFM_OPTIONS(mii->mii_media_active) &
 378                             IFM_ETH_RXPAUSE) != 0)
 379                                 fc |= VR_MISCCR0_RXPAUSE;
 380                         CSR_WRITE_1(sc, VR_MISC_CR0, fc);
 381                 }
 382 #endif
 383                 vr_rx_start(sc);
 384                 vr_tx_start(sc);
 385         } else {
 386                 if (vr_tx_stop(sc) != 0 || vr_rx_stop(sc) != 0) {
 387                         device_printf(sc->vr_dev,
 388                             "%s: Tx/Rx shutdown error -- resetting\n",
 389                             __func__);
 390                         sc->vr_flags |= VR_F_RESTART;
 391                         VR_UNLOCK(sc);
 392                         return;
 393                 }
 394         }
 395         VR_UNLOCK(sc);
 396 }
 397
 398
 399 static void
 400 vr_cam_mask(struct vr_softc *sc, uint32_t mask, int type)
 401 {
 402
 403         if (type == VR_MCAST_CAM)
 404                 CSR_WRITE_1(sc, VR_CAMCTL, VR_CAMCTL_ENA | VR_CAMCTL_MCAST);
 405         else
 406                 CSR_WRITE_1(sc, VR_CAMCTL, VR_CAMCTL_ENA | VR_CAMCTL_VLAN);
 407         CSR_WRITE_4(sc, VR_CAMMASK, mask);
 408         CSR_WRITE_1(sc, VR_CAMCTL, 0);
 409 }
 410
 411 static int
 412 vr_cam_data(struct vr_softc *sc, int type, int idx, uint8_t *mac)
 413 {
 414         int     i;
 415
 416         if (type == VR_MCAST_CAM) {
 417                 if (idx < 0 || idx >= VR_CAM_MCAST_CNT || mac == NULL)
 418                         return (EINVAL);
 419                 CSR_WRITE_1(sc, VR_CAMCTL, VR_CAMCTL_ENA | VR_CAMCTL_MCAST);
 420         } else
 421                 CSR_WRITE_1(sc, VR_CAMCTL, VR_CAMCTL_ENA | VR_CAMCTL_VLAN);
 422
 423         /* Set CAM entry address. */
 424         CSR_WRITE_1(sc, VR_CAMADDR, idx);
 425         /* Set CAM entry data. */
 426         if (type == VR_MCAST_CAM) {
 427                 for (i = 0; i < ETHER_ADDR_LEN; i++)
 428                         CSR_WRITE_1(sc, VR_MCAM0 + i, mac[i]);
 429         } else {
 430                 CSR_WRITE_1(sc, VR_VCAM0, mac[0]);
 431                 CSR_WRITE_1(sc, VR_VCAM1, mac[1]);
 432         }
 433         DELAY(10);
 434         /* Write CAM and wait for self-clear of VR_CAMCTL_WRITE bit. */
 435         CSR_WRITE_1(sc, VR_CAMCTL, VR_CAMCTL_ENA | VR_CAMCTL_WRITE);
 436         for (i = 0; i < VR_TIMEOUT; i++) {
 437                 DELAY(1);
 438                 if ((CSR_READ_1(sc, VR_CAMCTL) & VR_CAMCTL_WRITE) == 0)
 439                         break;
 440         }
 441
 442         if (i == VR_TIMEOUT)
 443                 device_printf(sc->vr_dev, "%s: setting CAM filter timeout!\n",
 444                     __func__);
 445         CSR_WRITE_1(sc, VR_CAMCTL, 0);
 446
 447         return (i == VR_TIMEOUT ? ETIMEDOUT : 0);
 448 }
 449
 450 /*
 451  * Program the 64-bit multicast hash filter.
 452  */
 453 static void
 454 vr_set_filter(struct vr_softc *sc)
 455 {
 456         struct ifnet            *ifp;
 457         int                     h;
 458         uint32_t                hashes[2] = { 0, 0 };
 459         struct ifmultiaddr      *ifma;
 460         uint8_t                 rxfilt;
 461         int                     error, mcnt;
 462         uint32_t                cam_mask;
 463
 464         VR_LOCK_ASSERT(sc);
 465
 466         ifp = sc->vr_ifp;
 467         rxfilt = CSR_READ_1(sc, VR_RXCFG);
 468         rxfilt &= ~(VR_RXCFG_RX_PROMISC | VR_RXCFG_RX_BROAD |
 469             VR_RXCFG_RX_MULTI);
 470         if (ifp->if_flags & IFF_BROADCAST)
 471                 rxfilt |= VR_RXCFG_RX_BROAD;
 472         if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
 473                 rxfilt |= VR_RXCFG_RX_MULTI;
 474                 if (ifp->if_flags & IFF_PROMISC)
 475                         rxfilt |= VR_RXCFG_RX_PROMISC;
 476                 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
 477                 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
 478                 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
 479                 return;
 480         }
 481
 482         /* Now program new ones. */
 483         error = 0;
 484         mcnt = 0;
 485         if_maddr_rlock(ifp);
 486         if ((sc->vr_quirks & VR_Q_CAM) != 0) {
 487                 /*
 488                  * For hardwares that have CAM capability, use
 489                  * 32 entries multicast perfect filter.
 490                  */
 491                 cam_mask = 0;
 492                 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 493                         if (ifma->ifma_addr->sa_family != AF_LINK)
 494                                 continue;
 495                         error = vr_cam_data(sc, VR_MCAST_CAM, mcnt,
 496                             LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
 497                         if (error != 0) {
 498                                 cam_mask = 0;
 499                                 break;
 500                         }
 501                         cam_mask |= 1 << mcnt;
 502                         mcnt++;
 503                 }
 504                 vr_cam_mask(sc, VR_MCAST_CAM, cam_mask);
 505         }
 506
 507         if ((sc->vr_quirks & VR_Q_CAM) == 0 || error != 0) {
 508                 /*
 509                  * If there are too many multicast addresses or
 510                  * setting multicast CAM filter failed, use hash
 511                  * table based filtering.
 512                  */
 513                 mcnt = 0;
 514                 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 515                         if (ifma->ifma_addr->sa_family != AF_LINK)
 516                                 continue;
 517                         h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
 518                             ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
 519                         if (h < 32)
 520                                 hashes[0] |= (1 << h);
 521                         else
 522                                 hashes[1] |= (1 << (h - 32));
 523                         mcnt++;
 524                 }
 525         }
 526         if_maddr_runlock(ifp);
 527
 528         if (mcnt > 0)
 529                 rxfilt |= VR_RXCFG_RX_MULTI;
 530
 531         CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
 532         CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
 533         CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
 534 }
 535
 536 static void
 537 vr_reset(const struct vr_softc *sc)
 538 {
 539         int             i;
 540
 541         /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during attach w/o lock. */
 542
 543         CSR_WRITE_1(sc, VR_CR1, VR_CR1_RESET);
 544         if (sc->vr_revid < REV_ID_VT6102_A) {
 545                 /* VT86C100A needs more delay after reset. */
 546                 DELAY(100);
 547         }
 548         for (i = 0; i < VR_TIMEOUT; i++) {
 549                 DELAY(10);
 550                 if (!(CSR_READ_1(sc, VR_CR1) & VR_CR1_RESET))
 551                         break;
 552         }
 553         if (i == VR_TIMEOUT) {
 554                 if (sc->vr_revid < REV_ID_VT6102_A)
 555                         device_printf(sc->vr_dev, "reset never completed!\n");
 556                 else {
 557                         /* Use newer force reset command. */
 558                         device_printf(sc->vr_dev,
 559                             "Using force reset command.\n");
 560                         VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
 561                         /*
 562                          * Wait a little while for the chip to get its brains
 563                          * in order.
 564                          */
 565                         DELAY(2000);
 566                 }
 567         }
 568
 569 }
 570
 571 /*
 572  * Probe for a VIA Rhine chip. Check the PCI vendor and device
 573  * IDs against our list and return a match or NULL
 574  */
 575 static struct vr_type *
 576 vr_match(device_t dev)
 577 {
 578         struct vr_type  *t = vr_devs;
 579
 580         for (t = vr_devs; t->vr_name != NULL; t++)
 581                 if ((pci_get_vendor(dev) == t->vr_vid) &&
 582                     (pci_get_device(dev) == t->vr_did))
 583                         return (t);
 584         return (NULL);
 585 }
 586
 587 /*
 588  * Probe for a VIA Rhine chip. Check the PCI vendor and device
 589  * IDs against our list and return a device name if we find a match.
 590  */
 591 static int
 592 vr_probe(device_t dev)
 593 {
 594         struct vr_type  *t;
 595
 596         t = vr_match(dev);
 597         if (t != NULL) {
 598                 device_set_desc(dev, t->vr_name);
 599                 return (BUS_PROBE_DEFAULT);
 600         }
 601         return (ENXIO);
 602 }
 603
 604 /*
 605  * Attach the interface. Allocate softc structures, do ifmedia
 606  * setup and ethernet/BPF attach.
 607  */
 608 static int
 609 vr_attach(device_t dev)
 610 {
 611         struct vr_softc         *sc;
 612         struct ifnet            *ifp;
 613         struct vr_type          *t;
 614         uint8_t                 eaddr[ETHER_ADDR_LEN];
 615         int                     error, rid;
 616         int                     i, pmc;
 617
 618         sc = device_get_softc(dev);
 619         sc->vr_dev = dev;
 620         t = vr_match(dev);
 621         KASSERT(t != NULL, ("Lost if_vr device match"));
 622         sc->vr_quirks = t->vr_quirks;
 623         device_printf(dev, "Quirks: 0x%x\n", sc->vr_quirks);
 624
 625         mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
 626             MTX_DEF);
 627         callout_init_mtx(&sc->vr_stat_callout, &sc->vr_mtx, 0);
 628         TASK_INIT(&sc->vr_link_task, 0, vr_link_task, sc);
 629         SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
 630             SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
 631             OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
 632             vr_sysctl_stats, "I", "Statistics");
 633
 634         error = 0;
 635
 636         /*
 637          * Map control/status registers.
 638          */
 639         pci_enable_busmaster(dev);
 640         sc->vr_revid = pci_get_revid(dev);
 641         device_printf(dev, "Revision: 0x%x\n", sc->vr_revid);
 642
 643         sc->vr_res_id = PCIR_BAR(0);
 644         sc->vr_res_type = SYS_RES_IOPORT;
 645         sc->vr_res = bus_alloc_resource_any(dev, sc->vr_res_type,
 646             &sc->vr_res_id, RF_ACTIVE);
 647         if (sc->vr_res == NULL) {
 648                 device_printf(dev, "couldn't map ports\n");
 649                 error = ENXIO;
 650                 goto fail;
 651         }
 652
 653         /* Allocate interrupt. */
 654         rid = 0;
 655         sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
 656             RF_SHAREABLE | RF_ACTIVE);
 657
 658         if (sc->vr_irq == NULL) {
 659                 device_printf(dev, "couldn't map interrupt\n");
 660                 error = ENXIO;
 661                 goto fail;
 662         }
 663
 664         /* Allocate ifnet structure. */
 665         ifp = sc->vr_ifp = if_alloc(IFT_ETHER);
 666         if (ifp == NULL) {
 667                 device_printf(dev, "couldn't allocate ifnet structure\n");
 668                 error = ENOSPC;
 669                 goto fail;
 670         }
 671         ifp->if_softc = sc;
 672         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 673         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 674         ifp->if_ioctl = vr_ioctl;
 675         ifp->if_start = vr_start;
 676         ifp->if_init = vr_init;
 677         IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_RING_CNT - 1);
 678         ifp->if_snd.ifq_maxlen = VR_TX_RING_CNT - 1;
 679         IFQ_SET_READY(&ifp->if_snd);
 680
 681         /* Configure Tx FIFO threshold. */
 682         sc->vr_txthresh = VR_TXTHRESH_MIN;
 683         if (sc->vr_revid < REV_ID_VT6105_A0) {
 684                 /*
 685                  * Use store and forward mode for Rhine I/II.
 686                  * Otherwise they produce a lot of Tx underruns and
 687                  * it would take a while to get working FIFO threshold
 688                  * value.
 689                  */
 690                 sc->vr_txthresh = VR_TXTHRESH_MAX;
 691         }
 692         if ((sc->vr_quirks & VR_Q_CSUM) != 0) {
 693                 ifp->if_hwassist = VR_CSUM_FEATURES;
 694                 ifp->if_capabilities |= IFCAP_HWCSUM;
 695                 /*
 696                  * To update checksum field the hardware may need to
 697                  * store entire frames into FIFO before transmitting.
 698                  */
 699                 sc->vr_txthresh = VR_TXTHRESH_MAX;
 700         }
 701
 702         if (sc->vr_revid >= REV_ID_VT6102_A &&
 703             pci_find_extcap(dev, PCIY_PMG, &pmc) == 0)
 704                 ifp->if_capabilities |= IFCAP_WOL_UCAST | IFCAP_WOL_MAGIC;
 705
 706         /* Rhine supports oversized VLAN frame. */
 707         ifp->if_capabilities |= IFCAP_VLAN_MTU;
 708         ifp->if_capenable = ifp->if_capabilities;
 709 #ifdef DEVICE_POLLING
 710         ifp->if_capabilities |= IFCAP_POLLING;
 711 #endif
 712
 713         /*
 714          * Windows may put the chip in suspend mode when it
 715          * shuts down. Be sure to kick it in the head to wake it
 716          * up again.
 717          */
 718         if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0)
 719                 VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
 720
 721         /*
 722          * Get station address. The way the Rhine chips work,
 723          * you're not allowed to directly access the EEPROM once
 724          * they've been programmed a special way. Consequently,
 725          * we need to read the node address from the PAR0 and PAR1
 726          * registers.
 727          * Reloading EEPROM also overwrites VR_CFGA, VR_CFGB,
 728          * VR_CFGC and VR_CFGD such that memory mapped IO configured
 729          * by driver is reset to default state.
 730          */
 731         VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
 732         for (i = VR_TIMEOUT; i > 0; i--) {
 733                 DELAY(1);
 734                 if ((CSR_READ_1(sc, VR_EECSR) & VR_EECSR_LOAD) == 0)
 735                         break;
 736         }
 737         if (i == 0)
 738                 device_printf(dev, "Reloading EEPROM timeout!\n");
 739         for (i = 0; i < ETHER_ADDR_LEN; i++)
 740                 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
 741
 742         /* Reset the adapter. */
 743         vr_reset(sc);
 744         /* Ack intr & disable further interrupts. */
 745         CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
 746         CSR_WRITE_2(sc, VR_IMR, 0);
 747         if (sc->vr_revid >= REV_ID_VT6102_A)
 748                 CSR_WRITE_2(sc, VR_MII_IMR, 0);
 749
 750         if (sc->vr_revid < REV_ID_VT6102_A) {
 751                 pci_write_config(dev, VR_PCI_MODE2,
 752                     pci_read_config(dev, VR_PCI_MODE2, 1) |
 753                     VR_MODE2_MODE10T, 1);
 754         } else {
 755                 /* Report error instead of retrying forever. */
 756                 pci_write_config(dev, VR_PCI_MODE2,
 757                     pci_read_config(dev, VR_PCI_MODE2, 1) |
 758                     VR_MODE2_PCEROPT, 1);
 759                 /* Detect MII coding error. */
 760                 pci_write_config(dev, VR_PCI_MODE3,
 761                     pci_read_config(dev, VR_PCI_MODE3, 1) |
 762                     VR_MODE3_MIION, 1);
 763                 if (sc->vr_revid >= REV_ID_VT6105_LOM &&
 764                     sc->vr_revid < REV_ID_VT6105M_A0)
 765                         pci_write_config(dev, VR_PCI_MODE2,
 766                             pci_read_config(dev, VR_PCI_MODE2, 1) |
 767                             VR_MODE2_MODE10T, 1);
 768                 /* Enable Memory-Read-Multiple. */
 769                 if (sc->vr_revid >= REV_ID_VT6107_A1 &&
 770                     sc->vr_revid < REV_ID_VT6105M_A0)
 771                         pci_write_config(dev, VR_PCI_MODE2,
 772                             pci_read_config(dev, VR_PCI_MODE2, 1) |
 773                             VR_MODE2_MRDPL, 1);
 774         }
 775         /* Disable MII AUTOPOLL. */
 776         VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
 777
 778         if (vr_dma_alloc(sc) != 0) {
 779                 error = ENXIO;
 780                 goto fail;
 781         }
 782
 783         /* Save PHY address. */
 784         if (sc->vr_revid >= REV_ID_VT6105_A0)
 785                 sc->vr_phyaddr = 1;
 786         else
 787                 sc->vr_phyaddr = CSR_READ_1(sc, VR_PHYADDR) & VR_PHYADDR_MASK;
 788
 789         /* Do MII setup. */
 790         if (mii_phy_probe(dev, &sc->vr_miibus,
 791             vr_ifmedia_upd, vr_ifmedia_sts)) {
 792                 device_printf(dev, "MII without any phy!\n");
 793                 error = ENXIO;
 794                 goto fail;
 795         }
 796
 797         /* Call MI attach routine. */
 798         ether_ifattach(ifp, eaddr);
 799         /*
 800          * Tell the upper layer(s) we support long frames.
 801          * Must appear after the call to ether_ifattach() because
 802          * ether_ifattach() sets ifi_hdrlen to the default value.
 803          */
 804         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
 805
 806         /* Hook interrupt last to avoid having to lock softc. */
 807         error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE,
 808             NULL, vr_intr, sc, &sc->vr_intrhand);
 809
 810         if (error) {
 811                 device_printf(dev, "couldn't set up irq\n");
 812                 ether_ifdetach(ifp);
 813                 goto fail;
 814         }
 815
 816 fail:
 817         if (error)
 818                 vr_detach(dev);
 819
 820         return (error);
 821 }
 822
 823 /*
 824  * Shutdown hardware and free up resources. This can be called any
 825  * time after the mutex has been initialized. It is called in both
 826  * the error case in attach and the normal detach case so it needs
 827  * to be careful about only freeing resources that have actually been
 828  * allocated.
 829  */
 830 static int
 831 vr_detach(device_t dev)
 832 {
 833         struct vr_softc         *sc = device_get_softc(dev);
 834         struct ifnet            *ifp = sc->vr_ifp;
 835
 836         KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized"));
 837
 838 #ifdef DEVICE_POLLING
 839         if (ifp != NULL && ifp->if_capenable & IFCAP_POLLING)
 840                 ether_poll_deregister(ifp);
 841 #endif
 842
 843         /* These should only be active if attach succeeded. */
 844         if (device_is_attached(dev)) {
 845                 VR_LOCK(sc);
 846                 sc->vr_detach = 1;
 847                 vr_stop(sc);
 848                 VR_UNLOCK(sc);
 849                 callout_drain(&sc->vr_stat_callout);
 850                 taskqueue_drain(taskqueue_swi, &sc->vr_link_task);
 851                 ether_ifdetach(ifp);
 852         }
 853         if (sc->vr_miibus)
 854                 device_delete_child(dev, sc->vr_miibus);
 855         bus_generic_detach(dev);
 856
 857         if (sc->vr_intrhand)
 858                 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand);
 859         if (sc->vr_irq)
 860                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq);
 861         if (sc->vr_res)
 862                 bus_release_resource(dev, sc->vr_res_type, sc->vr_res_id,
 863                     sc->vr_res);
 864
 865         if (ifp)
 866                 if_free(ifp);
 867
 868         vr_dma_free(sc);
 869
 870         mtx_destroy(&sc->vr_mtx);
 871
 872         return (0);
 873 }
 874
 875 struct vr_dmamap_arg {
 876         bus_addr_t      vr_busaddr;
 877 };
 878
 879 static void
 880 vr_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 881 {
 882         struct vr_dmamap_arg    *ctx;
 883
 884         if (error != 0)
 885                 return;
 886         ctx = arg;
 887         ctx->vr_busaddr = segs[0].ds_addr;
 888 }
 889
 890 static int
 891 vr_dma_alloc(struct vr_softc *sc)
 892 {
 893         struct vr_dmamap_arg    ctx;
 894         struct vr_txdesc        *txd;
 895         struct vr_rxdesc        *rxd;
 896         bus_size_t              tx_alignment;
 897         int                     error, i;
 898
 899         /* Create parent DMA tag. */
 900         error = bus_dma_tag_create(
 901             bus_get_dma_tag(sc->vr_dev),        /* parent */
 902             1, 0,                       /* alignment, boundary */
 903             BUS_SPACE_MAXADDR_32BIT,    /* lowaddr */
 904             BUS_SPACE_MAXADDR,          /* highaddr */
 905             NULL, NULL,                 /* filter, filterarg */
 906             BUS_SPACE_MAXSIZE_32BIT,    /* maxsize */
 907             0,                          /* nsegments */
 908             BUS_SPACE_MAXSIZE_32BIT,    /* maxsegsize */
 909             0,                          /* flags */
 910             NULL, NULL,                 /* lockfunc, lockarg */
 911             &sc->vr_cdata.vr_parent_tag);
 912         if (error != 0) {
 913                 device_printf(sc->vr_dev, "failed to create parent DMA tag\n");
 914                 goto fail;
 915         }
 916         /* Create tag for Tx ring. */
 917         error = bus_dma_tag_create(
 918             sc->vr_cdata.vr_parent_tag, /* parent */
 919             VR_RING_ALIGN, 0,           /* alignment, boundary */
 920             BUS_SPACE_MAXADDR,          /* lowaddr */
 921             BUS_SPACE_MAXADDR,          /* highaddr */
 922             NULL, NULL,                 /* filter, filterarg */
 923             VR_TX_RING_SIZE,            /* maxsize */
 924             1,                          /* nsegments */
 925             VR_TX_RING_SIZE,            /* maxsegsize */
 926             0,                          /* flags */
 927             NULL, NULL,                 /* lockfunc, lockarg */
 928             &sc->vr_cdata.vr_tx_ring_tag);
 929         if (error != 0) {
 930                 device_printf(sc->vr_dev, "failed to create Tx ring DMA tag\n");
 931                 goto fail;
 932         }
 933
 934         /* Create tag for Rx ring. */
 935         error = bus_dma_tag_create(
 936             sc->vr_cdata.vr_parent_tag, /* parent */
 937             VR_RING_ALIGN, 0,           /* alignment, boundary */
 938             BUS_SPACE_MAXADDR,          /* lowaddr */
 939             BUS_SPACE_MAXADDR,          /* highaddr */
 940             NULL, NULL,                 /* filter, filterarg */
 941             VR_RX_RING_SIZE,            /* maxsize */
 942             1,                          /* nsegments */
 943             VR_RX_RING_SIZE,            /* maxsegsize */
 944             0,                          /* flags */
 945             NULL, NULL,                 /* lockfunc, lockarg */
 946             &sc->vr_cdata.vr_rx_ring_tag);
 947         if (error != 0) {
 948                 device_printf(sc->vr_dev, "failed to create Rx ring DMA tag\n");
 949                 goto fail;
 950         }
 951
 952         if ((sc->vr_quirks & VR_Q_NEEDALIGN) != 0)
 953                 tx_alignment = sizeof(uint32_t);
 954         else
 955                 tx_alignment = 1;
 956         /* Create tag for Tx buffers. */
 957         error = bus_dma_tag_create(
 958             sc->vr_cdata.vr_parent_tag, /* parent */
 959             tx_alignment, 0,            /* alignment, boundary */
 960             BUS_SPACE_MAXADDR,          /* lowaddr */
 961             BUS_SPACE_MAXADDR,          /* highaddr */
 962             NULL, NULL,                 /* filter, filterarg */
 963             MCLBYTES * VR_MAXFRAGS,     /* maxsize */
 964             VR_MAXFRAGS,                /* nsegments */
 965             MCLBYTES,                   /* maxsegsize */
 966             0,                          /* flags */
 967             NULL, NULL,                 /* lockfunc, lockarg */
 968             &sc->vr_cdata.vr_tx_tag);
 969         if (error != 0) {
 970                 device_printf(sc->vr_dev, "failed to create Tx DMA tag\n");
 971                 goto fail;
 972         }
 973
 974         /* Create tag for Rx buffers. */
 975         error = bus_dma_tag_create(
 976             sc->vr_cdata.vr_parent_tag, /* parent */
 977             VR_RX_ALIGN, 0,             /* alignment, boundary */
 978             BUS_SPACE_MAXADDR,          /* lowaddr */
 979             BUS_SPACE_MAXADDR,          /* highaddr */
 980             NULL, NULL,                 /* filter, filterarg */
 981             MCLBYTES,                   /* maxsize */
 982             1,                          /* nsegments */
 983             MCLBYTES,                   /* maxsegsize */
 984             0,                          /* flags */
 985             NULL, NULL,                 /* lockfunc, lockarg */
 986             &sc->vr_cdata.vr_rx_tag);
 987         if (error != 0) {
 988                 device_printf(sc->vr_dev, "failed to create Rx DMA tag\n");
 989                 goto fail;
 990         }
 991
 992         /* Allocate DMA'able memory and load the DMA map for Tx ring. */
 993         error = bus_dmamem_alloc(sc->vr_cdata.vr_tx_ring_tag,
 994             (void **)&sc->vr_rdata.vr_tx_ring, BUS_DMA_WAITOK |
 995             BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->vr_cdata.vr_tx_ring_map);
 996         if (error != 0) {
 997                 device_printf(sc->vr_dev,
 998                     "failed to allocate DMA'able memory for Tx ring\n");
 999                 goto fail;
1000         }
1001
1002         ctx.vr_busaddr = 0;
1003         error = bus_dmamap_load(sc->vr_cdata.vr_tx_ring_tag,
1004             sc->vr_cdata.vr_tx_ring_map, sc->vr_rdata.vr_tx_ring,
1005             VR_TX_RING_SIZE, vr_dmamap_cb, &ctx, 0);
1006         if (error != 0 || ctx.vr_busaddr == 0) {
1007                 device_printf(sc->vr_dev,
1008                     "failed to load DMA'able memory for Tx ring\n");
1009                 goto fail;
1010         }
1011         sc->vr_rdata.vr_tx_ring_paddr = ctx.vr_busaddr;
1012
1013         /* Allocate DMA'able memory and load the DMA map for Rx ring. */
1014         error = bus_dmamem_alloc(sc->vr_cdata.vr_rx_ring_tag,
1015             (void **)&sc->vr_rdata.vr_rx_ring, BUS_DMA_WAITOK |
1016             BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->vr_cdata.vr_rx_ring_map);
1017         if (error != 0) {
1018                 device_printf(sc->vr_dev,
1019                     "failed to allocate DMA'able memory for Rx ring\n");
1020                 goto fail;
1021         }
1022
1023         ctx.vr_busaddr = 0;
1024         error = bus_dmamap_load(sc->vr_cdata.vr_rx_ring_tag,
1025             sc->vr_cdata.vr_rx_ring_map, sc->vr_rdata.vr_rx_ring,
1026             VR_RX_RING_SIZE, vr_dmamap_cb, &ctx, 0);
1027         if (error != 0 || ctx.vr_busaddr == 0) {
1028                 device_printf(sc->vr_dev,
1029                     "failed to load DMA'able memory for Rx ring\n");
1030                 goto fail;
1031         }
1032         sc->vr_rdata.vr_rx_ring_paddr = ctx.vr_busaddr;
1033
1034         /* Create DMA maps for Tx buffers. */
1035         for (i = 0; i < VR_TX_RING_CNT; i++) {
1036                 txd = &sc->vr_cdata.vr_txdesc[i];
1037                 txd->tx_m = NULL;
1038                 txd->tx_dmamap = NULL;
1039                 error = bus_dmamap_create(sc->vr_cdata.vr_tx_tag, 0,
1040                     &txd->tx_dmamap);
1041                 if (error != 0) {
1042                         device_printf(sc->vr_dev,
1043                             "failed to create Tx dmamap\n");
1044                         goto fail;
1045                 }
1046         }
1047         /* Create DMA maps for Rx buffers. */
1048         if ((error = bus_dmamap_create(sc->vr_cdata.vr_rx_tag, 0,
1049             &sc->vr_cdata.vr_rx_sparemap)) != 0) {
1050                 device_printf(sc->vr_dev,
1051                     "failed to create spare Rx dmamap\n");
1052                 goto fail;
1053         }
1054         for (i = 0; i < VR_RX_RING_CNT; i++) {
1055                 rxd = &sc->vr_cdata.vr_rxdesc[i];
1056                 rxd->rx_m = NULL;
1057                 rxd->rx_dmamap = NULL;
1058                 error = bus_dmamap_create(sc->vr_cdata.vr_rx_tag, 0,
1059                     &rxd->rx_dmamap);
1060                 if (error != 0) {
1061                         device_printf(sc->vr_dev,
1062                             "failed to create Rx dmamap\n");
1063                         goto fail;
1064                 }
1065         }
1066
1067 fail:
1068         return (error);
1069 }
1070
1071 static void
1072 vr_dma_free(struct vr_softc *sc)
1073 {
1074         struct vr_txdesc        *txd;
1075         struct vr_rxdesc        *rxd;
1076         int                     i;
1077
1078         /* Tx ring. */
1079         if (sc->vr_cdata.vr_tx_ring_tag) {
1080                 if (sc->vr_cdata.vr_tx_ring_map)
1081                         bus_dmamap_unload(sc->vr_cdata.vr_tx_ring_tag,
1082                             sc->vr_cdata.vr_tx_ring_map);
1083                 if (sc->vr_cdata.vr_tx_ring_map &&
1084                     sc->vr_rdata.vr_tx_ring)
1085                         bus_dmamem_free(sc->vr_cdata.vr_tx_ring_tag,
1086                             sc->vr_rdata.vr_tx_ring,
1087                             sc->vr_cdata.vr_tx_ring_map);
1088                 sc->vr_rdata.vr_tx_ring = NULL;
1089                 sc->vr_cdata.vr_tx_ring_map = NULL;
1090                 bus_dma_tag_destroy(sc->vr_cdata.vr_tx_ring_tag);
1091                 sc->vr_cdata.vr_tx_ring_tag = NULL;
1092         }
1093         /* Rx ring. */
1094         if (sc->vr_cdata.vr_rx_ring_tag) {
1095                 if (sc->vr_cdata.vr_rx_ring_map)
1096                         bus_dmamap_unload(sc->vr_cdata.vr_rx_ring_tag,
1097                             sc->vr_cdata.vr_rx_ring_map);
1098                 if (sc->vr_cdata.vr_rx_ring_map &&
1099                     sc->vr_rdata.vr_rx_ring)
1100                         bus_dmamem_free(sc->vr_cdata.vr_rx_ring_tag,
1101                             sc->vr_rdata.vr_rx_ring,
1102                             sc->vr_cdata.vr_rx_ring_map);
1103                 sc->vr_rdata.vr_rx_ring = NULL;
1104                 sc->vr_cdata.vr_rx_ring_map = NULL;
1105                 bus_dma_tag_destroy(sc->vr_cdata.vr_rx_ring_tag);
1106                 sc->vr_cdata.vr_rx_ring_tag = NULL;
1107         }
1108         /* Tx buffers. */
1109         if (sc->vr_cdata.vr_tx_tag) {
1110                 for (i = 0; i < VR_TX_RING_CNT; i++) {
1111                         txd = &sc->vr_cdata.vr_txdesc[i];
1112                         if (txd->tx_dmamap) {
1113                                 bus_dmamap_destroy(sc->vr_cdata.vr_tx_tag,
1114                                     txd->tx_dmamap);
1115                                 txd->tx_dmamap = NULL;
1116                         }
1117                 }
1118                 bus_dma_tag_destroy(sc->vr_cdata.vr_tx_tag);
1119                 sc->vr_cdata.vr_tx_tag = NULL;
1120         }
1121         /* Rx buffers. */
1122         if (sc->vr_cdata.vr_rx_tag) {
1123                 for (i = 0; i < VR_RX_RING_CNT; i++) {
1124                         rxd = &sc->vr_cdata.vr_rxdesc[i];
1125                         if (rxd->rx_dmamap) {
1126                                 bus_dmamap_destroy(sc->vr_cdata.vr_rx_tag,
1127                                     rxd->rx_dmamap);
1128                                 rxd->rx_dmamap = NULL;
1129                         }
1130                 }
1131                 if (sc->vr_cdata.vr_rx_sparemap) {
1132                         bus_dmamap_destroy(sc->vr_cdata.vr_rx_tag,
1133                             sc->vr_cdata.vr_rx_sparemap);
1134                         sc->vr_cdata.vr_rx_sparemap = 0;
1135                 }
1136                 bus_dma_tag_destroy(sc->vr_cdata.vr_rx_tag);
1137                 sc->vr_cdata.vr_rx_tag = NULL;
1138         }
1139
1140         if (sc->vr_cdata.vr_parent_tag) {
1141                 bus_dma_tag_destroy(sc->vr_cdata.vr_parent_tag);
1142                 sc->vr_cdata.vr_parent_tag = NULL;
1143         }
1144 }
1145
1146 /*
1147  * Initialize the transmit descriptors.
1148  */
1149 static int
1150 vr_tx_ring_init(struct vr_softc *sc)
1151 {
1152         struct vr_ring_data     *rd;
1153         struct vr_txdesc        *txd;
1154         bus_addr_t              addr;
1155         int                     i;
1156
1157         sc->vr_cdata.vr_tx_prod = 0;
1158         sc->vr_cdata.vr_tx_cons = 0;
1159         sc->vr_cdata.vr_tx_cnt = 0;
1160         sc->vr_cdata.vr_tx_pkts = 0;
1161
1162         rd = &sc->vr_rdata;
1163         bzero(rd->vr_tx_ring, VR_TX_RING_SIZE);
1164         for (i = 0; i < VR_TX_RING_CNT; i++) {
1165                 if (i == VR_TX_RING_CNT - 1)
1166                         addr = VR_TX_RING_ADDR(sc, 0);
1167                 else
1168                         addr = VR_TX_RING_ADDR(sc, i + 1);
1169                 rd->vr_tx_ring[i].vr_nextphys = htole32(VR_ADDR_LO(addr));
1170                 txd = &sc->vr_cdata.vr_txdesc[i];
1171                 txd->tx_m = NULL;
1172         }
1173
1174         bus_dmamap_sync(sc->vr_cdata.vr_tx_ring_tag,
1175             sc->vr_cdata.vr_tx_ring_map,
1176             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1177
1178         return (0);
1179 }
1180
1181 /*
1182  * Initialize the RX descriptors and allocate mbufs for them. Note that
1183  * we arrange the descriptors in a closed ring, so that the last descriptor
1184  * points back to the first.
1185  */
1186 static int
1187 vr_rx_ring_init(struct vr_softc *sc)
1188 {
1189         struct vr_ring_data     *rd;
1190         struct vr_rxdesc        *rxd;
1191         bus_addr_t              addr;
1192         int                     i;
1193
1194         sc->vr_cdata.vr_rx_cons = 0;
1195
1196         rd = &sc->vr_rdata;
1197         bzero(rd->vr_rx_ring, VR_RX_RING_SIZE);
1198         for (i = 0; i < VR_RX_RING_CNT; i++) {
1199                 rxd = &sc->vr_cdata.vr_rxdesc[i];
1200                 rxd->rx_m = NULL;
1201                 rxd->desc = &rd->vr_rx_ring[i];
1202                 if (i == VR_RX_RING_CNT - 1)
1203                         addr = VR_RX_RING_ADDR(sc, 0);
1204                 else
1205                         addr = VR_RX_RING_ADDR(sc, i + 1);
1206                 rd->vr_rx_ring[i].vr_nextphys = htole32(VR_ADDR_LO(addr));
1207                 if (vr_newbuf(sc, i) != 0)
1208                         return (ENOBUFS);
1209         }
1210
1211         bus_dmamap_sync(sc->vr_cdata.vr_rx_ring_tag,
1212             sc->vr_cdata.vr_rx_ring_map,
1213             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1214
1215         return (0);
1216 }
1217
1218 static __inline void
1219 vr_discard_rxbuf(struct vr_rxdesc *rxd)
1220 {
1221         struct vr_desc  *desc;
1222
1223         desc = rxd->desc;
1224         desc->vr_ctl = htole32(VR_RXCTL | (MCLBYTES - sizeof(uint64_t)));
1225         desc->vr_status = htole32(VR_RXSTAT_OWN);
1226 }
1227
1228 /*
1229  * Initialize an RX descriptor and attach an MBUF cluster.
1230  * Note: the length fields are only 11 bits wide, which means the
1231  * largest size we can specify is 2047. This is important because
1232  * MCLBYTES is 2048, so we have to subtract one otherwise we'll
1233  * overflow the field and make a mess.
1234  */
1235 static int
1236 vr_newbuf(struct vr_softc *sc, int idx)
1237 {
1238         struct vr_desc          *desc;
1239         struct vr_rxdesc        *rxd;
1240         struct mbuf             *m;
1241         bus_dma_segment_t       segs[1];
1242         bus_dmamap_t            map;
1243         int                     nsegs;
1244
1245         m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1246         if (m == NULL)
1247                 return (ENOBUFS);
1248         m->m_len = m->m_pkthdr.len = MCLBYTES;
1249         m_adj(m, sizeof(uint64_t));
1250
1251         if (bus_dmamap_load_mbuf_sg(sc->vr_cdata.vr_rx_tag,
1252             sc->vr_cdata.vr_rx_sparemap, m, segs, &nsegs, 0) != 0) {
1253                 m_freem(m);
1254                 return (ENOBUFS);
1255         }
1256         KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
1257
1258         rxd = &sc->vr_cdata.vr_rxdesc[idx];
1259         if (rxd->rx_m != NULL) {
1260                 bus_dmamap_sync(sc->vr_cdata.vr_rx_tag, rxd->rx_dmamap,
1261                     BUS_DMASYNC_POSTREAD);
1262                 bus_dmamap_unload(sc->vr_cdata.vr_rx_tag, rxd->rx_dmamap);
1263         }
1264         map = rxd->rx_dmamap;
1265         rxd->rx_dmamap = sc->vr_cdata.vr_rx_sparemap;
1266         sc->vr_cdata.vr_rx_sparemap = map;
1267         bus_dmamap_sync(sc->vr_cdata.vr_rx_tag, rxd->rx_dmamap,
1268             BUS_DMASYNC_PREREAD);
1269         rxd->rx_m = m;
1270         desc = rxd->desc;
1271         desc->vr_data = htole32(VR_ADDR_LO(segs[0].ds_addr));
1272         desc->vr_ctl = htole32(VR_RXCTL | segs[0].ds_len);
1273         desc->vr_status = htole32(VR_RXSTAT_OWN);
1274
1275         return (0);
1276 }
1277
1278 #ifndef __NO_STRICT_ALIGNMENT
1279 static __inline void
1280 vr_fixup_rx(struct mbuf *m)
1281 {
1282         uint16_t                *src, *dst;
1283         int                     i;
1284
1285         src = mtod(m, uint16_t *);
1286         dst = src - 1;
1287
1288         for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++)
1289                 *dst++ = *src++;
1290
1291         m->m_data -= ETHER_ALIGN;
1292 }
1293 #endif
1294
1295 /*
1296  * A frame has been uploaded: pass the resulting mbuf chain up to
1297  * the higher level protocols.
1298  */
1299 static int
1300 vr_rxeof(struct vr_softc *sc)
1301 {
1302         struct vr_rxdesc        *rxd;
1303         struct mbuf             *m;
1304         struct ifnet            *ifp;
1305         struct vr_desc          *cur_rx;
1306         int                     cons, prog, total_len, rx_npkts;
1307         uint32_t                rxstat, rxctl;
1308
1309         VR_LOCK_ASSERT(sc);
1310         ifp = sc->vr_ifp;
1311         cons = sc->vr_cdata.vr_rx_cons;
1312         rx_npkts = 0;
1313
1314         bus_dmamap_sync(sc->vr_cdata.vr_rx_ring_tag,
1315             sc->vr_cdata.vr_rx_ring_map,
1316             BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1317
1318         for (prog = 0; prog < VR_RX_RING_CNT; VR_INC(cons, VR_RX_RING_CNT)) {
1319 #ifdef DEVICE_POLLING
1320                 if (ifp->if_capenable & IFCAP_POLLING) {
1321                         if (sc->rxcycles <= 0)
1322                                 break;
1323                         sc->rxcycles--;
1324                 }
1325 #endif
1326                 cur_rx = &sc->vr_rdata.vr_rx_ring[cons];
1327                 rxstat = le32toh(cur_rx->vr_status);
1328                 rxctl = le32toh(cur_rx->vr_ctl);
1329                 if ((rxstat & VR_RXSTAT_OWN) == VR_RXSTAT_OWN)
1330                         break;
1331
1332                 prog++;
1333                 rxd = &sc->vr_cdata.vr_rxdesc[cons];
1334                 m = rxd->rx_m;
1335
1336                 /*
1337                  * If an error occurs, update stats, clear the
1338                  * status word and leave the mbuf cluster in place:
1339                  * it should simply get re-used next time this descriptor
1340                  * comes up in the ring.
1341                  * We don't support SG in Rx path yet, so discard
1342                  * partial frame.
1343                  */
1344                 if ((rxstat & VR_RXSTAT_RX_OK) == 0 ||
1345                     (rxstat & (VR_RXSTAT_FIRSTFRAG | VR_RXSTAT_LASTFRAG)) !=
1346                     (VR_RXSTAT_FIRSTFRAG | VR_RXSTAT_LASTFRAG)) {
1347                         ifp->if_ierrors++;
1348                         sc->vr_stat.rx_errors++;
1349                         if (rxstat & VR_RXSTAT_CRCERR)
1350                                 sc->vr_stat.rx_crc_errors++;
1351                         if (rxstat & VR_RXSTAT_FRAMEALIGNERR)
1352                                 sc->vr_stat.rx_alignment++;
1353                         if (rxstat & VR_RXSTAT_FIFOOFLOW)
1354                                 sc->vr_stat.rx_fifo_overflows++;
1355                         if (rxstat & VR_RXSTAT_GIANT)
1356                                 sc->vr_stat.rx_giants++;
1357                         if (rxstat & VR_RXSTAT_RUNT)
1358                                 sc->vr_stat.rx_runts++;
1359                         if (rxstat & VR_RXSTAT_BUFFERR)
1360                                 sc->vr_stat.rx_no_buffers++;
1361 #ifdef  VR_SHOW_ERRORS
1362                         device_printf(sc->vr_dev, "%s: receive error = 0x%b\n",
1363                             __func__, rxstat & 0xff, VR_RXSTAT_ERR_BITS);
1364 #endif
1365                         vr_discard_rxbuf(rxd);
1366                         continue;
1367                 }
1368
1369                 if (vr_newbuf(sc, cons) != 0) {
1370                         ifp->if_iqdrops++;
1371                         sc->vr_stat.rx_errors++;
1372                         sc->vr_stat.rx_no_mbufs++;
1373                         vr_discard_rxbuf(rxd);
1374                         continue;
1375                 }
1376
1377                 /*
1378                  * XXX The VIA Rhine chip includes the CRC with every
1379                  * received frame, and there's no way to turn this
1380                  * behavior off (at least, I can't find anything in
1381                  * the manual that explains how to do it) so we have
1382                  * to trim off the CRC manually.
1383                  */
1384                 total_len = VR_RXBYTES(rxstat);
1385                 total_len -= ETHER_CRC_LEN;
1386                 m->m_pkthdr.len = m->m_len = total_len;
1387 #ifndef __NO_STRICT_ALIGNMENT
1388                 /*
1389                  * RX buffers must be 32-bit aligned.
1390                  * Ignore the alignment problems on the non-strict alignment
1391                  * platform. The performance hit incurred due to unaligned
1392                  * accesses is much smaller than the hit produced by forcing
1393                  * buffer copies all the time.
1394                  */
1395                 vr_fixup_rx(m);
1396 #endif
1397                 m->m_pkthdr.rcvif = ifp;
1398                 ifp->if_ipackets++;
1399                 sc->vr_stat.rx_ok++;
1400                 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0 &&
1401                     (rxstat & VR_RXSTAT_FRAG) == 0 &&
1402                     (rxctl & VR_RXCTL_IP) != 0) {
1403                         /* Checksum is valid for non-fragmented IP packets. */
1404                         m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
1405                         if ((rxctl & VR_RXCTL_IPOK) == VR_RXCTL_IPOK) {
1406                                 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1407                                 if (rxctl & (VR_RXCTL_TCP | VR_RXCTL_UDP)) {
1408                                         m->m_pkthdr.csum_flags |=
1409                                             CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
1410                                         if ((rxctl & VR_RXCTL_TCPUDPOK) != 0)
1411                                                 m->m_pkthdr.csum_data = 0xffff;
1412                                 }
1413                         }
1414                 }
1415                 VR_UNLOCK(sc);
1416                 (*ifp->if_input)(ifp, m);
1417                 VR_LOCK(sc);
1418                 rx_npkts++;
1419         }
1420
1421         if (prog > 0) {
1422                 sc->vr_cdata.vr_rx_cons = cons;
1423                 bus_dmamap_sync(sc->vr_cdata.vr_rx_ring_tag,
1424                     sc->vr_cdata.vr_rx_ring_map,
1425                     BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1426         }
1427         return (rx_npkts);
1428 }
1429
1430 /*
1431  * A frame was downloaded to the chip. It's safe for us to clean up
1432  * the list buffers.
1433  */
1434 static void
1435 vr_txeof(struct vr_softc *sc)
1436 {
1437         struct vr_txdesc        *txd;
1438         struct vr_desc          *cur_tx;
1439         struct ifnet            *ifp;
1440         uint32_t                txctl, txstat;
1441         int                     cons, prod;
1442
1443         VR_LOCK_ASSERT(sc);
1444
1445         cons = sc->vr_cdata.vr_tx_cons;
1446         prod = sc->vr_cdata.vr_tx_prod;
1447         if (cons == prod)
1448                 return;
1449
1450         bus_dmamap_sync(sc->vr_cdata.vr_tx_ring_tag,
1451             sc->vr_cdata.vr_tx_ring_map,
1452             BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1453
1454         ifp = sc->vr_ifp;
1455         /*
1456          * Go through our tx list and free mbufs for those
1457          * frames that have been transmitted.
1458          */
1459         for (; cons != prod; VR_INC(cons, VR_TX_RING_CNT)) {
1460                 cur_tx = &sc->vr_rdata.vr_tx_ring[cons];
1461                 txctl = le32toh(cur_tx->vr_ctl);
1462                 txstat = le32toh(cur_tx->vr_status);
1463                 if ((txstat & VR_TXSTAT_OWN) == VR_TXSTAT_OWN)
1464                         break;
1465
1466                 sc->vr_cdata.vr_tx_cnt--;
1467                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1468                 /* Only the first descriptor in the chain is valid. */
1469                 if ((txctl & VR_TXCTL_FIRSTFRAG) == 0)
1470                         continue;
1471
1472                 txd = &sc->vr_cdata.vr_txdesc[cons];
1473                 KASSERT(txd->tx_m != NULL, ("%s: accessing NULL mbuf!\n",
1474                     __func__));
1475
1476                 if ((txstat & VR_TXSTAT_ERRSUM) != 0) {
1477                         ifp->if_oerrors++;
1478                         sc->vr_stat.tx_errors++;
1479                         if ((txstat & VR_TXSTAT_ABRT) != 0) {
1480                                 /* Give up and restart Tx. */
1481                                 sc->vr_stat.tx_abort++;
1482                                 bus_dmamap_sync(sc->vr_cdata.vr_tx_tag,
1483                                     txd->tx_dmamap, BUS_DMASYNC_POSTWRITE);
1484                                 bus_dmamap_unload(sc->vr_cdata.vr_tx_tag,
1485                                     txd->tx_dmamap);
1486                                 m_freem(txd->tx_m);
1487                                 txd->tx_m = NULL;
1488                                 VR_INC(cons, VR_TX_RING_CNT);
1489                                 sc->vr_cdata.vr_tx_cons = cons;
1490                                 if (vr_tx_stop(sc) != 0) {
1491                                         device_printf(sc->vr_dev,
1492                                             "%s: Tx shutdown error -- "
1493                                             "resetting\n", __func__);
1494                                         sc->vr_flags |= VR_F_RESTART;
1495                                         return;
1496                                 }
1497                                 vr_tx_start(sc);
1498                                 break;
1499                         }
1500                         if ((sc->vr_revid < REV_ID_VT3071_A &&
1501                             (txstat & VR_TXSTAT_UNDERRUN)) ||
1502                             (txstat & (VR_TXSTAT_UDF | VR_TXSTAT_TBUFF))) {
1503                                 sc->vr_stat.tx_underrun++;
1504                                 /* Retry and restart Tx. */
1505                                 sc->vr_cdata.vr_tx_cnt++;
1506                                 sc->vr_cdata.vr_tx_cons = cons;
1507                                 cur_tx->vr_status = htole32(VR_TXSTAT_OWN);
1508                                 bus_dmamap_sync(sc->vr_cdata.vr_tx_ring_tag,
1509                                     sc->vr_cdata.vr_tx_ring_map,
1510                                     BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1511                                 vr_tx_underrun(sc);
1512                                 return;
1513                         }
1514                         if ((txstat & VR_TXSTAT_DEFER) != 0) {
1515                                 ifp->if_collisions++;
1516                                 sc->vr_stat.tx_collisions++;
1517                         }
1518                         if ((txstat & VR_TXSTAT_LATECOLL) != 0) {
1519                                 ifp->if_collisions++;
1520                                 sc->vr_stat.tx_late_collisions++;
1521                         }
1522                 } else {
1523                         sc->vr_stat.tx_ok++;
1524                         ifp->if_opackets++;
1525                 }
1526
1527                 bus_dmamap_sync(sc->vr_cdata.vr_tx_tag, txd->tx_dmamap,
1528                     BUS_DMASYNC_POSTWRITE);
1529                 bus_dmamap_unload(sc->vr_cdata.vr_tx_tag, txd->tx_dmamap);
1530                 if (sc->vr_revid < REV_ID_VT3071_A) {
1531                         ifp->if_collisions +=
1532                             (txstat & VR_TXSTAT_COLLCNT) >> 3;
1533                         sc->vr_stat.tx_collisions +=
1534                             (txstat & VR_TXSTAT_COLLCNT) >> 3;
1535                 } else {
1536                         ifp->if_collisions += (txstat & 0x0f);
1537                         sc->vr_stat.tx_collisions += (txstat & 0x0f);
1538                 }
1539                 m_freem(txd->tx_m);
1540                 txd->tx_m = NULL;
1541         }
1542
1543         sc->vr_cdata.vr_tx_cons = cons;
1544         if (sc->vr_cdata.vr_tx_cnt == 0)
1545                 sc->vr_watchdog_timer = 0;
1546 }
1547
1548 static void
1549 vr_tick(void *xsc)
1550 {
1551         struct vr_softc         *sc;
1552         struct mii_data         *mii;
1553
1554         sc = (struct vr_softc *)xsc;
1555
1556         VR_LOCK_ASSERT(sc);
1557
1558         if ((sc->vr_flags & VR_F_RESTART) != 0) {
1559                 device_printf(sc->vr_dev, "restarting\n");
1560                 sc->vr_stat.num_restart++;
1561                 vr_stop(sc);
1562                 vr_reset(sc);
1563                 vr_init_locked(sc);
1564                 sc->vr_flags &= ~VR_F_RESTART;
1565         }
1566
1567         mii = device_get_softc(sc->vr_miibus);
1568         mii_tick(mii);
1569         vr_watchdog(sc);
1570         callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
1571 }
1572
1573 #ifdef DEVICE_POLLING
1574 static poll_handler_t vr_poll;
1575 static poll_handler_t vr_poll_locked;
1576
1577 static int
1578 vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1579 {
1580         struct vr_softc *sc;
1581         int rx_npkts;
1582
1583         sc = ifp->if_softc;
1584         rx_npkts = 0;
1585
1586         VR_LOCK(sc);
1587         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
1588                 rx_npkts = vr_poll_locked(ifp, cmd, count);
1589         VR_UNLOCK(sc);
1590         return (rx_npkts);
1591 }
1592
1593 static int
1594 vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
1595 {
1596         struct vr_softc *sc;
1597         int rx_npkts;
1598
1599         sc = ifp->if_softc;
1600
1601         VR_LOCK_ASSERT(sc);
1602
1603         sc->rxcycles = count;
1604         rx_npkts = vr_rxeof(sc);
1605         vr_txeof(sc);
1606         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1607                 vr_start_locked(ifp);
1608
1609         if (cmd == POLL_AND_CHECK_STATUS) {
1610                 uint16_t status;
1611
1612                 /* Also check status register. */
1613                 status = CSR_READ_2(sc, VR_ISR);
1614                 if (status)
1615                         CSR_WRITE_2(sc, VR_ISR, status);
1616
1617                 if ((status & VR_INTRS) == 0)
1618                         return (rx_npkts);
1619
1620                 if ((status & (VR_ISR_BUSERR | VR_ISR_LINKSTAT2 |
1621                     VR_ISR_STATSOFLOW)) != 0) {
1622                         if (vr_error(sc, status) != 0)
1623                                 return (rx_npkts);
1624                 }
1625                 if ((status & (VR_ISR_RX_NOBUF | VR_ISR_RX_OFLOW)) != 0) {
1626 #ifdef  VR_SHOW_ERRORS
1627                         device_printf(sc->vr_dev, "%s: receive error : 0x%b\n",
1628                             __func__, status, VR_ISR_ERR_BITS);
1629 #endif
1630                         vr_rx_start(sc);
1631                 }
1632         }
1633         return (rx_npkts);
1634 }
1635 #endif /* DEVICE_POLLING */
1636
1637 /* Back off the transmit threshold. */
1638 static void
1639 vr_tx_underrun(struct vr_softc *sc)
1640 {
1641         int     thresh;
1642
1643         device_printf(sc->vr_dev, "Tx underrun -- ");
1644         if (sc->vr_txthresh < VR_TXTHRESH_MAX) {
1645                 thresh = sc->vr_txthresh;
1646                 sc->vr_txthresh++;
1647                 if (sc->vr_txthresh >= VR_TXTHRESH_MAX) {
1648                         sc->vr_txthresh = VR_TXTHRESH_MAX;
1649                         printf("using store and forward mode\n");
1650                 } else
1651                         printf("increasing Tx threshold(%d -> %d)\n",
1652                             vr_tx_threshold_tables[thresh].value,
1653                             vr_tx_threshold_tables[thresh + 1].value);
1654         } else
1655                 printf("\n");
1656         sc->vr_stat.tx_underrun++;
1657         if (vr_tx_stop(sc) != 0) {
1658                 device_printf(sc->vr_dev, "%s: Tx shutdown error -- "
1659                     "resetting\n", __func__);
1660                 sc->vr_flags |= VR_F_RESTART;
1661                 return;
1662         }
1663         vr_tx_start(sc);
1664 }
1665
1666 static void
1667 vr_intr(void *arg)
1668 {
1669         struct vr_softc         *sc;
1670         struct ifnet            *ifp;
1671         uint16_t                status;
1672
1673         sc = (struct vr_softc *)arg;
1674
1675         VR_LOCK(sc);
1676
1677         if (sc->vr_suspended != 0)
1678                 goto done_locked;
1679
1680         status = CSR_READ_2(sc, VR_ISR);
1681         if (status == 0 || status == 0xffff || (status & VR_INTRS) == 0)
1682                 goto done_locked;
1683
1684         ifp = sc->vr_ifp;
1685 #ifdef DEVICE_POLLING
1686         if ((ifp->if_capenable & IFCAP_POLLING) != 0)
1687                 goto done_locked;
1688 #endif
1689
1690         /* Suppress unwanted interrupts. */
1691         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ||
1692             (sc->vr_flags & VR_F_RESTART) != 0) {
1693                 CSR_WRITE_2(sc, VR_IMR, 0);
1694                 CSR_WRITE_2(sc, VR_ISR, status);
1695                 goto done_locked;
1696         }
1697
1698         /* Disable interrupts. */
1699         CSR_WRITE_2(sc, VR_IMR, 0x0000);
1700
1701         for (; (status & VR_INTRS) != 0;) {
1702                 CSR_WRITE_2(sc, VR_ISR, status);
1703                 if ((status & (VR_ISR_BUSERR | VR_ISR_LINKSTAT2 |
1704                     VR_ISR_STATSOFLOW)) != 0) {
1705                         if (vr_error(sc, status) != 0) {
1706                                 VR_UNLOCK(sc);
1707                                 return;
1708                         }
1709                 }
1710                 vr_rxeof(sc);
1711                 if ((status & (VR_ISR_RX_NOBUF | VR_ISR_RX_OFLOW)) != 0) {
1712 #ifdef  VR_SHOW_ERRORS
1713                         device_printf(sc->vr_dev, "%s: receive error = 0x%b\n",
1714                             __func__, status, VR_ISR_ERR_BITS);
1715 #endif
1716                         /* Restart Rx if RxDMA SM was stopped. */
1717                         vr_rx_start(sc);
1718                 }
1719                 vr_txeof(sc);
1720                 status = CSR_READ_2(sc, VR_ISR);
1721         }
1722
1723         /* Re-enable interrupts. */
1724         CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1725
1726         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1727                 vr_start_locked(ifp);
1728
1729 done_locked:
1730         VR_UNLOCK(sc);
1731 }
1732
1733 static int
1734 vr_error(struct vr_softc *sc, uint16_t status)
1735 {
1736         uint16_t pcis;
1737
1738         status &= VR_ISR_BUSERR | VR_ISR_LINKSTAT2 | VR_ISR_STATSOFLOW;
1739         if ((status & VR_ISR_BUSERR) != 0) {
1740                 status &= ~VR_ISR_BUSERR;
1741                 sc->vr_stat.bus_errors++;
1742                 /* Disable further interrupts. */
1743                 CSR_WRITE_2(sc, VR_IMR, 0);
1744                 pcis = pci_read_config(sc->vr_dev, PCIR_STATUS, 2);
1745                 device_printf(sc->vr_dev, "PCI bus error(0x%04x) -- "
1746                     "resetting\n", pcis);
1747                 pci_write_config(sc->vr_dev, PCIR_STATUS, pcis, 2);
1748                 sc->vr_flags |= VR_F_RESTART;
1749                 return (EAGAIN);
1750         }
1751         if ((status & VR_ISR_LINKSTAT2) != 0) {
1752                 /* Link state change, duplex changes etc. */
1753                 status &= ~VR_ISR_LINKSTAT2;
1754         }
1755         if ((status & VR_ISR_STATSOFLOW) != 0) {
1756                 status &= ~VR_ISR_STATSOFLOW;
1757                 if (sc->vr_revid >= REV_ID_VT6105M_A0) {
1758                         /* Update MIB counters. */
1759                 }
1760         }
1761
1762         if (status != 0)
1763                 device_printf(sc->vr_dev,
1764                     "unhandled interrupt, status = 0x%04x\n", status);
1765         return (0);
1766 }
1767
1768 /*
1769  * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1770  * pointers to the fragment pointers.
1771  */
1772 static int
1773 vr_encap(struct vr_softc *sc, struct mbuf **m_head)
1774 {
1775         struct vr_txdesc        *txd;
1776         struct vr_desc          *desc;
1777         struct mbuf             *m;
1778         bus_dma_segment_t       txsegs[VR_MAXFRAGS];
1779         uint32_t                csum_flags, txctl;
1780         int                     error, i, nsegs, prod, si;
1781         int                     padlen;
1782
1783         VR_LOCK_ASSERT(sc);
1784
1785         M_ASSERTPKTHDR((*m_head));
1786
1787         /*
1788          * Some VIA Rhine wants packet buffers to be longword
1789          * aligned, but very often our mbufs aren't. Rather than
1790          * waste time trying to decide when to copy and when not
1791          * to copy, just do it all the time.
1792          */
1793         if ((sc->vr_quirks & VR_Q_NEEDALIGN) != 0) {
1794                 m = m_defrag(*m_head, M_DONTWAIT);
1795                 if (m == NULL) {
1796                         m_freem(*m_head);
1797                         *m_head = NULL;
1798                         return (ENOBUFS);
1799                 }
1800                 *m_head = m;
1801         }
1802
1803         /*
1804          * The Rhine chip doesn't auto-pad, so we have to make
1805          * sure to pad short frames out to the minimum frame length
1806          * ourselves.
1807          */
1808         if ((*m_head)->m_pkthdr.len < VR_MIN_FRAMELEN) {
1809                 m = *m_head;
1810                 padlen = VR_MIN_FRAMELEN - m->m_pkthdr.len;
1811                 if (M_WRITABLE(m) == 0) {
1812                         /* Get a writable copy. */
1813                         m = m_dup(*m_head, M_DONTWAIT);
1814                         m_freem(*m_head);
1815                         if (m == NULL) {
1816                                 *m_head = NULL;
1817                                 return (ENOBUFS);
1818                         }
1819                         *m_head = m;
1820                 }
1821                 if (m->m_next != NULL || M_TRAILINGSPACE(m) < padlen) {
1822                         m = m_defrag(m, M_DONTWAIT);
1823                         if (m == NULL) {
1824                                 m_freem(*m_head);
1825                                 *m_head = NULL;
1826                                 return (ENOBUFS);
1827                         }
1828                 }
1829                 /*
1830                  * Manually pad short frames, and zero the pad space
1831                  * to avoid leaking data.
1832                  */
1833                 bzero(mtod(m, char *) + m->m_pkthdr.len, padlen);
1834                 m->m_pkthdr.len += padlen;
1835                 m->m_len = m->m_pkthdr.len;
1836                 *m_head = m;
1837         }
1838
1839         prod = sc->vr_cdata.vr_tx_prod;
1840         txd = &sc->vr_cdata.vr_txdesc[prod];
1841         error = bus_dmamap_load_mbuf_sg(sc->vr_cdata.vr_tx_tag, txd->tx_dmamap,
1842             *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
1843         if (error == EFBIG) {
1844                 m = m_collapse(*m_head, M_DONTWAIT, VR_MAXFRAGS);
1845                 if (m == NULL) {
1846                         m_freem(*m_head);
1847                         *m_head = NULL;
1848                         return (ENOBUFS);
1849                 }
1850                 *m_head = m;
1851                 error = bus_dmamap_load_mbuf_sg(sc->vr_cdata.vr_tx_tag,
1852                     txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
1853                 if (error != 0) {
1854                         m_freem(*m_head);
1855                         *m_head = NULL;
1856                         return (error);
1857                 }
1858         } else if (error != 0)
1859                 return (error);
1860         if (nsegs == 0) {
1861                 m_freem(*m_head);
1862                 *m_head = NULL;
1863                 return (EIO);
1864         }
1865
1866         /* Check number of available descriptors. */
1867         if (sc->vr_cdata.vr_tx_cnt + nsegs >= (VR_TX_RING_CNT - 1)) {
1868                 bus_dmamap_unload(sc->vr_cdata.vr_tx_tag, txd->tx_dmamap);
1869                 return (ENOBUFS);
1870         }
1871
1872         txd->tx_m = *m_head;
1873         bus_dmamap_sync(sc->vr_cdata.vr_tx_tag, txd->tx_dmamap,
1874             BUS_DMASYNC_PREWRITE);
1875
1876         /* Set checksum offload. */
1877         csum_flags = 0;
1878         if (((*m_head)->m_pkthdr.csum_flags & VR_CSUM_FEATURES) != 0) {
1879                 if ((*m_head)->m_pkthdr.csum_flags & CSUM_IP)
1880                         csum_flags |= VR_TXCTL_IPCSUM;
1881                 if ((*m_head)->m_pkthdr.csum_flags & CSUM_TCP)
1882                         csum_flags |= VR_TXCTL_TCPCSUM;
1883                 if ((*m_head)->m_pkthdr.csum_flags & CSUM_UDP)
1884                         csum_flags |= VR_TXCTL_UDPCSUM;
1885         }
1886
1887         /*
1888          * Quite contrary to datasheet for VIA Rhine, VR_TXCTL_TLINK bit
1889          * is required for all descriptors regardless of single or
1890          * multiple buffers. Also VR_TXSTAT_OWN bit is valid only for
1891          * the first descriptor for a multi-fragmented frames. Without
1892          * that VIA Rhine chip generates Tx underrun interrupts and can't
1893          * send any frames.
1894          */
1895         si = prod;
1896         for (i = 0; i < nsegs; i++) {
1897                 desc = &sc->vr_rdata.vr_tx_ring[prod];
1898                 desc->vr_status = 0;
1899                 txctl = txsegs[i].ds_len | VR_TXCTL_TLINK | csum_flags;
1900                 if (i == 0)
1901                         txctl |= VR_TXCTL_FIRSTFRAG;
1902                 desc->vr_ctl = htole32(txctl);
1903                 desc->vr_data = htole32(VR_ADDR_LO(txsegs[i].ds_addr));
1904                 sc->vr_cdata.vr_tx_cnt++;
1905                 VR_INC(prod, VR_TX_RING_CNT);
1906         }
1907         /* Update producer index. */
1908         sc->vr_cdata.vr_tx_prod = prod;
1909
1910         prod = (prod + VR_TX_RING_CNT - 1) % VR_TX_RING_CNT;
1911         desc = &sc->vr_rdata.vr_tx_ring[prod];
1912
1913         /*
1914          * Set EOP on the last desciptor and reuqest Tx completion
1915          * interrupt for every VR_TX_INTR_THRESH-th frames.
1916          */
1917         VR_INC(sc->vr_cdata.vr_tx_pkts, VR_TX_INTR_THRESH);
1918         if (sc->vr_cdata.vr_tx_pkts == 0)
1919                 desc->vr_ctl |= htole32(VR_TXCTL_LASTFRAG | VR_TXCTL_FINT);
1920         else
1921                 desc->vr_ctl |= htole32(VR_TXCTL_LASTFRAG);
1922
1923         /* Lastly turn the first descriptor ownership to hardware. */
1924         desc = &sc->vr_rdata.vr_tx_ring[si];
1925         desc->vr_status |= htole32(VR_TXSTAT_OWN);
1926
1927         /* Sync descriptors. */
1928         bus_dmamap_sync(sc->vr_cdata.vr_tx_ring_tag,
1929             sc->vr_cdata.vr_tx_ring_map,
1930             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1931
1932         return (0);
1933 }
1934
1935 static void
1936 vr_start(struct ifnet *ifp)
1937 {
1938         struct vr_softc         *sc;
1939
1940         sc = ifp->if_softc;
1941         VR_LOCK(sc);
1942         vr_start_locked(ifp);
1943         VR_UNLOCK(sc);
1944 }
1945
1946 static void
1947 vr_start_locked(struct ifnet *ifp)
1948 {
1949         struct vr_softc         *sc;
1950         struct mbuf             *m_head;
1951         int                     enq;
1952
1953         sc = ifp->if_softc;
1954
1955         VR_LOCK_ASSERT(sc);
1956
1957         if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
1958             IFF_DRV_RUNNING || sc->vr_link == 0)
1959                 return;
1960
1961         for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
1962             sc->vr_cdata.vr_tx_cnt < VR_TX_RING_CNT - 2; ) {
1963                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
1964                 if (m_head == NULL)
1965                         break;
1966                 /*
1967                  * Pack the data into the transmit ring. If we
1968                  * don't have room, set the OACTIVE flag and wait
1969                  * for the NIC to drain the ring.
1970                  */
1971                 if (vr_encap(sc, &m_head)) {
1972                         if (m_head == NULL)
1973                                 break;
1974                         IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
1975                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1976                         break;
1977                 }
1978
1979                 enq++;
1980                 /*
1981                  * If there's a BPF listener, bounce a copy of this frame
1982                  * to him.
1983                  */
1984                 ETHER_BPF_MTAP(ifp, m_head);
1985         }
1986
1987         if (enq > 0) {
1988                 /* Tell the chip to start transmitting. */
1989                 VR_SETBIT(sc, VR_CR0, VR_CR0_TX_GO);
1990                 /* Set a timeout in case the chip goes out to lunch. */
1991                 sc->vr_watchdog_timer = 5;
1992         }
1993 }
1994
1995 static void
1996 vr_init(void *xsc)
1997 {
1998         struct vr_softc         *sc;
1999
2000         sc = (struct vr_softc *)xsc;
2001         VR_LOCK(sc);
2002         vr_init_locked(sc);
2003         VR_UNLOCK(sc);
2004 }
2005
2006 static void
2007 vr_init_locked(struct vr_softc *sc)
2008 {
2009         struct ifnet            *ifp;
2010         struct mii_data         *mii;
2011         bus_addr_t              addr;
2012         int                     i;
2013
2014         VR_LOCK_ASSERT(sc);
2015
2016         ifp = sc->vr_ifp;
2017         mii = device_get_softc(sc->vr_miibus);
2018
2019         /* Cancel pending I/O and free all RX/TX buffers. */
2020         vr_stop(sc);
2021         vr_reset(sc);
2022
2023         /* Set our station address. */
2024         for (i = 0; i < ETHER_ADDR_LEN; i++)
2025                 CSR_WRITE_1(sc, VR_PAR0 + i, IF_LLADDR(sc->vr_ifp)[i]);
2026
2027         /* Set DMA size. */
2028         VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
2029         VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
2030
2031         /*
2032          * BCR0 and BCR1 can override the RXCFG and TXCFG registers,
2033          * so we must set both.
2034          */
2035         VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
2036         VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES);
2037
2038         VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
2039         VR_SETBIT(sc, VR_BCR1, vr_tx_threshold_tables[sc->vr_txthresh].bcr_cfg);
2040
2041         VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
2042         VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
2043
2044         VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
2045         VR_SETBIT(sc, VR_TXCFG, vr_tx_threshold_tables[sc->vr_txthresh].tx_cfg);
2046
2047         /* Init circular RX list. */
2048         if (vr_rx_ring_init(sc) != 0) {
2049                 device_printf(sc->vr_dev,
2050                     "initialization failed: no memory for rx buffers\n");
2051                 vr_stop(sc);
2052                 return;
2053         }
2054
2055         /* Init tx descriptors. */
2056         vr_tx_ring_init(sc);
2057
2058         if ((sc->vr_quirks & VR_Q_CAM) != 0) {
2059                 uint8_t vcam[2] = { 0, 0 };
2060
2061                 /* Disable VLAN hardware tag insertion/stripping. */
2062                 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TXTAGEN | VR_TXCFG_RXTAGCTL);
2063                 /* Disable VLAN hardware filtering. */
2064                 VR_CLRBIT(sc, VR_BCR1, VR_BCR1_VLANFILT_ENB);
2065                 /* Disable all CAM entries. */
2066                 vr_cam_mask(sc, VR_MCAST_CAM, 0);
2067                 vr_cam_mask(sc, VR_VLAN_CAM, 0);
2068                 /* Enable the first VLAN CAM. */
2069                 vr_cam_data(sc, VR_VLAN_CAM, 0, vcam);
2070                 vr_cam_mask(sc, VR_VLAN_CAM, 1);
2071         }
2072
2073         /*
2074          * Set up receive filter.
2075          */
2076         vr_set_filter(sc);
2077
2078         /*
2079          * Load the address of the RX ring.
2080          */
2081         addr = VR_RX_RING_ADDR(sc, 0);
2082         CSR_WRITE_4(sc, VR_RXADDR, VR_ADDR_LO(addr));
2083         /*
2084          * Load the address of the TX ring.
2085          */
2086         addr = VR_TX_RING_ADDR(sc, 0);
2087         CSR_WRITE_4(sc, VR_TXADDR, VR_ADDR_LO(addr));
2088         /* Default : full-duplex, no Tx poll. */
2089         CSR_WRITE_1(sc, VR_CR1, VR_CR1_FULLDUPLEX | VR_CR1_TX_NOPOLL);
2090
2091         /* Set flow-control parameters for Rhine III. */
2092         if (sc->vr_revid >= REV_ID_VT6105_A0) {
2093                 /* Rx buffer count available for incoming packet. */
2094                 CSR_WRITE_1(sc, VR_FLOWCR0, VR_RX_RING_CNT);
2095                 /*
2096                  * Tx pause low threshold : 16 free receive buffers
2097                  * Tx pause XON high threshold : 48 free receive buffers
2098                  */
2099                 CSR_WRITE_1(sc, VR_FLOWCR1,
2100                     VR_FLOWCR1_TXLO16 | VR_FLOWCR1_TXHI48 | VR_FLOWCR1_XONXOFF);
2101                 /* Set Tx pause timer. */
2102                 CSR_WRITE_2(sc, VR_PAUSETIMER, 0xffff);
2103         }
2104
2105         /* Enable receiver and transmitter. */
2106         CSR_WRITE_1(sc, VR_CR0,
2107             VR_CR0_START | VR_CR0_TX_ON | VR_CR0_RX_ON | VR_CR0_RX_GO);
2108
2109         CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
2110 #ifdef DEVICE_POLLING
2111         /*
2112          * Disable interrupts if we are polling.
2113          */
2114         if (ifp->if_capenable & IFCAP_POLLING)
2115                 CSR_WRITE_2(sc, VR_IMR, 0);
2116         else
2117 #endif
2118         /*
2119          * Enable interrupts and disable MII intrs.
2120          */
2121         CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
2122         if (sc->vr_revid > REV_ID_VT6102_A)
2123                 CSR_WRITE_2(sc, VR_MII_IMR, 0);
2124
2125         sc->vr_link = 0;
2126         mii_mediachg(mii);
2127
2128         ifp->if_drv_flags |= IFF_DRV_RUNNING;
2129         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2130
2131         callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
2132 }
2133
2134 /*
2135  * Set media options.
2136  */
2137 static int
2138 vr_ifmedia_upd(struct ifnet *ifp)
2139 {
2140         struct vr_softc         *sc;
2141         struct mii_data         *mii;
2142         struct mii_softc        *miisc;
2143         int                     error;
2144
2145         sc = ifp->if_softc;
2146         VR_LOCK(sc);
2147         mii = device_get_softc(sc->vr_miibus);
2148         if (mii->mii_instance) {
2149                 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2150                         mii_phy_reset(miisc);
2151         }
2152         error = mii_mediachg(mii);
2153         VR_UNLOCK(sc);
2154
2155         return (error);
2156 }
2157
2158 /*
2159  * Report current media status.
2160  */
2161 static void
2162 vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
2163 {
2164         struct vr_softc         *sc;
2165         struct mii_data         *mii;
2166
2167         sc = ifp->if_softc;
2168         mii = device_get_softc(sc->vr_miibus);
2169         VR_LOCK(sc);
2170         mii_pollstat(mii);
2171         VR_UNLOCK(sc);
2172         ifmr->ifm_active = mii->mii_media_active;
2173         ifmr->ifm_status = mii->mii_media_status;
2174 }
2175
2176 static int
2177 vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
2178 {
2179         struct vr_softc         *sc;
2180         struct ifreq            *ifr;
2181         struct mii_data         *mii;
2182         int                     error, mask;
2183
2184         sc = ifp->if_softc;
2185         ifr = (struct ifreq *)data;
2186         error = 0;
2187
2188         switch (command) {
2189         case SIOCSIFFLAGS:
2190                 VR_LOCK(sc);
2191                 if (ifp->if_flags & IFF_UP) {
2192                         if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2193                                 if ((ifp->if_flags ^ sc->vr_if_flags) &
2194                                     (IFF_PROMISC | IFF_ALLMULTI))
2195                                         vr_set_filter(sc);
2196                         } else {
2197                                 if (sc->vr_detach == 0)
2198                                         vr_init_locked(sc);
2199                         }
2200                 } else {
2201                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2202                                 vr_stop(sc);
2203                 }
2204                 sc->vr_if_flags = ifp->if_flags;
2205                 VR_UNLOCK(sc);
2206                 break;
2207         case SIOCADDMULTI:
2208         case SIOCDELMULTI:
2209                 VR_LOCK(sc);
2210                 vr_set_filter(sc);
2211                 VR_UNLOCK(sc);
2212                 break;
2213         case SIOCGIFMEDIA:
2214         case SIOCSIFMEDIA:
2215                 mii = device_get_softc(sc->vr_miibus);
2216                 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
2217                 break;
2218         case SIOCSIFCAP:
2219                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
2220 #ifdef DEVICE_POLLING
2221                 if (mask & IFCAP_POLLING) {
2222                         if (ifr->ifr_reqcap & IFCAP_POLLING) {
2223                                 error = ether_poll_register(vr_poll, ifp);
2224                                 if (error != 0)
2225                                         break;
2226                                 VR_LOCK(sc);
2227                                 /* Disable interrupts. */
2228                                 CSR_WRITE_2(sc, VR_IMR, 0x0000);
2229                                 ifp->if_capenable |= IFCAP_POLLING;
2230                                 VR_UNLOCK(sc);
2231                         } else {
2232                                 error = ether_poll_deregister(ifp);
2233                                 /* Enable interrupts. */
2234                                 VR_LOCK(sc);
2235                                 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
2236                                 ifp->if_capenable &= ~IFCAP_POLLING;
2237                                 VR_UNLOCK(sc);
2238                         }
2239                 }
2240 #endif /* DEVICE_POLLING */
2241                 if ((mask & IFCAP_TXCSUM) != 0 &&
2242                     (IFCAP_TXCSUM & ifp->if_capabilities) != 0) {
2243                         ifp->if_capenable ^= IFCAP_TXCSUM;
2244                         if ((IFCAP_TXCSUM & ifp->if_capenable) != 0)
2245                                 ifp->if_hwassist |= VR_CSUM_FEATURES;
2246                         else
2247                                 ifp->if_hwassist &= ~VR_CSUM_FEATURES;
2248                 }
2249                 if ((mask & IFCAP_RXCSUM) != 0 &&
2250                     (IFCAP_RXCSUM & ifp->if_capabilities) != 0)
2251                         ifp->if_capenable ^= IFCAP_RXCSUM;
2252                 if ((mask & IFCAP_WOL_UCAST) != 0 &&
2253                     (ifp->if_capabilities & IFCAP_WOL_UCAST) != 0)
2254                         ifp->if_capenable ^= IFCAP_WOL_UCAST;
2255                 if ((mask & IFCAP_WOL_MAGIC) != 0 &&
2256                     (ifp->if_capabilities & IFCAP_WOL_MAGIC) != 0)
2257                         ifp->if_capenable ^= IFCAP_WOL_MAGIC;
2258                 break;
2259         default:
2260                 error = ether_ioctl(ifp, command, data);
2261                 break;
2262         }
2263
2264         return (error);
2265 }
2266
2267 static void
2268 vr_watchdog(struct vr_softc *sc)
2269 {
2270         struct ifnet            *ifp;
2271
2272         VR_LOCK_ASSERT(sc);
2273
2274         if (sc->vr_watchdog_timer == 0 || --sc->vr_watchdog_timer)
2275                 return;
2276
2277         ifp = sc->vr_ifp;
2278         /*
2279          * Reclaim first as we don't request interrupt for every packets.
2280          */
2281         vr_txeof(sc);
2282         if (sc->vr_cdata.vr_tx_cnt == 0)
2283                 return;
2284
2285         if (sc->vr_link == 0) {
2286                 if (bootverbose)
2287                         if_printf(sc->vr_ifp, "watchdog timeout "
2288                            "(missed link)\n");
2289                 ifp->if_oerrors++;
2290                 vr_init_locked(sc);
2291                 return;
2292         }
2293
2294         ifp->if_oerrors++;
2295         if_printf(ifp, "watchdog timeout\n");
2296
2297         vr_stop(sc);
2298         vr_reset(sc);
2299         vr_init_locked(sc);
2300
2301         if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
2302                 vr_start_locked(ifp);
2303 }
2304
2305 static void
2306 vr_tx_start(struct vr_softc *sc)
2307 {
2308         bus_addr_t      addr;
2309         uint8_t         cmd;
2310
2311         cmd = CSR_READ_1(sc, VR_CR0);
2312         if ((cmd & VR_CR0_TX_ON) == 0) {
2313                 addr = VR_TX_RING_ADDR(sc, sc->vr_cdata.vr_tx_cons);
2314                 CSR_WRITE_4(sc, VR_TXADDR, VR_ADDR_LO(addr));
2315                 cmd |= VR_CR0_TX_ON;
2316                 CSR_WRITE_1(sc, VR_CR0, cmd);
2317         }
2318         if (sc->vr_cdata.vr_tx_cnt != 0) {
2319                 sc->vr_watchdog_timer = 5;
2320                 VR_SETBIT(sc, VR_CR0, VR_CR0_TX_GO);
2321         }
2322 }
2323
2324 static void
2325 vr_rx_start(struct vr_softc *sc)
2326 {
2327         bus_addr_t      addr;
2328         uint8_t         cmd;
2329
2330         cmd = CSR_READ_1(sc, VR_CR0);
2331         if ((cmd & VR_CR0_RX_ON) == 0) {
2332                 addr = VR_RX_RING_ADDR(sc, sc->vr_cdata.vr_rx_cons);
2333                 CSR_WRITE_4(sc, VR_RXADDR, VR_ADDR_LO(addr));
2334                 cmd |= VR_CR0_RX_ON;
2335                 CSR_WRITE_1(sc, VR_CR0, cmd);
2336         }
2337         CSR_WRITE_1(sc, VR_CR0, cmd | VR_CR0_RX_GO);
2338 }
2339
2340 static int
2341 vr_tx_stop(struct vr_softc *sc)
2342 {
2343         int             i;
2344         uint8_t         cmd;
2345
2346         cmd = CSR_READ_1(sc, VR_CR0);
2347         if ((cmd & VR_CR0_TX_ON) != 0) {
2348                 cmd &= ~VR_CR0_TX_ON;
2349                 CSR_WRITE_1(sc, VR_CR0, cmd);
2350                 for (i = VR_TIMEOUT; i > 0; i--) {
2351                         DELAY(5);
2352                         cmd = CSR_READ_1(sc, VR_CR0);
2353                         if ((cmd & VR_CR0_TX_ON) == 0)
2354                                 break;
2355                 }
2356                 if (i == 0)
2357                         return (ETIMEDOUT);
2358         }
2359         return (0);
2360 }
2361
2362 static int
2363 vr_rx_stop(struct vr_softc *sc)
2364 {
2365         int             i;
2366         uint8_t         cmd;
2367
2368         cmd = CSR_READ_1(sc, VR_CR0);
2369         if ((cmd & VR_CR0_RX_ON) != 0) {
2370                 cmd &= ~VR_CR0_RX_ON;
2371                 CSR_WRITE_1(sc, VR_CR0, cmd);
2372                 for (i = VR_TIMEOUT; i > 0; i--) {
2373                         DELAY(5);
2374                         cmd = CSR_READ_1(sc, VR_CR0);
2375                         if ((cmd & VR_CR0_RX_ON) == 0)
2376                                 break;
2377                 }
2378                 if (i == 0)
2379                         return (ETIMEDOUT);
2380         }
2381         return (0);
2382 }
2383
2384 /*
2385  * Stop the adapter and free any mbufs allocated to the
2386  * RX and TX lists.
2387  */
2388 static void
2389 vr_stop(struct vr_softc *sc)
2390 {
2391         struct vr_txdesc        *txd;
2392         struct vr_rxdesc        *rxd;
2393         struct ifnet            *ifp;
2394         int                     i;
2395
2396         VR_LOCK_ASSERT(sc);
2397
2398         ifp = sc->vr_ifp;
2399         sc->vr_watchdog_timer = 0;
2400
2401         callout_stop(&sc->vr_stat_callout);
2402         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2403
2404         CSR_WRITE_1(sc, VR_CR0, VR_CR0_STOP);
2405         if (vr_rx_stop(sc) != 0)
2406                 device_printf(sc->vr_dev, "%s: Rx shutdown error\n", __func__);
2407         if (vr_tx_stop(sc) != 0)
2408                 device_printf(sc->vr_dev, "%s: Tx shutdown error\n", __func__);
2409         /* Clear pending interrupts. */
2410         CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
2411         CSR_WRITE_2(sc, VR_IMR, 0x0000);
2412         CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
2413         CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
2414
2415         /*
2416          * Free RX and TX mbufs still in the queues.
2417          */
2418         for (i = 0; i < VR_RX_RING_CNT; i++) {
2419                 rxd = &sc->vr_cdata.vr_rxdesc[i];
2420                 if (rxd->rx_m != NULL) {
2421                         bus_dmamap_sync(sc->vr_cdata.vr_rx_tag,
2422                             rxd->rx_dmamap, BUS_DMASYNC_POSTREAD);
2423                         bus_dmamap_unload(sc->vr_cdata.vr_rx_tag,
2424                             rxd->rx_dmamap);
2425                         m_freem(rxd->rx_m);
2426                         rxd->rx_m = NULL;
2427                 }
2428         }
2429         for (i = 0; i < VR_TX_RING_CNT; i++) {
2430                 txd = &sc->vr_cdata.vr_txdesc[i];
2431                 if (txd->tx_m != NULL) {
2432                         bus_dmamap_sync(sc->vr_cdata.vr_tx_tag,
2433                             txd->tx_dmamap, BUS_DMASYNC_POSTWRITE);
2434                         bus_dmamap_unload(sc->vr_cdata.vr_tx_tag,
2435                             txd->tx_dmamap);
2436                         m_freem(txd->tx_m);
2437                         txd->tx_m = NULL;
2438                 }
2439         }
2440 }
2441
2442 /*
2443  * Stop all chip I/O so that the kernel's probe routines don't
2444  * get confused by errant DMAs when rebooting.
2445  */
2446 static int
2447 vr_shutdown(device_t dev)
2448 {
2449
2450         return (vr_suspend(dev));
2451 }
2452
2453 static int
2454 vr_suspend(device_t dev)
2455 {
2456         struct vr_softc         *sc;
2457
2458         sc = device_get_softc(dev);
2459
2460         VR_LOCK(sc);
2461         vr_stop(sc);
2462         vr_setwol(sc);
2463         sc->vr_suspended = 1;
2464         VR_UNLOCK(sc);
2465
2466         return (0);
2467 }
2468
2469 static int
2470 vr_resume(device_t dev)
2471 {
2472         struct vr_softc         *sc;
2473         struct ifnet            *ifp;
2474
2475         sc = device_get_softc(dev);
2476
2477         VR_LOCK(sc);
2478         ifp = sc->vr_ifp;
2479         vr_clrwol(sc);
2480         vr_reset(sc);
2481         if (ifp->if_flags & IFF_UP)
2482                 vr_init_locked(sc);
2483
2484         sc->vr_suspended = 0;
2485         VR_UNLOCK(sc);
2486
2487         return (0);
2488 }
2489
2490 static void
2491 vr_setwol(struct vr_softc *sc)
2492 {
2493         struct ifnet            *ifp;
2494         int                     pmc;
2495         uint16_t                pmstat;
2496         uint8_t                 v;
2497
2498         VR_LOCK_ASSERT(sc);
2499
2500         if (sc->vr_revid < REV_ID_VT6102_A ||
2501             pci_find_extcap(sc->vr_dev, PCIY_PMG, &pmc) != 0)
2502                 return;
2503
2504         ifp = sc->vr_ifp;
2505
2506         /* Clear WOL configuration. */
2507         CSR_WRITE_1(sc, VR_WOLCR_CLR, 0xFF);
2508         CSR_WRITE_1(sc, VR_WOLCFG_CLR, VR_WOLCFG_SAB | VR_WOLCFG_SAM);
2509         CSR_WRITE_1(sc, VR_PWRCSR_CLR, 0xFF);
2510         CSR_WRITE_1(sc, VR_PWRCFG_CLR, VR_PWRCFG_WOLEN);
2511         if (sc->vr_revid > REV_ID_VT6105_B0) {
2512                 /* Newer Rhine III supports two additional patterns. */
2513                 CSR_WRITE_1(sc, VR_WOLCFG_CLR, VR_WOLCFG_PATTERN_PAGE);
2514                 CSR_WRITE_1(sc, VR_TESTREG_CLR, 3);
2515                 CSR_WRITE_1(sc, VR_PWRCSR1_CLR, 3);
2516         }
2517         if ((ifp->if_capenable & IFCAP_WOL_UCAST) != 0)
2518                 CSR_WRITE_1(sc, VR_WOLCR_SET, VR_WOLCR_UCAST);
2519         if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0)
2520                 CSR_WRITE_1(sc, VR_WOLCR_SET, VR_WOLCR_MAGIC);
2521         /*
2522          * It seems that multicast wakeup frames require programming pattern
2523          * registers and valid CRC as well as pattern mask for each pattern.
2524          * While it's possible to setup such a pattern it would complicate
2525          * WOL configuration so ignore multicast wakeup frames.
2526          */
2527         if ((ifp->if_capenable & IFCAP_WOL) != 0) {
2528                 CSR_WRITE_1(sc, VR_WOLCFG_SET, VR_WOLCFG_SAB | VR_WOLCFG_SAM);
2529                 v = CSR_READ_1(sc, VR_STICKHW);
2530                 CSR_WRITE_1(sc, VR_STICKHW, v | VR_STICKHW_WOL_ENB);
2531                 CSR_WRITE_1(sc, VR_PWRCFG_SET, VR_PWRCFG_WOLEN);
2532         }
2533
2534         /* Put hardware into sleep. */
2535         v = CSR_READ_1(sc, VR_STICKHW);
2536         v |= VR_STICKHW_DS0 | VR_STICKHW_DS1;
2537         CSR_WRITE_1(sc, VR_STICKHW, v);
2538
2539         /* Request PME if WOL is requested. */
2540         pmstat = pci_read_config(sc->vr_dev, pmc + PCIR_POWER_STATUS, 2);
2541         pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
2542         if ((ifp->if_capenable & IFCAP_WOL) != 0)
2543                 pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
2544         pci_write_config(sc->vr_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
2545 }
2546
2547 static void
2548 vr_clrwol(struct vr_softc *sc)
2549 {
2550         uint8_t                 v;
2551
2552         VR_LOCK_ASSERT(sc);
2553
2554         if (sc->vr_revid < REV_ID_VT6102_A)
2555                 return;
2556
2557         /* Take hardware out of sleep. */
2558         v = CSR_READ_1(sc, VR_STICKHW);
2559         v &= ~(VR_STICKHW_DS0 | VR_STICKHW_DS1 | VR_STICKHW_WOL_ENB);
2560         CSR_WRITE_1(sc, VR_STICKHW, v);
2561
2562         /* Clear WOL configuration as WOL may interfere normal operation. */
2563         CSR_WRITE_1(sc, VR_WOLCR_CLR, 0xFF);
2564         CSR_WRITE_1(sc, VR_WOLCFG_CLR,
2565             VR_WOLCFG_SAB | VR_WOLCFG_SAM | VR_WOLCFG_PMEOVR);
2566         CSR_WRITE_1(sc, VR_PWRCSR_CLR, 0xFF);
2567         CSR_WRITE_1(sc, VR_PWRCFG_CLR, VR_PWRCFG_WOLEN);
2568         if (sc->vr_revid > REV_ID_VT6105_B0) {
2569                 /* Newer Rhine III supports two additional patterns. */
2570                 CSR_WRITE_1(sc, VR_WOLCFG_CLR, VR_WOLCFG_PATTERN_PAGE);
2571                 CSR_WRITE_1(sc, VR_TESTREG_CLR, 3);
2572                 CSR_WRITE_1(sc, VR_PWRCSR1_CLR, 3);
2573         }
2574 }
2575
2576 static int
2577 vr_sysctl_stats(SYSCTL_HANDLER_ARGS)
2578 {
2579         struct vr_softc         *sc;
2580         struct vr_statistics    *stat;
2581         int                     error;
2582         int                     result;
2583
2584         result = -1;
2585         error = sysctl_handle_int(oidp, &result, 0, req);
2586
2587         if (error != 0 || req->newptr == NULL)
2588                 return (error);
2589
2590         if (result == 1) {
2591                 sc = (struct vr_softc *)arg1;
2592                 stat = &sc->vr_stat;
2593
2594                 printf("%s statistics:\n", device_get_nameunit(sc->vr_dev));
2595                 printf("Outbound good frames : %ju\n",
2596                     (uintmax_t)stat->tx_ok);
2597                 printf("Inbound good frames : %ju\n",
2598                     (uintmax_t)stat->rx_ok);
2599                 printf("Outbound errors : %u\n", stat->tx_errors);
2600                 printf("Inbound errors : %u\n", stat->rx_errors);
2601                 printf("Inbound no buffers : %u\n", stat->rx_no_buffers);
2602                 printf("Inbound no mbuf clusters: %d\n", stat->rx_no_mbufs);
2603                 printf("Inbound FIFO overflows : %d\n",
2604                     stat->rx_fifo_overflows);
2605                 printf("Inbound CRC errors : %u\n", stat->rx_crc_errors);
2606                 printf("Inbound frame alignment errors : %u\n",
2607                     stat->rx_alignment);
2608                 printf("Inbound giant frames : %u\n", stat->rx_giants);
2609                 printf("Inbound runt frames : %u\n", stat->rx_runts);
2610                 printf("Outbound aborted with excessive collisions : %u\n",
2611                     stat->tx_abort);
2612                 printf("Outbound collisions : %u\n", stat->tx_collisions);
2613                 printf("Outbound late collisions : %u\n",
2614                     stat->tx_late_collisions);
2615                 printf("Outbound underrun : %u\n", stat->tx_underrun);
2616                 printf("PCI bus errors : %u\n", stat->bus_errors);
2617                 printf("driver restarted due to Rx/Tx shutdown failure : %u\n",
2618                     stat->num_restart);
2619         }
2620
2621         return (error);
2622 }