2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
38 #include <vm/vm_param.h>
41 #include <machine/apicreg.h>
42 #include <machine/frame.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/apicvar.h>
45 #include <machine/md_var.h>
46 #include <machine/mptable.h>
47 #include <machine/specialreg.h>
49 #include <dev/pci/pcivar.h>
51 /* string defined by the Intel MP Spec as identifying the MP table */
52 #define MP_SIG 0x5f504d5f /* _MP_ */
54 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
57 #define BIOS_BASE (0xe8000)
58 #define BIOS_SIZE (0x18000)
60 #define BIOS_BASE (0xf0000)
61 #define BIOS_SIZE (0x10000)
63 #define BIOS_COUNT (BIOS_SIZE/4)
65 typedef void mptable_entry_handler(u_char *entry, void *arg);
67 static basetable_entry basetable_entry_types[] =
76 typedef struct BUSDATA {
78 enum busTypes bus_type;
81 typedef struct INTDATA {
91 typedef struct BUSTYPENAME {
96 /* From MP spec v1.4, table 4-8. */
97 static bus_type_name bus_type_table[] =
99 {UNKNOWN_BUSTYPE, "CBUS "},
100 {UNKNOWN_BUSTYPE, "CBUSII"},
102 {UNKNOWN_BUSTYPE, "FUTURE"},
103 {UNKNOWN_BUSTYPE, "INTERN"},
105 {UNKNOWN_BUSTYPE, "MBI "},
106 {UNKNOWN_BUSTYPE, "MBII "},
108 {UNKNOWN_BUSTYPE, "MPI "},
109 {UNKNOWN_BUSTYPE, "MPSA "},
110 {UNKNOWN_BUSTYPE, "NUBUS "},
112 {UNKNOWN_BUSTYPE, "PCMCIA"},
113 {UNKNOWN_BUSTYPE, "TC "},
114 {UNKNOWN_BUSTYPE, "VL "},
115 {UNKNOWN_BUSTYPE, "VME "},
116 {UNKNOWN_BUSTYPE, "XPRESS"}
119 /* From MP spec v1.4, table 5-1. */
120 static int default_data[7][5] =
122 /* nbus, id0, type0, id1, type1 */
123 {1, 0, ISA, 255, NOBUS},
124 {1, 0, EISA, 255, NOBUS},
125 {1, 0, EISA, 255, NOBUS},
126 {1, 0, MCA, 255, NOBUS},
128 {2, 0, EISA, 1, PCI},
132 struct pci_probe_table_args {
137 struct pci_route_interrupt_args {
138 u_char bus; /* Source bus. */
139 u_char irq; /* Source slot:pin. */
140 int vector; /* Return value. */
143 static mpfps_t mpfps;
145 static void *ioapics[MAX_APIC_ID + 1];
146 static bus_datum *busses;
147 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
148 static int pci0 = -1;
150 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
152 static enum intr_polarity conforming_polarity(u_char src_bus,
154 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
155 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
156 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
157 static int lookup_bus_type(char *name);
158 static void mptable_count_items(void);
159 static void mptable_count_items_handler(u_char *entry, void *arg);
160 #ifdef MPTABLE_FORCE_HTT
161 static void mptable_hyperthread_fixup(u_int id_mask);
163 static void mptable_parse_apics_and_busses(void);
164 static void mptable_parse_apics_and_busses_handler(u_char *entry,
166 static void mptable_parse_default_config_ints(void);
167 static void mptable_parse_ints(void);
168 static void mptable_parse_ints_handler(u_char *entry, void *arg);
169 static void mptable_parse_io_int(int_entry_ptr intr);
170 static void mptable_parse_local_int(int_entry_ptr intr);
171 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
172 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
173 static void mptable_pci_setup(void);
174 static int mptable_probe(void);
175 static int mptable_probe_cpus(void);
176 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
177 static void mptable_register(void *dummy);
178 static int mptable_setup_local(void);
179 static int mptable_setup_io(void);
180 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
181 static int search_for_sig(u_int32_t target, int count);
183 static struct apic_enumerator mptable_enumerator = {
192 * look for the MP spec signature
196 search_for_sig(u_int32_t target, int count)
199 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
201 for (x = 0; x < count; x += 4)
202 if (addr[x] == MP_SIG)
203 /* make array index a byte index */
204 return (target + (x * sizeof(u_int32_t)));
209 lookup_bus_type(char *name)
213 for (x = 0; x < MAX_BUSTYPE; ++x)
214 if (strncmp(bus_type_table[x].name, name, 6) == 0)
215 return (bus_type_table[x].type);
217 return (UNKNOWN_BUSTYPE);
221 * Look for an Intel MP spec table (ie, SMP capable hardware).
230 /* see if EBDA exists */
231 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
232 /* search first 1K of EBDA */
233 target = (u_int32_t) (segment << 4);
234 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
237 /* last 1K of base memory, effective 'top of base' passed in */
238 target = (u_int32_t) ((basemem * 1024) - 0x400);
239 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
243 /* search the BIOS */
244 target = (u_int32_t) BIOS_BASE;
245 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
252 mpfps = (mpfps_t)(KERNBASE + x);
254 /* Map in the configuration table if it exists. */
255 if (mpfps->config_type != 0) {
258 "MP Table version 1.%d found using Default Configuration %d\n",
259 mpfps->spec_rev, mpfps->config_type);
260 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
262 "MP Table Default Configuration %d is unsupported\n",
268 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
269 printf("%s: Unable to map MP Configuration Table\n",
273 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
274 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
276 printf("%s: Unable to map end of MP Config Table\n",
280 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
281 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
282 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
283 __func__, mpct->signature[0], mpct->signature[1],
284 mpct->signature[2], mpct->signature[3]);
289 "MP Configuration Table version 1.%d found at %p\n",
290 mpct->spec_rev, mpct);
297 * Run through the MP table enumerating CPUs.
300 mptable_probe_cpus(void)
304 /* Is this a pre-defined config? */
305 if (mpfps->config_type != 0) {
310 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
311 #ifdef MPTABLE_FORCE_HTT
312 mptable_hyperthread_fixup(cpu_mask);
319 * Initialize the local APIC on the BSP.
322 mptable_setup_local(void)
326 /* Is this a pre-defined config? */
327 printf("MPTable: <");
328 if (mpfps->config_type != 0) {
329 addr = DEFAULT_APIC_BASE;
330 printf("Default Configuration %d", mpfps->config_type);
332 addr = mpct->apic_address;
333 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
334 (int)sizeof(mpct->product_id), mpct->product_id);
342 * Run through the MP table enumerating I/O APICs.
345 mptable_setup_io(void)
350 /* First, we count individual items and allocate arrays. */
351 mptable_count_items();
352 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
354 for (i = 0; i <= mptable_maxbusid; i++)
355 busses[i].bus_type = NOBUS;
357 /* Second, we run through adding I/O APIC's and busses. */
358 mptable_parse_apics_and_busses();
360 /* Third, we run through the table tweaking interrupt sources. */
361 mptable_parse_ints();
363 /* Fourth, we register all the I/O APIC's. */
364 for (i = 0; i <= MAX_APIC_ID; i++)
365 if (ioapics[i] != NULL)
366 ioapic_register(ioapics[i]);
368 /* Fifth, we setup data structures to handle PCI interrupt routing. */
371 /* Finally, we throw the switch to enable the I/O APIC's. */
372 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
373 outb(0x22, 0x70); /* select IMCR */
374 byte = inb(0x23); /* current contents */
375 byte |= 0x01; /* mask external INTR */
376 outb(0x23, byte); /* disconnect 8259s/NMI */
383 mptable_register(void *dummy __unused)
386 apic_register_enumerator(&mptable_enumerator);
388 SYSINIT(mptable_register, SI_SUB_CPU - 1, SI_ORDER_FIRST, mptable_register,
392 * Call the handler routine for each entry in the MP config table.
395 mptable_walk_table(mptable_entry_handler *handler, void *arg)
400 entry = (u_char *)(mpct + 1);
401 for (i = 0; i < mpct->entry_count; i++) {
403 case MPCT_ENTRY_PROCESSOR:
404 case MPCT_ENTRY_IOAPIC:
407 case MPCT_ENTRY_LOCAL_INT:
410 panic("%s: Unknown MP Config Entry %d\n", __func__,
414 entry += basetable_entry_types[*entry].length;
419 mptable_probe_cpus_handler(u_char *entry, void *arg)
425 case MPCT_ENTRY_PROCESSOR:
426 proc = (proc_entry_ptr)entry;
427 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
428 lapic_create(proc->apic_id, proc->cpu_flags &
430 if (proc->apic_id < MAX_LAPIC_ID) {
431 cpu_mask = (u_int *)arg;
432 *cpu_mask |= (1ul << proc->apic_id);
440 mptable_count_items_handler(u_char *entry, void *arg __unused)
442 io_apic_entry_ptr apic;
447 bus = (bus_entry_ptr)entry;
449 if (bus->bus_id > mptable_maxbusid)
450 mptable_maxbusid = bus->bus_id;
452 case MPCT_ENTRY_IOAPIC:
453 apic = (io_apic_entry_ptr)entry;
454 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
461 * Count items in the table.
464 mptable_count_items(void)
467 /* Is this a pre-defined config? */
468 if (mpfps->config_type != 0) {
469 mptable_nioapics = 1;
470 switch (mpfps->config_type) {
483 panic("Unknown pre-defined MP Table config type %d",
486 mptable_maxbusid = mptable_nbusses - 1;
488 mptable_walk_table(mptable_count_items_handler, NULL);
492 * Add a bus or I/O APIC from an entry in the table.
495 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
497 io_apic_entry_ptr apic;
499 enum busTypes bus_type;
505 bus = (bus_entry_ptr)entry;
506 bus_type = lookup_bus_type(bus->bus_type);
507 if (bus_type == UNKNOWN_BUSTYPE) {
508 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
509 for (i = 0; i < 6; i++)
510 printf("%c", bus->bus_type[i]);
513 busses[bus->bus_id].bus_id = bus->bus_id;
514 busses[bus->bus_id].bus_type = bus_type;
516 case MPCT_ENTRY_IOAPIC:
517 apic = (io_apic_entry_ptr)entry;
518 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
520 if (apic->apic_id > MAX_APIC_ID)
521 panic("%s: I/O APIC ID %d too high", __func__,
523 if (ioapics[apic->apic_id] != NULL)
524 panic("%s: Double APIC ID %d", __func__,
526 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
535 * Enumerate I/O APIC's and busses.
538 mptable_parse_apics_and_busses(void)
541 /* Is this a pre-defined config? */
542 if (mpfps->config_type != 0) {
543 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
544 busses[0].bus_id = 0;
545 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
546 if (mptable_nbusses > 1) {
547 busses[1].bus_id = 1;
549 default_data[mpfps->config_type - 1][4];
552 mptable_walk_table(mptable_parse_apics_and_busses_handler,
557 * Determine conforming polarity for a given bus type.
559 static enum intr_polarity
560 conforming_polarity(u_char src_bus, u_char src_bus_irq)
563 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
564 switch (busses[src_bus].bus_type) {
567 return (INTR_POLARITY_HIGH);
569 return (INTR_POLARITY_LOW);
571 panic("%s: unknown bus type %d", __func__,
572 busses[src_bus].bus_type);
577 * Determine conforming trigger for a given bus type.
579 static enum intr_trigger
580 conforming_trigger(u_char src_bus, u_char src_bus_irq)
583 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
584 switch (busses[src_bus].bus_type) {
588 return (elcr_read_trigger(src_bus_irq));
591 return (INTR_TRIGGER_EDGE);
593 return (INTR_TRIGGER_LEVEL);
596 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
597 KASSERT(elcr_found, ("Missing ELCR"));
598 return (elcr_read_trigger(src_bus_irq));
601 panic("%s: unknown bus type %d", __func__,
602 busses[src_bus].bus_type);
606 static enum intr_polarity
607 intentry_polarity(int_entry_ptr intr)
610 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
611 case INTENTRY_FLAGS_POLARITY_CONFORM:
612 return (conforming_polarity(intr->src_bus_id,
614 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
615 return (INTR_POLARITY_HIGH);
616 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
617 return (INTR_POLARITY_LOW);
619 panic("Bogus interrupt flags");
623 static enum intr_trigger
624 intentry_trigger(int_entry_ptr intr)
627 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
628 case INTENTRY_FLAGS_TRIGGER_CONFORM:
629 return (conforming_trigger(intr->src_bus_id,
631 case INTENTRY_FLAGS_TRIGGER_EDGE:
632 return (INTR_TRIGGER_EDGE);
633 case INTENTRY_FLAGS_TRIGGER_LEVEL:
634 return (INTR_TRIGGER_LEVEL);
636 panic("Bogus interrupt flags");
641 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
644 mptable_parse_io_int(int_entry_ptr intr)
649 apic_id = intr->dst_apic_id;
650 if (intr->dst_apic_id == 0xff) {
652 * An APIC ID of 0xff means that the interrupt is connected
653 * to the specified pin on all I/O APICs in the system. If
654 * there is only one I/O APIC, then use that APIC to route
655 * the interrupts. If there is more than one I/O APIC, then
658 if (mptable_nioapics == 1) {
660 while (ioapics[apic_id] == NULL)
664 "MPTable: Ignoring global interrupt entry for pin %d\n",
669 if (apic_id > MAX_APIC_ID) {
670 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
674 ioapic = ioapics[apic_id];
675 if (ioapic == NULL) {
677 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
681 pin = intr->dst_apic_int;
682 switch (intr->int_type) {
683 case INTENTRY_TYPE_INT:
684 switch (busses[intr->src_bus_id].bus_type) {
686 panic("interrupt from missing bus");
689 if (busses[intr->src_bus_id].bus_type == ISA)
690 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
692 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
693 if (intr->src_bus_irq == pin)
695 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
696 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
698 ioapic_disable_pin(ioapic, intr->src_bus_irq);
701 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
704 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
708 case INTENTRY_TYPE_NMI:
709 ioapic_set_nmi(ioapic, pin);
711 case INTENTRY_TYPE_SMI:
712 ioapic_set_smi(ioapic, pin);
714 case INTENTRY_TYPE_EXTINT:
715 ioapic_set_extint(ioapic, pin);
718 panic("%s: invalid interrupt entry type %d\n", __func__,
721 if (intr->int_type == INTENTRY_TYPE_INT ||
722 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
723 INTENTRY_FLAGS_TRIGGER_CONFORM)
724 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
725 if (intr->int_type == INTENTRY_TYPE_INT ||
726 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
727 INTENTRY_FLAGS_POLARITY_CONFORM)
728 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
732 * Parse an interrupt entry for a local APIC LVT pin.
735 mptable_parse_local_int(int_entry_ptr intr)
739 if (intr->dst_apic_id == 0xff)
740 apic_id = APIC_ID_ALL;
742 apic_id = intr->dst_apic_id;
743 if (intr->dst_apic_int == 0)
747 switch (intr->int_type) {
748 case INTENTRY_TYPE_INT:
751 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
752 intr->dst_apic_int, intr->src_bus_irq);
755 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
758 case INTENTRY_TYPE_NMI:
759 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
761 case INTENTRY_TYPE_SMI:
762 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
764 case INTENTRY_TYPE_EXTINT:
765 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
768 panic("%s: invalid interrupt entry type %d\n", __func__,
771 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
772 INTENTRY_FLAGS_TRIGGER_CONFORM)
773 lapic_set_lvt_triggermode(apic_id, pin,
774 intentry_trigger(intr));
775 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
776 INTENTRY_FLAGS_POLARITY_CONFORM)
777 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
781 * Parse interrupt entries.
784 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
788 intr = (int_entry_ptr)entry;
791 mptable_parse_io_int(intr);
793 case MPCT_ENTRY_LOCAL_INT:
794 mptable_parse_local_int(intr);
800 * Configure interrupt pins for a default configuration. For details see
801 * Table 5-2 in Section 5 of the MP Table specification.
804 mptable_parse_default_config_ints(void)
806 struct INTENTRY entry;
810 * All default configs route IRQs from bus 0 to the first 16 pins
811 * of the first I/O APIC with an APIC ID of 2.
813 entry.type = MPCT_ENTRY_INT;
814 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
815 INTENTRY_FLAGS_TRIGGER_CONFORM;
816 entry.src_bus_id = 0;
817 entry.dst_apic_id = 2;
819 /* Run through all 16 pins. */
820 for (pin = 0; pin < 16; pin++) {
821 entry.dst_apic_int = pin;
824 /* Pin 0 is an ExtINT pin. */
825 entry.int_type = INTENTRY_TYPE_EXTINT;
828 /* IRQ 0 is routed to pin 2. */
829 entry.int_type = INTENTRY_TYPE_INT;
830 entry.src_bus_irq = 0;
833 /* All other pins are identity mapped. */
834 entry.int_type = INTENTRY_TYPE_INT;
835 entry.src_bus_irq = pin;
838 mptable_parse_io_int(&entry);
841 /* Certain configs disable certain pins. */
842 if (mpfps->config_type == 7)
843 ioapic_disable_pin(ioapics[2], 0);
844 if (mpfps->config_type == 2) {
845 ioapic_disable_pin(ioapics[2], 2);
846 ioapic_disable_pin(ioapics[2], 13);
851 * Configure the interrupt pins
854 mptable_parse_ints(void)
857 /* Is this a pre-defined config? */
858 if (mpfps->config_type != 0) {
859 /* Configure LINT pins. */
860 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
861 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
863 /* Configure I/O APIC pins. */
864 mptable_parse_default_config_ints();
866 mptable_walk_table(mptable_parse_ints_handler, NULL);
869 #ifdef MPTABLE_FORCE_HTT
871 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
872 * that aren't already listed in the table.
874 * XXX: We assume that all of the physical CPUs in the
875 * system have the same number of logical CPUs.
877 * XXX: We assume that APIC ID's are allocated such that
878 * the APIC ID's for a physical processor are aligned
879 * with the number of logical CPU's in the processor.
882 mptable_hyperthread_fixup(u_int id_mask)
884 u_int i, id, logical_cpus;
886 /* Nothing to do if there is no HTT support. */
887 if ((cpu_feature & CPUID_HTT) == 0)
889 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
890 if (logical_cpus <= 1)
894 * For each APIC ID of a CPU that is set in the mask,
895 * scan the other candidate APIC ID's for this
896 * physical processor. If any of those ID's are
897 * already in the table, then kill the fixup.
899 for (id = 0; id <= MAX_LAPIC_ID; id++) {
900 if ((id_mask & 1 << id) == 0)
902 /* First, make sure we are on a logical_cpus boundary. */
903 if (id % logical_cpus != 0)
905 for (i = id + 1; i < id + logical_cpus; i++)
906 if ((id_mask & 1 << i) != 0)
911 * Ok, the ID's checked out, so perform the fixup by
912 * adding the logical CPUs.
914 while ((id = ffs(id_mask)) != 0) {
916 for (i = id + 1; i < id + logical_cpus; i++) {
919 "MPTable: Adding logical CPU %d from main CPU %d\n",
923 id_mask &= ~(1 << id);
926 #endif /* MPTABLE_FORCE_HTT */
929 * Support code for routing PCI interrupts using the MP Table.
932 mptable_pci_setup(void)
937 * Find the first pci bus and call it 0. Panic if pci0 is not
938 * bus zero and there are multiple PCI busses.
940 for (i = 0; i <= mptable_maxbusid; i++)
941 if (busses[i].bus_type == PCI) {
946 "MPTable contains multiple PCI busses but no PCI bus 0");
951 mptable_pci_probe_table_handler(u_char *entry, void *arg)
953 struct pci_probe_table_args *args;
956 if (*entry != MPCT_ENTRY_INT)
958 intr = (int_entry_ptr)entry;
959 args = (struct pci_probe_table_args *)arg;
960 KASSERT(args->bus <= mptable_maxbusid,
961 ("bus %d is too big", args->bus));
962 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
963 if (intr->src_bus_id == args->bus)
968 mptable_pci_probe_table(int bus)
970 struct pci_probe_table_args args;
974 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
976 if (busses[pci0 + bus].bus_type != PCI)
978 args.bus = pci0 + bus;
980 mptable_walk_table(mptable_pci_probe_table_handler, &args);
987 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
989 struct pci_route_interrupt_args *args;
993 if (*entry != MPCT_ENTRY_INT)
995 intr = (int_entry_ptr)entry;
996 args = (struct pci_route_interrupt_args *)arg;
997 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1000 /* Make sure the APIC maps to a known APIC. */
1001 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1002 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1005 * Look up the vector for this APIC / pin combination. If we
1006 * have previously matched an entry for this PCI IRQ but it
1007 * has the same vector as this entry, just return. Otherwise,
1008 * we use the vector for this APIC / pin combination.
1010 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1011 intr->dst_apic_int);
1012 if (args->vector == vector)
1014 KASSERT(args->vector == -1,
1015 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1016 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1018 args->vector = vector;
1022 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1024 struct pci_route_interrupt_args args;
1027 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1029 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1030 args.bus = pci_get_bus(dev) + pci0;
1031 slot = pci_get_slot(dev);
1034 * PCI interrupt entries in the MP Table encode both the slot and
1035 * pin into the IRQ with the pin being the two least significant
1036 * bits, the slot being the next five bits, and the most significant
1037 * bit being reserved.
1039 args.irq = slot << 2 | pin;
1041 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1042 if (args.vector < 0) {
1043 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1045 return (PCI_INVALID_IRQ);
1048 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1049 'A' + pin, args.vector);
1050 return (args.vector);