2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
110 #include "opt_xbox.h"
112 #include <sys/param.h>
113 #include <sys/systm.h>
114 #include <sys/kernel.h>
116 #include <sys/lock.h>
117 #include <sys/malloc.h>
118 #include <sys/mman.h>
119 #include <sys/msgbuf.h>
120 #include <sys/mutex.h>
121 #include <sys/proc.h>
122 #include <sys/sf_buf.h>
124 #include <sys/vmmeter.h>
125 #include <sys/sched.h>
126 #include <sys/sysctl.h>
132 #include <vm/vm_param.h>
133 #include <vm/vm_kern.h>
134 #include <vm/vm_page.h>
135 #include <vm/vm_map.h>
136 #include <vm/vm_object.h>
137 #include <vm/vm_extern.h>
138 #include <vm/vm_pageout.h>
139 #include <vm/vm_pager.h>
140 #include <vm/vm_reserv.h>
143 #include <machine/cpu.h>
144 #include <machine/cputypes.h>
145 #include <machine/md_var.h>
146 #include <machine/pcb.h>
147 #include <machine/specialreg.h>
149 #include <machine/smp.h>
153 #include <machine/xbox.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
164 #if !defined(DIAGNOSTIC)
165 #define PMAP_INLINE __gnu89_inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pa_index(pa) ((pa) >> PDRSHIFT)
178 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
181 * Get PDEs and PTEs for user/kernel address space
183 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
184 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
186 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
187 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
188 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
189 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
190 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
192 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
193 atomic_clear_int((u_int *)(pte), PG_W))
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 struct pmap kernel_pmap_store;
197 LIST_HEAD(pmaplist, pmap);
198 static struct pmaplist allpmaps;
199 static struct mtx allpmaps_lock;
201 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
202 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
203 int pgeflag = 0; /* PG_G or-in */
204 int pseflag = 0; /* PG_PS or-in */
207 vm_offset_t kernel_vm_end;
208 extern u_int32_t KERNend;
209 extern u_int32_t KPTphys;
213 static uma_zone_t pdptzone;
216 static int pat_works; /* Is page attribute table sane? */
218 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
220 static int pg_ps_enabled;
221 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0,
222 "Are large page mappings enabled?");
225 * Data for the pv entry allocation mechanism
227 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
228 static struct md_page *pv_table;
229 static int shpgperproc = PMAP_SHPGPERPROC;
231 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
232 int pv_maxchunks; /* How many chunks we have KVA for */
233 vm_offset_t pv_vafree; /* freelist stored in the PTE */
236 * All those kernel PT submaps that BSD is so fond of
245 static struct sysmaps sysmaps_pcpu[MAXCPU];
246 pt_entry_t *CMAP1 = 0, *KPTmap;
247 static pt_entry_t *CMAP3;
248 static pd_entry_t *KPTD;
249 caddr_t CADDR1 = 0, ptvmmap = 0;
250 static caddr_t CADDR3;
251 struct msgbuf *msgbufp = 0;
256 static caddr_t crashdumpmap;
258 static pt_entry_t *PMAP1 = 0, *PMAP2;
259 static pt_entry_t *PADDR1 = 0, *PADDR2;
262 static int PMAP1changedcpu;
263 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
265 "Number of times pmap_pte_quick changed CPU with same PMAP1");
267 static int PMAP1changed;
268 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
270 "Number of times pmap_pte_quick changed PMAP1");
271 static int PMAP1unchanged;
272 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
274 "Number of times pmap_pte_quick didn't change PMAP1");
275 static struct mtx PMAP2mutex;
277 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
278 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
279 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
280 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
281 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
282 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
283 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
285 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
287 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
288 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
290 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
291 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
292 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
293 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
294 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
295 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
296 static void pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde);
297 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
298 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
299 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
300 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
302 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
303 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
305 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
307 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
308 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
310 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
312 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
313 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
315 static void pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
317 static void pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde);
319 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
321 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
322 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
323 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
324 static void pmap_pte_release(pt_entry_t *pte);
325 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
326 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
328 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
331 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
332 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
335 * If you get an error here, then you set KVA_PAGES wrong! See the
336 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
337 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
339 CTASSERT(KERNBASE % (1 << 24) == 0);
342 * Move the kernel virtual free pointer to the next
343 * 4MB. This is used to help improve performance
344 * by using a large (4MB) page for much of the kernel
345 * (.text, .data, .bss)
348 pmap_kmem_choose(vm_offset_t addr)
350 vm_offset_t newaddr = addr;
353 if (cpu_feature & CPUID_PSE)
354 newaddr = (addr + PDRMASK) & ~PDRMASK;
360 * Bootstrap the system enough to run with virtual memory.
362 * On the i386 this is called after mapping has already been enabled
363 * and just syncs the pmap module with what has already been done.
364 * [We can't call it easily with mapping off since the kernel is not
365 * mapped with PA == VA, hence we would have to relocate every address
366 * from the linked base (virtual) address "KERNBASE" to the actual
367 * (physical) address starting relative to 0]
370 pmap_bootstrap(vm_paddr_t firstaddr)
373 pt_entry_t *pte, *unused;
374 struct sysmaps *sysmaps;
378 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
379 * large. It should instead be correctly calculated in locore.s and
380 * not based on 'first' (which is a physical address, not a virtual
381 * address, for the start of unused physical memory). The kernel
382 * page tables are NOT double mapped and thus should not be included
383 * in this calculation.
385 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
386 virtual_avail = pmap_kmem_choose(virtual_avail);
388 virtual_end = VM_MAX_KERNEL_ADDRESS;
391 * Initialize the kernel pmap (which is statically allocated).
393 PMAP_LOCK_INIT(kernel_pmap);
394 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
396 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
398 kernel_pmap->pm_root = NULL;
399 kernel_pmap->pm_active = -1; /* don't allow deactivation */
400 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
401 LIST_INIT(&allpmaps);
404 * Request a spin mutex so that changes to allpmaps cannot be
405 * preempted by smp_rendezvous_cpus(). Otherwise,
406 * pmap_update_pde_kernel() could access allpmaps while it is
409 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
410 mtx_lock_spin(&allpmaps_lock);
411 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
412 mtx_unlock_spin(&allpmaps_lock);
416 * Reserve some special page table entries/VA space for temporary
419 #define SYSMAP(c, p, v, n) \
420 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
426 * CMAP1/CMAP2 are used for zeroing and copying pages.
427 * CMAP3 is used for the idle process page zeroing.
429 for (i = 0; i < MAXCPU; i++) {
430 sysmaps = &sysmaps_pcpu[i];
431 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
432 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
433 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
435 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
436 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
441 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
444 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
446 SYSMAP(caddr_t, unused, ptvmmap, 1)
449 * msgbufp is used to map the system message buffer.
451 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
454 * KPTmap is used by pmap_kextract().
456 SYSMAP(pt_entry_t *, KPTD, KPTmap, KVA_PAGES)
458 for (i = 0; i < NKPT; i++)
459 KPTD[i] = (KPTphys + (i << PAGE_SHIFT)) | pgeflag | PG_RW | PG_V;
462 * Adjust the start of the KPTD and KPTmap so that the implementation
463 * of pmap_kextract() and pmap_growkernel() can be made simpler.
466 KPTmap -= i386_btop(KPTDI << PDRSHIFT);
469 * ptemap is used for pmap_pte_quick
471 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1)
472 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1)
474 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
479 * Leave in place an identity mapping (virt == phys) for the low 1 MB
480 * physical memory region that is used by the ACPI wakeup code. This
481 * mapping must not have PG_G set.
484 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
485 * an early stadium, we cannot yet neatly map video memory ... :-(
486 * Better fixes are very welcome! */
487 if (!arch_i386_is_xbox)
489 for (i = 1; i < NKPT; i++)
492 /* Initialize the PAT MSR if present. */
495 /* Turn on PG_G on kernel page(s) */
507 /* Bail if this CPU doesn't implement PAT. */
508 if (!(cpu_feature & CPUID_PAT))
511 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
512 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) {
514 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
515 * Program 4 and 5 as WP and WC.
516 * Leave 6 and 7 as UC and UC-.
518 pat_msr = rdmsr(MSR_PAT);
519 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
520 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
521 PAT_VALUE(5, PAT_WRITE_COMBINING);
525 * Due to some Intel errata, we can only safely use the lower 4
526 * PAT entries. Thus, just replace PAT Index 2 with WC instead
529 * Intel Pentium III Processor Specification Update
530 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
533 * Intel Pentium IV Processor Specification Update
534 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
536 pat_msr = rdmsr(MSR_PAT);
537 pat_msr &= ~PAT_MASK(2);
538 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
541 wrmsr(MSR_PAT, pat_msr);
545 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
551 vm_offset_t va, endva;
556 endva = KERNBASE + KERNend;
559 va = KERNBASE + KERNLOAD;
561 pdir_pde(PTD, va) |= pgeflag;
562 invltlb(); /* Play it safe, invltlb() every time */
566 va = (vm_offset_t)btext;
571 invltlb(); /* Play it safe, invltlb() every time */
578 * Initialize a vm_page's machine-dependent fields.
581 pmap_page_init(vm_page_t m)
584 TAILQ_INIT(&m->md.pv_list);
585 m->md.pat_mode = PAT_WRITE_BACK;
590 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
593 /* Inform UMA that this allocator uses kernel_map/object. */
594 *flags = UMA_SLAB_KERNEL;
595 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
596 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
601 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
603 * - Must deal with pages in order to ensure that none of the PG_* bits
604 * are ever set, PG_V in particular.
605 * - Assumes we can write to ptes without pte_store() atomic ops, even
606 * on PAE systems. This should be ok.
607 * - Assumes nothing will ever test these addresses for 0 to indicate
608 * no mapping instead of correctly checking PG_V.
609 * - Assumes a vm_offset_t will fit in a pte (true for i386).
610 * Because PG_V is never set, there can be no mappings to invalidate.
613 pmap_ptelist_alloc(vm_offset_t *head)
620 return (va); /* Out of memory */
624 panic("pmap_ptelist_alloc: va with PG_V set!");
630 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
635 panic("pmap_ptelist_free: freeing va with PG_V set!");
637 *pte = *head; /* virtual! PG_V is 0 though */
642 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
648 for (i = npages - 1; i >= 0; i--) {
649 va = (vm_offset_t)base + i * PAGE_SIZE;
650 pmap_ptelist_free(head, va);
656 * Initialize the pmap module.
657 * Called by vm_init, to initialize any structures that the pmap
658 * system needs to map virtual memory.
668 * Initialize the vm page array entries for the kernel pmap's
671 for (i = 0; i < NKPT; i++) {
672 mpte = PHYS_TO_VM_PAGE(KPTphys + (i << PAGE_SHIFT));
673 KASSERT(mpte >= vm_page_array &&
674 mpte < &vm_page_array[vm_page_array_size],
675 ("pmap_init: page table page is out of range"));
676 mpte->pindex = i + KPTDI;
677 mpte->phys_addr = KPTphys + (i << PAGE_SHIFT);
681 * Initialize the address space (zone) for the pv entries. Set a
682 * high water mark so that the system can recover from excessive
683 * numbers of pv entries.
685 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
686 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
687 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
688 pv_entry_max = roundup(pv_entry_max, _NPCPV);
689 pv_entry_high_water = 9 * (pv_entry_max / 10);
692 * If the kernel is running in a virtual machine on an AMD Family 10h
693 * processor, then it must assume that MCA is enabled by the virtual
696 if (vm_guest == VM_GUEST_VM && cpu_vendor_id == CPU_VENDOR_AMD &&
697 CPUID_TO_FAMILY(cpu_id) == 0x10)
698 workaround_erratum383 = 1;
701 * Are large page mappings supported and enabled?
703 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
706 else if (pg_ps_enabled) {
707 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
708 ("pmap_init: can't assign to pagesizes[1]"));
709 pagesizes[1] = NBPDR;
713 * Calculate the size of the pv head table for superpages.
715 for (i = 0; phys_avail[i + 1]; i += 2);
716 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
719 * Allocate memory for the pv head table for superpages.
721 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
723 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
724 for (i = 0; i < pv_npg; i++)
725 TAILQ_INIT(&pv_table[i].pv_list);
727 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
728 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
729 PAGE_SIZE * pv_maxchunks);
730 if (pv_chunkbase == NULL)
731 panic("pmap_init: not enough kvm for pv chunks");
732 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
734 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
735 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
736 UMA_ZONE_VM | UMA_ZONE_NOFREE);
737 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
742 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
743 "Max number of PV entries");
744 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
745 "Page share factor per proc");
747 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
748 "2/4MB page mapping counters");
750 static u_long pmap_pde_demotions;
751 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
752 &pmap_pde_demotions, 0, "2/4MB page demotions");
754 static u_long pmap_pde_mappings;
755 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
756 &pmap_pde_mappings, 0, "2/4MB page mappings");
758 static u_long pmap_pde_p_failures;
759 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
760 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
762 static u_long pmap_pde_promotions;
763 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
764 &pmap_pde_promotions, 0, "2/4MB page promotions");
766 /***************************************************
767 * Low level helper routines.....
768 ***************************************************/
771 * Determine the appropriate bits to set in a PTE or PDE for a specified
775 pmap_cache_bits(int mode, boolean_t is_pde)
777 int pat_flag, pat_index, cache_bits;
779 /* The PAT bit is different for PTE's and PDE's. */
780 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
782 /* If we don't support PAT, map extended modes to older ones. */
783 if (!(cpu_feature & CPUID_PAT)) {
785 case PAT_UNCACHEABLE:
786 case PAT_WRITE_THROUGH:
790 case PAT_WRITE_COMBINING:
791 case PAT_WRITE_PROTECTED:
792 mode = PAT_UNCACHEABLE;
797 /* Map the caching mode to a PAT index. */
800 case PAT_UNCACHEABLE:
803 case PAT_WRITE_THROUGH:
812 case PAT_WRITE_COMBINING:
815 case PAT_WRITE_PROTECTED:
819 panic("Unknown caching mode %d\n", mode);
824 case PAT_UNCACHEABLE:
825 case PAT_WRITE_PROTECTED:
828 case PAT_WRITE_THROUGH:
834 case PAT_WRITE_COMBINING:
838 panic("Unknown caching mode %d\n", mode);
842 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
845 cache_bits |= pat_flag;
847 cache_bits |= PG_NC_PCD;
849 cache_bits |= PG_NC_PWT;
854 * The caller is responsible for maintaining TLB consistency.
857 pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde)
861 boolean_t PTD_updated;
864 mtx_lock_spin(&allpmaps_lock);
865 LIST_FOREACH(pmap, &allpmaps, pm_list) {
866 if ((pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] &
869 pde = pmap_pde(pmap, va);
870 pde_store(pde, newpde);
872 mtx_unlock_spin(&allpmaps_lock);
874 ("pmap_kenter_pde: current page table is not in allpmaps"));
878 * After changing the page size for the specified virtual address in the page
879 * table, flush the corresponding entries from the processor's TLB. Only the
880 * calling processor's TLB is affected.
882 * The calling thread must be pinned to a processor.
885 pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde)
889 if ((newpde & PG_PS) == 0)
890 /* Demotion: flush a specific 2MB page mapping. */
892 else if ((newpde & PG_G) == 0)
894 * Promotion: flush every 4KB page mapping from the TLB
895 * because there are too many to flush individually.
900 * Promotion: flush every 4KB page mapping from the TLB,
901 * including any global (PG_G) mappings.
904 load_cr4(cr4 & ~CR4_PGE);
906 * Although preemption at this point could be detrimental to
907 * performance, it would not lead to an error. PG_G is simply
908 * ignored if CR4.PGE is clear. Moreover, in case this block
909 * is re-entered, the load_cr4() either above or below will
910 * modify CR4.PGE flushing the TLB.
912 load_cr4(cr4 | CR4_PGE);
917 * For SMP, these functions have to use the IPI mechanism for coherence.
919 * N.B.: Before calling any of the following TLB invalidation functions,
920 * the calling processor must ensure that all stores updating a non-
921 * kernel page table are globally performed. Otherwise, another
922 * processor could cache an old, pre-update entry without being
923 * invalidated. This can happen one of two ways: (1) The pmap becomes
924 * active on another processor after its pm_active field is checked by
925 * one of the following functions but before a store updating the page
926 * table is globally performed. (2) The pmap becomes active on another
927 * processor before its pm_active field is checked but due to
928 * speculative loads one of the following functions stills reads the
929 * pmap as inactive on the other processor.
931 * The kernel page table is exempt because its pm_active field is
932 * immutable. The kernel page table is always active on every
936 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
942 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
946 cpumask = PCPU_GET(cpumask);
947 other_cpus = PCPU_GET(other_cpus);
948 if (pmap->pm_active & cpumask)
950 if (pmap->pm_active & other_cpus)
951 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
957 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
964 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
965 for (addr = sva; addr < eva; addr += PAGE_SIZE)
967 smp_invlpg_range(sva, eva);
969 cpumask = PCPU_GET(cpumask);
970 other_cpus = PCPU_GET(other_cpus);
971 if (pmap->pm_active & cpumask)
972 for (addr = sva; addr < eva; addr += PAGE_SIZE)
974 if (pmap->pm_active & other_cpus)
975 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
982 pmap_invalidate_all(pmap_t pmap)
988 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
992 cpumask = PCPU_GET(cpumask);
993 other_cpus = PCPU_GET(other_cpus);
994 if (pmap->pm_active & cpumask)
996 if (pmap->pm_active & other_cpus)
997 smp_masked_invltlb(pmap->pm_active & other_cpus);
1003 pmap_invalidate_cache(void)
1013 cpumask_t store; /* processor that updates the PDE */
1014 cpumask_t invalidate; /* processors that invalidate their TLB */
1021 pmap_update_pde_kernel(void *arg)
1023 struct pde_action *act = arg;
1027 if (act->store == PCPU_GET(cpumask))
1029 * Elsewhere, this operation requires allpmaps_lock for
1030 * synchronization. Here, it does not because it is being
1031 * performed in the context of an all_cpus rendezvous.
1033 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1034 pde = pmap_pde(pmap, act->va);
1035 pde_store(pde, act->newpde);
1040 pmap_update_pde_user(void *arg)
1042 struct pde_action *act = arg;
1044 if (act->store == PCPU_GET(cpumask))
1045 pde_store(act->pde, act->newpde);
1049 pmap_update_pde_teardown(void *arg)
1051 struct pde_action *act = arg;
1053 if ((act->invalidate & PCPU_GET(cpumask)) != 0)
1054 pmap_update_pde_invalidate(act->va, act->newpde);
1058 * Change the page size for the specified virtual address in a way that
1059 * prevents any possibility of the TLB ever having two entries that map the
1060 * same virtual address using different page sizes. This is the recommended
1061 * workaround for Erratum 383 on AMD Family 10h processors. It prevents a
1062 * machine check exception for a TLB state that is improperly diagnosed as a
1066 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1068 struct pde_action act;
1069 cpumask_t active, cpumask;
1072 cpumask = PCPU_GET(cpumask);
1073 if (pmap == kernel_pmap)
1076 active = pmap->pm_active;
1077 if ((active & PCPU_GET(other_cpus)) != 0) {
1078 act.store = cpumask;
1079 act.invalidate = active;
1082 act.newpde = newpde;
1083 smp_rendezvous_cpus(cpumask | active,
1084 smp_no_rendevous_barrier, pmap == kernel_pmap ?
1085 pmap_update_pde_kernel : pmap_update_pde_user,
1086 pmap_update_pde_teardown, &act);
1088 if (pmap == kernel_pmap)
1089 pmap_kenter_pde(va, newpde);
1091 pde_store(pde, newpde);
1092 if ((active & cpumask) != 0)
1093 pmap_update_pde_invalidate(va, newpde);
1099 * Normal, non-SMP, 486+ invalidation functions.
1100 * We inline these within pmap.c for speed.
1103 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
1106 if (pmap == kernel_pmap || pmap->pm_active)
1111 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1115 if (pmap == kernel_pmap || pmap->pm_active)
1116 for (addr = sva; addr < eva; addr += PAGE_SIZE)
1121 pmap_invalidate_all(pmap_t pmap)
1124 if (pmap == kernel_pmap || pmap->pm_active)
1129 pmap_invalidate_cache(void)
1136 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1139 if (pmap == kernel_pmap)
1140 pmap_kenter_pde(va, newpde);
1142 pde_store(pde, newpde);
1143 if (pmap == kernel_pmap || pmap->pm_active)
1144 pmap_update_pde_invalidate(va, newpde);
1149 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
1152 KASSERT((sva & PAGE_MASK) == 0,
1153 ("pmap_invalidate_cache_range: sva not page-aligned"));
1154 KASSERT((eva & PAGE_MASK) == 0,
1155 ("pmap_invalidate_cache_range: eva not page-aligned"));
1157 if (cpu_feature & CPUID_SS)
1158 ; /* If "Self Snoop" is supported, do nothing. */
1159 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
1160 eva - sva < 2 * 1024 * 1024) {
1163 * Otherwise, do per-cache line flush. Use the mfence
1164 * instruction to insure that previous stores are
1165 * included in the write-back. The processor
1166 * propagates flush to other processors in the cache
1170 for (; sva < eva; sva += cpu_clflush_line_size)
1176 * No targeted cache flush methods are supported by CPU,
1177 * or the supplied range is bigger than 2MB.
1178 * Globally invalidate cache.
1180 pmap_invalidate_cache();
1185 * Are we current address space or kernel? N.B. We return FALSE when
1186 * a pmap's page table is in use because a kernel thread is borrowing
1187 * it. The borrowed page table can change spontaneously, making any
1188 * dependence on its continued use subject to a race condition.
1191 pmap_is_current(pmap_t pmap)
1194 return (pmap == kernel_pmap ||
1195 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1196 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1200 * If the given pmap is not the current or kernel pmap, the returned pte must
1201 * be released by passing it to pmap_pte_release().
1204 pmap_pte(pmap_t pmap, vm_offset_t va)
1209 pde = pmap_pde(pmap, va);
1213 /* are we current address space or kernel? */
1214 if (pmap_is_current(pmap))
1215 return (vtopte(va));
1216 mtx_lock(&PMAP2mutex);
1217 newpf = *pde & PG_FRAME;
1218 if ((*PMAP2 & PG_FRAME) != newpf) {
1219 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1220 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1222 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1228 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1231 static __inline void
1232 pmap_pte_release(pt_entry_t *pte)
1235 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1236 mtx_unlock(&PMAP2mutex);
1239 static __inline void
1240 invlcaddr(void *caddr)
1243 invlpg((u_int)caddr);
1247 * Super fast pmap_pte routine best used when scanning
1248 * the pv lists. This eliminates many coarse-grained
1249 * invltlb calls. Note that many of the pv list
1250 * scans are across different pmaps. It is very wasteful
1251 * to do an entire invltlb for checking a single mapping.
1253 * If the given pmap is not the current pmap, vm_page_queue_mtx
1254 * must be held and curthread pinned to a CPU.
1257 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1262 pde = pmap_pde(pmap, va);
1266 /* are we current address space or kernel? */
1267 if (pmap_is_current(pmap))
1268 return (vtopte(va));
1269 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1270 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1271 newpf = *pde & PG_FRAME;
1272 if ((*PMAP1 & PG_FRAME) != newpf) {
1273 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1275 PMAP1cpu = PCPU_GET(cpuid);
1281 if (PMAP1cpu != PCPU_GET(cpuid)) {
1282 PMAP1cpu = PCPU_GET(cpuid);
1288 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1294 * Routine: pmap_extract
1296 * Extract the physical page address associated
1297 * with the given map/virtual_address pair.
1300 pmap_extract(pmap_t pmap, vm_offset_t va)
1308 pde = pmap->pm_pdir[va >> PDRSHIFT];
1310 if ((pde & PG_PS) != 0)
1311 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1313 pte = pmap_pte(pmap, va);
1314 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1315 pmap_pte_release(pte);
1323 * Routine: pmap_extract_and_hold
1325 * Atomically extract and hold the physical page
1326 * with the given pmap and virtual address pair
1327 * if that mapping permits the given protection.
1330 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1337 vm_page_lock_queues();
1339 pde = *pmap_pde(pmap, va);
1342 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1343 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1349 pte = *pmap_pte_quick(pmap, va);
1351 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1352 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1358 vm_page_unlock_queues();
1363 /***************************************************
1364 * Low level mapping routines.....
1365 ***************************************************/
1368 * Add a wired page to the kva.
1369 * Note: not SMP coherent.
1372 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1377 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1380 static __inline void
1381 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1386 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1390 * Remove a page from the kernel pagetables.
1391 * Note: not SMP coherent.
1394 pmap_kremove(vm_offset_t va)
1403 * Used to map a range of physical addresses into kernel
1404 * virtual address space.
1406 * The value passed in '*virt' is a suggested virtual address for
1407 * the mapping. Architectures which can support a direct-mapped
1408 * physical to virtual region can return the appropriate address
1409 * within that region, leaving '*virt' unchanged. Other
1410 * architectures should map the pages starting at '*virt' and
1411 * update '*virt' with the first usable address after the mapped
1415 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1417 vm_offset_t va, sva;
1420 while (start < end) {
1421 pmap_kenter(va, start);
1425 pmap_invalidate_range(kernel_pmap, sva, va);
1432 * Add a list of wired pages to the kva
1433 * this routine is only used for temporary
1434 * kernel mappings that do not need to have
1435 * page modification or references recorded.
1436 * Note that old mappings are simply written
1437 * over. The page *must* be wired.
1438 * Note: SMP coherent. Uses a ranged shootdown IPI.
1441 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1443 pt_entry_t *endpte, oldpte, *pte;
1447 endpte = pte + count;
1448 while (pte < endpte) {
1450 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag |
1451 pmap_cache_bits((*ma)->md.pat_mode, 0) | PG_RW | PG_V);
1455 if ((oldpte & PG_V) != 0)
1456 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1461 * This routine tears out page mappings from the
1462 * kernel -- it is meant only for temporary mappings.
1463 * Note: SMP coherent. Uses a ranged shootdown IPI.
1466 pmap_qremove(vm_offset_t sva, int count)
1471 while (count-- > 0) {
1475 pmap_invalidate_range(kernel_pmap, sva, va);
1478 /***************************************************
1479 * Page table page management routines.....
1480 ***************************************************/
1481 static __inline void
1482 pmap_free_zero_pages(vm_page_t free)
1486 while (free != NULL) {
1489 /* Preserve the page's PG_ZERO setting. */
1490 vm_page_free_toq(m);
1495 * Schedule the specified unused page table page to be freed. Specifically,
1496 * add the page to the specified list of pages that will be released to the
1497 * physical memory manager after the TLB has been updated.
1499 static __inline void
1500 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1504 m->flags |= PG_ZERO;
1506 m->flags &= ~PG_ZERO;
1512 * Inserts the specified page table page into the specified pmap's collection
1513 * of idle page table pages. Each of a pmap's page table pages is responsible
1514 * for mapping a distinct range of virtual addresses. The pmap's collection is
1515 * ordered by this virtual address range.
1518 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1522 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1523 root = pmap->pm_root;
1528 root = vm_page_splay(mpte->pindex, root);
1529 if (mpte->pindex < root->pindex) {
1530 mpte->left = root->left;
1533 } else if (mpte->pindex == root->pindex)
1534 panic("pmap_insert_pt_page: pindex already inserted");
1536 mpte->right = root->right;
1541 pmap->pm_root = mpte;
1545 * Looks for a page table page mapping the specified virtual address in the
1546 * specified pmap's collection of idle page table pages. Returns NULL if there
1547 * is no page table page corresponding to the specified virtual address.
1550 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1553 vm_pindex_t pindex = va >> PDRSHIFT;
1555 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1556 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1557 mpte = vm_page_splay(pindex, mpte);
1558 if ((pmap->pm_root = mpte)->pindex != pindex)
1565 * Removes the specified page table page from the specified pmap's collection
1566 * of idle page table pages. The specified page table page must be a member of
1567 * the pmap's collection.
1570 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1574 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1575 if (mpte != pmap->pm_root)
1576 vm_page_splay(mpte->pindex, pmap->pm_root);
1577 if (mpte->left == NULL)
1580 root = vm_page_splay(mpte->pindex, mpte->left);
1581 root->right = mpte->right;
1583 pmap->pm_root = root;
1587 * This routine unholds page table pages, and if the hold count
1588 * drops to zero, then it decrements the wire count.
1591 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1595 if (m->wire_count == 0)
1596 return _pmap_unwire_pte_hold(pmap, m, free);
1602 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1607 * unmap the page table page
1609 pmap->pm_pdir[m->pindex] = 0;
1610 --pmap->pm_stats.resident_count;
1613 * This is a release store so that the ordinary store unmapping
1614 * the page table page is globally performed before TLB shoot-
1617 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1620 * Do an invltlb to make the invalidated mapping
1621 * take effect immediately.
1623 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1624 pmap_invalidate_page(pmap, pteva);
1627 * Put page on a list so that it is released after
1628 * *ALL* TLB shootdown is done
1630 pmap_add_delayed_free_list(m, free, TRUE);
1636 * After removing a page table entry, this routine is used to
1637 * conditionally free the page, and manage the hold/wire counts.
1640 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1645 if (va >= VM_MAXUSER_ADDRESS)
1647 ptepde = *pmap_pde(pmap, va);
1648 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1649 return pmap_unwire_pte_hold(pmap, mpte, free);
1653 pmap_pinit0(pmap_t pmap)
1656 PMAP_LOCK_INIT(pmap);
1657 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1659 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1661 pmap->pm_root = NULL;
1662 pmap->pm_active = 0;
1663 PCPU_SET(curpmap, pmap);
1664 TAILQ_INIT(&pmap->pm_pvchunk);
1665 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1666 mtx_lock_spin(&allpmaps_lock);
1667 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1668 mtx_unlock_spin(&allpmaps_lock);
1672 * Initialize a preallocated and zeroed pmap structure,
1673 * such as one in a vmspace structure.
1676 pmap_pinit(pmap_t pmap)
1678 vm_page_t m, ptdpg[NPGPTD];
1683 PMAP_LOCK_INIT(pmap);
1686 * No need to allocate page table space yet but we do need a valid
1687 * page directory table.
1689 if (pmap->pm_pdir == NULL) {
1690 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1693 if (pmap->pm_pdir == NULL) {
1694 PMAP_LOCK_DESTROY(pmap);
1698 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1699 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1700 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1701 ("pmap_pinit: pdpt misaligned"));
1702 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1703 ("pmap_pinit: pdpt above 4g"));
1705 pmap->pm_root = NULL;
1707 KASSERT(pmap->pm_root == NULL,
1708 ("pmap_pinit: pmap has reserved page table page(s)"));
1711 * allocate the page directory page(s)
1713 for (i = 0; i < NPGPTD;) {
1714 m = vm_page_alloc(NULL, color++,
1715 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1724 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1726 for (i = 0; i < NPGPTD; i++) {
1727 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1728 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1731 mtx_lock_spin(&allpmaps_lock);
1732 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1733 mtx_unlock_spin(&allpmaps_lock);
1734 /* Wire in kernel global address entries. */
1735 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1737 /* install self-referential address mapping entry(s) */
1738 for (i = 0; i < NPGPTD; i++) {
1739 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1740 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1742 pmap->pm_pdpt[i] = pa | PG_V;
1746 pmap->pm_active = 0;
1747 TAILQ_INIT(&pmap->pm_pvchunk);
1748 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1754 * this routine is called if the page table page is not
1758 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1763 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1764 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1765 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1768 * Allocate a page table page.
1770 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1771 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1772 if (flags & M_WAITOK) {
1774 vm_page_unlock_queues();
1776 vm_page_lock_queues();
1781 * Indicate the need to retry. While waiting, the page table
1782 * page may have been allocated.
1786 if ((m->flags & PG_ZERO) == 0)
1790 * Map the pagetable page into the process address space, if
1791 * it isn't already there.
1794 pmap->pm_stats.resident_count++;
1796 ptepa = VM_PAGE_TO_PHYS(m);
1797 pmap->pm_pdir[ptepindex] =
1798 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1804 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1810 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1811 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1812 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1815 * Calculate pagetable page index
1817 ptepindex = va >> PDRSHIFT;
1820 * Get the page directory entry
1822 ptepa = pmap->pm_pdir[ptepindex];
1825 * This supports switching from a 4MB page to a
1828 if (ptepa & PG_PS) {
1829 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1830 ptepa = pmap->pm_pdir[ptepindex];
1834 * If the page table page is mapped, we just increment the
1835 * hold count, and activate it.
1838 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1842 * Here if the pte page isn't mapped, or if it has
1845 m = _pmap_allocpte(pmap, ptepindex, flags);
1846 if (m == NULL && (flags & M_WAITOK))
1853 /***************************************************
1854 * Pmap allocation/deallocation routines.
1855 ***************************************************/
1859 * Deal with a SMP shootdown of other users of the pmap that we are
1860 * trying to dispose of. This can be a bit hairy.
1862 static cpumask_t *lazymask;
1863 static u_int lazyptd;
1864 static volatile u_int lazywait;
1866 void pmap_lazyfix_action(void);
1869 pmap_lazyfix_action(void)
1871 cpumask_t mymask = PCPU_GET(cpumask);
1874 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1876 if (rcr3() == lazyptd)
1877 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1878 atomic_clear_int(lazymask, mymask);
1879 atomic_store_rel_int(&lazywait, 1);
1883 pmap_lazyfix_self(cpumask_t mymask)
1886 if (rcr3() == lazyptd)
1887 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1888 atomic_clear_int(lazymask, mymask);
1893 pmap_lazyfix(pmap_t pmap)
1895 cpumask_t mymask, mask;
1898 while ((mask = pmap->pm_active) != 0) {
1900 mask = mask & -mask; /* Find least significant set bit */
1901 mtx_lock_spin(&smp_ipi_mtx);
1903 lazyptd = vtophys(pmap->pm_pdpt);
1905 lazyptd = vtophys(pmap->pm_pdir);
1907 mymask = PCPU_GET(cpumask);
1908 if (mask == mymask) {
1909 lazymask = &pmap->pm_active;
1910 pmap_lazyfix_self(mymask);
1912 atomic_store_rel_int((u_int *)&lazymask,
1913 (u_int)&pmap->pm_active);
1914 atomic_store_rel_int(&lazywait, 0);
1915 ipi_selected(mask, IPI_LAZYPMAP);
1916 while (lazywait == 0) {
1922 mtx_unlock_spin(&smp_ipi_mtx);
1924 printf("pmap_lazyfix: spun for 50000000\n");
1931 * Cleaning up on uniprocessor is easy. For various reasons, we're
1932 * unlikely to have to even execute this code, including the fact
1933 * that the cleanup is deferred until the parent does a wait(2), which
1934 * means that another userland process has run.
1937 pmap_lazyfix(pmap_t pmap)
1941 cr3 = vtophys(pmap->pm_pdir);
1942 if (cr3 == rcr3()) {
1943 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1944 pmap->pm_active &= ~(PCPU_GET(cpumask));
1950 * Release any resources held by the given physical map.
1951 * Called when a pmap initialized by pmap_pinit is being released.
1952 * Should only be called if the map contains no valid mappings.
1955 pmap_release(pmap_t pmap)
1957 vm_page_t m, ptdpg[NPGPTD];
1960 KASSERT(pmap->pm_stats.resident_count == 0,
1961 ("pmap_release: pmap resident count %ld != 0",
1962 pmap->pm_stats.resident_count));
1963 KASSERT(pmap->pm_root == NULL,
1964 ("pmap_release: pmap has reserved page table page(s)"));
1967 mtx_lock_spin(&allpmaps_lock);
1968 LIST_REMOVE(pmap, pm_list);
1969 mtx_unlock_spin(&allpmaps_lock);
1971 for (i = 0; i < NPGPTD; i++)
1972 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
1975 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1976 sizeof(*pmap->pm_pdir));
1978 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1980 for (i = 0; i < NPGPTD; i++) {
1983 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1984 ("pmap_release: got wrong ptd page"));
1987 atomic_subtract_int(&cnt.v_wire_count, 1);
1988 vm_page_free_zero(m);
1990 PMAP_LOCK_DESTROY(pmap);
1994 kvm_size(SYSCTL_HANDLER_ARGS)
1996 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1998 return sysctl_handle_long(oidp, &ksize, 0, req);
2000 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
2001 0, 0, kvm_size, "IU", "Size of KVM");
2004 kvm_free(SYSCTL_HANDLER_ARGS)
2006 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
2008 return sysctl_handle_long(oidp, &kfree, 0, req);
2010 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
2011 0, 0, kvm_free, "IU", "Amount of KVM free");
2014 * grow the number of kernel page table entries, if needed
2017 pmap_growkernel(vm_offset_t addr)
2019 vm_paddr_t ptppaddr;
2023 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
2024 if (kernel_vm_end == 0) {
2025 kernel_vm_end = KERNBASE;
2027 while (pdir_pde(PTD, kernel_vm_end)) {
2028 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
2030 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2031 kernel_vm_end = kernel_map->max_offset;
2036 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
2037 if (addr - 1 >= kernel_map->max_offset)
2038 addr = kernel_map->max_offset;
2039 while (kernel_vm_end < addr) {
2040 if (pdir_pde(PTD, kernel_vm_end)) {
2041 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
2042 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2043 kernel_vm_end = kernel_map->max_offset;
2049 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
2050 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2053 panic("pmap_growkernel: no memory to grow kernel");
2057 if ((nkpg->flags & PG_ZERO) == 0)
2058 pmap_zero_page(nkpg);
2059 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2060 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
2061 pdir_pde(KPTD, kernel_vm_end) = pgeflag | newpdir;
2063 pmap_kenter_pde(kernel_vm_end, newpdir);
2064 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
2065 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2066 kernel_vm_end = kernel_map->max_offset;
2073 /***************************************************
2074 * page management routines.
2075 ***************************************************/
2077 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
2078 CTASSERT(_NPCM == 11);
2080 static __inline struct pv_chunk *
2081 pv_to_chunk(pv_entry_t pv)
2084 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
2087 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
2089 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
2090 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
2092 static uint32_t pc_freemask[11] = {
2093 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2094 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2095 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2096 PC_FREE0_9, PC_FREE10
2099 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
2100 "Current number of pv entries");
2103 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
2105 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
2106 "Current number of pv entry chunks");
2107 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
2108 "Current number of pv entry chunks allocated");
2109 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
2110 "Current number of pv entry chunks frees");
2111 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
2112 "Number of times tried to get a chunk page but failed.");
2114 static long pv_entry_frees, pv_entry_allocs;
2115 static int pv_entry_spare;
2117 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
2118 "Current number of pv entry frees");
2119 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
2120 "Current number of pv entry allocs");
2121 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
2122 "Current number of spare pv entries");
2124 static int pmap_collect_inactive, pmap_collect_active;
2126 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
2127 "Current number times pmap_collect called on inactive queue");
2128 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
2129 "Current number times pmap_collect called on active queue");
2133 * We are in a serious low memory condition. Resort to
2134 * drastic measures to free some pages so we can allocate
2135 * another pv entry chunk. This is normally called to
2136 * unmap inactive pages, and if necessary, active pages.
2139 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
2141 struct md_page *pvh;
2144 pt_entry_t *pte, tpte;
2145 pv_entry_t next_pv, pv;
2150 TAILQ_FOREACH(m, &vpq->pl, pageq) {
2151 if (m->hold_count || m->busy)
2153 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
2156 /* Avoid deadlock and lock recursion. */
2157 if (pmap > locked_pmap)
2159 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
2161 pmap->pm_stats.resident_count--;
2162 pde = pmap_pde(pmap, va);
2163 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
2164 " a 4mpage in page %p's pv list", m));
2165 pte = pmap_pte_quick(pmap, va);
2166 tpte = pte_load_clear(pte);
2167 KASSERT((tpte & PG_W) == 0,
2168 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
2170 vm_page_flag_set(m, PG_REFERENCED);
2171 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2174 pmap_unuse_pt(pmap, va, &free);
2175 pmap_invalidate_page(pmap, va);
2176 pmap_free_zero_pages(free);
2177 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2178 if (TAILQ_EMPTY(&m->md.pv_list)) {
2179 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2180 if (TAILQ_EMPTY(&pvh->pv_list))
2181 vm_page_flag_clear(m, PG_WRITEABLE);
2183 free_pv_entry(pmap, pv);
2184 if (pmap != locked_pmap)
2193 * free the pv_entry back to the free list
2196 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2199 struct pv_chunk *pc;
2200 int idx, field, bit;
2202 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2203 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2204 PV_STAT(pv_entry_frees++);
2205 PV_STAT(pv_entry_spare++);
2207 pc = pv_to_chunk(pv);
2208 idx = pv - &pc->pc_pventry[0];
2211 pc->pc_map[field] |= 1ul << bit;
2212 /* move to head of list */
2213 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2214 for (idx = 0; idx < _NPCM; idx++)
2215 if (pc->pc_map[idx] != pc_freemask[idx]) {
2216 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2219 PV_STAT(pv_entry_spare -= _NPCPV);
2220 PV_STAT(pc_chunk_count--);
2221 PV_STAT(pc_chunk_frees++);
2222 /* entire chunk is free, return it */
2223 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2224 pmap_qremove((vm_offset_t)pc, 1);
2225 vm_page_unwire(m, 0);
2227 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2231 * get a new pv_entry, allocating a block from the system
2235 get_pv_entry(pmap_t pmap, int try)
2237 static const struct timeval printinterval = { 60, 0 };
2238 static struct timeval lastprint;
2239 static vm_pindex_t colour;
2240 struct vpgqueues *pq;
2243 struct pv_chunk *pc;
2246 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2247 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2248 PV_STAT(pv_entry_allocs++);
2250 if (pv_entry_count > pv_entry_high_water)
2251 if (ratecheck(&lastprint, &printinterval))
2252 printf("Approaching the limit on PV entries, consider "
2253 "increasing either the vm.pmap.shpgperproc or the "
2254 "vm.pmap.pv_entry_max tunable.\n");
2257 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2259 for (field = 0; field < _NPCM; field++) {
2260 if (pc->pc_map[field]) {
2261 bit = bsfl(pc->pc_map[field]);
2265 if (field < _NPCM) {
2266 pv = &pc->pc_pventry[field * 32 + bit];
2267 pc->pc_map[field] &= ~(1ul << bit);
2268 /* If this was the last item, move it to tail */
2269 for (field = 0; field < _NPCM; field++)
2270 if (pc->pc_map[field] != 0) {
2271 PV_STAT(pv_entry_spare--);
2272 return (pv); /* not full, return */
2274 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2275 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2276 PV_STAT(pv_entry_spare--);
2281 * Access to the ptelist "pv_vafree" is synchronized by the page
2282 * queues lock. If "pv_vafree" is currently non-empty, it will
2283 * remain non-empty until pmap_ptelist_alloc() completes.
2285 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2286 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2287 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2290 PV_STAT(pc_chunk_tryfail++);
2294 * Reclaim pv entries: At first, destroy mappings to
2295 * inactive pages. After that, if a pv chunk entry
2296 * is still needed, destroy mappings to active pages.
2299 PV_STAT(pmap_collect_inactive++);
2300 pq = &vm_page_queues[PQ_INACTIVE];
2301 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2302 PV_STAT(pmap_collect_active++);
2303 pq = &vm_page_queues[PQ_ACTIVE];
2305 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2306 pmap_collect(pmap, pq);
2309 PV_STAT(pc_chunk_count++);
2310 PV_STAT(pc_chunk_allocs++);
2312 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2313 pmap_qenter((vm_offset_t)pc, &m, 1);
2315 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2316 for (field = 1; field < _NPCM; field++)
2317 pc->pc_map[field] = pc_freemask[field];
2318 pv = &pc->pc_pventry[0];
2319 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2320 PV_STAT(pv_entry_spare += _NPCPV - 1);
2324 static __inline pv_entry_t
2325 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2329 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2330 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2331 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2332 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2340 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2342 struct md_page *pvh;
2344 vm_offset_t va_last;
2347 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2348 KASSERT((pa & PDRMASK) == 0,
2349 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2352 * Transfer the 4mpage's pv entry for this mapping to the first
2355 pvh = pa_to_pvh(pa);
2356 va = trunc_4mpage(va);
2357 pv = pmap_pvh_remove(pvh, pmap, va);
2358 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2359 m = PHYS_TO_VM_PAGE(pa);
2360 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2361 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2362 va_last = va + NBPDR - PAGE_SIZE;
2365 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
2366 ("pmap_pv_demote_pde: page %p is not managed", m));
2368 pmap_insert_entry(pmap, va, m);
2369 } while (va < va_last);
2373 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2375 struct md_page *pvh;
2377 vm_offset_t va_last;
2380 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2381 KASSERT((pa & PDRMASK) == 0,
2382 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2385 * Transfer the first page's pv entry for this mapping to the
2386 * 4mpage's pv list. Aside from avoiding the cost of a call
2387 * to get_pv_entry(), a transfer avoids the possibility that
2388 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2389 * removes one of the mappings that is being promoted.
2391 m = PHYS_TO_VM_PAGE(pa);
2392 va = trunc_4mpage(va);
2393 pv = pmap_pvh_remove(&m->md, pmap, va);
2394 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2395 pvh = pa_to_pvh(pa);
2396 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2397 /* Free the remaining NPTEPG - 1 pv entries. */
2398 va_last = va + NBPDR - PAGE_SIZE;
2402 pmap_pvh_free(&m->md, pmap, va);
2403 } while (va < va_last);
2407 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2411 pv = pmap_pvh_remove(pvh, pmap, va);
2412 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2413 free_pv_entry(pmap, pv);
2417 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2419 struct md_page *pvh;
2421 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2422 pmap_pvh_free(&m->md, pmap, va);
2423 if (TAILQ_EMPTY(&m->md.pv_list)) {
2424 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2425 if (TAILQ_EMPTY(&pvh->pv_list))
2426 vm_page_flag_clear(m, PG_WRITEABLE);
2431 * Create a pv entry for page at pa for
2435 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2439 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2440 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2441 pv = get_pv_entry(pmap, FALSE);
2443 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2447 * Conditionally create a pv entry.
2450 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2454 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2455 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2456 if (pv_entry_count < pv_entry_high_water &&
2457 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2459 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2466 * Create the pv entries for each of the pages within a superpage.
2469 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2471 struct md_page *pvh;
2474 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2475 if (pv_entry_count < pv_entry_high_water &&
2476 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2478 pvh = pa_to_pvh(pa);
2479 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2486 * Fills a page table page with mappings to consecutive physical pages.
2489 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
2493 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2495 newpte += PAGE_SIZE;
2500 * Tries to demote a 2- or 4MB page mapping. If demotion fails, the
2501 * 2- or 4MB page mapping is invalidated.
2504 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2506 pd_entry_t newpde, oldpde;
2507 pt_entry_t *firstpte, newpte;
2509 vm_page_t free, mpte;
2511 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2513 KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
2514 ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
2515 mpte = pmap_lookup_pt_page(pmap, va);
2517 pmap_remove_pt_page(pmap, mpte);
2519 KASSERT((oldpde & PG_W) == 0,
2520 ("pmap_demote_pde: page table page for a wired mapping"
2524 * Invalidate the 2- or 4MB page mapping and return
2525 * "failure" if the mapping was never accessed or the
2526 * allocation of the new page table page fails.
2528 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
2529 va >> PDRSHIFT, VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL |
2530 VM_ALLOC_WIRED)) == NULL) {
2532 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2533 pmap_invalidate_page(pmap, trunc_4mpage(va));
2534 pmap_free_zero_pages(free);
2535 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2536 " in pmap %p", va, pmap);
2539 if (va < VM_MAXUSER_ADDRESS)
2540 pmap->pm_stats.resident_count++;
2542 mptepa = VM_PAGE_TO_PHYS(mpte);
2545 * If the page mapping is in the kernel's address space, then the
2546 * KPTmap can provide access to the page table page. Otherwise,
2547 * temporarily map the page table page (mpte) into the kernel's
2548 * address space at either PADDR1 or PADDR2.
2551 firstpte = &KPTmap[i386_btop(trunc_4mpage(va))];
2552 else if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2553 if ((*PMAP1 & PG_FRAME) != mptepa) {
2554 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2556 PMAP1cpu = PCPU_GET(cpuid);
2562 if (PMAP1cpu != PCPU_GET(cpuid)) {
2563 PMAP1cpu = PCPU_GET(cpuid);
2571 mtx_lock(&PMAP2mutex);
2572 if ((*PMAP2 & PG_FRAME) != mptepa) {
2573 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2574 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2578 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2579 KASSERT((oldpde & PG_A) != 0,
2580 ("pmap_demote_pde: oldpde is missing PG_A"));
2581 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2582 ("pmap_demote_pde: oldpde is missing PG_M"));
2583 newpte = oldpde & ~PG_PS;
2584 if ((newpte & PG_PDE_PAT) != 0)
2585 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2588 * If the page table page is new, initialize it.
2590 if (mpte->wire_count == 1) {
2591 mpte->wire_count = NPTEPG;
2592 pmap_fill_ptp(firstpte, newpte);
2594 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2595 ("pmap_demote_pde: firstpte and newpte map different physical"
2599 * If the mapping has changed attributes, update the page table
2602 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2603 pmap_fill_ptp(firstpte, newpte);
2606 * Demote the mapping. This pmap is locked. The old PDE has
2607 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2608 * set. Thus, there is no danger of a race with another
2609 * processor changing the setting of PG_A and/or PG_M between
2610 * the read above and the store below.
2612 if (workaround_erratum383)
2613 pmap_update_pde(pmap, va, pde, newpde);
2614 else if (pmap == kernel_pmap)
2615 pmap_kenter_pde(va, newpde);
2617 pde_store(pde, newpde);
2618 if (firstpte == PADDR2)
2619 mtx_unlock(&PMAP2mutex);
2622 * Invalidate the recursive mapping of the page table page.
2624 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2627 * Demote the pv entry. This depends on the earlier demotion
2628 * of the mapping. Specifically, the (re)creation of a per-
2629 * page pv entry might trigger the execution of pmap_collect(),
2630 * which might reclaim a newly (re)created per-page pv entry
2631 * and destroy the associated mapping. In order to destroy
2632 * the mapping, the PDE must have already changed from mapping
2633 * the 2mpage to referencing the page table page.
2635 if ((oldpde & PG_MANAGED) != 0)
2636 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2638 pmap_pde_demotions++;
2639 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2640 " in pmap %p", va, pmap);
2645 * pmap_remove_pde: do the things to unmap a superpage in a process
2648 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2651 struct md_page *pvh;
2653 vm_offset_t eva, va;
2656 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2657 KASSERT((sva & PDRMASK) == 0,
2658 ("pmap_remove_pde: sva is not 4mpage aligned"));
2659 oldpde = pte_load_clear(pdq);
2661 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2664 * Machines that don't support invlpg, also don't support
2668 pmap_invalidate_page(kernel_pmap, sva);
2669 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2670 if (oldpde & PG_MANAGED) {
2671 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2672 pmap_pvh_free(pvh, pmap, sva);
2674 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2675 va < eva; va += PAGE_SIZE, m++) {
2676 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2679 vm_page_flag_set(m, PG_REFERENCED);
2680 if (TAILQ_EMPTY(&m->md.pv_list) &&
2681 TAILQ_EMPTY(&pvh->pv_list))
2682 vm_page_flag_clear(m, PG_WRITEABLE);
2685 if (pmap == kernel_pmap) {
2686 if (!pmap_demote_pde(pmap, pdq, sva))
2687 panic("pmap_remove_pde: failed demotion");
2689 mpte = pmap_lookup_pt_page(pmap, sva);
2691 pmap_remove_pt_page(pmap, mpte);
2692 pmap->pm_stats.resident_count--;
2693 KASSERT(mpte->wire_count == NPTEPG,
2694 ("pmap_remove_pde: pte page wire count error"));
2695 mpte->wire_count = 0;
2696 pmap_add_delayed_free_list(mpte, free, FALSE);
2697 atomic_subtract_int(&cnt.v_wire_count, 1);
2703 * pmap_remove_pte: do the things to unmap a page in a process
2706 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2711 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2712 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2713 oldpte = pte_load_clear(ptq);
2715 pmap->pm_stats.wired_count -= 1;
2717 * Machines that don't support invlpg, also don't support
2721 pmap_invalidate_page(kernel_pmap, va);
2722 pmap->pm_stats.resident_count -= 1;
2723 if (oldpte & PG_MANAGED) {
2724 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2725 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2728 vm_page_flag_set(m, PG_REFERENCED);
2729 pmap_remove_entry(pmap, m, va);
2731 return (pmap_unuse_pt(pmap, va, free));
2735 * Remove a single page from a process address space
2738 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2742 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2743 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2744 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2745 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2747 pmap_remove_pte(pmap, pte, va, free);
2748 pmap_invalidate_page(pmap, va);
2752 * Remove the given range of addresses from the specified map.
2754 * It is assumed that the start and end are properly
2755 * rounded to the page size.
2758 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2763 vm_page_t free = NULL;
2767 * Perform an unsynchronized read. This is, however, safe.
2769 if (pmap->pm_stats.resident_count == 0)
2774 vm_page_lock_queues();
2779 * special handling of removing one page. a very
2780 * common operation and easy to short circuit some
2783 if ((sva + PAGE_SIZE == eva) &&
2784 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2785 pmap_remove_page(pmap, sva, &free);
2789 for (; sva < eva; sva = pdnxt) {
2793 * Calculate index for next page table.
2795 pdnxt = (sva + NBPDR) & ~PDRMASK;
2798 if (pmap->pm_stats.resident_count == 0)
2801 pdirindex = sva >> PDRSHIFT;
2802 ptpaddr = pmap->pm_pdir[pdirindex];
2805 * Weed out invalid mappings. Note: we assume that the page
2806 * directory table is always allocated, and in kernel virtual.
2812 * Check for large page.
2814 if ((ptpaddr & PG_PS) != 0) {
2816 * Are we removing the entire large page? If not,
2817 * demote the mapping and fall through.
2819 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2821 * The TLB entry for a PG_G mapping is
2822 * invalidated by pmap_remove_pde().
2824 if ((ptpaddr & PG_G) == 0)
2826 pmap_remove_pde(pmap,
2827 &pmap->pm_pdir[pdirindex], sva, &free);
2829 } else if (!pmap_demote_pde(pmap,
2830 &pmap->pm_pdir[pdirindex], sva)) {
2831 /* The large page mapping was destroyed. */
2837 * Limit our scan to either the end of the va represented
2838 * by the current page table page, or to the end of the
2839 * range being removed.
2844 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2850 * The TLB entry for a PG_G mapping is invalidated
2851 * by pmap_remove_pte().
2853 if ((*pte & PG_G) == 0)
2855 if (pmap_remove_pte(pmap, pte, sva, &free))
2862 pmap_invalidate_all(pmap);
2863 vm_page_unlock_queues();
2865 pmap_free_zero_pages(free);
2869 * Routine: pmap_remove_all
2871 * Removes this physical page from
2872 * all physical maps in which it resides.
2873 * Reflects back modify bits to the pager.
2876 * Original versions of this routine were very
2877 * inefficient because they iteratively called
2878 * pmap_remove (slow...)
2882 pmap_remove_all(vm_page_t m)
2884 struct md_page *pvh;
2887 pt_entry_t *pte, tpte;
2892 KASSERT((m->flags & PG_FICTITIOUS) == 0,
2893 ("pmap_remove_all: page %p is fictitious", m));
2894 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2896 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2897 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2901 pde = pmap_pde(pmap, va);
2902 (void)pmap_demote_pde(pmap, pde, va);
2905 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2908 pmap->pm_stats.resident_count--;
2909 pde = pmap_pde(pmap, pv->pv_va);
2910 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2911 " a 4mpage in page %p's pv list", m));
2912 pte = pmap_pte_quick(pmap, pv->pv_va);
2913 tpte = pte_load_clear(pte);
2915 pmap->pm_stats.wired_count--;
2917 vm_page_flag_set(m, PG_REFERENCED);
2920 * Update the vm_page_t clean and reference bits.
2922 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2925 pmap_unuse_pt(pmap, pv->pv_va, &free);
2926 pmap_invalidate_page(pmap, pv->pv_va);
2927 pmap_free_zero_pages(free);
2928 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2929 free_pv_entry(pmap, pv);
2932 vm_page_flag_clear(m, PG_WRITEABLE);
2937 * pmap_protect_pde: do the things to protect a 4mpage in a process
2940 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2942 pd_entry_t newpde, oldpde;
2943 vm_offset_t eva, va;
2945 boolean_t anychanged;
2947 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2948 KASSERT((sva & PDRMASK) == 0,
2949 ("pmap_protect_pde: sva is not 4mpage aligned"));
2952 oldpde = newpde = *pde;
2953 if (oldpde & PG_MANAGED) {
2955 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2956 va < eva; va += PAGE_SIZE, m++) {
2958 * In contrast to the analogous operation on a 4KB page
2959 * mapping, the mapping's PG_A flag is not cleared and
2960 * the page's PG_REFERENCED flag is not set. The
2961 * reason is that pmap_demote_pde() expects that a 2/4MB
2962 * page mapping with a stored page table page has PG_A
2965 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2969 if ((prot & VM_PROT_WRITE) == 0)
2970 newpde &= ~(PG_RW | PG_M);
2972 if ((prot & VM_PROT_EXECUTE) == 0)
2975 if (newpde != oldpde) {
2976 if (!pde_cmpset(pde, oldpde, newpde))
2979 pmap_invalidate_page(pmap, sva);
2983 return (anychanged);
2987 * Set the physical protection on the
2988 * specified range of this map as requested.
2991 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2998 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2999 pmap_remove(pmap, sva, eva);
3004 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
3005 (VM_PROT_WRITE|VM_PROT_EXECUTE))
3008 if (prot & VM_PROT_WRITE)
3014 vm_page_lock_queues();
3017 for (; sva < eva; sva = pdnxt) {
3018 pt_entry_t obits, pbits;
3021 pdnxt = (sva + NBPDR) & ~PDRMASK;
3025 pdirindex = sva >> PDRSHIFT;
3026 ptpaddr = pmap->pm_pdir[pdirindex];
3029 * Weed out invalid mappings. Note: we assume that the page
3030 * directory table is always allocated, and in kernel virtual.
3036 * Check for large page.
3038 if ((ptpaddr & PG_PS) != 0) {
3040 * Are we protecting the entire large page? If not,
3041 * demote the mapping and fall through.
3043 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
3045 * The TLB entry for a PG_G mapping is
3046 * invalidated by pmap_protect_pde().
3048 if (pmap_protect_pde(pmap,
3049 &pmap->pm_pdir[pdirindex], sva, prot))
3052 } else if (!pmap_demote_pde(pmap,
3053 &pmap->pm_pdir[pdirindex], sva)) {
3054 /* The large page mapping was destroyed. */
3062 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3068 * Regardless of whether a pte is 32 or 64 bits in
3069 * size, PG_RW, PG_A, and PG_M are among the least
3070 * significant 32 bits.
3072 obits = pbits = *pte;
3073 if ((pbits & PG_V) == 0)
3075 if (pbits & PG_MANAGED) {
3078 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
3079 vm_page_flag_set(m, PG_REFERENCED);
3082 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3084 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
3089 if ((prot & VM_PROT_WRITE) == 0)
3090 pbits &= ~(PG_RW | PG_M);
3092 if ((prot & VM_PROT_EXECUTE) == 0)
3096 if (pbits != obits) {
3098 if (!atomic_cmpset_64(pte, obits, pbits))
3101 if (!atomic_cmpset_int((u_int *)pte, obits,
3106 pmap_invalidate_page(pmap, sva);
3114 pmap_invalidate_all(pmap);
3115 vm_page_unlock_queues();
3120 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
3121 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
3122 * For promotion to occur, two conditions must be met: (1) the 4KB page
3123 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3124 * mappings must have identical characteristics.
3126 * Managed (PG_MANAGED) mappings within the kernel address space are not
3127 * promoted. The reason is that kernel PDEs are replicated in each pmap but
3128 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
3132 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
3135 pt_entry_t *firstpte, oldpte, pa, *pte;
3136 vm_offset_t oldpteva;
3139 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3142 * Examine the first PTE in the specified PTP. Abort if this PTE is
3143 * either invalid, unused, or does not map the first 4KB physical page
3144 * within a 2- or 4MB page.
3146 firstpte = pmap_pte_quick(pmap, trunc_4mpage(va));
3149 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
3150 pmap_pde_p_failures++;
3151 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3152 " in pmap %p", va, pmap);
3155 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
3156 pmap_pde_p_failures++;
3157 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3158 " in pmap %p", va, pmap);
3161 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
3163 * When PG_M is already clear, PG_RW can be cleared without
3164 * a TLB invalidation.
3166 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
3173 * Examine each of the other PTEs in the specified PTP. Abort if this
3174 * PTE maps an unexpected 4KB physical page or does not have identical
3175 * characteristics to the first PTE.
3177 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
3178 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
3181 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
3182 pmap_pde_p_failures++;
3183 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3184 " in pmap %p", va, pmap);
3187 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
3189 * When PG_M is already clear, PG_RW can be cleared
3190 * without a TLB invalidation.
3192 if (!atomic_cmpset_int((u_int *)pte, oldpte,
3196 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
3198 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
3199 " in pmap %p", oldpteva, pmap);
3201 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
3202 pmap_pde_p_failures++;
3203 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3204 " in pmap %p", va, pmap);
3211 * Save the page table page in its current state until the PDE
3212 * mapping the superpage is demoted by pmap_demote_pde() or
3213 * destroyed by pmap_remove_pde().
3215 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3216 KASSERT(mpte >= vm_page_array &&
3217 mpte < &vm_page_array[vm_page_array_size],
3218 ("pmap_promote_pde: page table page is out of range"));
3219 KASSERT(mpte->pindex == va >> PDRSHIFT,
3220 ("pmap_promote_pde: page table page's pindex is wrong"));
3221 pmap_insert_pt_page(pmap, mpte);
3224 * Promote the pv entries.
3226 if ((newpde & PG_MANAGED) != 0)
3227 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3230 * Propagate the PAT index to its proper position.
3232 if ((newpde & PG_PTE_PAT) != 0)
3233 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3236 * Map the superpage.
3238 if (workaround_erratum383)
3239 pmap_update_pde(pmap, va, pde, PG_PS | newpde);
3240 else if (pmap == kernel_pmap)
3241 pmap_kenter_pde(va, PG_PS | newpde);
3243 pde_store(pde, PG_PS | newpde);
3245 pmap_pde_promotions++;
3246 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3247 " in pmap %p", va, pmap);
3251 * Insert the given physical page (p) at
3252 * the specified virtual address (v) in the
3253 * target physical map with the protection requested.
3255 * If specified, the page will be wired down, meaning
3256 * that the related pte can not be reclaimed.
3258 * NB: This is the only routine which MAY NOT lazy-evaluate
3259 * or lose information. That is, this routine must actually
3260 * insert this page into the given map NOW.
3263 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3264 vm_prot_t prot, boolean_t wired)
3270 pt_entry_t origpte, newpte;
3274 va = trunc_page(va);
3275 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3276 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3277 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va));
3281 vm_page_lock_queues();
3286 * In the case that a page table page is not
3287 * resident, we are creating it here.
3289 if (va < VM_MAXUSER_ADDRESS) {
3290 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3293 pde = pmap_pde(pmap, va);
3294 if ((*pde & PG_PS) != 0)
3295 panic("pmap_enter: attempted pmap_enter on 4MB page");
3296 pte = pmap_pte_quick(pmap, va);
3299 * Page Directory table entry not valid, we need a new PT page
3302 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3303 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3306 pa = VM_PAGE_TO_PHYS(m);
3309 opa = origpte & PG_FRAME;
3312 * Mapping has not changed, must be protection or wiring change.
3314 if (origpte && (opa == pa)) {
3316 * Wiring change, just update stats. We don't worry about
3317 * wiring PT pages as they remain resident as long as there
3318 * are valid mappings in them. Hence, if a user page is wired,
3319 * the PT page will be also.
3321 if (wired && ((origpte & PG_W) == 0))
3322 pmap->pm_stats.wired_count++;
3323 else if (!wired && (origpte & PG_W))
3324 pmap->pm_stats.wired_count--;
3327 * Remove extra pte reference
3333 * We might be turning off write access to the page,
3334 * so we go ahead and sense modify status.
3336 if (origpte & PG_MANAGED) {
3343 * Mapping has changed, invalidate old range and fall through to
3344 * handle validating new mapping.
3348 pmap->pm_stats.wired_count--;
3349 if (origpte & PG_MANAGED) {
3350 om = PHYS_TO_VM_PAGE(opa);
3351 pmap_remove_entry(pmap, om, va);
3355 KASSERT(mpte->wire_count > 0,
3356 ("pmap_enter: missing reference to page table page,"
3360 pmap->pm_stats.resident_count++;
3363 * Enter on the PV list if part of our managed memory.
3365 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3366 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3367 ("pmap_enter: managed mapping within the clean submap"));
3368 pmap_insert_entry(pmap, va, m);
3373 * Increment counters
3376 pmap->pm_stats.wired_count++;
3380 * Now validate mapping with desired protection/wiring.
3382 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3383 if ((prot & VM_PROT_WRITE) != 0) {
3385 vm_page_flag_set(m, PG_WRITEABLE);
3388 if ((prot & VM_PROT_EXECUTE) == 0)
3393 if (va < VM_MAXUSER_ADDRESS)
3395 if (pmap == kernel_pmap)
3399 * if the mapping or permission bits are different, we need
3400 * to update the pte.
3402 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3404 if ((access & VM_PROT_WRITE) != 0)
3406 if (origpte & PG_V) {
3408 origpte = pte_load_store(pte, newpte);
3409 if (origpte & PG_A) {
3410 if (origpte & PG_MANAGED)
3411 vm_page_flag_set(om, PG_REFERENCED);
3412 if (opa != VM_PAGE_TO_PHYS(m))
3415 if ((origpte & PG_NX) == 0 &&
3416 (newpte & PG_NX) != 0)
3420 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3421 if ((origpte & PG_MANAGED) != 0)
3423 if ((prot & VM_PROT_WRITE) == 0)
3427 pmap_invalidate_page(pmap, va);
3429 pte_store(pte, newpte);
3433 * If both the page table page and the reservation are fully
3434 * populated, then attempt promotion.
3436 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3437 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
3438 pmap_promote_pde(pmap, pde, va);
3441 vm_page_unlock_queues();
3446 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3447 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3448 * blocking, (2) a mapping already exists at the specified virtual address, or
3449 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3452 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3454 pd_entry_t *pde, newpde;
3456 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3457 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3458 pde = pmap_pde(pmap, va);
3460 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3461 " in pmap %p", va, pmap);
3464 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3466 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3467 newpde |= PG_MANAGED;
3470 * Abort this mapping if its PV entry could not be created.
3472 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3473 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3474 " in pmap %p", va, pmap);
3479 if ((prot & VM_PROT_EXECUTE) == 0)
3482 if (va < VM_MAXUSER_ADDRESS)
3486 * Increment counters.
3488 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3491 * Map the superpage.
3493 pde_store(pde, newpde);
3495 pmap_pde_mappings++;
3496 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3497 " in pmap %p", va, pmap);
3502 * Maps a sequence of resident pages belonging to the same object.
3503 * The sequence begins with the given page m_start. This page is
3504 * mapped at the given virtual address start. Each subsequent page is
3505 * mapped at a virtual address that is offset from start by the same
3506 * amount as the page is offset from m_start within the object. The
3507 * last page in the sequence is the page with the largest offset from
3508 * m_start that can be mapped at a virtual address less than the given
3509 * virtual address end. Not every virtual page between start and end
3510 * is mapped; only those for which a resident page exists with the
3511 * corresponding offset from m_start are mapped.
3514 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3515 vm_page_t m_start, vm_prot_t prot)
3519 vm_pindex_t diff, psize;
3521 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3522 psize = atop(end - start);
3526 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3527 va = start + ptoa(diff);
3528 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3529 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3530 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3531 pmap_enter_pde(pmap, va, m, prot))
3532 m = &m[NBPDR / PAGE_SIZE - 1];
3534 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3536 m = TAILQ_NEXT(m, listq);
3542 * this code makes some *MAJOR* assumptions:
3543 * 1. Current pmap & pmap exists.
3546 * 4. No page table pages.
3547 * but is *MUCH* faster than pmap_enter...
3551 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3555 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3560 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3561 vm_prot_t prot, vm_page_t mpte)
3567 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3568 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
3569 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3570 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3571 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3574 * In the case that a page table page is not
3575 * resident, we are creating it here.
3577 if (va < VM_MAXUSER_ADDRESS) {
3582 * Calculate pagetable page index
3584 ptepindex = va >> PDRSHIFT;
3585 if (mpte && (mpte->pindex == ptepindex)) {
3589 * Get the page directory entry
3591 ptepa = pmap->pm_pdir[ptepindex];
3594 * If the page table page is mapped, we just increment
3595 * the hold count, and activate it.
3600 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3603 mpte = _pmap_allocpte(pmap, ptepindex,
3614 * This call to vtopte makes the assumption that we are
3615 * entering the page into the current pmap. In order to support
3616 * quick entry into any pmap, one would likely use pmap_pte_quick.
3617 * But that isn't as quick as vtopte.
3629 * Enter on the PV list if part of our managed memory.
3631 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3632 !pmap_try_insert_pv_entry(pmap, va, m)) {
3635 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3636 pmap_invalidate_page(pmap, va);
3637 pmap_free_zero_pages(free);
3646 * Increment counters
3648 pmap->pm_stats.resident_count++;
3650 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3652 if ((prot & VM_PROT_EXECUTE) == 0)
3657 * Now validate mapping with RO protection
3659 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3660 pte_store(pte, pa | PG_V | PG_U);
3662 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3667 * Make a temporary mapping for a physical address. This is only intended
3668 * to be used for panic dumps.
3671 pmap_kenter_temporary(vm_paddr_t pa, int i)
3675 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3676 pmap_kenter(va, pa);
3678 return ((void *)crashdumpmap);
3682 * This code maps large physical mmap regions into the
3683 * processor address space. Note that some shortcuts
3684 * are taken, but the code works.
3687 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3688 vm_pindex_t pindex, vm_size_t size)
3691 vm_paddr_t pa, ptepa;
3695 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3696 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3697 ("pmap_object_init_pt: non-device object"));
3699 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3700 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3702 p = vm_page_lookup(object, pindex);
3703 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3704 ("pmap_object_init_pt: invalid page %p", p));
3705 pat_mode = p->md.pat_mode;
3708 * Abort the mapping if the first page is not physically
3709 * aligned to a 2/4MB page boundary.
3711 ptepa = VM_PAGE_TO_PHYS(p);
3712 if (ptepa & (NBPDR - 1))
3716 * Skip the first page. Abort the mapping if the rest of
3717 * the pages are not physically contiguous or have differing
3718 * memory attributes.
3720 p = TAILQ_NEXT(p, listq);
3721 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3723 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3724 ("pmap_object_init_pt: invalid page %p", p));
3725 if (pa != VM_PAGE_TO_PHYS(p) ||
3726 pat_mode != p->md.pat_mode)
3728 p = TAILQ_NEXT(p, listq);
3732 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3733 * "size" is a multiple of 2/4M, adding the PAT setting to
3734 * "pa" will not affect the termination of this loop.
3737 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3738 size; pa += NBPDR) {
3739 pde = pmap_pde(pmap, addr);
3741 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3742 PG_U | PG_RW | PG_V);
3743 pmap->pm_stats.resident_count += NBPDR /
3745 pmap_pde_mappings++;
3747 /* Else continue on if the PDE is already valid. */
3755 * Routine: pmap_change_wiring
3756 * Function: Change the wiring attribute for a map/virtual-address
3758 * In/out conditions:
3759 * The mapping must already exist in the pmap.
3762 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3766 boolean_t are_queues_locked;
3768 are_queues_locked = FALSE;
3771 pde = pmap_pde(pmap, va);
3772 if ((*pde & PG_PS) != 0) {
3773 if (!wired != ((*pde & PG_W) == 0)) {
3774 if (!are_queues_locked) {
3775 are_queues_locked = TRUE;
3776 if (!mtx_trylock(&vm_page_queue_mtx)) {
3778 vm_page_lock_queues();
3782 if (!pmap_demote_pde(pmap, pde, va))
3783 panic("pmap_change_wiring: demotion failed");
3787 pte = pmap_pte(pmap, va);
3789 if (wired && !pmap_pte_w(pte))
3790 pmap->pm_stats.wired_count++;
3791 else if (!wired && pmap_pte_w(pte))
3792 pmap->pm_stats.wired_count--;
3795 * Wiring is not a hardware characteristic so there is no need to
3798 pmap_pte_set_w(pte, wired);
3799 pmap_pte_release(pte);
3801 if (are_queues_locked)
3802 vm_page_unlock_queues();
3809 * Copy the range specified by src_addr/len
3810 * from the source map to the range dst_addr/len
3811 * in the destination map.
3813 * This routine is only advisory and need not do anything.
3817 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3818 vm_offset_t src_addr)
3822 vm_offset_t end_addr = src_addr + len;
3825 if (dst_addr != src_addr)
3828 if (!pmap_is_current(src_pmap))
3831 vm_page_lock_queues();
3832 if (dst_pmap < src_pmap) {
3833 PMAP_LOCK(dst_pmap);
3834 PMAP_LOCK(src_pmap);
3836 PMAP_LOCK(src_pmap);
3837 PMAP_LOCK(dst_pmap);
3840 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3841 pt_entry_t *src_pte, *dst_pte;
3842 vm_page_t dstmpte, srcmpte;
3843 pd_entry_t srcptepaddr;
3846 KASSERT(addr < UPT_MIN_ADDRESS,
3847 ("pmap_copy: invalid to pmap_copy page tables"));
3849 pdnxt = (addr + NBPDR) & ~PDRMASK;
3852 ptepindex = addr >> PDRSHIFT;
3854 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3855 if (srcptepaddr == 0)
3858 if (srcptepaddr & PG_PS) {
3859 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3860 ((srcptepaddr & PG_MANAGED) == 0 ||
3861 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3863 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3865 dst_pmap->pm_stats.resident_count +=
3871 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3872 KASSERT(srcmpte->wire_count > 0,
3873 ("pmap_copy: source page table page is unused"));
3875 if (pdnxt > end_addr)
3878 src_pte = vtopte(addr);
3879 while (addr < pdnxt) {
3883 * we only virtual copy managed pages
3885 if ((ptetemp & PG_MANAGED) != 0) {
3886 dstmpte = pmap_allocpte(dst_pmap, addr,
3888 if (dstmpte == NULL)
3890 dst_pte = pmap_pte_quick(dst_pmap, addr);
3891 if (*dst_pte == 0 &&
3892 pmap_try_insert_pv_entry(dst_pmap, addr,
3893 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3895 * Clear the wired, modified, and
3896 * accessed (referenced) bits
3899 *dst_pte = ptetemp & ~(PG_W | PG_M |
3901 dst_pmap->pm_stats.resident_count++;
3904 if (pmap_unwire_pte_hold(dst_pmap,
3906 pmap_invalidate_page(dst_pmap,
3908 pmap_free_zero_pages(free);
3912 if (dstmpte->wire_count >= srcmpte->wire_count)
3921 vm_page_unlock_queues();
3922 PMAP_UNLOCK(src_pmap);
3923 PMAP_UNLOCK(dst_pmap);
3926 static __inline void
3927 pagezero(void *page)
3929 #if defined(I686_CPU)
3930 if (cpu_class == CPUCLASS_686) {
3931 #if defined(CPU_ENABLE_SSE)
3932 if (cpu_feature & CPUID_SSE2)
3933 sse2_pagezero(page);
3936 i686_pagezero(page);
3939 bzero(page, PAGE_SIZE);
3943 * pmap_zero_page zeros the specified hardware page by mapping
3944 * the page into KVM and using bzero to clear its contents.
3947 pmap_zero_page(vm_page_t m)
3949 struct sysmaps *sysmaps;
3951 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3952 mtx_lock(&sysmaps->lock);
3953 if (*sysmaps->CMAP2)
3954 panic("pmap_zero_page: CMAP2 busy");
3956 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3957 pmap_cache_bits(m->md.pat_mode, 0);
3958 invlcaddr(sysmaps->CADDR2);
3959 pagezero(sysmaps->CADDR2);
3960 *sysmaps->CMAP2 = 0;
3962 mtx_unlock(&sysmaps->lock);
3966 * pmap_zero_page_area zeros the specified hardware page by mapping
3967 * the page into KVM and using bzero to clear its contents.
3969 * off and size may not cover an area beyond a single hardware page.
3972 pmap_zero_page_area(vm_page_t m, int off, int size)
3974 struct sysmaps *sysmaps;
3976 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3977 mtx_lock(&sysmaps->lock);
3978 if (*sysmaps->CMAP2)
3979 panic("pmap_zero_page_area: CMAP2 busy");
3981 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3982 pmap_cache_bits(m->md.pat_mode, 0);
3983 invlcaddr(sysmaps->CADDR2);
3984 if (off == 0 && size == PAGE_SIZE)
3985 pagezero(sysmaps->CADDR2);
3987 bzero((char *)sysmaps->CADDR2 + off, size);
3988 *sysmaps->CMAP2 = 0;
3990 mtx_unlock(&sysmaps->lock);
3994 * pmap_zero_page_idle zeros the specified hardware page by mapping
3995 * the page into KVM and using bzero to clear its contents. This
3996 * is intended to be called from the vm_pagezero process only and
4000 pmap_zero_page_idle(vm_page_t m)
4004 panic("pmap_zero_page_idle: CMAP3 busy");
4006 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
4007 pmap_cache_bits(m->md.pat_mode, 0);
4015 * pmap_copy_page copies the specified (machine independent)
4016 * page by mapping the page into virtual memory and using
4017 * bcopy to copy the page, one machine dependent page at a
4021 pmap_copy_page(vm_page_t src, vm_page_t dst)
4023 struct sysmaps *sysmaps;
4025 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4026 mtx_lock(&sysmaps->lock);
4027 if (*sysmaps->CMAP1)
4028 panic("pmap_copy_page: CMAP1 busy");
4029 if (*sysmaps->CMAP2)
4030 panic("pmap_copy_page: CMAP2 busy");
4032 invlpg((u_int)sysmaps->CADDR1);
4033 invlpg((u_int)sysmaps->CADDR2);
4034 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
4035 pmap_cache_bits(src->md.pat_mode, 0);
4036 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
4037 pmap_cache_bits(dst->md.pat_mode, 0);
4038 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
4039 *sysmaps->CMAP1 = 0;
4040 *sysmaps->CMAP2 = 0;
4042 mtx_unlock(&sysmaps->lock);
4046 * Returns true if the pmap's pv is one of the first
4047 * 16 pvs linked to from this page. This count may
4048 * be changed upwards or downwards in the future; it
4049 * is only necessary that true be returned for a small
4050 * subset of pmaps for proper page aging.
4053 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4055 struct md_page *pvh;
4059 if (m->flags & PG_FICTITIOUS)
4062 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4063 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4064 if (PV_PMAP(pv) == pmap) {
4072 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4073 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4074 if (PV_PMAP(pv) == pmap)
4085 * pmap_page_wired_mappings:
4087 * Return the number of managed mappings to the given physical page
4091 pmap_page_wired_mappings(vm_page_t m)
4096 if ((m->flags & PG_FICTITIOUS) != 0)
4098 count = pmap_pvh_wired_mappings(&m->md, count);
4099 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
4103 * pmap_pvh_wired_mappings:
4105 * Return the updated number "count" of managed mappings that are wired.
4108 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4114 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4116 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4119 pte = pmap_pte_quick(pmap, pv->pv_va);
4120 if ((*pte & PG_W) != 0)
4129 * Returns TRUE if the given page is mapped individually or as part of
4130 * a 4mpage. Otherwise, returns FALSE.
4133 pmap_page_is_mapped(vm_page_t m)
4135 struct md_page *pvh;
4137 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
4139 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4140 if (TAILQ_EMPTY(&m->md.pv_list)) {
4141 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4142 return (!TAILQ_EMPTY(&pvh->pv_list));
4148 * Remove all pages from specified address space
4149 * this aids process exit speeds. Also, this code
4150 * is special cased for current process only, but
4151 * can have the more generic (and slightly slower)
4152 * mode enabled. This is much faster than pmap_remove
4153 * in the case of running down an entire address space.
4156 pmap_remove_pages(pmap_t pmap)
4158 pt_entry_t *pte, tpte;
4159 vm_page_t free = NULL;
4160 vm_page_t m, mpte, mt;
4162 struct md_page *pvh;
4163 struct pv_chunk *pc, *npc;
4166 uint32_t inuse, bitmask;
4169 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
4170 printf("warning: pmap_remove_pages called with non-current pmap\n");
4173 vm_page_lock_queues();
4176 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
4178 for (field = 0; field < _NPCM; field++) {
4179 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
4180 while (inuse != 0) {
4182 bitmask = 1UL << bit;
4183 idx = field * 32 + bit;
4184 pv = &pc->pc_pventry[idx];
4187 pte = pmap_pde(pmap, pv->pv_va);
4189 if ((tpte & PG_PS) == 0) {
4190 pte = vtopte(pv->pv_va);
4191 tpte = *pte & ~PG_PTE_PAT;
4196 "TPTE at %p IS ZERO @ VA %08x\n",
4202 * We cannot remove wired pages from a process' mapping at this time
4209 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4210 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4211 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4212 m, (uintmax_t)m->phys_addr,
4215 KASSERT(m < &vm_page_array[vm_page_array_size],
4216 ("pmap_remove_pages: bad tpte %#jx",
4222 * Update the vm_page_t clean/reference bits.
4224 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4225 if ((tpte & PG_PS) != 0) {
4226 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4233 PV_STAT(pv_entry_frees++);
4234 PV_STAT(pv_entry_spare++);
4236 pc->pc_map[field] |= bitmask;
4237 if ((tpte & PG_PS) != 0) {
4238 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4239 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4240 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4241 if (TAILQ_EMPTY(&pvh->pv_list)) {
4242 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4243 if (TAILQ_EMPTY(&mt->md.pv_list))
4244 vm_page_flag_clear(mt, PG_WRITEABLE);
4246 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4248 pmap_remove_pt_page(pmap, mpte);
4249 pmap->pm_stats.resident_count--;
4250 KASSERT(mpte->wire_count == NPTEPG,
4251 ("pmap_remove_pages: pte page wire count error"));
4252 mpte->wire_count = 0;
4253 pmap_add_delayed_free_list(mpte, &free, FALSE);
4254 atomic_subtract_int(&cnt.v_wire_count, 1);
4257 pmap->pm_stats.resident_count--;
4258 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4259 if (TAILQ_EMPTY(&m->md.pv_list)) {
4260 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4261 if (TAILQ_EMPTY(&pvh->pv_list))
4262 vm_page_flag_clear(m, PG_WRITEABLE);
4264 pmap_unuse_pt(pmap, pv->pv_va, &free);
4269 PV_STAT(pv_entry_spare -= _NPCPV);
4270 PV_STAT(pc_chunk_count--);
4271 PV_STAT(pc_chunk_frees++);
4272 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4273 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4274 pmap_qremove((vm_offset_t)pc, 1);
4275 vm_page_unwire(m, 0);
4277 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4281 pmap_invalidate_all(pmap);
4282 vm_page_unlock_queues();
4284 pmap_free_zero_pages(free);
4290 * Return whether or not the specified physical page was modified
4291 * in any physical maps.
4294 pmap_is_modified(vm_page_t m)
4297 if (m->flags & PG_FICTITIOUS)
4299 if (pmap_is_modified_pvh(&m->md))
4301 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4305 * Returns TRUE if any of the given mappings were used to modify
4306 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4307 * mappings are supported.
4310 pmap_is_modified_pvh(struct md_page *pvh)
4317 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4320 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4323 pte = pmap_pte_quick(pmap, pv->pv_va);
4324 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4334 * pmap_is_prefaultable:
4336 * Return whether or not the specified virtual address is elgible
4340 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4348 pde = pmap_pde(pmap, addr);
4349 if (*pde != 0 && (*pde & PG_PS) == 0) {
4358 * Clear the write and modified bits in each of the given page's mappings.
4361 pmap_remove_write(vm_page_t m)
4363 struct md_page *pvh;
4364 pv_entry_t next_pv, pv;
4367 pt_entry_t oldpte, *pte;
4370 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4371 if ((m->flags & PG_FICTITIOUS) != 0 ||
4372 (m->flags & PG_WRITEABLE) == 0)
4375 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4376 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4380 pde = pmap_pde(pmap, va);
4381 if ((*pde & PG_RW) != 0)
4382 (void)pmap_demote_pde(pmap, pde, va);
4385 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4388 pde = pmap_pde(pmap, pv->pv_va);
4389 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4390 " a 4mpage in page %p's pv list", m));
4391 pte = pmap_pte_quick(pmap, pv->pv_va);
4394 if ((oldpte & PG_RW) != 0) {
4396 * Regardless of whether a pte is 32 or 64 bits
4397 * in size, PG_RW and PG_M are among the least
4398 * significant 32 bits.
4400 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4401 oldpte & ~(PG_RW | PG_M)))
4403 if ((oldpte & PG_M) != 0)
4405 pmap_invalidate_page(pmap, pv->pv_va);
4409 vm_page_flag_clear(m, PG_WRITEABLE);
4414 * pmap_ts_referenced:
4416 * Return a count of reference bits for a page, clearing those bits.
4417 * It is not necessary for every reference bit to be cleared, but it
4418 * is necessary that 0 only be returned when there are truly no
4419 * reference bits set.
4421 * XXX: The exact number of bits to check and clear is a matter that
4422 * should be tested and standardized at some point in the future for
4423 * optimal aging of shared pages.
4426 pmap_ts_referenced(vm_page_t m)
4428 struct md_page *pvh;
4429 pv_entry_t pv, pvf, pvn;
4431 pd_entry_t oldpde, *pde;
4436 if (m->flags & PG_FICTITIOUS)
4439 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4440 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4441 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4445 pde = pmap_pde(pmap, va);
4447 if ((oldpde & PG_A) != 0) {
4448 if (pmap_demote_pde(pmap, pde, va)) {
4449 if ((oldpde & PG_W) == 0) {
4451 * Remove the mapping to a single page
4452 * so that a subsequent access may
4453 * repromote. Since the underlying
4454 * page table page is fully populated,
4455 * this removal never frees a page
4458 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4460 pmap_remove_page(pmap, va, NULL);
4471 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4474 pvn = TAILQ_NEXT(pv, pv_list);
4475 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4476 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4479 pde = pmap_pde(pmap, pv->pv_va);
4480 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4481 " found a 4mpage in page %p's pv list", m));
4482 pte = pmap_pte_quick(pmap, pv->pv_va);
4483 if ((*pte & PG_A) != 0) {
4484 atomic_clear_int((u_int *)pte, PG_A);
4485 pmap_invalidate_page(pmap, pv->pv_va);
4491 } while ((pv = pvn) != NULL && pv != pvf);
4499 * Clear the modify bits on the specified physical page.
4502 pmap_clear_modify(vm_page_t m)
4504 struct md_page *pvh;
4505 pv_entry_t next_pv, pv;
4507 pd_entry_t oldpde, *pde;
4508 pt_entry_t oldpte, *pte;
4511 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4512 if ((m->flags & PG_FICTITIOUS) != 0)
4515 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4516 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4520 pde = pmap_pde(pmap, va);
4522 if ((oldpde & PG_RW) != 0) {
4523 if (pmap_demote_pde(pmap, pde, va)) {
4524 if ((oldpde & PG_W) == 0) {
4526 * Write protect the mapping to a
4527 * single page so that a subsequent
4528 * write access may repromote.
4530 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4532 pte = pmap_pte_quick(pmap, va);
4534 if ((oldpte & PG_V) != 0) {
4536 * Regardless of whether a pte is 32 or 64 bits
4537 * in size, PG_RW and PG_M are among the least
4538 * significant 32 bits.
4540 while (!atomic_cmpset_int((u_int *)pte,
4542 oldpte & ~(PG_M | PG_RW)))
4545 pmap_invalidate_page(pmap, va);
4552 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4555 pde = pmap_pde(pmap, pv->pv_va);
4556 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4557 " a 4mpage in page %p's pv list", m));
4558 pte = pmap_pte_quick(pmap, pv->pv_va);
4559 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4561 * Regardless of whether a pte is 32 or 64 bits
4562 * in size, PG_M is among the least significant
4565 atomic_clear_int((u_int *)pte, PG_M);
4566 pmap_invalidate_page(pmap, pv->pv_va);
4574 * pmap_clear_reference:
4576 * Clear the reference bit on the specified physical page.
4579 pmap_clear_reference(vm_page_t m)
4581 struct md_page *pvh;
4582 pv_entry_t next_pv, pv;
4584 pd_entry_t oldpde, *pde;
4588 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4589 if ((m->flags & PG_FICTITIOUS) != 0)
4592 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4593 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4597 pde = pmap_pde(pmap, va);
4599 if ((oldpde & PG_A) != 0) {
4600 if (pmap_demote_pde(pmap, pde, va)) {
4602 * Remove the mapping to a single page so
4603 * that a subsequent access may repromote.
4604 * Since the underlying page table page is
4605 * fully populated, this removal never frees
4606 * a page table page.
4608 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4610 pmap_remove_page(pmap, va, NULL);
4615 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4618 pde = pmap_pde(pmap, pv->pv_va);
4619 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4620 " a 4mpage in page %p's pv list", m));
4621 pte = pmap_pte_quick(pmap, pv->pv_va);
4622 if ((*pte & PG_A) != 0) {
4624 * Regardless of whether a pte is 32 or 64 bits
4625 * in size, PG_A is among the least significant
4628 atomic_clear_int((u_int *)pte, PG_A);
4629 pmap_invalidate_page(pmap, pv->pv_va);
4637 * Miscellaneous support routines follow
4640 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
4641 static __inline void
4642 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
4647 * The cache mode bits are all in the low 32-bits of the
4648 * PTE, so we can just spin on updating the low 32-bits.
4651 opte = *(u_int *)pte;
4652 npte = opte & ~PG_PTE_CACHE;
4654 } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
4657 /* Adjust the cache mode for a 2/4MB page mapped via a PDE. */
4658 static __inline void
4659 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
4664 * The cache mode bits are all in the low 32-bits of the
4665 * PDE, so we can just spin on updating the low 32-bits.
4668 opde = *(u_int *)pde;
4669 npde = opde & ~PG_PDE_CACHE;
4671 } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
4675 * Map a set of physical memory pages into the kernel virtual
4676 * address space. Return a pointer to where it is mapped. This
4677 * routine is intended to be used for mapping device memory,
4681 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4683 vm_offset_t va, offset;
4686 offset = pa & PAGE_MASK;
4687 size = roundup(offset + size, PAGE_SIZE);
4690 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4693 va = kmem_alloc_nofault(kernel_map, size);
4695 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4697 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4698 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4699 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4700 pmap_invalidate_cache_range(va, va + size);
4701 return ((void *)(va + offset));
4705 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4708 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4712 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4715 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4719 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4721 vm_offset_t base, offset, tmpva;
4723 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4725 base = trunc_page(va);
4726 offset = va & PAGE_MASK;
4727 size = roundup(offset + size, PAGE_SIZE);
4728 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4729 pmap_kremove(tmpva);
4730 pmap_invalidate_range(kernel_pmap, va, tmpva);
4731 kmem_free(kernel_map, base, size);
4735 * Sets the memory attribute for the specified page.
4738 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4740 struct sysmaps *sysmaps;
4741 vm_offset_t sva, eva;
4743 m->md.pat_mode = ma;
4744 if ((m->flags & PG_FICTITIOUS) != 0)
4748 * If "m" is a normal page, flush it from the cache.
4749 * See pmap_invalidate_cache_range().
4751 * First, try to find an existing mapping of the page by sf
4752 * buffer. sf_buf_invalidate_cache() modifies mapping and
4753 * flushes the cache.
4755 if (sf_buf_invalidate_cache(m))
4759 * If page is not mapped by sf buffer, but CPU does not
4760 * support self snoop, map the page transient and do
4761 * invalidation. In the worst case, whole cache is flushed by
4762 * pmap_invalidate_cache_range().
4764 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
4765 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4766 mtx_lock(&sysmaps->lock);
4767 if (*sysmaps->CMAP2)
4768 panic("pmap_page_set_memattr: CMAP2 busy");
4770 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4771 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4772 invlcaddr(sysmaps->CADDR2);
4773 sva = (vm_offset_t)sysmaps->CADDR2;
4774 eva = sva + PAGE_SIZE;
4776 sva = eva = 0; /* gcc */
4777 pmap_invalidate_cache_range(sva, eva);
4779 *sysmaps->CMAP2 = 0;
4781 mtx_unlock(&sysmaps->lock);
4786 * Changes the specified virtual address range's memory type to that given by
4787 * the parameter "mode". The specified virtual address range must be
4788 * completely contained within either the kernel map.
4790 * Returns zero if the change completed successfully, and either EINVAL or
4791 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4792 * of the virtual address range was not mapped, and ENOMEM is returned if
4793 * there was insufficient memory available to complete the change.
4796 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4798 vm_offset_t base, offset, tmpva;
4801 int cache_bits_pte, cache_bits_pde;
4804 base = trunc_page(va);
4805 offset = va & PAGE_MASK;
4806 size = roundup(offset + size, PAGE_SIZE);
4809 * Only supported on kernel virtual addresses above the recursive map.
4811 if (base < VM_MIN_KERNEL_ADDRESS)
4814 cache_bits_pde = pmap_cache_bits(mode, 1);
4815 cache_bits_pte = pmap_cache_bits(mode, 0);
4819 * Pages that aren't mapped aren't supported. Also break down
4820 * 2/4MB pages into 4KB pages if required.
4822 PMAP_LOCK(kernel_pmap);
4823 for (tmpva = base; tmpva < base + size; ) {
4824 pde = pmap_pde(kernel_pmap, tmpva);
4826 PMAP_UNLOCK(kernel_pmap);
4831 * If the current 2/4MB page already has
4832 * the required memory type, then we need not
4833 * demote this page. Just increment tmpva to
4834 * the next 2/4MB page frame.
4836 if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
4837 tmpva = trunc_4mpage(tmpva) + NBPDR;
4842 * If the current offset aligns with a 2/4MB
4843 * page frame and there is at least 2/4MB left
4844 * within the range, then we need not break
4845 * down this page into 4KB pages.
4847 if ((tmpva & PDRMASK) == 0 &&
4848 tmpva + PDRMASK < base + size) {
4852 if (!pmap_demote_pde(kernel_pmap, pde, tmpva)) {
4853 PMAP_UNLOCK(kernel_pmap);
4857 pte = vtopte(tmpva);
4859 PMAP_UNLOCK(kernel_pmap);
4864 PMAP_UNLOCK(kernel_pmap);
4867 * Ok, all the pages exist, so run through them updating their
4868 * cache mode if required.
4870 for (tmpva = base; tmpva < base + size; ) {
4871 pde = pmap_pde(kernel_pmap, tmpva);
4873 if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
4874 pmap_pde_attr(pde, cache_bits_pde);
4877 tmpva = trunc_4mpage(tmpva) + NBPDR;
4879 pte = vtopte(tmpva);
4880 if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
4881 pmap_pte_attr(pte, cache_bits_pte);
4889 * Flush CPU caches to make sure any data isn't cached that
4890 * shouldn't be, etc.
4893 pmap_invalidate_range(kernel_pmap, base, tmpva);
4894 pmap_invalidate_cache_range(base, tmpva);
4900 * perform the pmap work for mincore
4903 pmap_mincore(pmap_t pmap, vm_offset_t addr)
4906 pt_entry_t *ptep, pte;
4912 pdep = pmap_pde(pmap, addr);
4914 if (*pdep & PG_PS) {
4916 val = MINCORE_SUPER;
4917 /* Compute the physical address of the 4KB page. */
4918 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
4921 ptep = pmap_pte(pmap, addr);
4923 pmap_pte_release(ptep);
4924 pa = pte & PG_FRAME;
4933 val |= MINCORE_INCORE;
4934 if ((pte & PG_MANAGED) == 0)
4937 m = PHYS_TO_VM_PAGE(pa);
4942 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4943 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
4946 * Modified by someone else
4948 vm_page_lock_queues();
4949 if (m->dirty || pmap_is_modified(m))
4950 val |= MINCORE_MODIFIED_OTHER;
4951 vm_page_unlock_queues();
4957 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
4960 * Referenced by someone else
4962 vm_page_lock_queues();
4963 if ((m->flags & PG_REFERENCED) ||
4964 pmap_ts_referenced(m)) {
4965 val |= MINCORE_REFERENCED_OTHER;
4966 vm_page_flag_set(m, PG_REFERENCED);
4968 vm_page_unlock_queues();
4975 pmap_activate(struct thread *td)
4977 pmap_t pmap, oldpmap;
4981 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4982 oldpmap = PCPU_GET(curpmap);
4984 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
4985 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
4987 oldpmap->pm_active &= ~1;
4988 pmap->pm_active |= 1;
4991 cr3 = vtophys(pmap->pm_pdpt);
4993 cr3 = vtophys(pmap->pm_pdir);
4996 * pmap_activate is for the current thread on the current cpu
4998 td->td_pcb->pcb_cr3 = cr3;
5000 PCPU_SET(curpmap, pmap);
5005 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
5010 * Increase the starting virtual address of the given mapping if a
5011 * different alignment might result in more superpage mappings.
5014 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5015 vm_offset_t *addr, vm_size_t size)
5017 vm_offset_t superpage_offset;
5021 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
5022 offset += ptoa(object->pg_color);
5023 superpage_offset = offset & PDRMASK;
5024 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
5025 (*addr & PDRMASK) == superpage_offset)
5027 if ((*addr & PDRMASK) < superpage_offset)
5028 *addr = (*addr & ~PDRMASK) + superpage_offset;
5030 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
5034 #if defined(PMAP_DEBUG)
5035 pmap_pid_dump(int pid)
5042 sx_slock(&allproc_lock);
5043 FOREACH_PROC_IN_SYSTEM(p) {
5044 if (p->p_pid != pid)
5050 pmap = vmspace_pmap(p->p_vmspace);
5051 for (i = 0; i < NPDEPTD; i++) {
5054 vm_offset_t base = i << PDRSHIFT;
5056 pde = &pmap->pm_pdir[i];
5057 if (pde && pmap_pde_v(pde)) {
5058 for (j = 0; j < NPTEPG; j++) {
5059 vm_offset_t va = base + (j << PAGE_SHIFT);
5060 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
5065 sx_sunlock(&allproc_lock);
5068 pte = pmap_pte(pmap, va);
5069 if (pte && pmap_pte_v(pte)) {
5073 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
5074 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
5075 va, pa, m->hold_count, m->wire_count, m->flags);
5090 sx_sunlock(&allproc_lock);
5097 static void pads(pmap_t pm);
5098 void pmap_pvdump(vm_offset_t pa);
5100 /* print address space of pmap*/
5108 if (pm == kernel_pmap)
5110 for (i = 0; i < NPDEPTD; i++)
5112 for (j = 0; j < NPTEPG; j++) {
5113 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
5114 if (pm == kernel_pmap && va < KERNBASE)
5116 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
5118 ptep = pmap_pte(pm, va);
5119 if (pmap_pte_v(ptep))
5120 printf("%x:%x ", va, *ptep);
5126 pmap_pvdump(vm_paddr_t pa)
5132 printf("pa %x", pa);
5133 m = PHYS_TO_VM_PAGE(pa);
5134 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
5136 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);