2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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36 #include "opt_sched.h"
38 #include <machine/asmacros.h>
42 #if defined(SMP) && defined(SCHED_ULE)
44 #define BLOCK_SPIN(reg) \
45 movl $blocked_lock,%eax ; \
48 cmpxchgl %eax,TD_LOCK(reg) ; \
55 #define BLOCK_SPIN(reg)
58 /*****************************************************************************/
60 /*****************************************************************************/
67 * This is the second half of cpu_switch(). It is used when the current
68 * thread is either a dummy or slated to die, and we no longer care
69 * about its state. This is only a slight optimization and is probably
70 * not worth it anymore. Note that we need to clear the pm_active bits so
71 * we do need the old proc if it still exists.
77 movl PCPU(CPUID), %esi
78 movl 4(%esp),%ecx /* Old thread */
79 testl %ecx,%ecx /* no thread? */
81 /* release bit from old pm_active */
82 movl PCPU(CURPMAP), %ebx
86 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
88 movl 8(%esp),%ecx /* New thread */
89 movl TD_PCB(%ecx),%edx
90 movl PCB_CR3(%edx),%eax
92 /* set bit in new pm_active */
93 movl TD_PROC(%ecx),%eax
94 movl P_VMSPACE(%eax), %ebx
96 movl %ebx, PCPU(CURPMAP)
100 btsl %esi, PM_ACTIVE(%ebx) /* set new */
105 * cpu_switch(old, new)
107 * Save the current thread state, then select the next thread to run
108 * and load its state.
116 /* Switch to new thread. First, save context. */
120 testl %ecx,%ecx /* no thread? */
121 jz badsw2 /* no, panic */
124 movl TD_PCB(%ecx),%edx
126 movl (%esp),%eax /* Hardware registers */
127 movl %eax,PCB_EIP(%edx)
128 movl %ebx,PCB_EBX(%edx)
129 movl %esp,PCB_ESP(%edx)
130 movl %ebp,PCB_EBP(%edx)
131 movl %esi,PCB_ESI(%edx)
132 movl %edi,PCB_EDI(%edx)
136 /* Test if debug registers should be saved. */
137 testl $PCB_DBREGS,PCB_FLAGS(%edx)
138 jz 1f /* no, skip over */
139 movl %dr7,%eax /* yes, do the save */
140 movl %eax,PCB_DR7(%edx)
141 andl $0x0000fc00, %eax /* disable all watchpoints */
144 movl %eax,PCB_DR6(%edx)
146 movl %eax,PCB_DR3(%edx)
148 movl %eax,PCB_DR2(%edx)
150 movl %eax,PCB_DR1(%edx)
152 movl %eax,PCB_DR0(%edx)
156 /* have we used fp, and need a save? */
157 cmpl %ecx,PCPU(FPCURTHREAD)
159 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
161 call npxsave /* do it in a big C function */
166 /* Save is done. Now fire up new thread. Leave old vmspace. */
168 movl 8(%esp),%ecx /* New thread */
169 movl 12(%esp),%esi /* New lock */
171 testl %ecx,%ecx /* no thread? */
172 jz badsw3 /* no, panic */
174 movl TD_PCB(%ecx),%edx
176 /* switch address space */
177 movl PCB_CR3(%edx),%eax
179 cmpl %eax,IdlePDPT /* Kernel address space? */
181 cmpl %eax,IdlePTD /* Kernel address space? */
184 READ_CR3(%ebx) /* The same address space? */
187 LOAD_CR3(%eax) /* new address space */
189 movl PCPU(CPUID),%esi
190 SETOP %eax,TD_LOCK(%edi) /* Switchout td_lock */
192 /* Release bit from old pmap->pm_active */
193 movl PCPU(CURPMAP), %ebx
197 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
199 /* Set bit in new pmap->pm_active */
200 movl TD_PROC(%ecx),%eax /* newproc */
201 movl P_VMSPACE(%eax), %ebx
203 movl %ebx, PCPU(CURPMAP)
207 btsl %esi, PM_ACTIVE(%ebx) /* set new */
211 SETOP %esi,TD_LOCK(%edi) /* Switchout td_lock */
218 call xen_handle_thread_switch
227 * At this point, we've switched address spaces and are ready
228 * to load up the rest of the next context.
230 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
231 je 1f /* If not, use the default */
232 movl $1, PCPU(PRIVATE_TSS) /* mark use of private tss */
233 movl PCB_EXT(%edx), %edi /* new tss descriptor */
234 jmp 2f /* Load it up */
237 * Use the common default TSS instead of our own.
238 * Set our stack pointer into the TSS, it's set to just
239 * below the PCB. In C, common_tss.tss_esp0 = &pcb - 16;
241 leal -16(%edx), %ebx /* leave space for vm86 */
242 movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0
245 * Test this CPU's bit in the bitmap to see if this
246 * CPU was using a private TSS.
248 cmpl $0, PCPU(PRIVATE_TSS) /* Already using the common? */
249 je 3f /* if so, skip reloading */
250 movl $0, PCPU(PRIVATE_TSS)
251 PCPU_ADDR(COMMON_TSSD, %edi)
253 /* Move correct tss descriptor into GDT slot, then reload tr. */
254 movl PCPU(TSS_GDT), %ebx /* entry in GDT */
259 movl $GPROC0_SEL*8, %esi /* GSEL(GPROC0_SEL, SEL_KPL) */
263 /* Copy the %fs and %gs selectors into this pcpu gdt */
264 leal PCB_FSD(%edx), %esi
265 movl PCPU(FSGS_GDT), %edi
266 movl 0(%esi), %eax /* %fs selector */
270 movl 8(%esi), %eax /* %gs selector, comes straight after */
275 /* Restore context. */
276 movl PCB_EBX(%edx),%ebx
277 movl PCB_ESP(%edx),%esp
278 movl PCB_EBP(%edx),%ebp
279 movl PCB_ESI(%edx),%esi
280 movl PCB_EDI(%edx),%edi
281 movl PCB_EIP(%edx),%eax
286 movl %edx, PCPU(CURPCB)
287 movl TD_TID(%ecx),%eax
288 movl %ecx, PCPU(CURTHREAD) /* into next thread */
291 * Determine the LDT to use and load it if is the default one and
292 * that is not the current one.
294 movl TD_PROC(%ecx),%eax
295 cmpl $0,P_MD+MD_LDT(%eax)
297 movl _default_ldt,%eax
298 cmpl PCPU(CURRENTLDT),%eax
301 movl %eax,PCPU(CURRENTLDT)
304 /* Load the LDT when it is not the default one. */
305 pushl %edx /* Preserve pointer to pcb. */
306 addl $P_MD,%eax /* Pointer to mdproc is arg. */
313 /* This must be done after loading the user LDT. */
314 .globl cpu_switch_load_gs
318 /* Test if debug registers should be restored. */
319 testl $PCB_DBREGS,PCB_FLAGS(%edx)
323 * Restore debug registers. The special code for dr7 is to
324 * preserve the current values of its reserved bits.
326 movl PCB_DR6(%edx),%eax
328 movl PCB_DR3(%edx),%eax
330 movl PCB_DR2(%edx),%eax
332 movl PCB_DR1(%edx),%eax
334 movl PCB_DR0(%edx),%eax
337 andl $0x0000fc00,%eax
338 movl PCB_DR7(%edx),%ecx
339 andl $~0x0000fc00,%ecx
350 sw0_1: .asciz "cpu_throw: no newthread supplied"
356 sw0_2: .asciz "cpu_switch: no curthread supplied"
362 sw0_3: .asciz "cpu_switch: no newthread supplied"
368 * Update pcb, saving current processor state.
374 /* Save caller's return address. Child won't execute this routine. */
376 movl %eax,PCB_EIP(%ecx)
379 movl %eax,PCB_CR3(%ecx)
381 movl %ebx,PCB_EBX(%ecx)
382 movl %esp,PCB_ESP(%ecx)
383 movl %ebp,PCB_EBP(%ecx)
384 movl %esi,PCB_ESI(%ecx)
385 movl %edi,PCB_EDI(%ecx)
392 * If fpcurthread == NULL, then the npx h/w state is irrelevant and the
393 * state had better already be in the pcb. This is true for forks
394 * but not for dumps (the old book-keeping with FP flags in the pcb
395 * always lost for dumps because the dump pcb has 0 flags).
397 * If fpcurthread != NULL, then we have to save the npx h/w state to
398 * fpcurthread's pcb and copy it to the requested pcb, or save to the
399 * requested pcb and reload. Copying is easier because we would
400 * have to handle h/w bugs for reloading. We used to lose the
401 * parent's npx state for forks by forgetting to reload.
405 movl PCPU(FPCURTHREAD),%eax
410 movl TD_PCB(%eax),%eax
411 leal PCB_SAVEFPU(%eax),%eax
419 pushl $PCB_SAVEFPU_SIZE
420 leal PCB_SAVEFPU(%ecx),%ecx