2 * Copyright (c) 1999, 2000 Matthew R. Green
3 * Copyright (c) 2001-2003 Thomas Moestl
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Copyright (c) 1998 The NetBSD Foundation, Inc.
31 * All rights reserved.
33 * This code is derived from software contributed to The NetBSD Foundation
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the NetBSD
47 * Foundation, Inc. and its contributors.
48 * 4. Neither the name of The NetBSD Foundation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 * POSSIBILITY OF SUCH DAMAGE.
65 * Copyright (c) 1992, 1993
66 * The Regents of the University of California. All rights reserved.
68 * This software was developed by the Computer Systems Engineering group
69 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
70 * contributed to Berkeley.
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright
78 * notice, this list of conditions and the following disclaimer in the
79 * documentation and/or other materials provided with the distribution.
80 * 4. Neither the name of the University nor the names of its contributors
81 * may be used to endorse or promote products derived from this software
82 * without specific prior written permission.
84 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
85 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
87 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
90 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
96 * from: NetBSD: sbus.c,v 1.13 1999/05/23 07:24:02 mrg Exp
97 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93
98 * from: NetBSD: iommu.c,v 1.42 2001/08/06 22:02:58 eeh Exp
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD$");
105 * UltraSPARC IOMMU support; used by both the PCI and SBus code.
108 * - Support sub-page boundaries.
109 * - Fix alignment handling for small allocations (the possible page offset
110 * of malloc()ed memory is not handled at all). Revise interaction of
111 * alignment with the load_mbuf and load_uio functions.
112 * - Handle lowaddr and highaddr in some way, and try to work out a way
113 * for filter callbacks to work. Currently, only lowaddr is honored
114 * in that no addresses above it are considered at all.
115 * - Implement BUS_DMA_ALLOCNOW in bus_dma_tag_create as far as possible.
116 * - Check the possible return values and callback error arguments;
117 * the callback currently gets called in error conditions where it should
119 * - When running out of DVMA space, return EINPROGRESS in the non-
120 * BUS_DMA_NOWAIT case and delay the callback until sufficient space
122 * - Use the streaming cache unless BUS_DMA_COHERENT is specified.
125 #include "opt_iommu.h"
127 #include <sys/param.h>
128 #include <sys/kernel.h>
129 #include <sys/lock.h>
130 #include <sys/malloc.h>
131 #include <sys/mbuf.h>
132 #include <sys/mutex.h>
133 #include <sys/pcpu.h>
134 #include <sys/proc.h>
135 #include <sys/systm.h>
140 #include <vm/vm_map.h>
142 #include <machine/asi.h>
143 #include <machine/bus.h>
144 #include <machine/bus_private.h>
145 #include <machine/iommureg.h>
146 #include <machine/pmap.h>
147 #include <machine/resource.h>
148 #include <machine/ver.h>
150 #include <sys/rman.h>
152 #include <machine/iommuvar.h>
157 #define IOMMU_MAX_PRE (32 * 1024)
158 #define IOMMU_MAX_PRE_SEG 3
160 /* Threshold for using the streaming buffer */
161 #define IOMMU_STREAM_THRESH 128
163 MALLOC_DEFINE(M_IOMMU, "dvmamem", "IOMMU DVMA Buffers");
165 static int iommu_strbuf_flush_sync(struct iommu_state *);
167 static void iommu_diag(struct iommu_state *, vm_offset_t va);
173 #define IOMMU_READ8(is, reg, off) \
174 bus_space_read_8((is)->is_bustag, (is)->is_bushandle, \
176 #define IOMMU_WRITE8(is, reg, off, v) \
177 bus_space_write_8((is)->is_bustag, (is)->is_bushandle, \
178 (is)->reg + (off), (v))
180 #define IOMMU_HAS_SB(is) \
181 ((is)->is_sb[0] != 0 || (is)->is_sb[1] != 0)
184 * Always overallocate one page; this is needed to handle alignment of the
185 * buffer, so it makes sense using a lazy allocation scheme.
187 #define IOMMU_SIZE_ROUNDUP(sz) \
188 (round_io_page(sz) + IO_PAGE_SIZE)
190 #define IOMMU_SET_TTE(is, va, tte) \
191 ((is)->is_tsb[IOTSBSLOT(va)] = (tte))
192 #define IOMMU_GET_TTE(is, va) \
193 (is)->is_tsb[IOTSBSLOT(va)]
195 /* Resource helpers */
196 #define IOMMU_RES_START(res) \
197 ((bus_addr_t)rman_get_start(res) << IO_PAGE_SHIFT)
198 #define IOMMU_RES_END(res) \
199 ((bus_addr_t)(rman_get_end(res) + 1) << IO_PAGE_SHIFT)
200 #define IOMMU_RES_SIZE(res) \
201 ((bus_size_t)rman_get_size(res) << IO_PAGE_SHIFT)
203 /* Helpers for struct bus_dmamap_res */
204 #define BDR_START(r) IOMMU_RES_START((r)->dr_res)
205 #define BDR_END(r) IOMMU_RES_END((r)->dr_res)
206 #define BDR_SIZE(r) IOMMU_RES_SIZE((r)->dr_res)
209 #define IS_LOCK(is) mtx_lock(&is->is_mtx)
210 #define IS_LOCK_ASSERT(is) mtx_assert(&is->is_mtx, MA_OWNED)
211 #define IS_UNLOCK(is) mtx_unlock(&is->is_mtx)
213 /* Flush a page from the TLB. No locking required, since this is atomic. */
215 iommu_tlb_flush(struct iommu_state *is, bus_addr_t va)
218 if ((is->is_flags & IOMMU_FIRE) != 0)
220 * Direct page flushing is not supported and also not
221 * necessary due to cache snooping.
224 IOMMU_WRITE8(is, is_iommu, IMR_FLUSH, va);
228 * Flush a page from the streaming buffer. No locking required, since this
232 iommu_strbuf_flushpg(struct iommu_state *is, bus_addr_t va)
236 for (i = 0; i < 2; i++)
237 if (is->is_sb[i] != 0)
238 IOMMU_WRITE8(is, is_sb[i], ISR_PGFLUSH, va);
242 * Flush an address from the streaming buffer(s); this is an asynchronous
243 * operation. To make sure that it has completed, iommu_strbuf_sync() needs
244 * to be called. No locking required.
247 iommu_strbuf_flush(struct iommu_state *is, bus_addr_t va)
250 iommu_strbuf_flushpg(is, va);
253 /* Synchronize all outstanding flush operations. */
255 iommu_strbuf_sync(struct iommu_state *is)
259 iommu_strbuf_flush_sync(is);
262 /* LRU queue handling for lazy resource allocation. */
264 iommu_map_insq(struct iommu_state *is, bus_dmamap_t map)
268 if (!SLIST_EMPTY(&map->dm_reslist)) {
270 TAILQ_REMOVE(&is->is_maplruq, map, dm_maplruq);
271 TAILQ_INSERT_TAIL(&is->is_maplruq, map, dm_maplruq);
277 iommu_map_remq(struct iommu_state *is, bus_dmamap_t map)
282 TAILQ_REMOVE(&is->is_maplruq, map, dm_maplruq);
287 * initialise the UltraSPARC IOMMU (PCI or SBus):
288 * - allocate and setup the iotsb.
290 * - initialise the streaming buffers (if they exist)
291 * - create a private DVMA map.
294 iommu_init(const char *name, struct iommu_state *is, u_int tsbsize,
295 uint32_t iovabase, u_int resvpg)
299 uint64_t end, obpmap, obpptsb, tte;
300 u_int maxtsbsize, obptsbentries, obptsbsize, slot, tsbentries;
306 * The sun4u IOMMU is part of the PCI or SBus controller so we
307 * will deal with it here..
309 * The IOMMU address space always ends at 0xffffe000, but the starting
310 * address depends on the size of the map. The map size is 1024 * 2 ^
311 * is->is_tsbsize entries, where each entry is 8 bytes. The start of
312 * the map can be calculated by (0xffffe000 << (8 + is->is_tsbsize)).
314 if ((is->is_flags & IOMMU_FIRE) != 0) {
315 maxtsbsize = IOMMU_TSB512K;
317 * We enable bypass in order to be able to use a physical
318 * address for the event queue base.
320 is->is_cr = IOMMUCR_SE | IOMMUCR_CM_C_TLB_TBW | IOMMUCR_BE;
322 maxtsbsize = IOMMU_TSB128K;
323 is->is_cr = (tsbsize << IOMMUCR_TSBSZ_SHIFT) | IOMMUCR_DE;
325 if (tsbsize > maxtsbsize)
326 panic("%s: unsupported TSB size ", __func__);
327 tsbentries = IOMMU_TSBENTRIES(tsbsize);
328 is->is_cr |= IOMMUCR_EN;
329 is->is_tsbsize = tsbsize;
330 is->is_dvmabase = iovabase;
332 is->is_dvmabase = IOTSB_VSTART(is->is_tsbsize);
334 size = IOTSB_BASESZ << is->is_tsbsize;
335 printf("%s: DVMA map: %#lx to %#lx %d entries%s\n", name,
336 is->is_dvmabase, is->is_dvmabase +
337 (size << (IO_PAGE_SHIFT - IOTTE_SHIFT)) - 1, tsbentries,
338 IOMMU_HAS_SB(is) ? ", streaming buffer" : "");
341 * Set up resource mamangement.
343 mtx_init(&is->is_mtx, "iommu", NULL, MTX_DEF);
344 end = is->is_dvmabase + (size << (IO_PAGE_SHIFT - IOTTE_SHIFT));
345 is->is_dvma_rman.rm_type = RMAN_ARRAY;
346 is->is_dvma_rman.rm_descr = "DVMA Memory";
347 if (rman_init(&is->is_dvma_rman) != 0 ||
348 rman_manage_region(&is->is_dvma_rman,
349 (is->is_dvmabase >> IO_PAGE_SHIFT) + resvpg,
350 (end >> IO_PAGE_SHIFT) - 1) != 0)
351 panic("%s: could not initialize DVMA rman", __func__);
352 TAILQ_INIT(&is->is_maplruq);
355 * Allocate memory for I/O page tables. They need to be
356 * physically contiguous.
358 is->is_tsb = contigmalloc(size, M_DEVBUF, M_NOWAIT, 0, ~0UL,
360 if (is->is_tsb == NULL)
361 panic("%s: contigmalloc failed", __func__);
362 is->is_ptsb = pmap_kextract((vm_offset_t)is->is_tsb);
363 bzero(is->is_tsb, size);
366 * Add the PROM mappings to the kernel IOTSB if desired.
367 * Note that the firmware of certain Darwin boards doesn't set
368 * the TSB size correctly.
370 if ((is->is_flags & IOMMU_FIRE) != 0)
371 obptsbsize = (IOMMU_READ8(is, is_iommu, IMR_TSB) &
372 IOMMUTB_TSBSZ_MASK) >> IOMMUTB_TSBSZ_SHIFT;
374 obptsbsize = (IOMMU_READ8(is, is_iommu, IMR_CTL) &
375 IOMMUCR_TSBSZ_MASK) >> IOMMUCR_TSBSZ_SHIFT;
376 obptsbentries = IOMMU_TSBENTRIES(obptsbsize);
378 printf("%s: PROM IOTSB size: %d (%d entries)\n", name,
379 obptsbsize, obptsbentries);
380 if ((is->is_flags & IOMMU_PRESERVE_PROM) != 0 &&
381 !(PCPU_GET(impl) == CPU_IMPL_ULTRASPARCIIi && obptsbsize == 7)) {
382 if (obptsbentries > tsbentries)
383 panic("%s: PROM IOTSB entries exceed kernel",
385 obpptsb = IOMMU_READ8(is, is_iommu, IMR_TSB) &
387 for (i = 0; i < obptsbentries; i++) {
388 tte = ldxa(obpptsb + i * 8, ASI_PHYS_USE_EC);
389 if ((tte & IOTTE_V) == 0)
391 slot = tsbentries - obptsbentries + i;
393 printf("%s: adding PROM IOTSB slot %d "
394 "(kernel slot %d) TTE: %#lx\n", name,
396 obpmap = (is->is_dvmabase + slot * IO_PAGE_SIZE) >>
398 if (rman_reserve_resource(&is->is_dvma_rman, obpmap,
399 obpmap, IO_PAGE_SIZE >> IO_PAGE_SHIFT, RF_ACTIVE,
401 panic("%s: could not reserve PROM IOTSB slot "
402 "%d (kernel slot %d)", __func__, i, slot);
403 is->is_tsb[slot] = tte;
408 * Initialize streaming buffer, if it is there.
410 if (IOMMU_HAS_SB(is)) {
412 * Find two 64-byte blocks in is_flush that are aligned on
413 * a 64-byte boundary for flushing.
415 offs = roundup2((vm_offset_t)is->is_flush,
416 STRBUF_FLUSHSYNC_NBYTES);
417 for (i = 0; i < 2; i++, offs += STRBUF_FLUSHSYNC_NBYTES) {
418 is->is_flushva[i] = (uint64_t *)offs;
419 is->is_flushpa[i] = pmap_kextract(offs);
424 * Now actually start up the IOMMU.
430 * Streaming buffers don't exist on the UltraSPARC IIi; we should have
431 * detected that already and disabled them. If not, we will notice that
432 * they aren't there when the STRBUF_EN bit does not remain.
435 iommu_reset(struct iommu_state *is)
441 if ((is->is_flags & IOMMU_FIRE) != 0) {
442 tsb |= is->is_tsbsize;
443 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_INVAL, ~0ULL);
445 IOMMU_WRITE8(is, is_iommu, IMR_TSB, tsb);
446 IOMMU_WRITE8(is, is_iommu, IMR_CTL, is->is_cr);
448 for (i = 0; i < 2; i++) {
449 if (is->is_sb[i] != 0) {
450 IOMMU_WRITE8(is, is_sb[i], ISR_CTL, STRBUF_EN |
451 ((is->is_flags & IOMMU_RERUN_DISABLE) != 0 ?
454 /* No streaming buffers? Disable them. */
455 if ((IOMMU_READ8(is, is_sb[i], ISR_CTL) &
461 (void)IOMMU_READ8(is, is_iommu, IMR_CTL);
465 * Enter a mapping into the TSB. No locking required, since each TSB slot is
466 * uniquely assigned to a single map.
469 iommu_enter(struct iommu_state *is, vm_offset_t va, vm_paddr_t pa,
470 int stream, int flags)
474 KASSERT(va >= is->is_dvmabase,
475 ("%s: va %#lx not in DVMA space", __func__, va));
476 KASSERT(pa <= is->is_pmaxaddr,
477 ("%s: XXX: physical address too large (%#lx)", __func__, pa));
479 tte = MAKEIOTTE(pa, !(flags & BUS_DMA_NOWRITE),
480 !(flags & BUS_DMA_NOCACHE), stream);
482 IOMMU_SET_TTE(is, va, tte);
483 iommu_tlb_flush(is, va);
492 * Remove mappings created by iommu_enter(). Flush the streaming buffer,
493 * but do not synchronize it. Returns whether a streaming buffer flush
497 iommu_remove(struct iommu_state *is, vm_offset_t va, vm_size_t len)
499 int slot, streamed = 0;
505 KASSERT(va >= is->is_dvmabase,
506 ("%s: va 0x%lx not in DVMA space", __func__, (u_long)va));
507 KASSERT(va + len >= va,
508 ("%s: va 0x%lx + len 0x%lx wraps", __func__, (long)va, (long)len));
510 va = trunc_io_page(va);
512 if ((IOMMU_GET_TTE(is, va) & IOTTE_STREAM) != 0) {
514 iommu_strbuf_flush(is, va);
516 len -= ulmin(len, IO_PAGE_SIZE);
517 IOMMU_SET_TTE(is, va, 0);
518 iommu_tlb_flush(is, va);
519 if ((is->is_flags & IOMMU_FLUSH_CACHE) != 0) {
520 slot = IOTSBSLOT(va);
521 if (len <= IO_PAGE_SIZE || slot % 8 == 7)
522 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_FLUSH,
523 is->is_ptsb + slot * 8);
530 /* Decode an IOMMU fault for host bridge error handlers. */
532 iommu_decode_fault(struct iommu_state *is, vm_offset_t phys)
537 idx = phys - is->is_ptsb;
538 if (phys < is->is_ptsb ||
539 idx > (PAGE_SIZE << is->is_tsbsize))
541 va = is->is_dvmabase +
542 (((bus_addr_t)idx >> IOTTE_SHIFT) << IO_PAGE_SHIFT);
543 printf("IOMMU fault virtual address %#lx\n", (u_long)va);
547 * A barrier operation which makes sure that all previous streaming buffer
548 * flushes complete before it returns.
551 iommu_strbuf_flush_sync(struct iommu_state *is)
553 struct timeval cur, end;
557 if (!IOMMU_HAS_SB(is))
561 * Streaming buffer flushes:
563 * 1 Tell strbuf to flush by storing va to strbuf_pgflush. If
564 * we're not on a cache line boundary (64-bits):
566 * 3 Store pointer to flag in flushsync
567 * 4 wait till flushsync becomes 0x1
569 * If it takes more than .5 sec, something went wrong.
571 *is->is_flushva[0] = 1;
572 *is->is_flushva[1] = 1;
574 for (i = 0; i < 2; i++) {
575 if (is->is_sb[i] != 0) {
576 *is->is_flushva[i] = 0;
577 IOMMU_WRITE8(is, is_sb[i], ISR_FLUSHSYNC,
585 * 0.5s is the recommended timeout from the U2S manual. The actual
586 * time required should be smaller by at least a factor of 1000.
587 * We have no choice but to busy-wait.
589 end.tv_usec = 500000;
590 timevaladd(&end, &cur);
592 while ((!*is->is_flushva[0] || !*is->is_flushva[1]) &&
593 timevalcmp(&cur, &end, <=))
596 if (!*is->is_flushva[0] || !*is->is_flushva[1]) {
597 panic("%s: flush timeout %ld, %ld at %#lx", __func__,
598 *is->is_flushva[0], *is->is_flushva[1], is->is_flushpa[0]);
604 /* Determine whether we may enable streaming on a mapping. */
606 iommu_use_streaming(struct iommu_state *is, bus_dmamap_t map, bus_size_t size)
610 * This cannot be enabled yet, as many driver are still missing
611 * bus_dmamap_sync() calls. As soon as there is a BUS_DMA_STREAMING
612 * flag, this should be reenabled conditionally on it.
615 return (size >= IOMMU_STREAM_THRESH && IOMMU_HAS_SB(is) &&
616 (map->dm_flags & DMF_COHERENT) == 0);
623 * Allocate DVMA virtual memory for a map. The map may not be on a queue,
624 * so that it can be freely modified.
627 iommu_dvma_valloc(bus_dma_tag_t t, struct iommu_state *is, bus_dmamap_t map,
630 struct resource *res;
631 struct bus_dmamap_res *bdr;
632 bus_size_t align, sgsize;
634 KASSERT(!map->dm_onq, ("%s: map on queue!", __func__));
635 if ((bdr = malloc(sizeof(*bdr), M_IOMMU, M_NOWAIT)) == NULL)
638 * If a boundary is specified, a map cannot be larger than it; however
639 * we do not clip currently, as that does not play well with the lazy
641 * Alignment to a page boundary is always enforced.
643 align = (t->dt_alignment + IO_PAGE_MASK) >> IO_PAGE_SHIFT;
644 sgsize = round_io_page(size) >> IO_PAGE_SHIFT;
645 if (t->dt_boundary > 0 && t->dt_boundary < IO_PAGE_SIZE)
646 panic("%s: illegal boundary specified", __func__);
647 res = rman_reserve_resource_bound(&is->is_dvma_rman, 0L,
648 t->dt_lowaddr >> IO_PAGE_SHIFT, sgsize,
649 t->dt_boundary >> IO_PAGE_SHIFT,
650 RF_ACTIVE | rman_make_alignment_flags(align), NULL);
658 SLIST_INSERT_HEAD(&map->dm_reslist, bdr, dr_link);
662 /* Unload the map and mark all resources as unused, but do not free them. */
664 iommu_dvmamap_vunload(struct iommu_state *is, bus_dmamap_t map)
666 struct bus_dmamap_res *r;
669 IS_LOCK_ASSERT(is); /* for iommu_strbuf_sync() below */
670 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
671 streamed |= iommu_remove(is, BDR_START(r), r->dr_used);
675 iommu_strbuf_sync(is);
678 /* Free a DVMA virtual memory resource. */
680 iommu_dvma_vfree_res(bus_dmamap_t map, struct bus_dmamap_res *r)
683 KASSERT(r->dr_used == 0, ("%s: resource busy!", __func__));
684 if (r->dr_res != NULL && rman_release_resource(r->dr_res) != 0)
685 printf("warning: DVMA space lost\n");
686 SLIST_REMOVE(&map->dm_reslist, r, bus_dmamap_res, dr_link);
690 /* Free all DVMA virtual memory for a map. */
692 iommu_dvma_vfree(struct iommu_state *is, bus_dmamap_t map)
696 iommu_map_remq(is, map);
697 iommu_dvmamap_vunload(is, map);
699 while (!SLIST_EMPTY(&map->dm_reslist))
700 iommu_dvma_vfree_res(map, SLIST_FIRST(&map->dm_reslist));
703 /* Prune a map, freeing all unused DVMA resources. */
705 iommu_dvma_vprune(struct iommu_state *is, bus_dmamap_t map)
707 struct bus_dmamap_res *r, *n;
708 bus_size_t freed = 0;
711 for (r = SLIST_FIRST(&map->dm_reslist); r != NULL; r = n) {
712 n = SLIST_NEXT(r, dr_link);
713 if (r->dr_used == 0) {
714 freed += BDR_SIZE(r);
715 iommu_dvma_vfree_res(map, r);
718 if (SLIST_EMPTY(&map->dm_reslist))
719 iommu_map_remq(is, map);
724 * Try to find a suitably-sized (and if requested, -aligned) slab of DVMA
725 * memory with IO page offset voffs.
728 iommu_dvma_vfindseg(bus_dmamap_t map, vm_offset_t voffs, bus_size_t size,
731 struct bus_dmamap_res *r;
732 bus_addr_t dvmaddr, dvmend;
734 KASSERT(!map->dm_onq, ("%s: map on queue!", __func__));
735 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
736 dvmaddr = round_io_page(BDR_START(r) + r->dr_used);
737 /* Alignment can only work with voffs == 0. */
738 dvmaddr = (dvmaddr + amask) & ~amask;
740 dvmend = dvmaddr + size;
741 if (dvmend <= BDR_END(r)) {
742 r->dr_used = dvmend - BDR_START(r);
750 * Try to find or allocate a slab of DVMA space; see above.
753 iommu_dvma_vallocseg(bus_dma_tag_t dt, struct iommu_state *is, bus_dmamap_t map,
754 vm_offset_t voffs, bus_size_t size, bus_addr_t amask, bus_addr_t *addr)
756 bus_dmamap_t tm, last;
757 bus_addr_t dvmaddr, freed;
758 int error, complete = 0;
760 dvmaddr = iommu_dvma_vfindseg(map, voffs, size, amask);
762 /* Need to allocate. */
764 while ((error = iommu_dvma_valloc(dt, is, map,
765 voffs + size)) == ENOMEM && !complete) {
767 * Free the allocated DVMA of a few maps until
768 * the required size is reached. This is an
769 * approximation to not have to call the allocation
770 * function too often; most likely one free run
771 * will not suffice if not one map was large enough
772 * itself due to fragmentation.
776 last = TAILQ_LAST(&is->is_maplruq, iommu_maplruq_head);
778 tm = TAILQ_FIRST(&is->is_maplruq);
779 complete = tm == last;
782 freed += iommu_dvma_vprune(is, tm);
783 /* Move to the end. */
784 iommu_map_insq(is, tm);
785 } while (freed < size && !complete);
790 dvmaddr = iommu_dvma_vfindseg(map, voffs, size, amask);
791 KASSERT(dvmaddr != 0, ("%s: allocation failed unexpectedly!",
799 iommu_dvmamem_alloc(bus_dma_tag_t dt, void **vaddr, int flags,
802 struct iommu_state *is = dt->dt_cookie;
806 * XXX: This will break for 32 bit transfers on machines with more
807 * than is->is_pmaxaddr memory.
809 if ((error = sparc64_dma_alloc_map(dt, mapp)) != 0)
812 if ((flags & BUS_DMA_NOWAIT) != 0)
816 if ((flags & BUS_DMA_ZERO) != 0)
819 if ((*vaddr = malloc(dt->dt_maxsize, M_IOMMU, mflags)) == NULL) {
821 sparc64_dma_free_map(dt, *mapp);
824 if ((flags & BUS_DMA_COHERENT) != 0)
825 (*mapp)->dm_flags |= DMF_COHERENT;
827 * Try to preallocate DVMA space. If this fails, it is retried at
830 iommu_dvma_valloc(dt, is, *mapp, IOMMU_SIZE_ROUNDUP(dt->dt_maxsize));
832 iommu_map_insq(is, *mapp);
838 iommu_dvmamem_free(bus_dma_tag_t dt, void *vaddr, bus_dmamap_t map)
840 struct iommu_state *is = dt->dt_cookie;
842 iommu_dvma_vfree(is, map);
843 sparc64_dma_free_map(dt, map);
844 free(vaddr, M_IOMMU);
848 iommu_dvmamap_create(bus_dma_tag_t dt, int flags, bus_dmamap_t *mapp)
850 struct iommu_state *is = dt->dt_cookie;
851 bus_size_t totsz, presz, currsz;
852 int error, i, maxpre;
854 if ((error = sparc64_dma_alloc_map(dt, mapp)) != 0)
856 if ((flags & BUS_DMA_COHERENT) != 0)
857 (*mapp)->dm_flags |= DMF_COHERENT;
859 * Preallocate DVMA space; if this fails now, it is retried at load
860 * time. Through bus_dmamap_load_mbuf() and bus_dmamap_load_uio(),
861 * it is possible to have multiple discontiguous segments in a single
862 * map, which is handled by allocating additional resources, instead
863 * of increasing the size, to avoid fragmentation.
864 * Clamp preallocation to IOMMU_MAX_PRE. In some situations we can
865 * handle more; that case is handled by reallocating at map load time.
867 totsz = ulmin(IOMMU_SIZE_ROUNDUP(dt->dt_maxsize), IOMMU_MAX_PRE);
868 error = iommu_dvma_valloc(dt, is, *mapp, totsz);
872 * Try to be smart about preallocating some additional segments if
875 maxpre = imin(dt->dt_nsegments, IOMMU_MAX_PRE_SEG);
876 presz = dt->dt_maxsize / maxpre;
877 KASSERT(presz != 0, ("%s: bogus preallocation size , nsegments = %d, "
878 "maxpre = %d, maxsize = %lu", __func__, dt->dt_nsegments, maxpre,
880 for (i = 1; i < maxpre && totsz < IOMMU_MAX_PRE; i++) {
881 currsz = round_io_page(ulmin(presz, IOMMU_MAX_PRE - totsz));
882 error = iommu_dvma_valloc(dt, is, *mapp, currsz);
888 iommu_map_insq(is, *mapp);
894 iommu_dvmamap_destroy(bus_dma_tag_t dt, bus_dmamap_t map)
896 struct iommu_state *is = dt->dt_cookie;
898 iommu_dvma_vfree(is, map);
899 sparc64_dma_free_map(dt, map);
904 * IOMMU DVMA operations, common to PCI and SBus
907 iommu_dvmamap_load_buffer(bus_dma_tag_t dt, struct iommu_state *is,
908 bus_dmamap_t map, void *buf, bus_size_t buflen, struct thread *td,
909 int flags, bus_dma_segment_t *segs, int *segp, int align)
911 bus_addr_t amask, dvmaddr, dvmoffs;
912 bus_size_t sgsize, esize;
913 vm_offset_t vaddr, voffs;
916 int error, firstpg, sgcnt;
919 KASSERT(buflen != 0, ("%s: buflen == 0!", __func__));
920 if (buflen > dt->dt_maxsize)
924 pmap = vmspace_pmap(td->td_proc->p_vmspace);
926 vaddr = (vm_offset_t)buf;
927 voffs = vaddr & IO_PAGE_MASK;
928 amask = align ? dt->dt_alignment - 1 : 0;
930 /* Try to find a slab that is large enough. */
931 error = iommu_dvma_vallocseg(dt, is, map, voffs, buflen, amask,
938 map->dm_flags &= ~DMF_STREAMED;
939 map->dm_flags |= iommu_use_streaming(is, map, buflen) != 0 ?
941 for (; buflen > 0; ) {
943 * Get the physical address for this page.
946 curaddr = pmap_extract(pmap, vaddr);
948 curaddr = pmap_kextract(vaddr);
951 * Compute the segment size, and adjust counts.
953 sgsize = IO_PAGE_SIZE - ((u_long)vaddr & IO_PAGE_MASK);
960 dvmoffs = trunc_io_page(dvmaddr);
961 iommu_enter(is, dvmoffs, trunc_io_page(curaddr),
962 (map->dm_flags & DMF_STREAMED) != 0, flags);
963 if ((is->is_flags & IOMMU_FLUSH_CACHE) != 0) {
964 slot = IOTSBSLOT(dvmoffs);
965 if (buflen <= 0 || slot % 8 == 7)
966 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_FLUSH,
967 is->is_ptsb + slot * 8);
971 * Chop the chunk up into segments of at most maxsegsz, but try
972 * to fill each segment as well as possible.
975 esize = ulmin(sgsize,
976 dt->dt_maxsegsz - segs[sgcnt].ds_len);
977 segs[sgcnt].ds_len += esize;
983 if (sgcnt >= dt->dt_nsegments)
986 * No extra alignment here - the common practice in
987 * the busdma code seems to be that only the first
988 * segment needs to satisfy the alignment constraints
989 * (and that only for bus_dmamem_alloc()ed maps).
990 * It is assumed that such tags have maxsegsize >=
993 esize = ulmin(sgsize, dt->dt_maxsegsz);
994 segs[sgcnt].ds_addr = dvmaddr;
995 segs[sgcnt].ds_len = esize;
1007 iommu_dvmamap_load(bus_dma_tag_t dt, bus_dmamap_t map, void *buf,
1008 bus_size_t buflen, bus_dmamap_callback_t *cb, void *cba,
1011 struct iommu_state *is = dt->dt_cookie;
1012 int error, seg = -1;
1014 if ((map->dm_flags & DMF_LOADED) != 0) {
1016 printf("%s: map still in use\n", __func__);
1018 bus_dmamap_unload(dt, map);
1022 * Make sure that the map is not on a queue so that the resource list
1023 * may be safely accessed and modified without needing the lock to
1024 * cover the whole operation.
1027 iommu_map_remq(is, map);
1030 error = iommu_dvmamap_load_buffer(dt, is, map, buf, buflen, NULL,
1031 flags, dt->dt_segments, &seg, 1);
1034 iommu_map_insq(is, map);
1036 iommu_dvmamap_vunload(is, map);
1038 (*cb)(cba, dt->dt_segments, 0, error);
1041 map->dm_flags |= DMF_LOADED;
1042 (*cb)(cba, dt->dt_segments, seg + 1, 0);
1049 iommu_dvmamap_load_mbuf(bus_dma_tag_t dt, bus_dmamap_t map, struct mbuf *m0,
1050 bus_dmamap_callback2_t *cb, void *cba, int flags)
1052 struct iommu_state *is = dt->dt_cookie;
1054 int error = 0, first = 1, nsegs = -1;
1058 if ((map->dm_flags & DMF_LOADED) != 0) {
1060 printf("%s: map still in use\n", __func__);
1062 bus_dmamap_unload(dt, map);
1066 iommu_map_remq(is, map);
1069 if (m0->m_pkthdr.len <= dt->dt_maxsize) {
1070 for (m = m0; m != NULL && error == 0; m = m->m_next) {
1073 error = iommu_dvmamap_load_buffer(dt, is, map,
1074 m->m_data, m->m_len, NULL, flags, dt->dt_segments,
1082 iommu_map_insq(is, map);
1084 iommu_dvmamap_vunload(is, map);
1086 /* force "no valid mappings" in callback */
1087 (*cb)(cba, dt->dt_segments, 0, 0, error);
1090 map->dm_flags |= DMF_LOADED;
1091 (*cb)(cba, dt->dt_segments, nsegs + 1, m0->m_pkthdr.len, 0);
1097 iommu_dvmamap_load_mbuf_sg(bus_dma_tag_t dt, bus_dmamap_t map, struct mbuf *m0,
1098 bus_dma_segment_t *segs, int *nsegs, int flags)
1100 struct iommu_state *is = dt->dt_cookie;
1102 int error = 0, first = 1;
1107 if ((map->dm_flags & DMF_LOADED) != 0) {
1109 printf("%s: map still in use\n", __func__);
1111 bus_dmamap_unload(dt, map);
1115 iommu_map_remq(is, map);
1118 if (m0->m_pkthdr.len <= dt->dt_maxsize) {
1119 for (m = m0; m != NULL && error == 0; m = m->m_next) {
1122 error = iommu_dvmamap_load_buffer(dt, is, map,
1123 m->m_data, m->m_len, NULL, flags, segs,
1131 iommu_map_insq(is, map);
1133 iommu_dvmamap_vunload(is, map);
1137 map->dm_flags |= DMF_LOADED;
1144 iommu_dvmamap_load_uio(bus_dma_tag_t dt, bus_dmamap_t map, struct uio *uio,
1145 bus_dmamap_callback2_t *cb, void *cba, int flags)
1147 struct iommu_state *is = dt->dt_cookie;
1149 struct thread *td = NULL;
1150 bus_size_t minlen, resid;
1151 int nsegs = -1, error = 0, first = 1, i;
1153 if ((map->dm_flags & DMF_LOADED) != 0) {
1155 printf("%s: map still in use\n", __func__);
1157 bus_dmamap_unload(dt, map);
1161 iommu_map_remq(is, map);
1164 resid = uio->uio_resid;
1167 if (uio->uio_segflg == UIO_USERSPACE) {
1170 ("%s: USERSPACE but no proc", __func__));
1173 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
1175 * Now at the first iovec to load. Load each iovec
1176 * until we have exhausted the residual count.
1178 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
1182 error = iommu_dvmamap_load_buffer(dt, is, map,
1183 iov[i].iov_base, minlen, td, flags, dt->dt_segments,
1191 iommu_map_insq(is, map);
1193 iommu_dvmamap_vunload(is, map);
1195 /* force "no valid mappings" in callback */
1196 (*cb)(cba, dt->dt_segments, 0, 0, error);
1199 map->dm_flags |= DMF_LOADED;
1200 (*cb)(cba, dt->dt_segments, nsegs + 1, uio->uio_resid, 0);
1206 iommu_dvmamap_unload(bus_dma_tag_t dt, bus_dmamap_t map)
1208 struct iommu_state *is = dt->dt_cookie;
1210 if ((map->dm_flags & DMF_LOADED) == 0)
1213 iommu_dvmamap_vunload(is, map);
1214 iommu_map_insq(is, map);
1216 map->dm_flags &= ~DMF_LOADED;
1220 iommu_dvmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, bus_dmasync_op_t op)
1222 struct iommu_state *is = dt->dt_cookie;
1223 struct bus_dmamap_res *r;
1228 if ((map->dm_flags & DMF_LOADED) == 0)
1230 /* XXX This is probably bogus. */
1231 if ((op & BUS_DMASYNC_PREREAD) != 0)
1233 if ((map->dm_flags & DMF_STREAMED) != 0 &&
1234 ((op & BUS_DMASYNC_POSTREAD) != 0 ||
1235 (op & BUS_DMASYNC_PREWRITE) != 0)) {
1237 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
1238 va = (vm_offset_t)BDR_START(r);
1241 * If we have a streaming buffer, flush it here
1245 if ((IOMMU_GET_TTE(is, va) &
1246 IOTTE_STREAM) != 0) {
1248 iommu_strbuf_flush(is, va);
1250 len -= ulmin(len, IO_PAGE_SIZE);
1255 iommu_strbuf_sync(is);
1258 if ((op & BUS_DMASYNC_PREWRITE) != 0)
1265 * Perform an IOMMU diagnostic access and print the tag belonging to va.
1268 iommu_diag(struct iommu_state *is, vm_offset_t va)
1273 if ((is->is_flags & IOMMU_FIRE) != 0)
1276 IOMMU_WRITE8(is, is_dva, 0, trunc_io_page(va));
1277 membar(StoreStore | StoreLoad);
1278 printf("%s: tte entry %#lx", __func__, IOMMU_GET_TTE(is, va));
1279 if (is->is_dtcmp != 0) {
1280 printf(", tag compare register is %#lx\n",
1281 IOMMU_READ8(is, is_dtcmp, 0));
1284 for (i = 0; i < 16; i++) {
1285 tag = IOMMU_READ8(is, is_dtag, i * 8);
1286 data = IOMMU_READ8(is, is_ddram, i * 8);
1287 printf("%s: tag %d: %#lx, vpn %#lx, err %lx; "
1288 "data %#lx, pa %#lx, v %d, c %d\n", __func__, i,
1289 tag, (tag & IOMMU_DTAG_VPNMASK) << IOMMU_DTAG_VPNSHIFT,
1290 (tag & IOMMU_DTAG_ERRMASK) >> IOMMU_DTAG_ERRSHIFT, data,
1291 (data & IOMMU_DDATA_PGMASK) << IOMMU_DDATA_PGSHIFT,
1292 (data & IOMMU_DDATA_V) != 0, (data & IOMMU_DDATA_C) != 0);
1296 #endif /* IOMMU_DIAG */
1298 struct bus_dma_methods iommu_dma_methods = {
1299 iommu_dvmamap_create,
1300 iommu_dvmamap_destroy,
1302 iommu_dvmamap_load_mbuf,
1303 iommu_dvmamap_load_mbuf_sg,
1304 iommu_dvmamap_load_uio,
1305 iommu_dvmamap_unload,
1307 iommu_dvmamem_alloc,