2 * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * from: FreeBSD: src/sys/i386/include/globaldata.h,v 1.27 2001/04/27
30 #ifndef _MACHINE_PCPU_H_
31 #define _MACHINE_PCPU_H_
33 #include <machine/asmacros.h>
34 #include <machine/frame.h>
35 #include <machine/intr_machdep.h>
37 #define ALT_STACK_SIZE 128
42 #define PCPU_MD_FIELDS_PAD (3 - (PCPU_NAME_LEN + 7) / 8)
44 #define PCPU_MD_FIELDS_PAD 3
48 * Inside the kernel, the globally reserved register g7 is used to
49 * point at the globaldata structure.
51 #define PCPU_MD_FIELDS \
52 struct intr_request pc_irpool[IR_FREE]; \
53 struct intr_request *pc_irhead; \
54 struct intr_request **pc_irtail; \
55 struct intr_request *pc_irfree; \
56 struct pmap *pc_curpmap; \
57 vm_offset_t pc_addr; \
58 vm_offset_t *pc_mondo_data; \
59 vm_offset_t *pc_cpu_list; \
60 vm_offset_t *pc_cpu_q; \
61 vm_offset_t *pc_dev_q; \
63 vm_offset_t *pc_nrq; \
64 vm_paddr_t pc_mondo_data_ra; \
65 vm_paddr_t pc_cpu_list_ra; \
66 vm_paddr_t pc_cpu_q_ra; \
67 uint64_t pc_cpu_q_size; \
68 vm_paddr_t pc_dev_q_ra; \
69 uint64_t pc_dev_q_size; \
70 vm_paddr_t pc_rq_ra; \
71 uint64_t pc_rq_size; \
72 vm_paddr_t pc_nrq_ra; \
73 uint64_t pc_nrq_size; \
76 struct rwindow pc_kwbuf; \
78 u_int pc_kwbuf_full; \
79 struct rwindow pc_tsbwbuf[2]; \
80 uint16_t pc_cpulist[MAXCPU]; \
81 uint64_t pad[PCPU_MD_FIELDS_PAD];
83 /* XXX SUN4V_FIXME - as we access the *_ra and *_size fields in quick
84 * succession we _really_ want them to be L1 cache line size aligned
85 * and it is quite possible that we want all of ASI_QUEUE fields to
86 * be L2 cache aligned - they're surrounded by per-cpu data, so there is
87 * no possibility of false sharing, but this might help in reducing misses
96 register struct pcpu *pcpup __asm__(__XSTRING(PCPU_REG));
98 #define PCPU_GET(member) (pcpup->pc_ ## member)
101 * XXX The implementation of this operation should be made atomic
102 * with respect to preemption.
104 #define PCPU_ADD(member, value) (pcpup->pc_ ## member += (value))
105 #define PCPU_INC(member) PCPU_ADD(member, 1)
106 #define PCPU_PTR(member) (&pcpup->pc_ ## member)
107 #define PCPU_SET(member,value) (pcpup->pc_ ## member = (value))
111 #endif /* !_MACHINE_PCPU_H_ */