1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements construction of a TargetInfo object from a
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Type.h"
32 using namespace clang;
34 //===----------------------------------------------------------------------===//
35 // Common code shared among targets.
36 //===----------------------------------------------------------------------===//
38 /// DefineStd - Define a macro name and standard variants. For example if
39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42 const LangOptions &Opts) {
43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46 // in the user's namespace.
48 Builder.defineMacro(MacroName);
51 Builder.defineMacro("__" + MacroName);
54 Builder.defineMacro("__" + MacroName + "__");
57 //===----------------------------------------------------------------------===//
58 // Defines specific to certain operating systems.
59 //===----------------------------------------------------------------------===//
62 template<typename TgtInfo>
63 class OSTargetInfo : public TgtInfo {
65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
66 MacroBuilder &Builder) const=0;
68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
69 virtual void getTargetDefines(const LangOptions &Opts,
70 MacroBuilder &Builder) const {
71 TgtInfo::getTargetDefines(Opts, Builder);
72 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
76 } // end anonymous namespace
79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
80 const llvm::Triple &Triple,
81 StringRef &PlatformName,
82 VersionTuple &PlatformMinVersion) {
83 Builder.defineMacro("__APPLE_CC__", "5621");
84 Builder.defineMacro("__APPLE__");
85 Builder.defineMacro("__MACH__");
86 Builder.defineMacro("OBJC_NEW_PROPERTIES");
88 if (!Opts.ObjCAutoRefCount) {
89 // __weak is always defined, for use in blocks and with objc pointers.
90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
92 // Darwin defines __strong even in C mode (just to nothing).
93 if (Opts.getGC() != LangOptions::NonGC)
94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
96 Builder.defineMacro("__strong", "");
98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even
99 // allow this in C, since one might have block pointers in structs that
100 // are used in pure C code and in Objective-C ARC.
101 Builder.defineMacro("__unsafe_unretained", "");
103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC
104 // mode; then they become normal, C-style casts.
105 Builder.defineMacro("__bridge", "");
106 Builder.defineMacro("__bridge_transfer", "");
107 Builder.defineMacro("__bridge_retained", "");
108 Builder.defineMacro("__bridge_retain", "");
112 Builder.defineMacro("__STATIC__");
114 Builder.defineMacro("__DYNAMIC__");
116 if (Opts.POSIXThreads)
117 Builder.defineMacro("_REENTRANT");
119 // Get the platform type and version number from the triple.
120 unsigned Maj, Min, Rev;
122 // If no version was given, default to to 10.4.0, for simplifying tests.
123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
124 PlatformName = "macosx";
128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
129 // "-osxNNN", and "-iosNNN").
131 if (Triple.getOS() == llvm::Triple::Darwin) {
132 // For historical reasons that make little sense, the version passed here
133 // is the "darwin" version, which drops the 10 and offsets by 4.
134 Triple.getOSVersion(Maj, Min, Rev);
136 if (Triple.getEnvironmentName() == "iphoneos") {
137 PlatformName = "ios";
139 PlatformName = "macosx";
145 Triple.getOSVersion(Maj, Min, Rev);
146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're
151 // generating code for Win32 ABI. No need to emit
152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
153 if (PlatformName == "win32") {
154 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
158 // Set the appropriate OS version define.
159 if (PlatformName == "ios") {
160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
163 Str[1] = '0' + (Min / 10);
164 Str[2] = '0' + (Min % 10);
165 Str[3] = '0' + (Rev / 10);
166 Str[4] = '0' + (Rev % 10);
168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
170 // Note that the Driver allows versions which aren't representable in the
171 // define (because we only get a single digit for the minor and micro
172 // revision numbers). So, we limit them to the maximum representable
174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
177 Str[0] = '0' + (Maj / 10);
178 Str[1] = '0' + (Maj % 10);
179 Str[2] = '0' + std::min(Min, 9U);
180 Str[3] = '0' + std::min(Rev, 9U);
182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
185 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
189 template<typename Target>
190 class DarwinTargetInfo : public OSTargetInfo<Target> {
192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
193 MacroBuilder &Builder) const {
194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
195 this->PlatformMinVersion);
199 DarwinTargetInfo(const std::string& triple) :
200 OSTargetInfo<Target>(triple) {
201 llvm::Triple T = llvm::Triple(triple);
202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
203 this->MCountName = "\01mcount";
206 virtual std::string isValidSectionSpecifier(StringRef SR) const {
207 // Let MCSectionMachO validate this.
208 StringRef Segment, Section;
209 unsigned TAA, StubSize;
211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
212 TAA, HasTAA, StubSize);
215 virtual const char *getStaticInitSectionSpecifier() const {
216 // FIXME: We should return 0 when building kexts.
217 return "__TEXT,__StaticInit,regular,pure_instructions";
223 // DragonFlyBSD Target
224 template<typename Target>
225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
228 MacroBuilder &Builder) const {
229 // DragonFly defines; list based off of gcc output
230 Builder.defineMacro("__DragonFly__");
231 Builder.defineMacro("__DragonFly_cc_version", "100001");
232 Builder.defineMacro("__ELF__");
233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
234 Builder.defineMacro("__tune_i386__");
235 DefineStd(Builder, "unix", Opts);
238 DragonFlyBSDTargetInfo(const std::string &triple)
239 : OSTargetInfo<Target>(triple) {}
243 template<typename Target>
244 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247 MacroBuilder &Builder) const {
248 // FreeBSD defines; list based off of gcc output
250 unsigned Release = Triple.getOSMajorVersion();
254 Builder.defineMacro("__FreeBSD__", Twine(Release));
255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257 DefineStd(Builder, "unix", Opts);
258 Builder.defineMacro("__ELF__");
261 FreeBSDTargetInfo(const std::string &triple)
262 : OSTargetInfo<Target>(triple) {
263 this->UserLabelPrefix = "";
265 llvm::Triple Triple(triple);
266 switch (Triple.getArch()) {
268 case llvm::Triple::x86:
269 case llvm::Triple::x86_64:
270 this->MCountName = ".mcount";
272 case llvm::Triple::mips:
273 case llvm::Triple::mipsel:
274 case llvm::Triple::ppc:
275 case llvm::Triple::ppc64:
276 this->MCountName = "_mcount";
278 case llvm::Triple::arm:
279 this->MCountName = "__mcount";
287 template<typename Target>
288 class MinixTargetInfo : public OSTargetInfo<Target> {
290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291 MacroBuilder &Builder) const {
294 Builder.defineMacro("__minix", "3");
295 Builder.defineMacro("_EM_WSIZE", "4");
296 Builder.defineMacro("_EM_PSIZE", "4");
297 Builder.defineMacro("_EM_SSIZE", "2");
298 Builder.defineMacro("_EM_LSIZE", "4");
299 Builder.defineMacro("_EM_FSIZE", "4");
300 Builder.defineMacro("_EM_DSIZE", "8");
301 DefineStd(Builder, "unix", Opts);
304 MinixTargetInfo(const std::string &triple)
305 : OSTargetInfo<Target>(triple) {
306 this->UserLabelPrefix = "";
311 template<typename Target>
312 class LinuxTargetInfo : public OSTargetInfo<Target> {
314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
315 MacroBuilder &Builder) const {
316 // Linux defines; list based off of gcc output
317 DefineStd(Builder, "unix", Opts);
318 DefineStd(Builder, "linux", Opts);
319 Builder.defineMacro("__gnu_linux__");
320 Builder.defineMacro("__ELF__");
321 if (Opts.POSIXThreads)
322 Builder.defineMacro("_REENTRANT");
324 Builder.defineMacro("_GNU_SOURCE");
327 LinuxTargetInfo(const std::string& triple)
328 : OSTargetInfo<Target>(triple) {
329 this->UserLabelPrefix = "";
330 this->WIntType = TargetInfo::UnsignedInt;
335 template<typename Target>
336 class NetBSDTargetInfo : public OSTargetInfo<Target> {
338 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
339 MacroBuilder &Builder) const {
340 // NetBSD defines; list based off of gcc output
341 Builder.defineMacro("__NetBSD__");
342 Builder.defineMacro("__unix__");
343 Builder.defineMacro("__ELF__");
344 if (Opts.POSIXThreads)
345 Builder.defineMacro("_POSIX_THREADS");
348 NetBSDTargetInfo(const std::string &triple)
349 : OSTargetInfo<Target>(triple) {
350 this->UserLabelPrefix = "";
355 template<typename Target>
356 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
358 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
359 MacroBuilder &Builder) const {
360 // OpenBSD defines; list based off of gcc output
362 Builder.defineMacro("__OpenBSD__");
363 DefineStd(Builder, "unix", Opts);
364 Builder.defineMacro("__ELF__");
365 if (Opts.POSIXThreads)
366 Builder.defineMacro("_POSIX_THREADS");
369 OpenBSDTargetInfo(const std::string &triple)
370 : OSTargetInfo<Target>(triple) {}
374 template<typename Target>
375 class PSPTargetInfo : public OSTargetInfo<Target> {
377 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
378 MacroBuilder &Builder) const {
379 // PSP defines; list based on the output of the pspdev gcc toolchain.
380 Builder.defineMacro("PSP");
381 Builder.defineMacro("_PSP");
382 Builder.defineMacro("__psp__");
383 Builder.defineMacro("__ELF__");
386 PSPTargetInfo(const std::string& triple)
387 : OSTargetInfo<Target>(triple) {
388 this->UserLabelPrefix = "";
393 template<typename Target>
394 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
396 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
397 MacroBuilder &Builder) const {
399 Builder.defineMacro("__PPC__");
400 Builder.defineMacro("__PPU__");
401 Builder.defineMacro("__CELLOS_LV2__");
402 Builder.defineMacro("__ELF__");
403 Builder.defineMacro("__LP32__");
404 Builder.defineMacro("_ARCH_PPC64");
405 Builder.defineMacro("__powerpc64__");
408 PS3PPUTargetInfo(const std::string& triple)
409 : OSTargetInfo<Target>(triple) {
410 this->UserLabelPrefix = "";
411 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
412 this->IntMaxType = TargetInfo::SignedLongLong;
413 this->UIntMaxType = TargetInfo::UnsignedLongLong;
414 this->Int64Type = TargetInfo::SignedLongLong;
415 this->SizeType = TargetInfo::UnsignedInt;
416 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
417 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
421 // FIXME: Need a real SPU target.
423 template<typename Target>
424 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
426 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
427 MacroBuilder &Builder) const {
429 Builder.defineMacro("__SPU__");
430 Builder.defineMacro("__ELF__");
433 PS3SPUTargetInfo(const std::string& triple)
434 : OSTargetInfo<Target>(triple) {
435 this->UserLabelPrefix = "";
440 template<typename Target>
441 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
443 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
444 MacroBuilder &Builder) const {
445 DefineStd(Builder, "sun", Opts);
446 DefineStd(Builder, "unix", Opts);
447 Builder.defineMacro("__ELF__");
448 Builder.defineMacro("__svr4__");
449 Builder.defineMacro("__SVR4");
452 AuroraUXTargetInfo(const std::string& triple)
453 : OSTargetInfo<Target>(triple) {
454 this->UserLabelPrefix = "";
455 this->WCharType = this->SignedLong;
456 // FIXME: WIntType should be SignedLong
461 template<typename Target>
462 class SolarisTargetInfo : public OSTargetInfo<Target> {
464 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
465 MacroBuilder &Builder) const {
466 DefineStd(Builder, "sun", Opts);
467 DefineStd(Builder, "unix", Opts);
468 Builder.defineMacro("__ELF__");
469 Builder.defineMacro("__svr4__");
470 Builder.defineMacro("__SVR4");
473 SolarisTargetInfo(const std::string& triple)
474 : OSTargetInfo<Target>(triple) {
475 this->UserLabelPrefix = "";
476 this->WCharType = this->SignedLong;
477 // FIXME: WIntType should be SignedLong
482 template<typename Target>
483 class WindowsTargetInfo : public OSTargetInfo<Target> {
485 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
486 MacroBuilder &Builder) const {
487 Builder.defineMacro("_WIN32");
489 void getVisualStudioDefines(const LangOptions &Opts,
490 MacroBuilder &Builder) const {
491 if (Opts.CPlusPlus) {
493 Builder.defineMacro("_CPPRTTI");
496 Builder.defineMacro("_CPPUNWIND");
499 if (!Opts.CharIsSigned)
500 Builder.defineMacro("_CHAR_UNSIGNED");
502 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
503 // but it works for now.
504 if (Opts.POSIXThreads)
505 Builder.defineMacro("_MT");
507 if (Opts.MSCVersion != 0)
508 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
510 if (Opts.MicrosoftExt) {
511 Builder.defineMacro("_MSC_EXTENSIONS");
513 if (Opts.CPlusPlus0x) {
514 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
515 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
516 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
520 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
524 WindowsTargetInfo(const std::string &triple)
525 : OSTargetInfo<Target>(triple) {}
528 } // end anonymous namespace.
530 //===----------------------------------------------------------------------===//
531 // Specific target implementations.
532 //===----------------------------------------------------------------------===//
535 // PPC abstract base class
536 class PPCTargetInfo : public TargetInfo {
537 static const Builtin::Info BuiltinInfo[];
538 static const char * const GCCRegNames[];
539 static const TargetInfo::GCCRegAlias GCCRegAliases[];
541 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
543 virtual void getTargetBuiltins(const Builtin::Info *&Records,
544 unsigned &NumRecords) const {
545 Records = BuiltinInfo;
546 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
549 virtual void getTargetDefines(const LangOptions &Opts,
550 MacroBuilder &Builder) const;
552 virtual void getGCCRegNames(const char * const *&Names,
553 unsigned &NumNames) const;
554 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
555 unsigned &NumAliases) const;
556 virtual bool validateAsmConstraint(const char *&Name,
557 TargetInfo::ConstraintInfo &Info) const {
559 default: return false;
562 case 'b': // Base register
563 case 'f': // Floating point register
564 Info.setAllowsRegister();
566 // FIXME: The following are added to allow parsing.
567 // I just took a guess at what the actions should be.
568 // Also, is more specific checking needed? I.e. specific registers?
569 case 'd': // Floating point register (containing 64-bit value)
570 case 'v': // Altivec vector register
571 Info.setAllowsRegister();
575 case 'd':// VSX vector register to hold vector double data
576 case 'f':// VSX vector register to hold vector float data
577 case 's':// VSX vector register to hold scalar float data
578 case 'a':// Any VSX register
583 Info.setAllowsRegister();
584 Name++; // Skip over 'w'.
586 case 'h': // `MQ', `CTR', or `LINK' register
587 case 'q': // `MQ' register
588 case 'c': // `CTR' register
589 case 'l': // `LINK' register
590 case 'x': // `CR' register (condition register) number 0
591 case 'y': // `CR' register (condition register)
592 case 'z': // `XER[CA]' carry bit (part of the XER register)
593 Info.setAllowsRegister();
595 case 'I': // Signed 16-bit constant
596 case 'J': // Unsigned 16-bit constant shifted left 16 bits
597 // (use `L' instead for SImode constants)
598 case 'K': // Unsigned 16-bit constant
599 case 'L': // Signed 16-bit constant shifted left 16 bits
600 case 'M': // Constant larger than 31
601 case 'N': // Exact power of 2
602 case 'P': // Constant whose negation is a signed 16-bit constant
603 case 'G': // Floating point constant that can be loaded into a
604 // register with one instruction per word
605 case 'H': // Integer/Floating point constant that can be loaded
606 // into a register using three instructions
608 case 'm': // Memory operand. Note that on PowerPC targets, m can
609 // include addresses that update the base register. It
610 // is therefore only safe to use `m' in an asm statement
611 // if that asm statement accesses the operand exactly once.
612 // The asm statement must also use `%U<opno>' as a
613 // placeholder for the "update" flag in the corresponding
614 // load or store instruction. For example:
615 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
617 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
618 // is not. Use es rather than m if you don't want the base
619 // register to be updated.
623 // es: A "stable" memory operand; that is, one which does not
624 // include any automodification of the base register. Unlike
625 // `m', this constraint can be used in asm statements that
626 // might access the operand several times, or that might not
628 Info.setAllowsMemory();
629 Name++; // Skip over 'e'.
631 case 'Q': // Memory operand that is an offset from a register (it is
632 // usually better to use `m' or `es' in asm statements)
633 case 'Z': // Memory operand that is an indexed or indirect from a
634 // register (it is usually better to use `m' or `es' in
636 Info.setAllowsMemory();
637 Info.setAllowsRegister();
639 case 'R': // AIX TOC entry
640 case 'a': // Address operand that is an indexed or indirect from a
641 // register (`p' is preferable for asm statements)
642 case 'S': // Constant suitable as a 64-bit mask operand
643 case 'T': // Constant suitable as a 32-bit mask operand
644 case 'U': // System V Release 4 small data area reference
645 case 't': // AND masks that can be performed by two rldic{l, r}
647 case 'W': // Vector constant that does not require memory
648 case 'j': // Vector constant that is all zeros.
654 virtual const char *getClobbers() const {
659 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
660 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
661 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
663 #include "clang/Basic/BuiltinsPPC.def"
667 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
668 /// #defines that are not tied to a specific subtarget.
669 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
670 MacroBuilder &Builder) const {
671 // Target identification.
672 Builder.defineMacro("__ppc__");
673 Builder.defineMacro("_ARCH_PPC");
674 Builder.defineMacro("__powerpc__");
675 Builder.defineMacro("__POWERPC__");
676 if (PointerWidth == 64) {
677 Builder.defineMacro("_ARCH_PPC64");
678 Builder.defineMacro("_LP64");
679 Builder.defineMacro("__LP64__");
680 Builder.defineMacro("__powerpc64__");
681 Builder.defineMacro("__ppc64__");
683 Builder.defineMacro("__ppc__");
686 // Target properties.
687 if (getTriple().getOS() != llvm::Triple::NetBSD)
688 Builder.defineMacro("_BIG_ENDIAN");
689 Builder.defineMacro("__BIG_ENDIAN__");
691 // Subtarget options.
692 Builder.defineMacro("__NATURAL_ALIGNMENT__");
693 Builder.defineMacro("__REGISTER_PREFIX__", "");
695 // FIXME: Should be controlled by command line option.
696 Builder.defineMacro("__LONG_DOUBLE_128__");
699 Builder.defineMacro("__VEC__", "10206");
700 Builder.defineMacro("__ALTIVEC__");
705 const char * const PPCTargetInfo::GCCRegNames[] = {
706 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
707 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
708 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
709 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
710 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
711 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
712 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
713 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
714 "mq", "lr", "ctr", "ap",
715 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
717 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
718 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
719 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
720 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
722 "spe_acc", "spefscr",
726 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
727 unsigned &NumNames) const {
729 NumNames = llvm::array_lengthof(GCCRegNames);
732 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
733 // While some of these aliases do map to different registers
734 // they still share the same register name.
777 { { "fr10" }, "f10" },
778 { { "fr11" }, "f11" },
779 { { "fr12" }, "f12" },
780 { { "fr13" }, "f13" },
781 { { "fr14" }, "f14" },
782 { { "fr15" }, "f15" },
783 { { "fr16" }, "f16" },
784 { { "fr17" }, "f17" },
785 { { "fr18" }, "f18" },
786 { { "fr19" }, "f19" },
787 { { "fr20" }, "f20" },
788 { { "fr21" }, "f21" },
789 { { "fr22" }, "f22" },
790 { { "fr23" }, "f23" },
791 { { "fr24" }, "f24" },
792 { { "fr25" }, "f25" },
793 { { "fr26" }, "f26" },
794 { { "fr27" }, "f27" },
795 { { "fr28" }, "f28" },
796 { { "fr29" }, "f29" },
797 { { "fr30" }, "f30" },
798 { { "fr31" }, "f31" },
802 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
803 unsigned &NumAliases) const {
804 Aliases = GCCRegAliases;
805 NumAliases = llvm::array_lengthof(GCCRegAliases);
807 } // end anonymous namespace.
810 class PPC32TargetInfo : public PPCTargetInfo {
812 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
813 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
814 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
816 switch (getTriple().getOS()) {
817 case llvm::Triple::FreeBSD:
818 case llvm::Triple::NetBSD:
819 SizeType = UnsignedInt;
826 virtual const char *getVAListDeclaration() const {
827 // This is the ELF definition, and is overridden by the Darwin sub-target
828 return "typedef struct __va_list_tag {"
829 " unsigned char gpr;"
830 " unsigned char fpr;"
831 " unsigned short reserved;"
832 " void* overflow_arg_area;"
833 " void* reg_save_area;"
834 "} __builtin_va_list[1];";
837 } // end anonymous namespace.
840 class PPC64TargetInfo : public PPCTargetInfo {
842 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
843 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
844 IntMaxType = SignedLong;
845 UIntMaxType = UnsignedLong;
846 Int64Type = SignedLong;
847 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
848 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
850 virtual const char *getVAListDeclaration() const {
851 return "typedef char* __builtin_va_list;";
854 } // end anonymous namespace.
858 class DarwinPPC32TargetInfo :
859 public DarwinTargetInfo<PPC32TargetInfo> {
861 DarwinPPC32TargetInfo(const std::string& triple)
862 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
863 HasAlignMac68kSupport = true;
864 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
866 virtual const char *getVAListDeclaration() const {
867 return "typedef char* __builtin_va_list;";
871 class DarwinPPC64TargetInfo :
872 public DarwinTargetInfo<PPC64TargetInfo> {
874 DarwinPPC64TargetInfo(const std::string& triple)
875 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
876 HasAlignMac68kSupport = true;
879 } // end anonymous namespace.
882 static const unsigned PTXAddrSpaceMap[] = {
887 class PTXTargetInfo : public TargetInfo {
888 static const char * const GCCRegNames[];
889 static const Builtin::Info BuiltinInfo[];
890 std::vector<llvm::StringRef> AvailableFeatures;
892 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
893 TLSSupported = false;
894 LongWidth = LongAlign = 64;
895 AddrSpaceMap = &PTXAddrSpaceMap;
896 // Define available target features
897 // These must be defined in sorted order!
898 AvailableFeatures.push_back("compute10");
899 AvailableFeatures.push_back("compute11");
900 AvailableFeatures.push_back("compute12");
901 AvailableFeatures.push_back("compute13");
902 AvailableFeatures.push_back("compute20");
903 AvailableFeatures.push_back("double");
904 AvailableFeatures.push_back("no-fma");
905 AvailableFeatures.push_back("ptx20");
906 AvailableFeatures.push_back("ptx21");
907 AvailableFeatures.push_back("ptx22");
908 AvailableFeatures.push_back("ptx23");
909 AvailableFeatures.push_back("sm10");
910 AvailableFeatures.push_back("sm11");
911 AvailableFeatures.push_back("sm12");
912 AvailableFeatures.push_back("sm13");
913 AvailableFeatures.push_back("sm20");
914 AvailableFeatures.push_back("sm21");
915 AvailableFeatures.push_back("sm22");
916 AvailableFeatures.push_back("sm23");
918 virtual void getTargetDefines(const LangOptions &Opts,
919 MacroBuilder &Builder) const {
920 Builder.defineMacro("__PTX__");
922 virtual void getTargetBuiltins(const Builtin::Info *&Records,
923 unsigned &NumRecords) const {
924 Records = BuiltinInfo;
925 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
928 virtual void getGCCRegNames(const char * const *&Names,
929 unsigned &NumNames) const;
930 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
931 unsigned &NumAliases) const {
936 virtual bool validateAsmConstraint(const char *&Name,
937 TargetInfo::ConstraintInfo &info) const {
941 virtual const char *getClobbers() const {
942 // FIXME: Is this really right?
945 virtual const char *getVAListDeclaration() const {
947 return "typedef char* __builtin_va_list;";
950 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
951 const std::string &Name,
955 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
956 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
957 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
959 #include "clang/Basic/BuiltinsPTX.def"
962 const char * const PTXTargetInfo::GCCRegNames[] = {
966 void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
967 unsigned &NumNames) const {
969 NumNames = llvm::array_lengthof(GCCRegNames);
972 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
973 const std::string &Name,
974 bool Enabled) const {
975 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
977 Features[Name] = Enabled;
984 class PTX32TargetInfo : public PTXTargetInfo {
986 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
987 PointerWidth = PointerAlign = 32;
988 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
990 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
994 class PTX64TargetInfo : public PTXTargetInfo {
996 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
997 PointerWidth = PointerAlign = 64;
998 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1000 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1006 // MBlaze abstract base class
1007 class MBlazeTargetInfo : public TargetInfo {
1008 static const char * const GCCRegNames[];
1009 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1012 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1013 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1016 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1017 unsigned &NumRecords) const {
1018 // FIXME: Implement.
1023 virtual void getTargetDefines(const LangOptions &Opts,
1024 MacroBuilder &Builder) const;
1026 virtual const char *getVAListDeclaration() const {
1027 return "typedef char* __builtin_va_list;";
1029 virtual const char *getTargetPrefix() const {
1032 virtual void getGCCRegNames(const char * const *&Names,
1033 unsigned &NumNames) const;
1034 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1035 unsigned &NumAliases) const;
1036 virtual bool validateAsmConstraint(const char *&Name,
1037 TargetInfo::ConstraintInfo &Info) const {
1039 default: return false;
1042 case 'b': // Base register
1043 case 'f': // Floating point register
1044 Info.setAllowsRegister();
1048 virtual const char *getClobbers() const {
1053 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1054 /// #defines that are not tied to a specific subtarget.
1055 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1056 MacroBuilder &Builder) const {
1057 // Target identification.
1058 Builder.defineMacro("__microblaze__");
1059 Builder.defineMacro("_ARCH_MICROBLAZE");
1060 Builder.defineMacro("__MICROBLAZE__");
1062 // Target properties.
1063 Builder.defineMacro("_BIG_ENDIAN");
1064 Builder.defineMacro("__BIG_ENDIAN__");
1066 // Subtarget options.
1067 Builder.defineMacro("__REGISTER_PREFIX__", "");
1071 const char * const MBlazeTargetInfo::GCCRegNames[] = {
1072 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1073 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1074 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1075 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
1076 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
1077 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1078 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1079 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1080 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1081 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
1084 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1085 unsigned &NumNames) const {
1086 Names = GCCRegNames;
1087 NumNames = llvm::array_lengthof(GCCRegNames);
1090 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1125 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1126 unsigned &NumAliases) const {
1127 Aliases = GCCRegAliases;
1128 NumAliases = llvm::array_lengthof(GCCRegAliases);
1130 } // end anonymous namespace.
1133 // Namespace for x86 abstract base class
1134 const Builtin::Info BuiltinInfo[] = {
1135 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1136 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1138 #include "clang/Basic/BuiltinsX86.def"
1141 static const char* const GCCRegNames[] = {
1142 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1143 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1144 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1145 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1146 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1147 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1148 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1151 const TargetInfo::AddlRegName AddlRegNames[] = {
1152 { { "al", "ah", "eax", "rax" }, 0 },
1153 { { "bl", "bh", "ebx", "rbx" }, 3 },
1154 { { "cl", "ch", "ecx", "rcx" }, 2 },
1155 { { "dl", "dh", "edx", "rdx" }, 1 },
1156 { { "esi", "rsi" }, 4 },
1157 { { "edi", "rdi" }, 5 },
1158 { { "esp", "rsp" }, 7 },
1159 { { "ebp", "rbp" }, 6 },
1162 // X86 target abstract base class; x86-32 and x86-64 are very close, so
1163 // most of the implementation can be shared.
1164 class X86TargetInfo : public TargetInfo {
1166 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
1169 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1175 /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1177 /// Each enumeration represents a particular CPU supported by Clang. These
1178 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1183 /// i386-generation processors.
1189 /// i486-generation processors.
1198 /// i586-generation processors, P5 microarchitecture based.
1206 /// i686-generation processors, P6 / Pentium M microarchitecture based.
1216 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1217 /// Clang however has some logic to suport this.
1218 // FIXME: Warn, deprecate, and potentially remove this.
1223 /// Netburst microarchitecture based processors.
1232 /// Core microarchitecture based processors.
1236 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1237 /// codename which GCC no longer accepts as an option to -march, but Clang
1238 /// has some logic for recognizing it.
1239 // FIXME: Warn, deprecate, and potentially remove this.
1250 /// Nehalem microarchitecture based processors.
1258 /// K6 architecture processors.
1266 /// K7 architecture processors.
1269 CK_AthlonThunderbird,
1276 /// K8 architecture processors.
1287 /// This specification is deprecated and will be removed in the future.
1288 /// Users should prefer \see CK_K8.
1289 // FIXME: Warn on this when the CPU is set to it.
1294 /// Geode processors.
1301 X86TargetInfo(const std::string& triple)
1302 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1303 HasAES(false), HasAVX(false), CPU(CK_Generic) {
1304 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1306 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1307 unsigned &NumRecords) const {
1308 Records = BuiltinInfo;
1309 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1311 virtual void getGCCRegNames(const char * const *&Names,
1312 unsigned &NumNames) const {
1313 Names = GCCRegNames;
1314 NumNames = llvm::array_lengthof(GCCRegNames);
1316 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1317 unsigned &NumAliases) const {
1321 virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1322 unsigned &NumNames) const {
1323 Names = AddlRegNames;
1324 NumNames = llvm::array_lengthof(AddlRegNames);
1326 virtual bool validateAsmConstraint(const char *&Name,
1327 TargetInfo::ConstraintInfo &info) const;
1328 virtual std::string convertConstraint(const char *&Constraint) const;
1329 virtual const char *getClobbers() const {
1330 return "~{dirflag},~{fpsr},~{flags}";
1332 virtual void getTargetDefines(const LangOptions &Opts,
1333 MacroBuilder &Builder) const;
1334 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1335 const std::string &Name,
1336 bool Enabled) const;
1337 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1338 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1339 virtual const char* getABI() const {
1340 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : "";
1342 virtual bool setCPU(const std::string &Name) {
1343 CPU = llvm::StringSwitch<CPUKind>(Name)
1344 .Case("i386", CK_i386)
1345 .Case("i486", CK_i486)
1346 .Case("winchip-c6", CK_WinChipC6)
1347 .Case("winchip2", CK_WinChip2)
1349 .Case("i586", CK_i586)
1350 .Case("pentium", CK_Pentium)
1351 .Case("pentium-mmx", CK_PentiumMMX)
1352 .Case("i686", CK_i686)
1353 .Case("pentiumpro", CK_PentiumPro)
1354 .Case("pentium2", CK_Pentium2)
1355 .Case("pentium3", CK_Pentium3)
1356 .Case("pentium3m", CK_Pentium3M)
1357 .Case("pentium-m", CK_PentiumM)
1358 .Case("c3-2", CK_C3_2)
1359 .Case("yonah", CK_Yonah)
1360 .Case("pentium4", CK_Pentium4)
1361 .Case("pentium4m", CK_Pentium4M)
1362 .Case("prescott", CK_Prescott)
1363 .Case("nocona", CK_Nocona)
1364 .Case("core2", CK_Core2)
1365 .Case("penryn", CK_Penryn)
1366 .Case("atom", CK_Atom)
1367 .Case("corei7", CK_Corei7)
1368 .Case("corei7-avx", CK_Corei7AVX)
1369 .Case("core-avx-i", CK_CoreAVXi)
1371 .Case("k6-2", CK_K6_2)
1372 .Case("k6-3", CK_K6_3)
1373 .Case("athlon", CK_Athlon)
1374 .Case("athlon-tbird", CK_AthlonThunderbird)
1375 .Case("athlon-4", CK_Athlon4)
1376 .Case("athlon-xp", CK_AthlonXP)
1377 .Case("athlon-mp", CK_AthlonMP)
1378 .Case("athlon64", CK_Athlon64)
1379 .Case("athlon64-sse3", CK_Athlon64SSE3)
1380 .Case("athlon-fx", CK_AthlonFX)
1382 .Case("k8-sse3", CK_K8SSE3)
1383 .Case("opteron", CK_Opteron)
1384 .Case("opteron-sse3", CK_OpteronSSE3)
1385 .Case("amdfam10", CK_AMDFAM10)
1386 .Case("x86-64", CK_x86_64)
1387 .Case("geode", CK_Geode)
1388 .Default(CK_Generic);
1390 // Perform any per-CPU checks necessary to determine if this CPU is
1392 // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1393 // invalid without explaining *why*.
1396 // No processor selected!
1422 case CK_AthlonThunderbird:
1427 // Only accept certain architectures when compiling in 32-bit mode.
1428 if (PointerWidth != 32)
1440 case CK_Athlon64SSE3:
1445 case CK_OpteronSSE3:
1450 llvm_unreachable("Unhandled CPU kind");
1454 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1455 // FIXME: This should not be here.
1456 Features["3dnow"] = false;
1457 Features["3dnowa"] = false;
1458 Features["mmx"] = false;
1459 Features["sse"] = false;
1460 Features["sse2"] = false;
1461 Features["sse3"] = false;
1462 Features["ssse3"] = false;
1463 Features["sse41"] = false;
1464 Features["sse42"] = false;
1465 Features["sse4a"] = false;
1466 Features["aes"] = false;
1467 Features["avx"] = false;
1469 // FIXME: This *really* should not be here.
1471 // X86_64 always has SSE2.
1472 if (PointerWidth == 64)
1473 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1486 setFeatureEnabled(Features, "mmx", true);
1490 setFeatureEnabled(Features, "mmx", true);
1491 setFeatureEnabled(Features, "sse", true);
1497 setFeatureEnabled(Features, "mmx", true);
1498 setFeatureEnabled(Features, "sse2", true);
1503 setFeatureEnabled(Features, "mmx", true);
1504 setFeatureEnabled(Features, "sse3", true);
1507 setFeatureEnabled(Features, "mmx", true);
1508 setFeatureEnabled(Features, "ssse3", true);
1511 setFeatureEnabled(Features, "mmx", true);
1512 setFeatureEnabled(Features, "sse4", true);
1513 Features["sse42"] = false;
1516 setFeatureEnabled(Features, "mmx", true);
1517 setFeatureEnabled(Features, "ssse3", true);
1520 setFeatureEnabled(Features, "mmx", true);
1521 setFeatureEnabled(Features, "sse4", true);
1522 setFeatureEnabled(Features, "aes", true);
1526 setFeatureEnabled(Features, "mmx", true);
1527 setFeatureEnabled(Features, "sse4", true);
1528 setFeatureEnabled(Features, "aes", true);
1529 //setFeatureEnabled(Features, "avx", true);
1533 setFeatureEnabled(Features, "mmx", true);
1539 setFeatureEnabled(Features, "3dnow", true);
1542 case CK_AthlonThunderbird:
1544 setFeatureEnabled(Features, "3dnowa", true);
1549 setFeatureEnabled(Features, "sse", true);
1550 setFeatureEnabled(Features, "3dnowa", true);
1556 setFeatureEnabled(Features, "sse2", true);
1557 setFeatureEnabled(Features, "3dnowa", true);
1560 case CK_OpteronSSE3:
1561 case CK_Athlon64SSE3:
1562 setFeatureEnabled(Features, "sse3", true);
1563 setFeatureEnabled(Features, "3dnowa", true);
1566 setFeatureEnabled(Features, "sse3", true);
1567 setFeatureEnabled(Features, "sse4a", true);
1568 setFeatureEnabled(Features, "3dnowa", true);
1571 setFeatureEnabled(Features, "mmx", true);
1572 setFeatureEnabled(Features, "sse", true);
1577 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1578 const std::string &Name,
1579 bool Enabled) const {
1580 // FIXME: This *really* should not be here. We need some way of translating
1581 // options into llvm subtarget features.
1582 if (!Features.count(Name) &&
1583 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1588 Features["mmx"] = true;
1589 else if (Name == "sse")
1590 Features["sse"] = true;
1591 else if (Name == "sse2")
1592 Features["sse"] = Features["sse2"] = true;
1593 else if (Name == "sse3")
1594 Features["sse"] = Features["sse2"] = Features["sse3"] = true;
1595 else if (Name == "ssse3")
1596 Features["sse"] = Features["sse2"] = Features["sse3"] =
1597 Features["ssse3"] = true;
1598 else if (Name == "sse4" || Name == "sse4.2")
1599 Features["sse"] = Features["sse2"] = Features["sse3"] =
1600 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1601 else if (Name == "sse4.1")
1602 Features["sse"] = Features["sse2"] = Features["sse3"] =
1603 Features["ssse3"] = Features["sse41"] = true;
1604 else if (Name == "3dnow")
1605 Features["mmx"] = Features["3dnow"] = true;
1606 else if (Name == "3dnowa")
1607 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1608 else if (Name == "aes")
1609 Features["aes"] = true;
1610 else if (Name == "avx")
1611 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1612 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1613 else if (Name == "sse4a")
1614 Features["sse4a"] = true;
1617 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1618 else if (Name == "sse")
1619 Features["sse"] = Features["sse2"] = Features["sse3"] =
1620 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1621 else if (Name == "sse2")
1622 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1623 Features["sse41"] = Features["sse42"] = false;
1624 else if (Name == "sse3")
1625 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1626 Features["sse42"] = false;
1627 else if (Name == "ssse3")
1628 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1629 else if (Name == "sse4" || Name == "sse4.1")
1630 Features["sse41"] = Features["sse42"] = false;
1631 else if (Name == "sse4.2")
1632 Features["sse42"] = false;
1633 else if (Name == "3dnow")
1634 Features["3dnow"] = Features["3dnowa"] = false;
1635 else if (Name == "3dnowa")
1636 Features["3dnowa"] = false;
1637 else if (Name == "aes")
1638 Features["aes"] = false;
1639 else if (Name == "avx")
1640 Features["avx"] = false;
1641 else if (Name == "sse4a")
1642 Features["sse4a"] = false;
1648 /// HandleTargetOptions - Perform initialization based on the user
1649 /// configured set of features.
1650 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1651 // Remember the maximum enabled sselevel.
1652 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1653 // Ignore disabled features.
1654 if (Features[i][0] == '-')
1657 if (Features[i].substr(1) == "aes") {
1662 // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1663 // For now let it be enabled together with other SSE levels.
1664 if (Features[i].substr(1) == "avx") {
1669 assert(Features[i][0] == '+' && "Invalid target feature!");
1670 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1671 .Case("sse42", SSE42)
1672 .Case("sse41", SSE41)
1673 .Case("ssse3", SSSE3)
1678 SSELevel = std::max(SSELevel, Level);
1680 MMX3DNowEnum ThreeDNowLevel =
1681 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1682 .Case("3dnowa", AMD3DNowAthlon)
1683 .Case("3dnow", AMD3DNow)
1685 .Default(NoMMX3DNow);
1687 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1690 // Don't tell the backend if we're turning off mmx; it will end up disabling
1691 // SSE, which we don't want.
1692 std::vector<std::string>::iterator it;
1693 it = std::find(Features.begin(), Features.end(), "-mmx");
1694 if (it != Features.end())
1698 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1699 /// definitions for this particular subtarget.
1700 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1701 MacroBuilder &Builder) const {
1702 // Target identification.
1703 if (PointerWidth == 64) {
1704 Builder.defineMacro("_LP64");
1705 Builder.defineMacro("__LP64__");
1706 Builder.defineMacro("__amd64__");
1707 Builder.defineMacro("__amd64");
1708 Builder.defineMacro("__x86_64");
1709 Builder.defineMacro("__x86_64__");
1711 DefineStd(Builder, "i386", Opts);
1714 // Subtarget options.
1715 // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1716 // truly should be based on -mtune options.
1721 // The rest are coming from the i386 define above.
1722 Builder.defineMacro("__tune_i386__");
1728 Builder.defineMacro("__i486");
1729 Builder.defineMacro("__i486__");
1730 Builder.defineMacro("__tune_i486__");
1733 Builder.defineMacro("__pentium_mmx__");
1734 Builder.defineMacro("__tune_pentium_mmx__");
1738 Builder.defineMacro("__i586");
1739 Builder.defineMacro("__i586__");
1740 Builder.defineMacro("__tune_i586__");
1741 Builder.defineMacro("__pentium");
1742 Builder.defineMacro("__pentium__");
1743 Builder.defineMacro("__tune_pentium__");
1748 Builder.defineMacro("__tune_pentium3__");
1752 Builder.defineMacro("__tune_pentium2__");
1755 Builder.defineMacro("__tune_i686__");
1756 Builder.defineMacro("__tune_pentiumpro__");
1759 Builder.defineMacro("__i686");
1760 Builder.defineMacro("__i686__");
1761 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1762 Builder.defineMacro("__pentiumpro");
1763 Builder.defineMacro("__pentiumpro__");
1767 Builder.defineMacro("__pentium4");
1768 Builder.defineMacro("__pentium4__");
1769 Builder.defineMacro("__tune_pentium4__");
1774 Builder.defineMacro("__nocona");
1775 Builder.defineMacro("__nocona__");
1776 Builder.defineMacro("__tune_nocona__");
1780 Builder.defineMacro("__core2");
1781 Builder.defineMacro("__core2__");
1782 Builder.defineMacro("__tune_core2__");
1785 Builder.defineMacro("__atom");
1786 Builder.defineMacro("__atom__");
1787 Builder.defineMacro("__tune_atom__");
1792 Builder.defineMacro("__corei7");
1793 Builder.defineMacro("__corei7__");
1794 Builder.defineMacro("__tune_corei7__");
1797 Builder.defineMacro("__k6_2__");
1798 Builder.defineMacro("__tune_k6_2__");
1801 if (CPU != CK_K6_2) { // In case of fallthrough
1802 // FIXME: GCC may be enabling these in cases where some other k6
1803 // architecture is specified but -m3dnow is explicitly provided. The
1804 // exact semantics need to be determined and emulated here.
1805 Builder.defineMacro("__k6_3__");
1806 Builder.defineMacro("__tune_k6_3__");
1810 Builder.defineMacro("__k6");
1811 Builder.defineMacro("__k6__");
1812 Builder.defineMacro("__tune_k6__");
1815 case CK_AthlonThunderbird:
1819 Builder.defineMacro("__athlon");
1820 Builder.defineMacro("__athlon__");
1821 Builder.defineMacro("__tune_athlon__");
1822 if (SSELevel != NoSSE) {
1823 Builder.defineMacro("__athlon_sse__");
1824 Builder.defineMacro("__tune_athlon_sse__");
1831 case CK_OpteronSSE3:
1833 case CK_Athlon64SSE3:
1835 Builder.defineMacro("__k8");
1836 Builder.defineMacro("__k8__");
1837 Builder.defineMacro("__tune_k8__");
1840 Builder.defineMacro("__amdfam10");
1841 Builder.defineMacro("__amdfam10__");
1842 Builder.defineMacro("__tune_amdfam10__");
1845 Builder.defineMacro("__geode");
1846 Builder.defineMacro("__geode__");
1847 Builder.defineMacro("__tune_geode__");
1851 // Target properties.
1852 Builder.defineMacro("__LITTLE_ENDIAN__");
1853 Builder.defineMacro("__REGISTER_PREFIX__", "");
1855 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1856 // functions in glibc header files that use FP Stack inline asm which the
1857 // backend can't deal with (PR879).
1858 Builder.defineMacro("__NO_MATH_INLINES");
1861 Builder.defineMacro("__AES__");
1864 Builder.defineMacro("__AVX__");
1866 // Each case falls through to the previous one here.
1869 Builder.defineMacro("__SSE4_2__");
1871 Builder.defineMacro("__SSE4_1__");
1873 Builder.defineMacro("__SSSE3__");
1875 Builder.defineMacro("__SSE3__");
1877 Builder.defineMacro("__SSE2__");
1878 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
1880 Builder.defineMacro("__SSE__");
1881 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
1886 if (Opts.MicrosoftExt && PointerWidth == 32) {
1893 Builder.defineMacro("_M_IX86_FP", Twine(2));
1896 Builder.defineMacro("_M_IX86_FP", Twine(1));
1899 Builder.defineMacro("_M_IX86_FP", Twine(0));
1903 // Each case falls through to the previous one here.
1904 switch (MMX3DNowLevel) {
1905 case AMD3DNowAthlon:
1906 Builder.defineMacro("__3dNOW_A__");
1908 Builder.defineMacro("__3dNOW__");
1910 Builder.defineMacro("__MMX__");
1918 X86TargetInfo::validateAsmConstraint(const char *&Name,
1919 TargetInfo::ConstraintInfo &Info) const {
1921 default: return false;
1922 case 'Y': // first letter of a pair:
1923 switch (*(Name+1)) {
1924 default: return false;
1925 case '0': // First SSE register.
1926 case 't': // Any SSE register, when SSE2 is enabled.
1927 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1928 case 'm': // any MMX register, when inter-unit moves enabled.
1929 break; // falls through to setAllowsRegister.
1937 case 'A': // edx:eax.
1938 case 'f': // any x87 floating point stack register.
1939 case 't': // top of floating point stack.
1940 case 'u': // second from top of floating point stack.
1941 case 'q': // Any register accessible as [r]l: a, b, c, and d.
1942 case 'y': // Any MMX register.
1943 case 'x': // Any SSE register.
1944 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1945 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1946 case 'l': // "Index" registers: any general register that can be used as an
1947 // index in a base+index memory access.
1948 Info.setAllowsRegister();
1950 case 'C': // SSE floating point constant.
1951 case 'G': // x87 floating point constant.
1952 case 'e': // 32-bit signed integer constant for use with zero-extending
1953 // x86_64 instructions.
1954 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1955 // x86_64 instructions.
1963 X86TargetInfo::convertConstraint(const char *&Constraint) const {
1964 switch (*Constraint) {
1965 case 'a': return std::string("{ax}");
1966 case 'b': return std::string("{bx}");
1967 case 'c': return std::string("{cx}");
1968 case 'd': return std::string("{dx}");
1969 case 'S': return std::string("{si}");
1970 case 'D': return std::string("{di}");
1971 case 'p': // address
1972 return std::string("im");
1973 case 't': // top of floating point stack.
1974 return std::string("{st}");
1975 case 'u': // second from top of floating point stack.
1976 return std::string("{st(1)}"); // second from top of floating point stack.
1978 return std::string(1, *Constraint);
1981 } // end anonymous namespace
1984 // X86-32 generic target
1985 class X86_32TargetInfo : public X86TargetInfo {
1987 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1988 DoubleAlign = LongLongAlign = 32;
1989 LongDoubleWidth = 96;
1990 LongDoubleAlign = 32;
1991 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1992 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1993 "a0:0:64-f80:32:32-n8:16:32-S128";
1994 SizeType = UnsignedInt;
1995 PtrDiffType = SignedInt;
1996 IntPtrType = SignedInt;
1999 // Use fpret for all types.
2000 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2001 (1 << TargetInfo::Double) |
2002 (1 << TargetInfo::LongDouble));
2004 // x86-32 has atomics up to 8 bytes
2005 // FIXME: Check that we actually have cmpxchg8b before setting
2006 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2007 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2009 virtual const char *getVAListDeclaration() const {
2010 return "typedef char* __builtin_va_list;";
2013 int getEHDataRegisterNumber(unsigned RegNo) const {
2014 if (RegNo == 0) return 0;
2015 if (RegNo == 1) return 2;
2019 } // end anonymous namespace
2022 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2024 OpenBSDI386TargetInfo(const std::string& triple) :
2025 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2026 SizeType = UnsignedLong;
2027 IntPtrType = SignedLong;
2028 PtrDiffType = SignedLong;
2031 } // end anonymous namespace
2034 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2036 DarwinI386TargetInfo(const std::string& triple) :
2037 DarwinTargetInfo<X86_32TargetInfo>(triple) {
2038 LongDoubleWidth = 128;
2039 LongDoubleAlign = 128;
2040 SizeType = UnsignedLong;
2041 IntPtrType = SignedLong;
2042 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2043 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2044 "a0:0:64-f80:128:128-n8:16:32-S128";
2045 HasAlignMac68kSupport = true;
2049 } // end anonymous namespace
2052 // x86-32 Windows target
2053 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2055 WindowsX86_32TargetInfo(const std::string& triple)
2056 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2057 TLSSupported = false;
2058 WCharType = UnsignedShort;
2059 DoubleAlign = LongLongAlign = 64;
2060 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2061 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2062 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2064 virtual void getTargetDefines(const LangOptions &Opts,
2065 MacroBuilder &Builder) const {
2066 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2069 } // end anonymous namespace
2073 // x86-32 Windows Visual Studio target
2074 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2076 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2077 : WindowsX86_32TargetInfo(triple) {
2078 LongDoubleWidth = LongDoubleAlign = 64;
2079 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2081 virtual void getTargetDefines(const LangOptions &Opts,
2082 MacroBuilder &Builder) const {
2083 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2084 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2085 // The value of the following reflects processor type.
2086 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2087 // We lost the original triple, so we use the default.
2088 Builder.defineMacro("_M_IX86", "600");
2091 } // end anonymous namespace
2094 // x86-32 MinGW target
2095 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2097 MinGWX86_32TargetInfo(const std::string& triple)
2098 : WindowsX86_32TargetInfo(triple) {
2100 virtual void getTargetDefines(const LangOptions &Opts,
2101 MacroBuilder &Builder) const {
2102 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2103 DefineStd(Builder, "WIN32", Opts);
2104 DefineStd(Builder, "WINNT", Opts);
2105 Builder.defineMacro("_X86_");
2106 Builder.defineMacro("__MSVCRT__");
2107 Builder.defineMacro("__MINGW32__");
2109 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2110 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2111 if (Opts.MicrosoftExt)
2112 // Provide "as-is" __declspec.
2113 Builder.defineMacro("__declspec", "__declspec");
2115 // Provide alias of __attribute__ like mingw32-gcc.
2116 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2119 } // end anonymous namespace
2122 // x86-32 Cygwin target
2123 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2125 CygwinX86_32TargetInfo(const std::string& triple)
2126 : X86_32TargetInfo(triple) {
2127 TLSSupported = false;
2128 WCharType = UnsignedShort;
2129 DoubleAlign = LongLongAlign = 64;
2130 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2131 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2132 "a0:0:64-f80:32:32-n8:16:32-S32";
2134 virtual void getTargetDefines(const LangOptions &Opts,
2135 MacroBuilder &Builder) const {
2136 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2137 Builder.defineMacro("__CYGWIN__");
2138 Builder.defineMacro("__CYGWIN32__");
2139 DefineStd(Builder, "unix", Opts);
2141 Builder.defineMacro("_GNU_SOURCE");
2144 } // end anonymous namespace
2147 // x86-32 Haiku target
2148 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2150 HaikuX86_32TargetInfo(const std::string& triple)
2151 : X86_32TargetInfo(triple) {
2152 SizeType = UnsignedLong;
2153 IntPtrType = SignedLong;
2154 PtrDiffType = SignedLong;
2155 this->UserLabelPrefix = "";
2157 virtual void getTargetDefines(const LangOptions &Opts,
2158 MacroBuilder &Builder) const {
2159 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2160 Builder.defineMacro("__INTEL__");
2161 Builder.defineMacro("__HAIKU__");
2164 } // end anonymous namespace
2167 template<typename Target>
2168 class RTEMSTargetInfo : public OSTargetInfo<Target> {
2170 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2171 MacroBuilder &Builder) const {
2172 // RTEMS defines; list based off of gcc output
2174 Builder.defineMacro("__rtems__");
2175 Builder.defineMacro("__ELF__");
2178 RTEMSTargetInfo(const std::string &triple)
2179 : OSTargetInfo<Target>(triple) {
2180 this->UserLabelPrefix = "";
2182 llvm::Triple Triple(triple);
2183 switch (Triple.getArch()) {
2185 case llvm::Triple::x86:
2186 // this->MCountName = ".mcount";
2188 case llvm::Triple::mips:
2189 case llvm::Triple::mipsel:
2190 case llvm::Triple::ppc:
2191 case llvm::Triple::ppc64:
2192 // this->MCountName = "_mcount";
2194 case llvm::Triple::arm:
2195 // this->MCountName = "__mcount";
2203 // x86-32 RTEMS target
2204 class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2206 RTEMSX86_32TargetInfo(const std::string& triple)
2207 : X86_32TargetInfo(triple) {
2208 SizeType = UnsignedLong;
2209 IntPtrType = SignedLong;
2210 PtrDiffType = SignedLong;
2211 this->UserLabelPrefix = "";
2213 virtual void getTargetDefines(const LangOptions &Opts,
2214 MacroBuilder &Builder) const {
2215 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2216 Builder.defineMacro("__INTEL__");
2217 Builder.defineMacro("__rtems__");
2220 } // end anonymous namespace
2223 // x86-64 generic target
2224 class X86_64TargetInfo : public X86TargetInfo {
2226 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2227 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2228 LongDoubleWidth = 128;
2229 LongDoubleAlign = 128;
2230 LargeArrayMinWidth = 128;
2231 LargeArrayAlign = 128;
2232 IntMaxType = SignedLong;
2233 UIntMaxType = UnsignedLong;
2234 Int64Type = SignedLong;
2237 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2238 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2239 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2241 // Use fpret only for long double.
2242 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2244 // x86-64 has atomics up to 16 bytes.
2245 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2246 // on CPUs with cmpxchg16b
2247 MaxAtomicPromoteWidth = 128;
2248 MaxAtomicInlineWidth = 64;
2250 virtual const char *getVAListDeclaration() const {
2251 return "typedef struct __va_list_tag {"
2252 " unsigned gp_offset;"
2253 " unsigned fp_offset;"
2254 " void* overflow_arg_area;"
2255 " void* reg_save_area;"
2257 "typedef __va_list_tag __builtin_va_list[1];";
2260 int getEHDataRegisterNumber(unsigned RegNo) const {
2261 if (RegNo == 0) return 0;
2262 if (RegNo == 1) return 1;
2266 } // end anonymous namespace
2269 // x86-64 Windows target
2270 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2272 WindowsX86_64TargetInfo(const std::string& triple)
2273 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2274 TLSSupported = false;
2275 WCharType = UnsignedShort;
2276 LongWidth = LongAlign = 32;
2277 DoubleAlign = LongLongAlign = 64;
2278 IntMaxType = SignedLongLong;
2279 UIntMaxType = UnsignedLongLong;
2280 Int64Type = SignedLongLong;
2281 SizeType = UnsignedLongLong;
2282 PtrDiffType = SignedLongLong;
2283 IntPtrType = SignedLongLong;
2284 this->UserLabelPrefix = "";
2286 virtual void getTargetDefines(const LangOptions &Opts,
2287 MacroBuilder &Builder) const {
2288 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2289 Builder.defineMacro("_WIN64");
2291 virtual const char *getVAListDeclaration() const {
2292 return "typedef char* __builtin_va_list;";
2295 } // end anonymous namespace
2298 // x86-64 Windows Visual Studio target
2299 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2301 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2302 : WindowsX86_64TargetInfo(triple) {
2303 LongDoubleWidth = LongDoubleAlign = 64;
2304 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2306 virtual void getTargetDefines(const LangOptions &Opts,
2307 MacroBuilder &Builder) const {
2308 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2309 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2310 Builder.defineMacro("_M_X64");
2311 Builder.defineMacro("_M_AMD64");
2314 } // end anonymous namespace
2317 // x86-64 MinGW target
2318 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2320 MinGWX86_64TargetInfo(const std::string& triple)
2321 : WindowsX86_64TargetInfo(triple) {
2323 virtual void getTargetDefines(const LangOptions &Opts,
2324 MacroBuilder &Builder) const {
2325 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2326 DefineStd(Builder, "WIN64", Opts);
2327 Builder.defineMacro("__MSVCRT__");
2328 Builder.defineMacro("__MINGW32__");
2329 Builder.defineMacro("__MINGW64__");
2331 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2332 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2333 if (Opts.MicrosoftExt)
2334 // Provide "as-is" __declspec.
2335 Builder.defineMacro("__declspec", "__declspec");
2337 // Provide alias of __attribute__ like mingw32-gcc.
2338 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2341 } // end anonymous namespace
2344 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2346 DarwinX86_64TargetInfo(const std::string& triple)
2347 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2348 Int64Type = SignedLongLong;
2351 } // end anonymous namespace
2354 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2356 OpenBSDX86_64TargetInfo(const std::string& triple)
2357 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2358 IntMaxType = SignedLongLong;
2359 UIntMaxType = UnsignedLongLong;
2360 Int64Type = SignedLongLong;
2363 } // end anonymous namespace
2366 class ARMTargetInfo : public TargetInfo {
2367 // Possible FPU choices.
2375 static bool FPUModeIsVFP(FPUMode Mode) {
2376 return Mode >= VFP2FPU && Mode <= NeonFPU;
2379 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2380 static const char * const GCCRegNames[];
2382 std::string ABI, CPU;
2386 unsigned IsThumb : 1;
2388 // Initialized via features.
2389 unsigned SoftFloat : 1;
2390 unsigned SoftFloatABI : 1;
2392 static const Builtin::Info BuiltinInfo[];
2395 ARMTargetInfo(const std::string &TripleStr)
2396 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2398 SizeType = UnsignedInt;
2399 PtrDiffType = SignedInt;
2401 // {} in inline assembly are neon specifiers, not assembly variant
2403 NoAsmVariants = true;
2405 // FIXME: Should we just treat this as a feature?
2406 IsThumb = getTriple().getArchName().startswith("thumb");
2408 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2409 // so set preferred for small types to 32.
2410 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2411 "i64:64:64-f32:32:32-f64:64:64-"
2412 "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2414 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2415 "i64:64:64-f32:32:32-f64:64:64-"
2416 "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2419 // ARM targets default to using the ARM C++ ABI.
2420 CXXABI = CXXABI_ARM;
2422 // ARM has atomics up to 8 bytes
2423 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2424 MaxAtomicPromoteWidth = 64;
2426 virtual const char *getABI() const { return ABI.c_str(); }
2427 virtual bool setABI(const std::string &Name) {
2430 // The defaults (above) are for AAPCS, check if we need to change them.
2432 // FIXME: We need support for -meabi... we could just mangle it into the
2434 if (Name == "apcs-gnu") {
2435 DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
2436 SizeType = UnsignedLong;
2438 // Do not respect the alignment of bit-field types when laying out
2439 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2440 UseBitFieldTypeAlignment = false;
2442 /// Do force alignment of members that follow zero length bitfields. If
2443 /// the alignment of the zero-length bitfield is greater than the member
2444 /// that follows it, `bar', `bar' will be aligned as the type of the
2445 /// zero length bitfield.
2446 UseZeroLengthBitfieldAlignment = true;
2448 /// gcc forces the alignment to 4 bytes, regardless of the type of the
2449 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in
2451 ZeroLengthBitfieldBoundary = 32;
2454 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2455 // so set preferred for small types to 32.
2456 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2457 "i64:32:64-f32:32:32-f64:32:64-"
2458 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2460 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2461 "i64:32:64-f32:32:32-f64:32:64-"
2462 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2465 // FIXME: Override "preferred align" for double and long long.
2466 } else if (Name == "aapcs") {
2467 // FIXME: Enumerated types are variable width in straight AAPCS.
2468 } else if (Name == "aapcs-linux") {
2476 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2477 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2478 Features["vfp2"] = true;
2479 else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2480 Features["neon"] = true;
2483 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2484 const std::string &Name,
2485 bool Enabled) const {
2486 if (Name == "soft-float" || Name == "soft-float-abi" ||
2487 Name == "vfp2" || Name == "vfp3" || Name == "neon") {
2488 Features[Name] = Enabled;
2495 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2497 SoftFloat = SoftFloatABI = false;
2498 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2499 if (Features[i] == "+soft-float")
2501 else if (Features[i] == "+soft-float-abi")
2502 SoftFloatABI = true;
2503 else if (Features[i] == "+vfp2")
2505 else if (Features[i] == "+vfp3")
2507 else if (Features[i] == "+neon")
2511 // Remove front-end specific options which the backend handles differently.
2512 std::vector<std::string>::iterator it;
2513 it = std::find(Features.begin(), Features.end(), "+soft-float");
2514 if (it != Features.end())
2516 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2517 if (it != Features.end())
2521 static const char *getCPUDefineSuffix(StringRef Name) {
2522 return llvm::StringSwitch<const char*>(Name)
2523 .Cases("arm8", "arm810", "4")
2524 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2525 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2526 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2527 .Case("ep9312", "4T")
2528 .Cases("arm10tdmi", "arm1020t", "5T")
2529 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2530 .Case("arm926ej-s", "5TEJ")
2531 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2532 .Cases("xscale", "iwmmxt", "5TE")
2533 .Case("arm1136j-s", "6J")
2534 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2535 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2536 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2537 .Cases("cortex-a8", "cortex-a9", "7A")
2538 .Case("cortex-m3", "7M")
2539 .Case("cortex-m0", "6M")
2542 virtual bool setCPU(const std::string &Name) {
2543 if (!getCPUDefineSuffix(Name))
2549 virtual void getTargetDefines(const LangOptions &Opts,
2550 MacroBuilder &Builder) const {
2551 // Target identification.
2552 Builder.defineMacro("__arm");
2553 Builder.defineMacro("__arm__");
2555 // Target properties.
2556 Builder.defineMacro("__ARMEL__");
2557 Builder.defineMacro("__LITTLE_ENDIAN__");
2558 Builder.defineMacro("__REGISTER_PREFIX__", "");
2560 StringRef CPUArch = getCPUDefineSuffix(CPU);
2561 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2563 // Subtarget options.
2565 // FIXME: It's more complicated than this and we don't really support
2567 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2568 Builder.defineMacro("__THUMB_INTERWORK__");
2570 if (ABI == "aapcs" || ABI == "aapcs-linux")
2571 Builder.defineMacro("__ARM_EABI__");
2574 Builder.defineMacro("__SOFTFP__");
2576 if (CPU == "xscale")
2577 Builder.defineMacro("__XSCALE__");
2579 bool IsARMv7 = CPUArch.startswith("7");
2581 Builder.defineMacro("__THUMBEL__");
2582 Builder.defineMacro("__thumb__");
2583 if (CPUArch == "6T2" || IsARMv7)
2584 Builder.defineMacro("__thumb2__");
2587 // Note, this is always on in gcc, even though it doesn't make sense.
2588 Builder.defineMacro("__APCS_32__");
2590 if (FPUModeIsVFP((FPUMode) FPU))
2591 Builder.defineMacro("__VFP_FP__");
2593 // This only gets set when Neon instructions are actually available, unlike
2594 // the VFP define, hence the soft float and arch check. This is subtly
2595 // different from gcc, we follow the intent which was that it should be set
2596 // when Neon instructions are actually available.
2597 if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2598 Builder.defineMacro("__ARM_NEON__");
2600 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2601 unsigned &NumRecords) const {
2602 Records = BuiltinInfo;
2603 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2605 virtual const char *getVAListDeclaration() const {
2606 return "typedef void* __builtin_va_list;";
2608 virtual void getGCCRegNames(const char * const *&Names,
2609 unsigned &NumNames) const;
2610 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2611 unsigned &NumAliases) const;
2612 virtual bool validateAsmConstraint(const char *&Name,
2613 TargetInfo::ConstraintInfo &Info) const {
2614 // FIXME: Check if this is complete
2619 case 'w': // VFP Floating point register single precision
2620 case 'P': // VFP Floating point register double precision
2621 Info.setAllowsRegister();
2623 case 'Q': // A memory address that is a single base register.
2624 Info.setAllowsMemory();
2626 case 'U': // a memory reference...
2628 case 'q': // ...ARMV4 ldrsb
2629 case 'v': // ...VFP load/store (reg+constant offset)
2630 case 'y': // ...iWMMXt load/store
2631 case 't': // address valid for load/store opaque types wider
2633 case 'n': // valid address for Neon doubleword vector load/store
2634 case 'm': // valid address for Neon element and structure load/store
2635 case 's': // valid address for non-offset loads/stores of quad-word
2636 // values in four ARM registers
2637 Info.setAllowsMemory();
2644 virtual std::string convertConstraint(const char *&Constraint) const {
2646 switch (*Constraint) {
2647 case 'U': // Two-character constraint; add "^" hint for later parsing.
2648 R = std::string("^") + std::string(Constraint, 2);
2651 case 'p': // 'p' should be translated to 'r' by default.
2652 R = std::string("r");
2655 return std::string(1, *Constraint);
2659 virtual const char *getClobbers() const {
2660 // FIXME: Is this really right?
2665 const char * const ARMTargetInfo::GCCRegNames[] = {
2666 // Integer registers
2667 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2668 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2671 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2672 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2673 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2674 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2677 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2678 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2679 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2680 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2683 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2684 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2687 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2688 unsigned &NumNames) const {
2689 Names = GCCRegNames;
2690 NumNames = llvm::array_lengthof(GCCRegNames);
2693 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2703 { { "v6", "rfp" }, "r9" },
2704 { { "sl" }, "r10" },
2705 { { "fp" }, "r11" },
2706 { { "ip" }, "r12" },
2707 { { "r13" }, "sp" },
2708 { { "r14" }, "lr" },
2709 { { "r15" }, "pc" },
2710 // The S, D and Q registers overlap, but aren't really aliases; we
2711 // don't want to substitute one of these for a different-sized one.
2714 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2715 unsigned &NumAliases) const {
2716 Aliases = GCCRegAliases;
2717 NumAliases = llvm::array_lengthof(GCCRegAliases);
2720 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2721 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2722 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2724 #include "clang/Basic/BuiltinsARM.def"
2726 } // end anonymous namespace.
2730 class DarwinARMTargetInfo :
2731 public DarwinTargetInfo<ARMTargetInfo> {
2733 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2734 MacroBuilder &Builder) const {
2735 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2739 DarwinARMTargetInfo(const std::string& triple)
2740 : DarwinTargetInfo<ARMTargetInfo>(triple) {
2741 HasAlignMac68kSupport = true;
2742 // iOS always has 64-bit atomic instructions.
2743 // FIXME: This should be based off of the target features in ARMTargetInfo.
2744 MaxAtomicInlineWidth = 64;
2747 } // end anonymous namespace.
2750 class SparcV8TargetInfo : public TargetInfo {
2751 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2752 static const char * const GCCRegNames[];
2755 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
2756 // FIXME: Support Sparc quad-precision long double?
2757 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2758 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2760 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2761 const std::string &Name,
2762 bool Enabled) const {
2763 if (Name == "soft-float")
2764 Features[Name] = Enabled;
2770 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2772 for (unsigned i = 0, e = Features.size(); i != e; ++i)
2773 if (Features[i] == "+soft-float")
2776 virtual void getTargetDefines(const LangOptions &Opts,
2777 MacroBuilder &Builder) const {
2778 DefineStd(Builder, "sparc", Opts);
2779 Builder.defineMacro("__sparcv8");
2780 Builder.defineMacro("__REGISTER_PREFIX__", "");
2783 Builder.defineMacro("SOFT_FLOAT", "1");
2785 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2786 unsigned &NumRecords) const {
2787 // FIXME: Implement!
2789 virtual const char *getVAListDeclaration() const {
2790 return "typedef void* __builtin_va_list;";
2792 virtual void getGCCRegNames(const char * const *&Names,
2793 unsigned &NumNames) const;
2794 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2795 unsigned &NumAliases) const;
2796 virtual bool validateAsmConstraint(const char *&Name,
2797 TargetInfo::ConstraintInfo &info) const {
2798 // FIXME: Implement!
2801 virtual const char *getClobbers() const {
2802 // FIXME: Implement!
2807 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2808 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2809 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2810 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2811 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2814 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2815 unsigned &NumNames) const {
2816 Names = GCCRegNames;
2817 NumNames = llvm::array_lengthof(GCCRegNames);
2820 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2831 { { "o2" }, "r10" },
2832 { { "o3" }, "r11" },
2833 { { "o4" }, "r12" },
2834 { { "o5" }, "r13" },
2835 { { "o6", "sp" }, "r14" },
2836 { { "o7" }, "r15" },
2837 { { "l0" }, "r16" },
2838 { { "l1" }, "r17" },
2839 { { "l2" }, "r18" },
2840 { { "l3" }, "r19" },
2841 { { "l4" }, "r20" },
2842 { { "l5" }, "r21" },
2843 { { "l6" }, "r22" },
2844 { { "l7" }, "r23" },
2845 { { "i0" }, "r24" },
2846 { { "i1" }, "r25" },
2847 { { "i2" }, "r26" },
2848 { { "i3" }, "r27" },
2849 { { "i4" }, "r28" },
2850 { { "i5" }, "r29" },
2851 { { "i6", "fp" }, "r30" },
2852 { { "i7" }, "r31" },
2855 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2856 unsigned &NumAliases) const {
2857 Aliases = GCCRegAliases;
2858 NumAliases = llvm::array_lengthof(GCCRegAliases);
2860 } // end anonymous namespace.
2863 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2865 AuroraUXSparcV8TargetInfo(const std::string& triple) :
2866 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2867 SizeType = UnsignedInt;
2868 PtrDiffType = SignedInt;
2871 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2873 SolarisSparcV8TargetInfo(const std::string& triple) :
2874 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2875 SizeType = UnsignedInt;
2876 PtrDiffType = SignedInt;
2879 } // end anonymous namespace.
2882 class MSP430TargetInfo : public TargetInfo {
2883 static const char * const GCCRegNames[];
2885 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2886 TLSSupported = false;
2887 IntWidth = 16; IntAlign = 16;
2888 LongWidth = 32; LongLongWidth = 64;
2889 LongAlign = LongLongAlign = 16;
2890 PointerWidth = 16; PointerAlign = 16;
2891 SizeType = UnsignedInt;
2892 IntMaxType = SignedLong;
2893 UIntMaxType = UnsignedLong;
2894 IntPtrType = SignedShort;
2895 PtrDiffType = SignedInt;
2896 SigAtomicType = SignedLong;
2897 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2899 virtual void getTargetDefines(const LangOptions &Opts,
2900 MacroBuilder &Builder) const {
2901 Builder.defineMacro("MSP430");
2902 Builder.defineMacro("__MSP430__");
2903 // FIXME: defines for different 'flavours' of MCU
2905 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2906 unsigned &NumRecords) const {
2907 // FIXME: Implement.
2911 virtual void getGCCRegNames(const char * const *&Names,
2912 unsigned &NumNames) const;
2913 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2914 unsigned &NumAliases) const {
2919 virtual bool validateAsmConstraint(const char *&Name,
2920 TargetInfo::ConstraintInfo &info) const {
2921 // No target constraints for now.
2924 virtual const char *getClobbers() const {
2925 // FIXME: Is this really right?
2928 virtual const char *getVAListDeclaration() const {
2930 return "typedef char* __builtin_va_list;";
2934 const char * const MSP430TargetInfo::GCCRegNames[] = {
2935 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2936 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2939 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2940 unsigned &NumNames) const {
2941 Names = GCCRegNames;
2942 NumNames = llvm::array_lengthof(GCCRegNames);
2948 class SystemZTargetInfo : public TargetInfo {
2949 static const char * const GCCRegNames[];
2951 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2952 TLSSupported = false;
2953 IntWidth = IntAlign = 32;
2954 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2955 PointerWidth = PointerAlign = 64;
2956 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2957 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2959 virtual void getTargetDefines(const LangOptions &Opts,
2960 MacroBuilder &Builder) const {
2961 Builder.defineMacro("__s390__");
2962 Builder.defineMacro("__s390x__");
2964 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2965 unsigned &NumRecords) const {
2966 // FIXME: Implement.
2971 virtual void getGCCRegNames(const char * const *&Names,
2972 unsigned &NumNames) const;
2973 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2974 unsigned &NumAliases) const {
2979 virtual bool validateAsmConstraint(const char *&Name,
2980 TargetInfo::ConstraintInfo &info) const {
2984 virtual const char *getClobbers() const {
2985 // FIXME: Is this really right?
2988 virtual const char *getVAListDeclaration() const {
2990 return "typedef char* __builtin_va_list;";
2994 const char * const SystemZTargetInfo::GCCRegNames[] = {
2995 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2996 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2999 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
3000 unsigned &NumNames) const {
3001 Names = GCCRegNames;
3002 NumNames = llvm::array_lengthof(GCCRegNames);
3007 class BlackfinTargetInfo : public TargetInfo {
3008 static const char * const GCCRegNames[];
3010 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
3011 TLSSupported = false;
3014 LongDoubleAlign = 32;
3015 DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
3018 virtual void getTargetDefines(const LangOptions &Opts,
3019 MacroBuilder &Builder) const {
3020 DefineStd(Builder, "bfin", Opts);
3021 DefineStd(Builder, "BFIN", Opts);
3022 Builder.defineMacro("__ADSPBLACKFIN__");
3023 // FIXME: This one is really dependent on -mcpu
3024 Builder.defineMacro("__ADSPLPBLACKFIN__");
3025 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
3028 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3029 unsigned &NumRecords) const {
3030 // FIXME: Implement.
3035 virtual void getGCCRegNames(const char * const *&Names,
3036 unsigned &NumNames) const;
3038 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3039 unsigned &NumAliases) const {
3045 virtual bool validateAsmConstraint(const char *&Name,
3046 TargetInfo::ConstraintInfo &Info) const {
3047 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
3048 Info.setAllowsRegister();
3054 virtual const char *getClobbers() const {
3058 virtual const char *getVAListDeclaration() const {
3059 return "typedef char* __builtin_va_list;";
3063 const char * const BlackfinTargetInfo::GCCRegNames[] = {
3064 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3065 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
3066 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
3067 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
3069 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
3070 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
3073 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
3074 unsigned &NumNames) const {
3075 Names = GCCRegNames;
3076 NumNames = llvm::array_lengthof(GCCRegNames);
3082 // LLVM and Clang cannot be used directly to output native binaries for
3083 // target, but is used to compile C code to llvm bitcode with correct
3084 // type and alignment information.
3086 // TCE uses the llvm bitcode as input and uses it for generating customized
3087 // target processor and program binary. TCE co-design environment is
3088 // publicly available in http://tce.cs.tut.fi
3090 static const unsigned TCEOpenCLAddrSpaceMap[] = {
3093 5 // opencl_constant
3096 class TCETargetInfo : public TargetInfo{
3098 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3099 TLSSupported = false;
3101 LongWidth = LongLongWidth = 32;
3104 LongAlign = LongLongAlign = 32;
3106 SizeType = UnsignedInt;
3107 IntMaxType = SignedLong;
3108 UIntMaxType = UnsignedLong;
3109 IntPtrType = SignedInt;
3110 PtrDiffType = SignedInt;
3115 LongDoubleWidth = 32;
3116 LongDoubleAlign = 32;
3117 FloatFormat = &llvm::APFloat::IEEEsingle;
3118 DoubleFormat = &llvm::APFloat::IEEEsingle;
3119 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3120 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3121 "i16:16:32-i32:32:32-i64:32:32-"
3122 "f32:32:32-f64:32:32-v64:32:32-"
3123 "v128:32:32-a0:0:32-n32";
3124 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3127 virtual void getTargetDefines(const LangOptions &Opts,
3128 MacroBuilder &Builder) const {
3129 DefineStd(Builder, "tce", Opts);
3130 Builder.defineMacro("__TCE__");
3131 Builder.defineMacro("__TCE_V1__");
3133 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3134 unsigned &NumRecords) const {}
3135 virtual const char *getClobbers() const {
3138 virtual const char *getVAListDeclaration() const {
3139 return "typedef void* __builtin_va_list;";
3141 virtual void getGCCRegNames(const char * const *&Names,
3142 unsigned &NumNames) const {}
3143 virtual bool validateAsmConstraint(const char *&Name,
3144 TargetInfo::ConstraintInfo &info) const {
3147 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3148 unsigned &NumAliases) const {}
3153 class MipsTargetInfoBase : public TargetInfo {
3158 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3159 : TargetInfo(triple), ABI(ABIStr) {
3160 SizeType = UnsignedInt;
3161 PtrDiffType = SignedInt;
3163 virtual const char *getABI() const { return ABI.c_str(); }
3164 virtual bool setABI(const std::string &Name) = 0;
3165 virtual bool setCPU(const std::string &Name) {
3169 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3170 Features[ABI] = true;
3171 Features[CPU] = true;
3173 virtual void getArchDefines(const LangOptions &Opts,
3174 MacroBuilder &Builder) const = 0;
3175 virtual void getTargetDefines(const LangOptions &Opts,
3176 MacroBuilder &Builder) const = 0;
3177 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3178 unsigned &NumRecords) const {
3179 // FIXME: Implement!
3181 virtual const char *getVAListDeclaration() const {
3182 return "typedef void* __builtin_va_list;";
3184 virtual void getGCCRegNames(const char * const *&Names,
3185 unsigned &NumNames) const {
3186 static const char * const GCCRegNames[] = {
3187 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
3188 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
3189 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
3190 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
3191 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
3192 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3193 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3194 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3195 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3196 "$fcc5","$fcc6","$fcc7"
3198 Names = GCCRegNames;
3199 NumNames = llvm::array_lengthof(GCCRegNames);
3201 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3202 unsigned &NumAliases) const = 0;
3203 virtual bool validateAsmConstraint(const char *&Name,
3204 TargetInfo::ConstraintInfo &Info) const {
3207 case 'r': // CPU registers.
3208 case 'd': // Equivalent to "r" unless generating MIPS16 code.
3209 case 'y': // Equivalent to "r", backwards compatibility only.
3210 case 'f': // floating-point registers.
3211 Info.setAllowsRegister();
3217 virtual const char *getClobbers() const {
3218 // FIXME: Implement!
3223 class Mips32TargetInfoBase : public MipsTargetInfoBase {
3225 Mips32TargetInfoBase(const std::string& triple) :
3226 MipsTargetInfoBase(triple, "o32") {}
3227 virtual bool setABI(const std::string &Name) {
3228 if ((Name == "o32") || (Name == "eabi")) {
3234 virtual void getArchDefines(const LangOptions &Opts,
3235 MacroBuilder &Builder) const {
3237 Builder.defineMacro("__mips_o32");
3238 Builder.defineMacro("_ABIO32", "1");
3239 Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3241 else if (ABI == "eabi")
3242 Builder.defineMacro("__mips_eabi");
3244 llvm_unreachable("Invalid ABI for Mips32.");
3246 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3247 unsigned &NumAliases) const {
3248 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3258 { { "t2" }, "$10" },
3259 { { "t3" }, "$11" },
3260 { { "t4" }, "$12" },
3261 { { "t5" }, "$13" },
3262 { { "t6" }, "$14" },
3263 { { "t7" }, "$15" },
3264 { { "s0" }, "$16" },
3265 { { "s1" }, "$17" },
3266 { { "s2" }, "$18" },
3267 { { "s3" }, "$19" },
3268 { { "s4" }, "$20" },
3269 { { "s5" }, "$21" },
3270 { { "s6" }, "$22" },
3271 { { "s7" }, "$23" },
3272 { { "t8" }, "$24" },
3273 { { "t9" }, "$25" },
3274 { { "k0" }, "$26" },
3275 { { "k1" }, "$27" },
3276 { { "gp" }, "$28" },
3277 { { "sp" }, "$29" },
3278 { { "fp" }, "$30" },
3281 Aliases = GCCRegAliases;
3282 NumAliases = llvm::array_lengthof(GCCRegAliases);
3286 class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3288 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3289 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3290 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3292 virtual void getTargetDefines(const LangOptions &Opts,
3293 MacroBuilder &Builder) const {
3294 DefineStd(Builder, "mips", Opts);
3295 Builder.defineMacro("_mips");
3296 DefineStd(Builder, "MIPSEB", Opts);
3297 Builder.defineMacro("_MIPSEB");
3298 Builder.defineMacro("__REGISTER_PREFIX__", "");
3299 getArchDefines(Opts, Builder);
3303 class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3305 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3306 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3307 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3309 virtual void getTargetDefines(const LangOptions &Opts,
3310 MacroBuilder &Builder) const {
3311 DefineStd(Builder, "mips", Opts);
3312 Builder.defineMacro("_mips");
3313 DefineStd(Builder, "MIPSEL", Opts);
3314 Builder.defineMacro("_MIPSEL");
3315 Builder.defineMacro("__REGISTER_PREFIX__", "");
3316 getArchDefines(Opts, Builder);
3320 class Mips64TargetInfoBase : public MipsTargetInfoBase {
3321 virtual void SetDescriptionString(const std::string &Name) = 0;
3323 Mips64TargetInfoBase(const std::string& triple) :
3324 MipsTargetInfoBase(triple, "n64") {}
3325 virtual bool setABI(const std::string &Name) {
3326 SetDescriptionString(Name);
3327 if ((Name == "n32") || (Name == "n64")) {
3333 virtual void getArchDefines(const LangOptions &Opts,
3334 MacroBuilder &Builder) const {
3336 Builder.defineMacro("__mips_n32");
3337 Builder.defineMacro("_ABIN32", "2");
3338 Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3340 else if (ABI == "n64") {
3341 Builder.defineMacro("__mips_n64");
3342 Builder.defineMacro("_ABI64", "3");
3343 Builder.defineMacro("_MIPS_SIM", "_ABI64");
3346 llvm_unreachable("Invalid ABI for Mips64.");
3348 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3349 unsigned &NumAliases) const {
3350 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3360 { { "a6" }, "$10" },
3361 { { "a7" }, "$11" },
3362 { { "t0" }, "$12" },
3363 { { "t1" }, "$13" },
3364 { { "t2" }, "$14" },
3365 { { "t3" }, "$15" },
3366 { { "s0" }, "$16" },
3367 { { "s1" }, "$17" },
3368 { { "s2" }, "$18" },
3369 { { "s3" }, "$19" },
3370 { { "s4" }, "$20" },
3371 { { "s5" }, "$21" },
3372 { { "s6" }, "$22" },
3373 { { "s7" }, "$23" },
3374 { { "t8" }, "$24" },
3375 { { "t9" }, "$25" },
3376 { { "k0" }, "$26" },
3377 { { "k1" }, "$27" },
3378 { { "gp" }, "$28" },
3379 { { "sp" }, "$29" },
3380 { { "fp" }, "$30" },
3383 Aliases = GCCRegAliases;
3384 NumAliases = llvm::array_lengthof(GCCRegAliases);
3388 class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3389 virtual void SetDescriptionString(const std::string &Name) {
3390 // Change DescriptionString only if ABI is n32.
3392 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3393 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3396 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3397 // Default ABI is n64.
3398 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3399 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3401 virtual void getTargetDefines(const LangOptions &Opts,
3402 MacroBuilder &Builder) const {
3403 DefineStd(Builder, "mips", Opts);
3404 Builder.defineMacro("_mips");
3405 DefineStd(Builder, "MIPSEB", Opts);
3406 Builder.defineMacro("_MIPSEB");
3407 Builder.defineMacro("__REGISTER_PREFIX__", "");
3408 getArchDefines(Opts, Builder);
3412 class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3413 virtual void SetDescriptionString(const std::string &Name) {
3414 // Change DescriptionString only if ABI is n32.
3416 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3417 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3420 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3421 // Default ABI is n64.
3422 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3423 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3425 virtual void getTargetDefines(const LangOptions &Opts,
3426 MacroBuilder &Builder) const {
3427 DefineStd(Builder, "mips", Opts);
3428 Builder.defineMacro("_mips");
3429 DefineStd(Builder, "MIPSEL", Opts);
3430 Builder.defineMacro("_MIPSEL");
3431 Builder.defineMacro("__REGISTER_PREFIX__", "");
3432 getArchDefines(Opts, Builder);
3435 } // end anonymous namespace.
3438 class PNaClTargetInfo : public TargetInfo {
3440 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3441 this->UserLabelPrefix = "";
3442 this->LongAlign = 32;
3443 this->LongWidth = 32;
3444 this->PointerAlign = 32;
3445 this->PointerWidth = 32;
3446 this->IntMaxType = TargetInfo::SignedLongLong;
3447 this->UIntMaxType = TargetInfo::UnsignedLongLong;
3448 this->Int64Type = TargetInfo::SignedLongLong;
3449 this->DoubleAlign = 64;
3450 this->LongDoubleWidth = 64;
3451 this->LongDoubleAlign = 64;
3452 this->SizeType = TargetInfo::UnsignedInt;
3453 this->PtrDiffType = TargetInfo::SignedInt;
3454 this->IntPtrType = TargetInfo::SignedInt;
3455 this->RegParmMax = 2;
3456 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3457 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3460 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3462 virtual void getArchDefines(const LangOptions &Opts,
3463 MacroBuilder &Builder) const {
3464 Builder.defineMacro("__le32__");
3465 Builder.defineMacro("__pnacl__");
3467 virtual void getTargetDefines(const LangOptions &Opts,
3468 MacroBuilder &Builder) const {
3469 DefineStd(Builder, "unix", Opts);
3470 Builder.defineMacro("__ELF__");
3471 if (Opts.POSIXThreads)
3472 Builder.defineMacro("_REENTRANT");
3474 Builder.defineMacro("_GNU_SOURCE");
3476 Builder.defineMacro("__native_client__");
3477 getArchDefines(Opts, Builder);
3479 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3480 unsigned &NumRecords) const {
3482 virtual const char *getVAListDeclaration() const {
3483 return "typedef int __builtin_va_list[4];";
3485 virtual void getGCCRegNames(const char * const *&Names,
3486 unsigned &NumNames) const;
3487 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3488 unsigned &NumAliases) const;
3489 virtual bool validateAsmConstraint(const char *&Name,
3490 TargetInfo::ConstraintInfo &Info) const {
3494 virtual const char *getClobbers() const {
3499 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3500 unsigned &NumNames) const {
3505 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3506 unsigned &NumAliases) const {
3510 } // end anonymous namespace.
3513 //===----------------------------------------------------------------------===//
3515 //===----------------------------------------------------------------------===//
3517 static TargetInfo *AllocateTarget(const std::string &T) {
3518 llvm::Triple Triple(T);
3519 llvm::Triple::OSType os = Triple.getOS();
3521 switch (Triple.getArch()) {
3525 case llvm::Triple::arm:
3526 case llvm::Triple::thumb:
3527 if (Triple.isOSDarwin())
3528 return new DarwinARMTargetInfo(T);
3531 case llvm::Triple::Linux:
3532 return new LinuxTargetInfo<ARMTargetInfo>(T);
3533 case llvm::Triple::FreeBSD:
3534 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3535 case llvm::Triple::NetBSD:
3536 return new NetBSDTargetInfo<ARMTargetInfo>(T);
3537 case llvm::Triple::RTEMS:
3538 return new RTEMSTargetInfo<ARMTargetInfo>(T);
3540 return new ARMTargetInfo(T);
3543 case llvm::Triple::bfin:
3544 if ( os == llvm::Triple::RTEMS )
3545 return new RTEMSTargetInfo<BlackfinTargetInfo>(T);
3546 return new BlackfinTargetInfo(T);
3548 case llvm::Triple::msp430:
3549 return new MSP430TargetInfo(T);
3551 case llvm::Triple::mips:
3553 case llvm::Triple::Linux:
3554 return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3555 case llvm::Triple::RTEMS:
3556 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3557 case llvm::Triple::FreeBSD:
3558 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3559 case llvm::Triple::NetBSD:
3560 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3562 return new Mips32EBTargetInfo(T);
3565 case llvm::Triple::mipsel:
3567 case llvm::Triple::Linux:
3568 return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3569 case llvm::Triple::RTEMS:
3570 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3571 case llvm::Triple::FreeBSD:
3572 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3573 case llvm::Triple::NetBSD:
3574 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3576 return new Mips32ELTargetInfo(T);
3579 case llvm::Triple::mips64:
3581 case llvm::Triple::Linux:
3582 return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3583 case llvm::Triple::RTEMS:
3584 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3585 case llvm::Triple::FreeBSD:
3586 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3587 case llvm::Triple::NetBSD:
3588 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3590 return new Mips64EBTargetInfo(T);
3593 case llvm::Triple::mips64el:
3595 case llvm::Triple::Linux:
3596 return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3597 case llvm::Triple::RTEMS:
3598 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3599 case llvm::Triple::FreeBSD:
3600 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3601 case llvm::Triple::NetBSD:
3602 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3604 return new Mips64ELTargetInfo(T);
3607 case llvm::Triple::le32:
3609 case llvm::Triple::NativeClient:
3610 return new PNaClTargetInfo(T);
3615 case llvm::Triple::ppc:
3616 if (Triple.isOSDarwin())
3617 return new DarwinPPC32TargetInfo(T);
3619 case llvm::Triple::Linux:
3620 return new LinuxTargetInfo<PPC32TargetInfo>(T);
3621 case llvm::Triple::FreeBSD:
3622 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3623 case llvm::Triple::NetBSD:
3624 return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3625 case llvm::Triple::RTEMS:
3626 return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3628 return new PPC32TargetInfo(T);
3631 case llvm::Triple::ppc64:
3632 if (Triple.isOSDarwin())
3633 return new DarwinPPC64TargetInfo(T);
3635 case llvm::Triple::Linux:
3636 return new LinuxTargetInfo<PPC64TargetInfo>(T);
3637 case llvm::Triple::Lv2:
3638 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3639 case llvm::Triple::FreeBSD:
3640 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3641 case llvm::Triple::NetBSD:
3642 return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3644 return new PPC64TargetInfo(T);
3647 case llvm::Triple::ptx32:
3648 return new PTX32TargetInfo(T);
3649 case llvm::Triple::ptx64:
3650 return new PTX64TargetInfo(T);
3652 case llvm::Triple::mblaze:
3653 return new MBlazeTargetInfo(T);
3655 case llvm::Triple::sparc:
3657 case llvm::Triple::Linux:
3658 return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3659 case llvm::Triple::AuroraUX:
3660 return new AuroraUXSparcV8TargetInfo(T);
3661 case llvm::Triple::Solaris:
3662 return new SolarisSparcV8TargetInfo(T);
3663 case llvm::Triple::NetBSD:
3664 return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3665 case llvm::Triple::RTEMS:
3666 return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3668 return new SparcV8TargetInfo(T);
3671 // FIXME: Need a real SPU target.
3672 case llvm::Triple::cellspu:
3673 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3675 case llvm::Triple::systemz:
3676 return new SystemZTargetInfo(T);
3678 case llvm::Triple::tce:
3679 return new TCETargetInfo(T);
3681 case llvm::Triple::x86:
3682 if (Triple.isOSDarwin())
3683 return new DarwinI386TargetInfo(T);
3686 case llvm::Triple::AuroraUX:
3687 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3688 case llvm::Triple::Linux:
3689 return new LinuxTargetInfo<X86_32TargetInfo>(T);
3690 case llvm::Triple::DragonFly:
3691 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3692 case llvm::Triple::NetBSD:
3693 return new NetBSDTargetInfo<X86_32TargetInfo>(T);
3694 case llvm::Triple::OpenBSD:
3695 return new OpenBSDI386TargetInfo(T);
3696 case llvm::Triple::FreeBSD:
3697 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3698 case llvm::Triple::Minix:
3699 return new MinixTargetInfo<X86_32TargetInfo>(T);
3700 case llvm::Triple::Solaris:
3701 return new SolarisTargetInfo<X86_32TargetInfo>(T);
3702 case llvm::Triple::Cygwin:
3703 return new CygwinX86_32TargetInfo(T);
3704 case llvm::Triple::MinGW32:
3705 return new MinGWX86_32TargetInfo(T);
3706 case llvm::Triple::Win32:
3707 return new VisualStudioWindowsX86_32TargetInfo(T);
3708 case llvm::Triple::Haiku:
3709 return new HaikuX86_32TargetInfo(T);
3710 case llvm::Triple::RTEMS:
3711 return new RTEMSX86_32TargetInfo(T);
3713 return new X86_32TargetInfo(T);
3716 case llvm::Triple::x86_64:
3717 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
3718 return new DarwinX86_64TargetInfo(T);
3721 case llvm::Triple::AuroraUX:
3722 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
3723 case llvm::Triple::Linux:
3724 return new LinuxTargetInfo<X86_64TargetInfo>(T);
3725 case llvm::Triple::DragonFly:
3726 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
3727 case llvm::Triple::NetBSD:
3728 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
3729 case llvm::Triple::OpenBSD:
3730 return new OpenBSDX86_64TargetInfo(T);
3731 case llvm::Triple::FreeBSD:
3732 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
3733 case llvm::Triple::Solaris:
3734 return new SolarisTargetInfo<X86_64TargetInfo>(T);
3735 case llvm::Triple::MinGW32:
3736 return new MinGWX86_64TargetInfo(T);
3737 case llvm::Triple::Win32: // This is what Triple.h supports now.
3738 return new VisualStudioWindowsX86_64TargetInfo(T);
3740 return new X86_64TargetInfo(T);
3745 /// CreateTargetInfo - Return the target info object for the specified target
3747 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
3748 TargetOptions &Opts) {
3749 llvm::Triple Triple(Opts.Triple);
3751 // Construct the target
3752 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
3754 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
3758 // Set the target CPU if specified.
3759 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
3760 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
3764 // Set the target ABI if specified.
3765 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
3766 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
3770 // Set the target C++ ABI.
3771 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
3772 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
3776 // Compute the default target features, we need the target to handle this
3777 // because features may have dependencies on one another.
3778 llvm::StringMap<bool> Features;
3779 Target->getDefaultFeatures(Features);
3781 // Apply the user specified deltas.
3782 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3783 ie = Opts.Features.end(); it != ie; ++it) {
3784 const char *Name = it->c_str();
3786 // Apply the feature via the target.
3787 if ((Name[0] != '-' && Name[0] != '+') ||
3788 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
3789 Diags.Report(diag::err_target_invalid_feature) << Name;
3794 // Add the features to the compile options.
3796 // FIXME: If we are completely confident that we have the right set, we only
3797 // need to pass the minuses.
3798 Opts.Features.clear();
3799 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
3800 ie = Features.end(); it != ie; ++it)
3801 Opts.Features.push_back(std::string(it->second ? "+" : "-") +
3803 Target->HandleTargetFeatures(Opts.Features);
3805 return Target.take();