2 * Copyright (c) 2011 Chelsio Communications, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #ifndef __CHELSIO_COMMON_H
31 #define __CHELSIO_COMMON_H
37 MAX_NPORTS = 4, /* max # of ports */
38 SERNUM_LEN = 24, /* Serial # length */
39 EC_LEN = 16, /* E/C length */
40 ID_LEN = 16, /* ID length */
43 enum { MEM_EDC0, MEM_EDC1, MEM_MC };
45 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
47 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
52 PAUSE_AUTONEG = 1 << 2
55 #define FW_VERSION_MAJOR 1
56 #define FW_VERSION_MINOR 3
57 #define FW_VERSION_MICRO 10
60 u64 tx_octets; /* total # of octets in good frames */
61 u64 tx_frames; /* all good frames */
62 u64 tx_bcast_frames; /* all broadcast frames */
63 u64 tx_mcast_frames; /* all multicast frames */
64 u64 tx_ucast_frames; /* all unicast frames */
65 u64 tx_error_frames; /* all error frames */
67 u64 tx_frames_64; /* # of Tx frames in a particular range */
69 u64 tx_frames_128_255;
70 u64 tx_frames_256_511;
71 u64 tx_frames_512_1023;
72 u64 tx_frames_1024_1518;
73 u64 tx_frames_1519_max;
75 u64 tx_drop; /* # of dropped Tx frames */
76 u64 tx_pause; /* # of transmitted pause frames */
77 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */
78 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */
79 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */
80 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */
81 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */
82 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */
83 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */
84 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */
86 u64 rx_octets; /* total # of octets in good frames */
87 u64 rx_frames; /* all good frames */
88 u64 rx_bcast_frames; /* all broadcast frames */
89 u64 rx_mcast_frames; /* all multicast frames */
90 u64 rx_ucast_frames; /* all unicast frames */
91 u64 rx_too_long; /* # of frames exceeding MTU */
92 u64 rx_jabber; /* # of jabber frames */
93 u64 rx_fcs_err; /* # of received frames with bad FCS */
94 u64 rx_len_err; /* # of received frames with length error */
95 u64 rx_symbol_err; /* symbol errors */
96 u64 rx_runt; /* # of short frames */
98 u64 rx_frames_64; /* # of Rx frames in a particular range */
100 u64 rx_frames_128_255;
101 u64 rx_frames_256_511;
102 u64 rx_frames_512_1023;
103 u64 rx_frames_1024_1518;
104 u64 rx_frames_1519_max;
106 u64 rx_pause; /* # of received pause frames */
107 u64 rx_ppp0; /* # of received PPP prio 0 frames */
108 u64 rx_ppp1; /* # of received PPP prio 1 frames */
109 u64 rx_ppp2; /* # of received PPP prio 2 frames */
110 u64 rx_ppp3; /* # of received PPP prio 3 frames */
111 u64 rx_ppp4; /* # of received PPP prio 4 frames */
112 u64 rx_ppp5; /* # of received PPP prio 5 frames */
113 u64 rx_ppp6; /* # of received PPP prio 6 frames */
114 u64 rx_ppp7; /* # of received PPP prio 7 frames */
116 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
117 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
118 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
119 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
120 u64 rx_trunc0; /* buffer-group 0 truncated packets */
121 u64 rx_trunc1; /* buffer-group 1 truncated packets */
122 u64 rx_trunc2; /* buffer-group 2 truncated packets */
123 u64 rx_trunc3; /* buffer-group 3 truncated packets */
126 struct lb_port_stats {
139 u64 frames_1024_1518;
154 struct tp_tcp_stats {
161 struct tp_usm_stats {
167 struct tp_fcoe_stats {
173 struct tp_err_stats {
178 u32 ofldChanDrops[4];
180 u32 ofldVlanDrops[4];
186 struct tp_proxy_stats {
190 struct tp_cpl_stats {
196 struct tp_rdma_stats {
202 unsigned int ntxchan; /* # of Tx channels */
203 unsigned int tre; /* log2 of core clocks per TP tick */
204 unsigned int dack_re; /* DACK timer resolution */
205 unsigned int la_mask; /* what events are recorded by TP LA */
206 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */
212 u8 sn[SERNUM_LEN + 1];
217 unsigned int vpd_cap_addr;
223 * Firmware device log.
225 struct devlog_params {
226 u32 memtype; /* which memory (EDC0, EDC1, MC) */
227 u32 start; /* start of log in firmware memory */
228 u32 size; /* size of log */
231 struct adapter_params {
233 struct vpd_params vpd;
234 struct pci_params pci;
235 struct devlog_params devlog;
237 unsigned int sf_size; /* serial flash size in bytes */
238 unsigned int sf_nsec; /* # of flash sectors */
240 unsigned int fw_vers;
241 unsigned int tp_vers;
244 unsigned short mtus[NMTUS];
245 unsigned short a_wnd[NCCTRL_WIN];
246 unsigned short b_wnd[NCCTRL_WIN];
248 unsigned int mc_size; /* MC memory size */
249 unsigned int nfilters; /* size of filter region */
251 unsigned int cim_la_size;
253 unsigned int nports; /* # of ethernet ports */
254 unsigned int portvec;
255 unsigned int rev; /* chip revision */
256 unsigned int offload;
258 unsigned int ofldq_wr_cred;
261 enum { /* chip revisions */
265 struct trace_params {
266 u32 data[TRACE_LEN / 4];
267 u32 mask[TRACE_LEN / 4];
268 unsigned short snap_len;
269 unsigned short min_len;
270 unsigned char skip_ofst;
271 unsigned char skip_len;
272 unsigned char invert;
277 unsigned short supported; /* link capabilities */
278 unsigned short advertising; /* advertised capabilities */
279 unsigned short requested_speed; /* speed user has requested */
280 unsigned short speed; /* actual link speed */
281 unsigned char requested_fc; /* flow control user has requested */
282 unsigned char fc; /* actual link flow control */
283 unsigned char autoneg; /* autonegotiating? */
284 unsigned char link_ok; /* link up? */
289 #ifndef PCI_VENDOR_ID_CHELSIO
290 # define PCI_VENDOR_ID_CHELSIO 0x1425
293 #define for_each_port(adapter, iter) \
294 for (iter = 0; iter < (adapter)->params.nports; ++iter)
296 static inline int is_offload(const struct adapter *adap)
298 return adap->params.offload;
301 static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
303 return adap->params.vpd.cclk / 1000;
306 static inline unsigned int us_to_core_ticks(const struct adapter *adap,
309 return (us * adap->params.vpd.cclk) / 1000;
312 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
315 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
318 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
319 int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity,
320 int attempts, int delay, u32 *valp);
322 static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask,
323 int polarity, int attempts, int delay)
325 return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts,
329 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
330 void *rpl, bool sleep_ok);
332 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
335 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
338 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
341 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
344 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
345 unsigned int data_reg, u32 *vals, unsigned int nregs,
346 unsigned int start_idx);
347 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
348 unsigned int data_reg, const u32 *vals,
349 unsigned int nregs, unsigned int start_idx);
353 void t4_intr_enable(struct adapter *adapter);
354 void t4_intr_disable(struct adapter *adapter);
355 void t4_intr_clear(struct adapter *adapter);
356 int t4_slow_intr_handler(struct adapter *adapter);
358 int t4_hash_mac_addr(const u8 *addr);
359 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
360 struct link_config *lc);
361 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
362 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
363 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
364 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
365 int t4_seeprom_wp(struct adapter *adapter, int enable);
366 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords,
367 u32 *data, int byte_oriented);
368 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
369 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
370 int t4_get_fw_version(struct adapter *adapter, u32 *vers);
371 int t4_get_tp_version(struct adapter *adapter, u32 *vers);
372 int t4_check_fw_version(struct adapter *adapter);
373 int t4_init_hw(struct adapter *adapter, u32 fw_params);
374 int t4_prep_adapter(struct adapter *adapter);
375 int t4_port_init(struct port_info *p, int mbox, int pf, int vf);
376 int t4_reinit_adapter(struct adapter *adap);
377 void t4_fatal_err(struct adapter *adapter);
378 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
379 int filter_index, int enable);
380 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
381 int filter_index, int *enabled);
382 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
383 int start, int n, const u16 *rspq, unsigned int nrspq);
384 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
386 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
387 unsigned int flags, unsigned int defq);
388 int t4_read_rss(struct adapter *adapter, u16 *entries);
389 void t4_read_rss_key(struct adapter *adapter, u32 *key);
390 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx);
391 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp);
392 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val);
393 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
395 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
397 u32 t4_read_rss_pf_map(struct adapter *adapter);
398 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap);
399 u32 t4_read_rss_pf_mask(struct adapter *adapter);
400 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask);
401 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
402 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
403 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
404 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
405 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
406 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
407 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
409 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
410 const unsigned int *valp);
411 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
413 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
414 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
415 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
416 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
417 int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
418 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
419 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
422 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
423 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
424 void t4_clr_port_stats(struct adapter *adap, int idx);
426 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
427 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
428 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
429 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps,
431 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
432 unsigned int mask, unsigned int val);
433 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
434 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
435 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st);
436 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st);
437 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st);
438 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st);
439 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
440 struct tp_tcp_stats *v6);
441 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
442 struct tp_fcoe_stats *st);
443 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
444 const unsigned short *alpha, const unsigned short *beta);
446 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
448 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
449 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
450 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
451 unsigned int start, unsigned int n);
452 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
453 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map);
454 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
456 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr);
457 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
458 u64 mask0, u64 mask1, unsigned int crc, bool enable);
460 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
461 enum dev_master master, enum dev_state *state);
462 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
463 int t4_early_init(struct adapter *adap, unsigned int mbox);
464 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
465 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
466 unsigned int vf, unsigned int nparams, const u32 *params,
468 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
469 unsigned int vf, unsigned int nparams, const u32 *params,
471 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
472 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
473 unsigned int rxqi, unsigned int rxq, unsigned int tc,
474 unsigned int vi, unsigned int cmask, unsigned int pmask,
475 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps);
476 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
477 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
478 unsigned int *rss_size);
479 int t4_free_vi(struct adapter *adap, unsigned int mbox,
480 unsigned int pf, unsigned int vf,
482 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
483 int mtu, int promisc, int all_multi, int bcast, int vlanex,
485 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid,
486 bool free, unsigned int naddr, const u8 **addr, u16 *idx,
487 u64 *hash, bool sleep_ok);
488 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
489 int idx, const u8 *addr, bool persist, bool add_smt);
490 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
491 bool ucast, u64 vec, bool sleep_ok);
492 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
493 bool rx_en, bool tx_en);
494 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
495 unsigned int nblinks);
496 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
497 unsigned int mmd, unsigned int reg, unsigned int *valp);
498 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
499 unsigned int mmd, unsigned int reg, unsigned int val);
500 int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
501 unsigned int pf, unsigned int vf, unsigned int iqid,
502 unsigned int fl0id, unsigned int fl1id);
503 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
504 unsigned int vf, unsigned int iqtype, unsigned int iqid,
505 unsigned int fl0id, unsigned int fl1id);
506 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
507 unsigned int vf, unsigned int eqid);
508 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
509 unsigned int vf, unsigned int eqid);
510 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
511 unsigned int vf, unsigned int eqid);
512 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
513 enum ctxt_type ctype, u32 *data);
514 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype,
516 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
517 #endif /* __CHELSIO_COMMON_H */