2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * USB Open Host Controller driver.
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/module.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/sysctl.h>
52 #include <sys/unistd.h>
53 #include <sys/callout.h>
54 #include <sys/malloc.h>
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
60 #define USB_DEBUG_VAR ohcidebug
62 #include <dev/usb/usb_core.h>
63 #include <dev/usb/usb_debug.h>
64 #include <dev/usb/usb_busdma.h>
65 #include <dev/usb/usb_process.h>
66 #include <dev/usb/usb_transfer.h>
67 #include <dev/usb/usb_device.h>
68 #include <dev/usb/usb_hub.h>
69 #include <dev/usb/usb_util.h>
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ohci.h>
74 #include <dev/usb/controller/ohcireg.h>
76 #define OHCI_BUS2SC(bus) \
77 ((ohci_softc_t *)(((uint8_t *)(bus)) - \
78 ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
81 static int ohcidebug = 0;
83 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
84 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
85 &ohcidebug, 0, "ohci debug level");
87 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
89 static void ohci_dumpregs(ohci_softc_t *);
90 static void ohci_dump_tds(ohci_td_t *);
91 static uint8_t ohci_dump_td(ohci_td_t *);
92 static void ohci_dump_ed(ohci_ed_t *);
93 static uint8_t ohci_dump_itd(ohci_itd_t *);
94 static void ohci_dump_itds(ohci_itd_t *);
98 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
99 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
100 #define OWRITE1(sc, r, x) \
101 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
102 #define OWRITE2(sc, r, x) \
103 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
104 #define OWRITE4(sc, r, x) \
105 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
107 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
110 #define OHCI_INTR_ENDPT 1
112 extern struct usb_bus_methods ohci_bus_methods;
113 extern struct usb_pipe_methods ohci_device_bulk_methods;
114 extern struct usb_pipe_methods ohci_device_ctrl_methods;
115 extern struct usb_pipe_methods ohci_device_intr_methods;
116 extern struct usb_pipe_methods ohci_device_isoc_methods;
118 static void ohci_do_poll(struct usb_bus *bus);
119 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
120 static void ohci_timeout(void *arg);
121 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
122 static void ohci_root_intr(ohci_softc_t *sc);
124 struct ohci_std_temp {
125 struct usb_page_cache *pc;
131 uint16_t max_frame_size;
133 uint8_t setup_alt_next;
137 static struct ohci_hcca *
138 ohci_get_hcca(ohci_softc_t *sc)
140 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
141 return (sc->sc_hcca_p);
145 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
147 struct ohci_softc *sc = OHCI_BUS2SC(bus);
150 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
151 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
153 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
154 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
156 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
157 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
159 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
160 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
162 for (i = 0; i != OHCI_NO_EDS; i++) {
163 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
164 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
169 ohci_controller_init(ohci_softc_t *sc)
171 struct usb_page_search buf_res;
180 /* Determine in what context we are running. */
181 ctl = OREAD4(sc, OHCI_CONTROL);
183 /* SMM active, request change */
184 DPRINTF("SMM active, request owner change\n");
185 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
186 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
187 usb_pause_mtx(NULL, hz / 1000);
188 ctl = OREAD4(sc, OHCI_CONTROL);
191 device_printf(sc->sc_bus.bdev,
192 "SMM does not respond, resetting\n");
193 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
197 DPRINTF("cold started\n");
199 /* controller was cold started */
201 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
205 * This reset should not be necessary according to the OHCI spec, but
206 * without it some controllers do not start.
208 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
209 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
212 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
214 /* we now own the host controller and the bus has been reset */
215 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
217 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
218 /* nominal time for a reset is 10 us */
219 for (i = 0; i < 10; i++) {
221 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
227 device_printf(sc->sc_bus.bdev, "reset timeout\n");
228 return (USB_ERR_IOERROR);
231 if (ohcidebug > 15) {
236 /* The controller is now in SUSPEND state, we have 2ms to finish. */
238 /* set up HC registers */
239 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
240 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
242 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
243 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
245 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
246 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
248 /* disable all interrupts and then switch on all desired interrupts */
249 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
250 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
251 /* switch on desired functional features */
252 ctl = OREAD4(sc, OHCI_CONTROL);
253 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
254 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
255 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
256 /* And finally start it! */
257 OWRITE4(sc, OHCI_CONTROL, ctl);
260 * The controller is now OPERATIONAL. Set a some final
261 * registers that should be set earlier, but that the
262 * controller ignores when in the SUSPEND state.
264 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
265 fm |= OHCI_FSMPS(ival) | ival;
266 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
267 per = OHCI_PERIODIC(ival); /* 90% periodic */
268 OWRITE4(sc, OHCI_PERIODIC_START, per);
270 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
271 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
272 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
273 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
275 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
276 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
279 * The AMD756 requires a delay before re-reading the register,
280 * otherwise it will occasionally report 0 ports.
283 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
285 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
286 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
294 return (USB_ERR_NORMAL_COMPLETION);
297 static struct ohci_ed *
298 ohci_init_ed(struct usb_page_cache *pc)
300 struct usb_page_search buf_res;
303 usbd_get_page(pc, 0, &buf_res);
307 ed->ed_self = htole32(buf_res.physaddr);
308 ed->ed_flags = htole32(OHCI_ED_SKIP);
315 ohci_init(ohci_softc_t *sc)
317 struct usb_page_search buf_res;
325 sc->sc_eintrs = OHCI_NORMAL_INTRS;
332 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
335 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
338 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
340 for (i = 0; i != OHCI_NO_EDS; i++) {
341 sc->sc_intr_p_last[i] =
342 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
346 * the QHs are arranged to give poll intervals that are
347 * powers of 2 times 1ms
349 bit = OHCI_NO_EDS / 2;
356 y = (x ^ bit) | (bit / 2);
359 * the next QH has half the poll interval
361 ed_x = sc->sc_intr_p_last[x];
362 ed_y = sc->sc_intr_p_last[y];
365 ed_x->ed_next = ed_y->ed_self;
377 ed_int = sc->sc_intr_p_last[0];
378 ed_isc = sc->sc_isoc_p_last;
380 /* the last (1ms) QH */
381 ed_int->next = ed_isc;
382 ed_int->ed_next = ed_isc->ed_self;
384 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
386 sc->sc_hcca_p = buf_res.buffer;
389 * Fill HCCA interrupt table. The bit reversal is to get
390 * the tree set up properly to spread the interrupts.
392 for (i = 0; i != OHCI_NO_INTRS; i++) {
393 sc->sc_hcca_p->hcca_interrupt_table[i] =
394 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
396 /* flush all cache into memory */
398 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
400 /* set up the bus struct */
401 sc->sc_bus.methods = &ohci_bus_methods;
403 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
406 if (ohcidebug > 15) {
407 for (i = 0; i != OHCI_NO_EDS; i++) {
409 ohci_dump_ed(sc->sc_intr_p_last[i]);
412 ohci_dump_ed(sc->sc_isoc_p_last);
416 sc->sc_bus.usbrev = USB_REV_1_0;
418 if (ohci_controller_init(sc)) {
419 return (USB_ERR_INVAL);
421 /* catch any lost interrupts */
422 ohci_do_poll(&sc->sc_bus);
423 return (USB_ERR_NORMAL_COMPLETION);
428 * shut down the controller when the system is going down
431 ohci_detach(struct ohci_softc *sc)
433 USB_BUS_LOCK(&sc->sc_bus);
435 usb_callout_stop(&sc->sc_tmo_rhsc);
437 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
438 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
440 USB_BUS_UNLOCK(&sc->sc_bus);
442 /* XXX let stray task complete */
443 usb_pause_mtx(NULL, hz / 20);
445 usb_callout_drain(&sc->sc_tmo_rhsc);
448 /* NOTE: suspend/resume is called from
449 * interrupt context and cannot sleep!
452 ohci_suspend(ohci_softc_t *sc)
456 USB_BUS_LOCK(&sc->sc_bus);
465 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
466 if (sc->sc_control == 0) {
468 * Preserve register values, in case that APM BIOS
469 * does not recover them.
471 sc->sc_control = ctl;
472 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
474 ctl |= OHCI_HCFS_SUSPEND;
475 OWRITE4(sc, OHCI_CONTROL, ctl);
477 usb_pause_mtx(&sc->sc_bus.bus_mtx,
478 USB_MS_TO_TICKS(USB_RESUME_WAIT));
480 USB_BUS_UNLOCK(&sc->sc_bus);
484 ohci_resume(ohci_softc_t *sc)
494 /* some broken BIOSes never initialize the Controller chip */
495 ohci_controller_init(sc);
497 USB_BUS_LOCK(&sc->sc_bus);
499 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
500 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
503 ctl = sc->sc_control;
505 ctl = OREAD4(sc, OHCI_CONTROL);
506 ctl |= OHCI_HCFS_RESUME;
507 OWRITE4(sc, OHCI_CONTROL, ctl);
508 usb_pause_mtx(&sc->sc_bus.bus_mtx,
509 USB_MS_TO_TICKS(USB_RESUME_DELAY));
510 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
511 OWRITE4(sc, OHCI_CONTROL, ctl);
512 usb_pause_mtx(&sc->sc_bus.bus_mtx,
513 USB_MS_TO_TICKS(USB_RESUME_RECOVERY));
514 sc->sc_control = sc->sc_intre = 0;
516 USB_BUS_UNLOCK(&sc->sc_bus);
518 /* catch any lost interrupts */
519 ohci_do_poll(&sc->sc_bus);
524 ohci_dumpregs(ohci_softc_t *sc)
526 struct ohci_hcca *hcca;
528 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
529 OREAD4(sc, OHCI_REVISION),
530 OREAD4(sc, OHCI_CONTROL),
531 OREAD4(sc, OHCI_COMMAND_STATUS));
532 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
533 OREAD4(sc, OHCI_INTERRUPT_STATUS),
534 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
535 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
536 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
537 OREAD4(sc, OHCI_HCCA),
538 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
539 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
540 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
541 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
542 OREAD4(sc, OHCI_BULK_HEAD_ED),
543 OREAD4(sc, OHCI_BULK_CURRENT_ED));
544 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
545 OREAD4(sc, OHCI_DONE_HEAD),
546 OREAD4(sc, OHCI_FM_INTERVAL),
547 OREAD4(sc, OHCI_FM_REMAINING));
548 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
549 OREAD4(sc, OHCI_FM_NUMBER),
550 OREAD4(sc, OHCI_PERIODIC_START),
551 OREAD4(sc, OHCI_LS_THRESHOLD));
552 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
553 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
554 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
555 OREAD4(sc, OHCI_RH_STATUS));
556 DPRINTF(" port1=0x%08x port2=0x%08x\n",
557 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
558 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
560 hcca = ohci_get_hcca(sc);
562 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
563 le32toh(hcca->hcca_frame_number),
564 le32toh(hcca->hcca_done_head));
567 ohci_dump_tds(ohci_td_t *std)
569 for (; std; std = std->obj_next) {
570 if (ohci_dump_td(std)) {
577 ohci_dump_td(ohci_td_t *std)
582 usb_pc_cpu_invalidate(std->page_cache);
584 td_flags = le32toh(std->td_flags);
585 temp = (std->td_next == 0);
587 printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
588 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
589 std, le32toh(std->td_self),
590 (td_flags & OHCI_TD_R) ? "-R" : "",
591 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
592 (td_flags & OHCI_TD_IN) ? "-IN" : "",
593 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
594 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
595 OHCI_TD_GET_DI(td_flags),
596 OHCI_TD_GET_EC(td_flags),
597 OHCI_TD_GET_CC(td_flags),
598 le32toh(std->td_cbp),
599 le32toh(std->td_next),
600 le32toh(std->td_be));
606 ohci_dump_itd(ohci_itd_t *sitd)
612 usb_pc_cpu_invalidate(sitd->page_cache);
614 itd_flags = le32toh(sitd->itd_flags);
615 temp = (sitd->itd_next == 0);
617 printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
618 "bp0=0x%08x next=0x%08x be=0x%08x\n",
619 sitd, le32toh(sitd->itd_self),
620 OHCI_ITD_GET_SF(itd_flags),
621 OHCI_ITD_GET_DI(itd_flags),
622 OHCI_ITD_GET_FC(itd_flags),
623 OHCI_ITD_GET_CC(itd_flags),
624 le32toh(sitd->itd_bp0),
625 le32toh(sitd->itd_next),
626 le32toh(sitd->itd_be));
627 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
628 printf("offs[%d]=0x%04x ", i,
629 (uint32_t)le16toh(sitd->itd_offset[i]));
637 ohci_dump_itds(ohci_itd_t *sitd)
639 for (; sitd; sitd = sitd->obj_next) {
640 if (ohci_dump_itd(sitd)) {
647 ohci_dump_ed(ohci_ed_t *sed)
652 usb_pc_cpu_invalidate(sed->page_cache);
654 ed_flags = le32toh(sed->ed_flags);
655 ed_headp = le32toh(sed->ed_headp);
657 printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
658 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
659 sed, le32toh(sed->ed_self),
660 OHCI_ED_GET_FA(ed_flags),
661 OHCI_ED_GET_EN(ed_flags),
662 OHCI_ED_GET_MAXP(ed_flags),
663 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
664 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
665 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
666 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
667 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
668 le32toh(sed->ed_tailp),
669 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
670 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
671 le32toh(sed->ed_headp),
672 le32toh(sed->ed_next));
678 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
680 /* check for early completion */
681 if (ohci_check_transfer(xfer)) {
684 /* put transfer on interrupt queue */
685 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
687 /* start timeout, if any */
688 if (xfer->timeout != 0) {
689 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
693 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
695 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
697 DPRINTFN(11, "%p to %p\n", sed, last);
699 if (sed->prev != NULL) {
700 /* should not happen */
701 DPRINTFN(0, "ED already linked!\n");
704 /* (sc->sc_bus.bus_mtx) must be locked */
706 sed->next = last->next;
707 sed->ed_next = last->ed_next;
712 usb_pc_cpu_flush(sed->page_cache);
715 * the last->next->prev is never followed: sed->next->prev = sed;
719 last->ed_next = sed->ed_self;
721 usb_pc_cpu_flush(last->page_cache);
726 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
728 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
730 DPRINTFN(11, "%p from %p\n", sed, last);
732 /* (sc->sc_bus.bus_mtx) must be locked */
734 /* only remove if not removed from a queue */
737 sed->prev->next = sed->next;
738 sed->prev->ed_next = sed->ed_next;
740 usb_pc_cpu_flush(sed->prev->page_cache);
743 sed->next->prev = sed->prev;
744 usb_pc_cpu_flush(sed->next->page_cache);
746 last = ((last == sed) ? sed->prev : last);
750 usb_pc_cpu_flush(sed->page_cache);
756 ohci_isoc_done(struct usb_xfer *xfer)
759 uint32_t *plen = xfer->frlengths;
760 volatile uint16_t *olen;
762 ohci_itd_t *td = xfer->td_transfer_first;
766 panic("%s:%d: out of TD's\n",
767 __FUNCTION__, __LINE__);
771 DPRINTF("isoc TD\n");
775 usb_pc_cpu_invalidate(td->page_cache);
777 nframes = td->frames;
778 olen = &td->itd_offset[0];
784 len = le16toh(*olen);
786 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
789 len &= ((1 << 12) - 1);
793 len = 0;/* invalid length */
800 if (((void *)td) == xfer->td_transfer_last) {
806 xfer->aframes = xfer->nframes;
807 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
811 static const char *const
817 "DATA_TOGGLE_MISMATCH",
820 "DEVICE_NOT_RESPONDING",
838 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
841 ohci_td_t *td_alt_next;
848 td = xfer->td_transfer_cache;
849 td_alt_next = td->alt_next;
852 if (xfer->aframes != xfer->nframes) {
853 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
857 usb_pc_cpu_invalidate(td->page_cache);
858 phy_start = le32toh(td->td_cbp);
859 td_flags = le32toh(td->td_flags);
860 cc = OHCI_TD_GET_CC(td_flags);
864 * short transfer - compute the number of remaining
865 * bytes in the hardware buffer:
867 phy_end = le32toh(td->td_be);
868 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
869 (OHCI_PAGE_SIZE + 1) : 0x0001);
870 temp += OHCI_PAGE_OFFSET(phy_end);
871 temp -= OHCI_PAGE_OFFSET(phy_start);
873 if (temp > td->len) {
874 /* guard against corruption */
876 } else if (xfer->aframes != xfer->nframes) {
878 * Sum up total transfer length
881 xfer->frlengths[xfer->aframes] += td->len - temp;
884 if (xfer->aframes != xfer->nframes) {
885 /* transfer was complete */
886 xfer->frlengths[xfer->aframes] += td->len;
889 /* Check for last transfer */
890 if (((void *)td) == xfer->td_transfer_last) {
894 /* Check transfer status */
896 /* the transfer is finished */
900 /* Check for short transfer */
902 if (xfer->flags_int.short_frames_ok) {
903 /* follow alt next */
906 /* the transfer is finished */
913 if (td->alt_next != td_alt_next) {
914 /* this USB frame is complete */
919 /* update transfer cache */
921 xfer->td_transfer_cache = td;
923 DPRINTFN(16, "error cc=%d (%s)\n",
924 cc, ohci_cc_strs[cc]);
926 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
927 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
931 ohci_non_isoc_done(struct usb_xfer *xfer)
935 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
936 xfer, xfer->endpoint);
939 if (ohcidebug > 10) {
940 ohci_dump_tds(xfer->td_transfer_first);
946 xfer->td_transfer_cache = xfer->td_transfer_first;
948 if (xfer->flags_int.control_xfr) {
950 if (xfer->flags_int.control_hdr) {
952 err = ohci_non_isoc_done_sub(xfer);
956 if (xfer->td_transfer_cache == NULL) {
960 while (xfer->aframes != xfer->nframes) {
962 err = ohci_non_isoc_done_sub(xfer);
965 if (xfer->td_transfer_cache == NULL) {
970 if (xfer->flags_int.control_xfr &&
971 !xfer->flags_int.control_act) {
973 err = ohci_non_isoc_done_sub(xfer);
976 ohci_device_done(xfer, err);
979 /*------------------------------------------------------------------------*
980 * ohci_check_transfer_sub
981 *------------------------------------------------------------------------*/
983 ohci_check_transfer_sub(struct usb_xfer *xfer)
992 td = xfer->td_transfer_cache;
996 usb_pc_cpu_invalidate(td->page_cache);
997 phy_start = le32toh(td->td_cbp);
998 td_flags = le32toh(td->td_flags);
999 td_next = le32toh(td->td_next);
1001 /* Check for last transfer */
1002 if (((void *)td) == xfer->td_transfer_last) {
1003 /* the transfer is finished */
1007 /* Check transfer status */
1008 cc = OHCI_TD_GET_CC(td_flags);
1010 /* the transfer is finished */
1015 * Check if we reached the last packet
1016 * or if there is a short packet:
1019 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
1020 /* follow alt next */
1027 /* update transfer cache */
1029 xfer->td_transfer_cache = td;
1033 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1035 ed->ed_headp = td->td_self;
1036 usb_pc_cpu_flush(ed->page_cache);
1038 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1041 * Make sure that the OHCI re-scans the schedule by
1042 * writing the BLF and CLF bits:
1045 if (xfer->xroot->udev->flags.self_suspended) {
1047 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1048 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1050 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1051 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1052 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1054 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1059 /*------------------------------------------------------------------------*
1060 * ohci_check_transfer
1063 * 0: USB transfer is not finished
1064 * Else: USB transfer is finished
1065 *------------------------------------------------------------------------*/
1067 ohci_check_transfer(struct usb_xfer *xfer)
1073 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1075 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1077 usb_pc_cpu_invalidate(ed->page_cache);
1078 ed_headp = le32toh(ed->ed_headp);
1079 ed_tailp = le32toh(ed->ed_tailp);
1081 if ((ed_headp & OHCI_HALTED) ||
1082 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1083 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1084 /* isochronous transfer */
1085 ohci_isoc_done(xfer);
1087 if (xfer->flags_int.short_frames_ok) {
1088 ohci_check_transfer_sub(xfer);
1089 if (xfer->td_transfer_cache) {
1090 /* not finished yet */
1094 /* store data-toggle */
1095 if (ed_headp & OHCI_TOGGLECARRY) {
1096 xfer->endpoint->toggle_next = 1;
1098 xfer->endpoint->toggle_next = 0;
1101 /* non-isochronous transfer */
1102 ohci_non_isoc_done(xfer);
1106 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1111 ohci_rhsc_enable(ohci_softc_t *sc)
1115 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1117 sc->sc_eintrs |= OHCI_RHSC;
1118 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1120 /* acknowledge any RHSC interrupt */
1121 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1127 ohci_interrupt_poll(ohci_softc_t *sc)
1129 struct usb_xfer *xfer;
1132 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1134 * check if transfer is transferred
1136 if (ohci_check_transfer(xfer)) {
1137 /* queue has been modified */
1143 /*------------------------------------------------------------------------*
1144 * ohci_interrupt - OHCI interrupt handler
1146 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1147 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1149 *------------------------------------------------------------------------*/
1151 ohci_interrupt(ohci_softc_t *sc)
1153 struct ohci_hcca *hcca;
1157 USB_BUS_LOCK(&sc->sc_bus);
1159 hcca = ohci_get_hcca(sc);
1161 DPRINTFN(16, "real interrupt\n");
1164 if (ohcidebug > 15) {
1169 done = le32toh(hcca->hcca_done_head);
1172 * The LSb of done is used to inform the HC Driver that an interrupt
1173 * condition exists for both the Done list and for another event
1174 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1175 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1176 * the interrupt was caused by other than the HccaDoneHead update
1177 * and the HcInterruptStatus register needs to be accessed to
1178 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1179 * then a Done list update interrupt is indicated and if the LSb of
1180 * done is nonzero, then an additional interrupt event is indicated
1181 * and HcInterruptStatus should be checked to determine its cause.
1186 if (done & ~OHCI_DONE_INTRS) {
1189 if (done & OHCI_DONE_INTRS) {
1190 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1192 hcca->hcca_done_head = 0;
1194 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1196 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1199 status &= ~OHCI_MIE;
1202 * nothing to be done (PCI shared
1207 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1209 status &= sc->sc_eintrs;
1213 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1215 if (status & OHCI_SO) {
1219 if (status & OHCI_RD) {
1220 printf("%s: resume detect\n", __FUNCTION__);
1221 /* XXX process resume detect */
1223 if (status & OHCI_UE) {
1224 printf("%s: unrecoverable error, "
1225 "controller halted\n", __FUNCTION__);
1226 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1229 if (status & OHCI_RHSC) {
1231 * Disable RHSC interrupt for now, because it will be
1232 * on until the port has been reset.
1234 sc->sc_eintrs &= ~OHCI_RHSC;
1235 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1239 /* do not allow RHSC interrupts > 1 per second */
1240 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1241 (void *)&ohci_rhsc_enable, sc);
1244 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1246 /* Block unprocessed interrupts. XXX */
1247 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1248 sc->sc_eintrs &= ~status;
1249 printf("%s: blocking intrs 0x%x\n",
1250 __FUNCTION__, status);
1252 /* poll all the USB transfers */
1253 ohci_interrupt_poll(sc);
1256 USB_BUS_UNLOCK(&sc->sc_bus);
1260 * called when a request does not complete
1263 ohci_timeout(void *arg)
1265 struct usb_xfer *xfer = arg;
1267 DPRINTF("xfer=%p\n", xfer);
1269 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1271 /* transfer is transferred */
1272 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1276 ohci_do_poll(struct usb_bus *bus)
1278 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1280 USB_BUS_LOCK(&sc->sc_bus);
1281 ohci_interrupt_poll(sc);
1282 USB_BUS_UNLOCK(&sc->sc_bus);
1286 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1288 struct usb_page_search buf_res;
1291 ohci_td_t *td_alt_next;
1292 uint32_t buf_offset;
1295 uint8_t shortpkt_old;
1300 shortpkt_old = temp->shortpkt;
1301 len_old = temp->len;
1304 /* software is used to detect short incoming transfers */
1306 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1307 temp->td_flags |= htole32(OHCI_TD_R);
1309 temp->td_flags &= ~htole32(OHCI_TD_R);
1315 td_next = temp->td_next;
1319 if (temp->len == 0) {
1321 if (temp->shortpkt) {
1324 /* send a Zero Length Packet, ZLP, last */
1331 average = temp->average;
1333 if (temp->len < average) {
1334 if (temp->len % temp->max_frame_size) {
1337 average = temp->len;
1341 if (td_next == NULL) {
1342 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1347 td_next = td->obj_next;
1349 /* check if we are pre-computing */
1353 /* update remaining length */
1355 temp->len -= average;
1359 /* fill out current TD */
1360 td->td_flags = temp->td_flags;
1362 /* the next TD uses TOGGLE_CARRY */
1363 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1367 * The buffer start and end phys addresses should be
1368 * 0x0 for a zero length packet.
1376 usbd_get_page(temp->pc, buf_offset, &buf_res);
1377 td->td_cbp = htole32(buf_res.physaddr);
1378 buf_offset += (average - 1);
1380 usbd_get_page(temp->pc, buf_offset, &buf_res);
1381 td->td_be = htole32(buf_res.physaddr);
1386 /* update remaining length */
1388 temp->len -= average;
1391 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1392 /* we need to receive these frames one by one ! */
1393 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1394 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1395 td->td_next = htole32(OHCI_TD_NEXT_END);
1398 /* link the current TD with the next one */
1399 td->td_next = td_next->td_self;
1403 td->alt_next = td_alt_next;
1405 usb_pc_cpu_flush(td->page_cache);
1411 /* setup alt next pointer, if any */
1412 if (temp->last_frame) {
1413 /* no alternate next */
1416 /* we use this field internally */
1417 td_alt_next = td_next;
1421 temp->shortpkt = shortpkt_old;
1422 temp->len = len_old;
1426 temp->td_next = td_next;
1430 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1432 struct ohci_std_temp temp;
1433 struct usb_pipe_methods *methods;
1439 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1440 xfer->address, UE_GET_ADDR(xfer->endpointno),
1441 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1443 temp.average = xfer->max_hc_frame_size;
1444 temp.max_frame_size = xfer->max_frame_size;
1446 /* toggle the DMA set we are using */
1447 xfer->flags_int.curr_dma_set ^= 1;
1449 /* get next DMA set */
1450 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1452 xfer->td_transfer_first = td;
1453 xfer->td_transfer_cache = td;
1457 temp.last_frame = 0;
1458 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1460 methods = xfer->endpoint->methods;
1462 /* check if we should prepend a setup message */
1464 if (xfer->flags_int.control_xfr) {
1465 if (xfer->flags_int.control_hdr) {
1467 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1468 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1470 temp.len = xfer->frlengths[0];
1471 temp.pc = xfer->frbuffers + 0;
1472 temp.shortpkt = temp.len ? 1 : 0;
1473 /* check for last frame */
1474 if (xfer->nframes == 1) {
1475 /* no STATUS stage yet, SETUP is last */
1476 if (xfer->flags_int.control_act) {
1477 temp.last_frame = 1;
1478 temp.setup_alt_next = 0;
1481 ohci_setup_standard_chain_sub(&temp);
1484 * XXX assume that the setup message is
1485 * contained within one USB packet:
1487 xfer->endpoint->toggle_next = 1;
1493 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1495 /* set data toggle */
1497 if (xfer->endpoint->toggle_next) {
1498 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1500 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1503 /* set endpoint direction */
1505 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1506 temp.td_flags |= htole32(OHCI_TD_IN);
1508 temp.td_flags |= htole32(OHCI_TD_OUT);
1511 while (x != xfer->nframes) {
1513 /* DATA0 / DATA1 message */
1515 temp.len = xfer->frlengths[x];
1516 temp.pc = xfer->frbuffers + x;
1520 if (x == xfer->nframes) {
1521 if (xfer->flags_int.control_xfr) {
1522 /* no STATUS stage yet, DATA is last */
1523 if (xfer->flags_int.control_act) {
1524 temp.last_frame = 1;
1525 temp.setup_alt_next = 0;
1528 temp.last_frame = 1;
1529 temp.setup_alt_next = 0;
1532 if (temp.len == 0) {
1534 /* make sure that we send an USB packet */
1540 /* regular data transfer */
1542 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1545 ohci_setup_standard_chain_sub(&temp);
1548 /* check if we should append a status stage */
1550 if (xfer->flags_int.control_xfr &&
1551 !xfer->flags_int.control_act) {
1554 * Send a DATA1 message and invert the current endpoint
1558 /* set endpoint direction and data toggle */
1560 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1561 temp.td_flags = htole32(OHCI_TD_OUT |
1562 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1564 temp.td_flags = htole32(OHCI_TD_IN |
1565 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1571 temp.last_frame = 1;
1572 temp.setup_alt_next = 0;
1574 ohci_setup_standard_chain_sub(&temp);
1578 /* Ensure that last TD is terminating: */
1579 td->td_next = htole32(OHCI_TD_NEXT_END);
1580 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1581 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1583 usb_pc_cpu_flush(td->page_cache);
1585 /* must have at least one frame! */
1587 xfer->td_transfer_last = td;
1590 if (ohcidebug > 8) {
1591 DPRINTF("nexttog=%d; data before transfer:\n",
1592 xfer->endpoint->toggle_next);
1593 ohci_dump_tds(xfer->td_transfer_first);
1597 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1599 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1600 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1601 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1603 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1605 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1606 ed_flags |= OHCI_ED_SPEED;
1608 ed->ed_flags = htole32(ed_flags);
1610 td = xfer->td_transfer_first;
1612 ed->ed_headp = td->td_self;
1614 if (xfer->xroot->udev->flags.self_suspended == 0) {
1615 /* the append function will flush the endpoint descriptor */
1616 OHCI_APPEND_QH(ed, *ed_last);
1618 if (methods == &ohci_device_bulk_methods) {
1619 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1621 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1623 if (methods == &ohci_device_ctrl_methods) {
1624 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1626 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1629 usb_pc_cpu_flush(ed->page_cache);
1634 ohci_root_intr(ohci_softc_t *sc)
1640 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1642 /* clear any old interrupt data */
1643 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1645 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1646 DPRINTF("sc=%p hstatus=0x%08x\n",
1650 m = (sc->sc_noport + 1);
1651 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1652 m = (8 * sizeof(sc->sc_hub_idata));
1654 for (i = 1; i < m; i++) {
1655 /* pick out CHANGE bits from the status register */
1656 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1657 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1658 DPRINTF("port %d changed\n", i);
1662 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1663 sizeof(sc->sc_hub_idata));
1666 /* NOTE: "done" can be run two times in a row,
1667 * from close and from interrupt
1670 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1672 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1673 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1676 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1679 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1680 xfer, xfer->endpoint, error);
1682 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1684 usb_pc_cpu_invalidate(ed->page_cache);
1686 if (methods == &ohci_device_bulk_methods) {
1687 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1689 if (methods == &ohci_device_ctrl_methods) {
1690 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1692 if (methods == &ohci_device_intr_methods) {
1693 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1695 if (methods == &ohci_device_isoc_methods) {
1696 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1698 xfer->td_transfer_first = NULL;
1699 xfer->td_transfer_last = NULL;
1701 /* dequeue transfer and start next transfer */
1702 usbd_transfer_done(xfer, error);
1705 /*------------------------------------------------------------------------*
1707 *------------------------------------------------------------------------*/
1709 ohci_device_bulk_open(struct usb_xfer *xfer)
1715 ohci_device_bulk_close(struct usb_xfer *xfer)
1717 ohci_device_done(xfer, USB_ERR_CANCELLED);
1721 ohci_device_bulk_enter(struct usb_xfer *xfer)
1727 ohci_device_bulk_start(struct usb_xfer *xfer)
1729 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1731 /* setup TD's and QH */
1732 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1734 /* put transfer on interrupt queue */
1735 ohci_transfer_intr_enqueue(xfer);
1738 struct usb_pipe_methods ohci_device_bulk_methods =
1740 .open = ohci_device_bulk_open,
1741 .close = ohci_device_bulk_close,
1742 .enter = ohci_device_bulk_enter,
1743 .start = ohci_device_bulk_start,
1746 /*------------------------------------------------------------------------*
1747 * ohci control support
1748 *------------------------------------------------------------------------*/
1750 ohci_device_ctrl_open(struct usb_xfer *xfer)
1756 ohci_device_ctrl_close(struct usb_xfer *xfer)
1758 ohci_device_done(xfer, USB_ERR_CANCELLED);
1762 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1768 ohci_device_ctrl_start(struct usb_xfer *xfer)
1770 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1772 /* setup TD's and QH */
1773 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1775 /* put transfer on interrupt queue */
1776 ohci_transfer_intr_enqueue(xfer);
1779 struct usb_pipe_methods ohci_device_ctrl_methods =
1781 .open = ohci_device_ctrl_open,
1782 .close = ohci_device_ctrl_close,
1783 .enter = ohci_device_ctrl_enter,
1784 .start = ohci_device_ctrl_start,
1787 /*------------------------------------------------------------------------*
1788 * ohci interrupt support
1789 *------------------------------------------------------------------------*/
1791 ohci_device_intr_open(struct usb_xfer *xfer)
1793 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1799 bit = OHCI_NO_EDS / 2;
1801 if (xfer->interval >= bit) {
1805 if (sc->sc_intr_stat[x] <
1806 sc->sc_intr_stat[best]) {
1816 sc->sc_intr_stat[best]++;
1817 xfer->qh_pos = best;
1819 DPRINTFN(3, "best=%d interval=%d\n",
1820 best, xfer->interval);
1824 ohci_device_intr_close(struct usb_xfer *xfer)
1826 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1828 sc->sc_intr_stat[xfer->qh_pos]--;
1830 ohci_device_done(xfer, USB_ERR_CANCELLED);
1834 ohci_device_intr_enter(struct usb_xfer *xfer)
1840 ohci_device_intr_start(struct usb_xfer *xfer)
1842 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1844 /* setup TD's and QH */
1845 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1847 /* put transfer on interrupt queue */
1848 ohci_transfer_intr_enqueue(xfer);
1851 struct usb_pipe_methods ohci_device_intr_methods =
1853 .open = ohci_device_intr_open,
1854 .close = ohci_device_intr_close,
1855 .enter = ohci_device_intr_enter,
1856 .start = ohci_device_intr_start,
1859 /*------------------------------------------------------------------------*
1860 * ohci isochronous support
1861 *------------------------------------------------------------------------*/
1863 ohci_device_isoc_open(struct usb_xfer *xfer)
1869 ohci_device_isoc_close(struct usb_xfer *xfer)
1872 ohci_device_done(xfer, USB_ERR_CANCELLED);
1876 ohci_device_isoc_enter(struct usb_xfer *xfer)
1878 struct usb_page_search buf_res;
1879 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1880 struct ohci_hcca *hcca;
1881 uint32_t buf_offset;
1885 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1889 ohci_itd_t *td_last = NULL;
1892 hcca = ohci_get_hcca(sc);
1894 nframes = le32toh(hcca->hcca_frame_number);
1896 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1897 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1899 if ((xfer->endpoint->is_synced == 0) ||
1900 (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1901 (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1903 * If there is data underflow or the pipe queue is empty we
1904 * schedule the transfer a few frames ahead of the current
1905 * frame position. Else two isochronous transfers might
1908 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1909 xfer->endpoint->is_synced = 1;
1910 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1913 * compute how many milliseconds the insertion is ahead of the
1914 * current frame position:
1916 buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1919 * pre-compute when the isochronous transfer will be finished:
1921 xfer->isoc_time_complete =
1922 (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1925 /* get the real number of frames */
1927 nframes = xfer->nframes;
1931 plen = xfer->frlengths;
1933 /* toggle the DMA set we are using */
1934 xfer->flags_int.curr_dma_set ^= 1;
1936 /* get next DMA set */
1937 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1939 xfer->td_transfer_first = td;
1946 panic("%s:%d: out of TD's\n",
1947 __FUNCTION__, __LINE__);
1949 itd_offset[ncur] = length;
1950 buf_offset += *plen;
1955 if ( /* check if the ITD is full */
1956 (ncur == OHCI_ITD_NOFFSET) ||
1957 /* check if we have put more than 4K into the ITD */
1958 (length & 0xF000) ||
1959 /* check if it is the last frame */
1962 /* fill current ITD */
1963 td->itd_flags = htole32(
1965 OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1967 OHCI_ITD_SET_FC(ncur));
1970 xfer->endpoint->isoc_next += ncur;
1978 td->itd_offset[ncur] =
1979 htole16(OHCI_ITD_MK_OFFS(0));
1982 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1983 length = OHCI_PAGE_MASK(buf_res.physaddr);
1985 OHCI_PAGE(buf_res.physaddr);
1986 td->itd_bp0 = htole32(buf_res.physaddr);
1987 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1988 td->itd_be = htole32(buf_res.physaddr);
1991 itd_offset[ncur] += length;
1993 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1994 td->itd_offset[ncur] =
1995 htole16(itd_offset[ncur]);
2004 /* link the last TD with the next one */
2005 td_last->itd_next = td->itd_self;
2007 usb_pc_cpu_flush(td_last->page_cache);
2011 /* update the last TD */
2012 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
2013 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
2014 td_last->itd_next = 0;
2016 usb_pc_cpu_flush(td_last->page_cache);
2018 xfer->td_transfer_last = td_last;
2021 if (ohcidebug > 8) {
2022 DPRINTF("data before transfer:\n");
2023 ohci_dump_itds(xfer->td_transfer_first);
2026 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2028 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2029 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
2031 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
2033 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
2034 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
2035 OHCI_ED_SET_MAXP(xfer->max_frame_size));
2037 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2038 ed_flags |= OHCI_ED_SPEED;
2040 ed->ed_flags = htole32(ed_flags);
2042 td = xfer->td_transfer_first;
2044 ed->ed_headp = td->itd_self;
2046 /* isochronous transfers are not affected by suspend / resume */
2047 /* the append function will flush the endpoint descriptor */
2049 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2053 ohci_device_isoc_start(struct usb_xfer *xfer)
2055 /* put transfer on interrupt queue */
2056 ohci_transfer_intr_enqueue(xfer);
2059 struct usb_pipe_methods ohci_device_isoc_methods =
2061 .open = ohci_device_isoc_open,
2062 .close = ohci_device_isoc_close,
2063 .enter = ohci_device_isoc_enter,
2064 .start = ohci_device_isoc_start,
2067 /*------------------------------------------------------------------------*
2068 * ohci root control support
2069 *------------------------------------------------------------------------*
2070 * Simulate a hardware hub by handling all the necessary requests.
2071 *------------------------------------------------------------------------*/
2074 struct usb_device_descriptor ohci_devd =
2076 sizeof(struct usb_device_descriptor),
2077 UDESC_DEVICE, /* type */
2078 {0x00, 0x01}, /* USB version */
2079 UDCLASS_HUB, /* class */
2080 UDSUBCLASS_HUB, /* subclass */
2081 UDPROTO_FSHUB, /* protocol */
2082 64, /* max packet */
2083 {0}, {0}, {0x00, 0x01}, /* device id */
2084 1, 2, 0, /* string indicies */
2085 1 /* # of configurations */
2089 struct ohci_config_desc ohci_confd =
2092 .bLength = sizeof(struct usb_config_descriptor),
2093 .bDescriptorType = UDESC_CONFIG,
2094 .wTotalLength[0] = sizeof(ohci_confd),
2096 .bConfigurationValue = 1,
2097 .iConfiguration = 0,
2098 .bmAttributes = UC_SELF_POWERED,
2099 .bMaxPower = 0, /* max power */
2102 .bLength = sizeof(struct usb_interface_descriptor),
2103 .bDescriptorType = UDESC_INTERFACE,
2105 .bInterfaceClass = UICLASS_HUB,
2106 .bInterfaceSubClass = UISUBCLASS_HUB,
2107 .bInterfaceProtocol = 0,
2110 .bLength = sizeof(struct usb_endpoint_descriptor),
2111 .bDescriptorType = UDESC_ENDPOINT,
2112 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2113 .bmAttributes = UE_INTERRUPT,
2114 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2120 struct usb_hub_descriptor ohci_hubd =
2122 0, /* dynamic length */
2132 ohci_roothub_exec(struct usb_device *udev,
2133 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2135 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2137 const char *str_ptr;
2146 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2149 ptr = (const void *)&sc->sc_hub_desc.temp;
2153 value = UGETW(req->wValue);
2154 index = UGETW(req->wIndex);
2156 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2157 "wValue=0x%04x wIndex=0x%04x\n",
2158 req->bmRequestType, req->bRequest,
2159 UGETW(req->wLength), value, index);
2161 #define C(x,y) ((x) | ((y) << 8))
2162 switch (C(req->bRequest, req->bmRequestType)) {
2163 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2164 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2165 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2167 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2168 * for the integrated root hub.
2171 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2173 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2175 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2176 switch (value >> 8) {
2178 if ((value & 0xff) != 0) {
2179 err = USB_ERR_IOERROR;
2182 len = sizeof(ohci_devd);
2183 ptr = (const void *)&ohci_devd;
2187 if ((value & 0xff) != 0) {
2188 err = USB_ERR_IOERROR;
2191 len = sizeof(ohci_confd);
2192 ptr = (const void *)&ohci_confd;
2196 switch (value & 0xff) {
2197 case 0: /* Language table */
2201 case 1: /* Vendor */
2202 str_ptr = sc->sc_vendor;
2205 case 2: /* Product */
2206 str_ptr = "OHCI root HUB";
2214 len = usb_make_str_desc(
2215 sc->sc_hub_desc.temp,
2216 sizeof(sc->sc_hub_desc.temp),
2221 err = USB_ERR_IOERROR;
2225 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2227 sc->sc_hub_desc.temp[0] = 0;
2229 case C(UR_GET_STATUS, UT_READ_DEVICE):
2231 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2233 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2234 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2236 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2238 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2239 if (value >= OHCI_MAX_DEVICES) {
2240 err = USB_ERR_IOERROR;
2243 sc->sc_addr = value;
2245 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2246 if ((value != 0) && (value != 1)) {
2247 err = USB_ERR_IOERROR;
2250 sc->sc_conf = value;
2252 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2254 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2255 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2256 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2257 err = USB_ERR_IOERROR;
2259 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2261 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2264 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2266 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2267 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2268 "port=%d feature=%d\n",
2271 (index > sc->sc_noport)) {
2272 err = USB_ERR_IOERROR;
2275 port = OHCI_RH_PORT_STATUS(index);
2277 case UHF_PORT_ENABLE:
2278 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2280 case UHF_PORT_SUSPEND:
2281 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2283 case UHF_PORT_POWER:
2284 /* Yes, writing to the LOW_SPEED bit clears power. */
2285 OWRITE4(sc, port, UPS_LOW_SPEED);
2287 case UHF_C_PORT_CONNECTION:
2288 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2290 case UHF_C_PORT_ENABLE:
2291 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2293 case UHF_C_PORT_SUSPEND:
2294 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2296 case UHF_C_PORT_OVER_CURRENT:
2297 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2299 case UHF_C_PORT_RESET:
2300 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2303 err = USB_ERR_IOERROR;
2307 case UHF_C_PORT_CONNECTION:
2308 case UHF_C_PORT_ENABLE:
2309 case UHF_C_PORT_SUSPEND:
2310 case UHF_C_PORT_OVER_CURRENT:
2311 case UHF_C_PORT_RESET:
2312 /* enable RHSC interrupt if condition is cleared. */
2313 if ((OREAD4(sc, port) >> 16) == 0)
2314 ohci_rhsc_enable(sc);
2320 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2321 if ((value & 0xff) != 0) {
2322 err = USB_ERR_IOERROR;
2325 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2327 sc->sc_hub_desc.hubd = ohci_hubd;
2328 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2329 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2330 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2331 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2332 /* XXX overcurrent */
2334 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2335 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2337 for (l = 0; l < sc->sc_noport; l++) {
2339 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2343 sc->sc_hub_desc.hubd.bDescLength =
2344 8 + ((sc->sc_noport + 7) / 8);
2345 len = sc->sc_hub_desc.hubd.bDescLength;
2348 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2350 bzero(sc->sc_hub_desc.temp, 16);
2352 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2353 DPRINTFN(9, "get port status i=%d\n",
2356 (index > sc->sc_noport)) {
2357 err = USB_ERR_IOERROR;
2360 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2361 DPRINTFN(9, "port status=0x%04x\n", v);
2362 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2363 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2364 len = sizeof(sc->sc_hub_desc.ps);
2366 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2367 err = USB_ERR_IOERROR;
2369 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2371 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2373 (index > sc->sc_noport)) {
2374 err = USB_ERR_IOERROR;
2377 port = OHCI_RH_PORT_STATUS(index);
2379 case UHF_PORT_ENABLE:
2380 OWRITE4(sc, port, UPS_PORT_ENABLED);
2382 case UHF_PORT_SUSPEND:
2383 OWRITE4(sc, port, UPS_SUSPEND);
2385 case UHF_PORT_RESET:
2386 DPRINTFN(6, "reset port %d\n", index);
2387 OWRITE4(sc, port, UPS_RESET);
2390 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2391 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2393 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2397 err = USB_ERR_TIMEOUT;
2401 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2402 index, OREAD4(sc, port));
2404 case UHF_PORT_POWER:
2405 DPRINTFN(3, "set port power %d\n", index);
2406 OWRITE4(sc, port, UPS_PORT_POWER);
2409 err = USB_ERR_IOERROR;
2414 err = USB_ERR_IOERROR;
2424 ohci_xfer_setup(struct usb_setup_params *parm)
2426 struct usb_page_search page_info;
2427 struct usb_page_cache *pc;
2429 struct usb_xfer *xfer;
2436 sc = OHCI_BUS2SC(parm->udev->bus);
2437 xfer = parm->curr_xfer;
2439 parm->hc_max_packet_size = 0x500;
2440 parm->hc_max_packet_count = 1;
2441 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2444 * calculate ntd and nqh
2446 if (parm->methods == &ohci_device_ctrl_methods) {
2447 xfer->flags_int.bdma_enable = 1;
2449 usbd_transfer_setup_sub(parm);
2452 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2453 + (xfer->max_data_length / xfer->max_hc_frame_size));
2456 } else if (parm->methods == &ohci_device_bulk_methods) {
2457 xfer->flags_int.bdma_enable = 1;
2459 usbd_transfer_setup_sub(parm);
2462 ntd = ((2 * xfer->nframes)
2463 + (xfer->max_data_length / xfer->max_hc_frame_size));
2466 } else if (parm->methods == &ohci_device_intr_methods) {
2467 xfer->flags_int.bdma_enable = 1;
2469 usbd_transfer_setup_sub(parm);
2472 ntd = ((2 * xfer->nframes)
2473 + (xfer->max_data_length / xfer->max_hc_frame_size));
2476 } else if (parm->methods == &ohci_device_isoc_methods) {
2477 xfer->flags_int.bdma_enable = 1;
2479 usbd_transfer_setup_sub(parm);
2481 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2482 ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2489 usbd_transfer_setup_sub(parm);
2503 if (usbd_transfer_setup_sub_malloc(
2504 parm, &pc, sizeof(ohci_td_t),
2505 OHCI_TD_ALIGN, ntd)) {
2506 parm->err = USB_ERR_NOMEM;
2510 for (n = 0; n != ntd; n++) {
2513 usbd_get_page(pc + n, 0, &page_info);
2515 td = page_info.buffer;
2518 td->td_self = htole32(page_info.physaddr);
2519 td->obj_next = last_obj;
2520 td->page_cache = pc + n;
2524 usb_pc_cpu_flush(pc + n);
2527 if (usbd_transfer_setup_sub_malloc(
2528 parm, &pc, sizeof(ohci_itd_t),
2529 OHCI_ITD_ALIGN, nitd)) {
2530 parm->err = USB_ERR_NOMEM;
2534 for (n = 0; n != nitd; n++) {
2537 usbd_get_page(pc + n, 0, &page_info);
2539 itd = page_info.buffer;
2542 itd->itd_self = htole32(page_info.physaddr);
2543 itd->obj_next = last_obj;
2544 itd->page_cache = pc + n;
2548 usb_pc_cpu_flush(pc + n);
2551 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2555 if (usbd_transfer_setup_sub_malloc(
2556 parm, &pc, sizeof(ohci_ed_t),
2557 OHCI_ED_ALIGN, nqh)) {
2558 parm->err = USB_ERR_NOMEM;
2562 for (n = 0; n != nqh; n++) {
2565 usbd_get_page(pc + n, 0, &page_info);
2567 ed = page_info.buffer;
2570 ed->ed_self = htole32(page_info.physaddr);
2571 ed->obj_next = last_obj;
2572 ed->page_cache = pc + n;
2576 usb_pc_cpu_flush(pc + n);
2579 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2581 if (!xfer->flags_int.curr_dma_set) {
2582 xfer->flags_int.curr_dma_set = 1;
2588 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2589 struct usb_endpoint *ep)
2591 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2593 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2595 edesc->bEndpointAddress, udev->flags.usb_mode,
2598 if (udev->flags.usb_mode != USB_MODE_HOST) {
2602 if (udev->device_index != sc->sc_addr) {
2603 switch (edesc->bmAttributes & UE_XFERTYPE) {
2605 ep->methods = &ohci_device_ctrl_methods;
2608 ep->methods = &ohci_device_intr_methods;
2610 case UE_ISOCHRONOUS:
2611 if (udev->speed == USB_SPEED_FULL) {
2612 ep->methods = &ohci_device_isoc_methods;
2616 ep->methods = &ohci_device_bulk_methods;
2626 ohci_xfer_unsetup(struct usb_xfer *xfer)
2632 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2635 * Wait until hardware has finished any possible use of the
2636 * transfer descriptor(s) and QH
2638 *pus = (1125); /* microseconds */
2642 ohci_device_resume(struct usb_device *udev)
2644 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2645 struct usb_xfer *xfer;
2646 struct usb_pipe_methods *methods;
2651 USB_BUS_LOCK(udev->bus);
2653 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2655 if (xfer->xroot->udev == udev) {
2657 methods = xfer->endpoint->methods;
2658 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2660 if (methods == &ohci_device_bulk_methods) {
2661 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2662 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2664 if (methods == &ohci_device_ctrl_methods) {
2665 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2666 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2668 if (methods == &ohci_device_intr_methods) {
2669 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2674 USB_BUS_UNLOCK(udev->bus);
2680 ohci_device_suspend(struct usb_device *udev)
2682 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2683 struct usb_xfer *xfer;
2684 struct usb_pipe_methods *methods;
2689 USB_BUS_LOCK(udev->bus);
2691 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2693 if (xfer->xroot->udev == udev) {
2695 methods = xfer->endpoint->methods;
2696 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2698 if (methods == &ohci_device_bulk_methods) {
2699 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2701 if (methods == &ohci_device_ctrl_methods) {
2702 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2704 if (methods == &ohci_device_intr_methods) {
2705 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2710 USB_BUS_UNLOCK(udev->bus);
2716 ohci_set_hw_power(struct usb_bus *bus)
2718 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2726 flags = bus->hw_power_state;
2728 temp = OREAD4(sc, OHCI_CONTROL);
2729 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2731 if (flags & USB_HW_POWER_CONTROL)
2734 if (flags & USB_HW_POWER_BULK)
2737 if (flags & USB_HW_POWER_INTERRUPT)
2740 if (flags & USB_HW_POWER_ISOC)
2741 temp |= OHCI_IE | OHCI_PLE;
2743 OWRITE4(sc, OHCI_CONTROL, temp);
2745 USB_BUS_UNLOCK(bus);
2750 struct usb_bus_methods ohci_bus_methods =
2752 .endpoint_init = ohci_ep_init,
2753 .xfer_setup = ohci_xfer_setup,
2754 .xfer_unsetup = ohci_xfer_unsetup,
2755 .get_dma_delay = ohci_get_dma_delay,
2756 .device_resume = ohci_device_resume,
2757 .device_suspend = ohci_device_suspend,
2758 .set_hw_power = ohci_set_hw_power,
2759 .roothub_exec = ohci_roothub_exec,
2760 .xfer_poll = ohci_do_poll,