sys/dev/vxge/vxge.c

   1 /*-
   2  * Copyright(c) 2002-2011 Exar Corp.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification are permitted provided the following conditions are met:
   7  *
   8  *    1. Redistributions of source code must retain the above copyright notice,
   9  *       this list of conditions and the following disclaimer.
  10  *
  11  *    2. Redistributions in binary form must reproduce the above copyright
  12  *       notice, this list of conditions and the following disclaimer in the
  13  *       documentation and/or other materials provided with the distribution.
  14  *
  15  *    3. Neither the name of the Exar Corporation nor the names of its
  16  *       contributors may be used to endorse or promote products derived from
  17  *       this software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31 /*$FreeBSD$*/
  32
  33 #include <dev/vxge/vxge.h>
  34
  35 static int vxge_pci_bd_no = -1;
  36 static u32 vxge_drv_copyright = 0;
  37 static u32 vxge_dev_ref_count = 0;
  38 static u32 vxge_dev_req_reboot = 0;
  39
  40 static int vpath_selector[VXGE_HAL_MAX_VIRTUAL_PATHS] = \
  41 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  42
  43 /*
  44  * vxge_probe
  45  * Probes for x3100 devices
  46  */
  47 int
  48 vxge_probe(device_t ndev)
  49 {
  50         int err = ENXIO;
  51
  52         u16 pci_bd_no = 0;
  53         u16 pci_vendor_id = 0;
  54         u16 pci_device_id = 0;
  55
  56         char adapter_name[64];
  57
  58         pci_vendor_id = pci_get_vendor(ndev);
  59         if (pci_vendor_id != VXGE_PCI_VENDOR_ID)
  60                 goto _exit0;
  61
  62         pci_device_id = pci_get_device(ndev);
  63
  64         if (pci_device_id == VXGE_PCI_DEVICE_ID_TITAN_1) {
  65
  66                 pci_bd_no = (pci_get_bus(ndev) | pci_get_slot(ndev));
  67
  68                 snprintf(adapter_name, sizeof(adapter_name),
  69                     VXGE_ADAPTER_NAME, pci_get_revid(ndev));
  70                 device_set_desc_copy(ndev, adapter_name);
  71
  72                 if (!vxge_drv_copyright) {
  73                         device_printf(ndev, VXGE_COPYRIGHT);
  74                         vxge_drv_copyright = 1;
  75                 }
  76
  77                 if (vxge_dev_req_reboot == 0) {
  78                         vxge_pci_bd_no = pci_bd_no;
  79                         err = BUS_PROBE_DEFAULT;
  80                 } else {
  81                         if (pci_bd_no != vxge_pci_bd_no) {
  82                                 vxge_pci_bd_no = pci_bd_no;
  83                                 err = BUS_PROBE_DEFAULT;
  84                         }
  85                 }
  86         }
  87
  88 _exit0:
  89         return (err);
  90 }
  91
  92 /*
  93  * vxge_attach
  94  * Connects driver to the system if probe was success @ndev handle
  95  */
  96 int
  97 vxge_attach(device_t ndev)
  98 {
  99         int err = 0;
 100         vxge_dev_t *vdev;
 101         vxge_hal_device_t *hldev = NULL;
 102         vxge_hal_device_attr_t device_attr;
 103         vxge_free_resources_e error_level = VXGE_FREE_NONE;
 104
 105         vxge_hal_status_e status = VXGE_HAL_OK;
 106
 107         /* Get per-ndev buffer */
 108         vdev = (vxge_dev_t *) device_get_softc(ndev);
 109         if (!vdev)
 110                 goto _exit0;
 111
 112         bzero(vdev, sizeof(vxge_dev_t));
 113
 114         vdev->ndev = ndev;
 115         strlcpy(vdev->ndev_name, "vxge", sizeof(vdev->ndev_name));
 116
 117         err = vxge_driver_config(vdev);
 118         if (err != 0)
 119                 goto _exit0;
 120
 121         /* Initialize HAL driver */
 122         status = vxge_driver_init(vdev);
 123         if (status != VXGE_HAL_OK) {
 124                 device_printf(vdev->ndev, "Failed to initialize driver\n");
 125                 goto _exit0;
 126         }
 127         /* Enable PCI bus-master */
 128         pci_enable_busmaster(ndev);
 129
 130         /* Allocate resources */
 131         err = vxge_alloc_resources(vdev);
 132         if (err != 0) {
 133                 device_printf(vdev->ndev, "resource allocation failed\n");
 134                 goto _exit0;
 135         }
 136
 137         err = vxge_device_hw_info_get(vdev);
 138         if (err != 0) {
 139                 error_level = VXGE_FREE_BAR2;
 140                 goto _exit0;
 141         }
 142
 143         /* Get firmware default values for Device Configuration */
 144         vxge_hal_device_config_default_get(vdev->device_config);
 145
 146         /* Customize Device Configuration based on User request */
 147         vxge_vpath_config(vdev);
 148
 149         /* Allocate ISR resources */
 150         err = vxge_alloc_isr_resources(vdev);
 151         if (err != 0) {
 152                 error_level = VXGE_FREE_ISR_RESOURCE;
 153                 device_printf(vdev->ndev, "isr resource allocation failed\n");
 154                 goto _exit0;
 155         }
 156
 157         /* HAL attributes */
 158         device_attr.bar0 = (u8 *) vdev->pdev->bar_info[0];
 159         device_attr.bar1 = (u8 *) vdev->pdev->bar_info[1];
 160         device_attr.bar2 = (u8 *) vdev->pdev->bar_info[2];
 161         device_attr.regh0 = (vxge_bus_res_t *) vdev->pdev->reg_map[0];
 162         device_attr.regh1 = (vxge_bus_res_t *) vdev->pdev->reg_map[1];
 163         device_attr.regh2 = (vxge_bus_res_t *) vdev->pdev->reg_map[2];
 164         device_attr.irqh = (pci_irq_h) vdev->config.isr_info[0].irq_handle;
 165         device_attr.cfgh = vdev->pdev;
 166         device_attr.pdev = vdev->pdev;
 167
 168         /* Initialize HAL Device */
 169         status = vxge_hal_device_initialize((vxge_hal_device_h *) &hldev,
 170             &device_attr, vdev->device_config);
 171         if (status != VXGE_HAL_OK) {
 172                 error_level = VXGE_FREE_ISR_RESOURCE;
 173                 device_printf(vdev->ndev, "hal device initialization failed\n");
 174                 goto _exit0;
 175         }
 176
 177         vdev->devh = hldev;
 178         vxge_hal_device_private_set(hldev, vdev);
 179
 180         if (vdev->is_privilaged) {
 181                 err = vxge_firmware_verify(vdev);
 182                 if (err != 0) {
 183                         vxge_dev_req_reboot = 1;
 184                         error_level = VXGE_FREE_TERMINATE_DEVICE;
 185                         goto _exit0;
 186                 }
 187         }
 188
 189         /* Allocate memory for vpath */
 190         vdev->vpaths = (vxge_vpath_t *)
 191             vxge_mem_alloc(vdev->no_of_vpath * sizeof(vxge_vpath_t));
 192
 193         if (vdev->vpaths == NULL) {
 194                 error_level = VXGE_FREE_TERMINATE_DEVICE;
 195                 device_printf(vdev->ndev, "vpath memory allocation failed\n");
 196                 goto _exit0;
 197         }
 198
 199         vdev->no_of_func = 1;
 200         if (vdev->is_privilaged) {
 201
 202                 vxge_hal_func_mode_count(vdev->devh,
 203                     vdev->config.hw_info.function_mode, &vdev->no_of_func);
 204
 205                 vxge_bw_priority_config(vdev);
 206         }
 207
 208         /* Initialize mutexes */
 209         vxge_mutex_init(vdev);
 210
 211         /* Initialize Media */
 212         vxge_media_init(vdev);
 213
 214         err = vxge_ifp_setup(ndev);
 215         if (err != 0) {
 216                 error_level = VXGE_FREE_MEDIA;
 217                 device_printf(vdev->ndev, "setting up interface failed\n");
 218                 goto _exit0;
 219         }
 220
 221         err = vxge_isr_setup(vdev);
 222         if (err != 0) {
 223                 error_level = VXGE_FREE_INTERFACE;
 224                 device_printf(vdev->ndev,
 225                     "failed to associate interrupt handler with device\n");
 226                 goto _exit0;
 227         }
 228         vxge_device_hw_info_print(vdev);
 229         vdev->is_active = TRUE;
 230
 231 _exit0:
 232         if (error_level) {
 233                 vxge_free_resources(ndev, error_level);
 234                 err = ENXIO;
 235         }
 236
 237         return (err);
 238 }
 239
 240 /*
 241  * vxge_detach
 242  * Detaches driver from the Kernel subsystem
 243  */
 244 int
 245 vxge_detach(device_t ndev)
 246 {
 247         vxge_dev_t *vdev;
 248
 249         vdev = (vxge_dev_t *) device_get_softc(ndev);
 250         if (vdev->is_active) {
 251                 vdev->is_active = FALSE;
 252                 vxge_stop(vdev);
 253                 vxge_free_resources(ndev, VXGE_FREE_ALL);
 254         }
 255
 256         return (0);
 257 }
 258
 259 /*
 260  * vxge_shutdown
 261  * To shutdown device before system shutdown
 262  */
 263 int
 264 vxge_shutdown(device_t ndev)
 265 {
 266         vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
 267         vxge_stop(vdev);
 268         return (0);
 269 }
 270
 271 /*
 272  * vxge_init
 273  * Initialize the interface
 274  */
 275 void
 276 vxge_init(void *vdev_ptr)
 277 {
 278         vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
 279
 280         VXGE_DRV_LOCK(vdev);
 281         vxge_init_locked(vdev);
 282         VXGE_DRV_UNLOCK(vdev);
 283 }
 284
 285 /*
 286  * vxge_init_locked
 287  * Initialize the interface
 288  */
 289 void
 290 vxge_init_locked(vxge_dev_t *vdev)
 291 {
 292         int i, err = EINVAL;
 293         vxge_hal_device_t *hldev = vdev->devh;
 294         vxge_hal_status_e status = VXGE_HAL_OK;
 295         vxge_hal_vpath_h vpath_handle;
 296
 297         ifnet_t ifp = vdev->ifp;
 298
 299         /* If device is in running state, initializing is not required */
 300         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
 301                 goto _exit0;
 302
 303         VXGE_DRV_LOCK_ASSERT(vdev);
 304
 305         /* Opening vpaths */
 306         err = vxge_vpath_open(vdev);
 307         if (err != 0)
 308                 goto _exit1;
 309
 310         if (vdev->config.rth_enable) {
 311                 status = vxge_rth_config(vdev);
 312                 if (status != VXGE_HAL_OK)
 313                         goto _exit1;
 314         }
 315
 316         for (i = 0; i < vdev->no_of_vpath; i++) {
 317                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 318                 if (!vpath_handle)
 319                         continue;
 320
 321                 /* check initial mtu before enabling the device */
 322                 status = vxge_hal_device_mtu_check(vpath_handle, ifp->if_mtu);
 323                 if (status != VXGE_HAL_OK) {
 324                         device_printf(vdev->ndev,
 325                             "invalid mtu size %ld specified\n", ifp->if_mtu);
 326                         goto _exit1;
 327                 }
 328
 329                 status = vxge_hal_vpath_mtu_set(vpath_handle, ifp->if_mtu);
 330                 if (status != VXGE_HAL_OK) {
 331                         device_printf(vdev->ndev,
 332                             "setting mtu in device failed\n");
 333                         goto _exit1;
 334                 }
 335         }
 336
 337         /* Enable HAL device */
 338         status = vxge_hal_device_enable(hldev);
 339         if (status != VXGE_HAL_OK) {
 340                 device_printf(vdev->ndev, "failed to enable device\n");
 341                 goto _exit1;
 342         }
 343
 344         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX)
 345                 vxge_msix_enable(vdev);
 346
 347         /* Checksum capability */
 348         ifp->if_hwassist = 0;
 349         if (ifp->if_capenable & IFCAP_TXCSUM)
 350                 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
 351
 352         if (ifp->if_capenable & IFCAP_TSO4)
 353                 ifp->if_hwassist |= CSUM_TSO;
 354
 355         for (i = 0; i < vdev->no_of_vpath; i++) {
 356                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 357                 if (!vpath_handle)
 358                         continue;
 359
 360                 /* Enabling mcast for all vpath */
 361                 vxge_hal_vpath_mcast_enable(vpath_handle);
 362
 363                 /* Enabling bcast for all vpath */
 364                 status = vxge_hal_vpath_bcast_enable(vpath_handle);
 365                 if (status != VXGE_HAL_OK)
 366                         device_printf(vdev->ndev,
 367                             "can't enable bcast on vpath (%d)\n", i);
 368         }
 369
 370         /* Enable interrupts */
 371         vxge_hal_device_intr_enable(vdev->devh);
 372
 373         for (i = 0; i < vdev->no_of_vpath; i++) {
 374                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 375                 if (!vpath_handle)
 376                         continue;
 377
 378                 bzero(&(vdev->vpaths[i].driver_stats),
 379                     sizeof(vxge_drv_stats_t));
 380                 status = vxge_hal_vpath_enable(vpath_handle);
 381                 if (status != VXGE_HAL_OK)
 382                         goto _exit2;
 383         }
 384
 385         vxge_os_mdelay(1000);
 386
 387         /* Device is initialized */
 388         vdev->is_initialized = TRUE;
 389
 390         /* Now inform the stack we're ready */
 391         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 392         ifp->if_drv_flags |= IFF_DRV_RUNNING;
 393
 394         goto _exit0;
 395
 396 _exit2:
 397         vxge_hal_device_intr_disable(vdev->devh);
 398         vxge_hal_device_disable(hldev);
 399
 400 _exit1:
 401         vxge_vpath_close(vdev);
 402
 403 _exit0:
 404         return;
 405 }
 406
 407 /*
 408  * vxge_driver_init
 409  * Initializes HAL driver
 410  */
 411 vxge_hal_status_e
 412 vxge_driver_init(vxge_dev_t *vdev)
 413 {
 414         vxge_hal_uld_cbs_t uld_callbacks;
 415         vxge_hal_driver_config_t driver_config;
 416         vxge_hal_status_e status = VXGE_HAL_OK;
 417
 418         /* Initialize HAL driver */
 419         if (!vxge_dev_ref_count) {
 420                 bzero(&uld_callbacks, sizeof(vxge_hal_uld_cbs_t));
 421                 bzero(&driver_config, sizeof(vxge_hal_driver_config_t));
 422
 423                 uld_callbacks.link_up = vxge_link_up;
 424                 uld_callbacks.link_down = vxge_link_down;
 425                 uld_callbacks.crit_err = vxge_crit_error;
 426                 uld_callbacks.sched_timer = NULL;
 427                 uld_callbacks.xpak_alarm_log = NULL;
 428
 429                 status = vxge_hal_driver_initialize(&driver_config,
 430                     &uld_callbacks);
 431                 if (status != VXGE_HAL_OK) {
 432                         device_printf(vdev->ndev,
 433                             "failed to initialize driver\n");
 434                         goto _exit0;
 435                 }
 436         }
 437         vxge_hal_driver_debug_set(VXGE_TRACE);
 438         vxge_dev_ref_count++;
 439
 440 _exit0:
 441         return (status);
 442 }
 443
 444 /*
 445  * vxge_driver_config
 446  */
 447 int
 448 vxge_driver_config(vxge_dev_t *vdev)
 449 {
 450         int i, err = 0;
 451         char temp_buffer[30];
 452
 453         vxge_bw_info_t bw_info;
 454
 455         VXGE_GET_PARAM("hint.vxge.0.no_of_vpath", vdev->config,
 456             no_of_vpath, VXGE_DEFAULT_USER_HARDCODED);
 457
 458         if (vdev->config.no_of_vpath == VXGE_DEFAULT_USER_HARDCODED)
 459                 vdev->config.no_of_vpath = mp_ncpus;
 460
 461         if (vdev->config.no_of_vpath <= 0) {
 462                 err = EINVAL;
 463                 device_printf(vdev->ndev,
 464                     "Failed to load driver, \
 465                     invalid config : \'no_of_vpath\'\n");
 466                 goto _exit0;
 467         }
 468
 469         VXGE_GET_PARAM("hint.vxge.0.intr_coalesce", vdev->config,
 470             intr_coalesce, VXGE_DEFAULT_CONFIG_DISABLE);
 471
 472         VXGE_GET_PARAM("hint.vxge.0.rth_enable", vdev->config,
 473             rth_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 474
 475         VXGE_GET_PARAM("hint.vxge.0.rth_bkt_sz", vdev->config,
 476             rth_bkt_sz, VXGE_DEFAULT_RTH_BUCKET_SIZE);
 477
 478         VXGE_GET_PARAM("hint.vxge.0.lro_enable", vdev->config,
 479             lro_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 480
 481         VXGE_GET_PARAM("hint.vxge.0.tso_enable", vdev->config,
 482             tso_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 483
 484         VXGE_GET_PARAM("hint.vxge.0.tx_steering", vdev->config,
 485             tx_steering, VXGE_DEFAULT_CONFIG_DISABLE);
 486
 487         VXGE_GET_PARAM("hint.vxge.0.msix_enable", vdev->config,
 488             intr_mode, VXGE_HAL_INTR_MODE_MSIX);
 489
 490         VXGE_GET_PARAM("hint.vxge.0.ifqmaxlen", vdev->config,
 491             ifq_maxlen, VXGE_DEFAULT_CONFIG_IFQ_MAXLEN);
 492
 493         VXGE_GET_PARAM("hint.vxge.0.port_mode", vdev->config,
 494             port_mode, VXGE_DEFAULT_CONFIG_VALUE);
 495
 496         if (vdev->config.port_mode == VXGE_DEFAULT_USER_HARDCODED)
 497                 vdev->config.port_mode = VXGE_DEFAULT_CONFIG_VALUE;
 498
 499         VXGE_GET_PARAM("hint.vxge.0.l2_switch", vdev->config,
 500             l2_switch, VXGE_DEFAULT_CONFIG_VALUE);
 501
 502         if (vdev->config.l2_switch == VXGE_DEFAULT_USER_HARDCODED)
 503                 vdev->config.l2_switch = VXGE_DEFAULT_CONFIG_VALUE;
 504
 505         VXGE_GET_PARAM("hint.vxge.0.fw_upgrade", vdev->config,
 506             fw_option, VXGE_FW_UPGRADE_ALL);
 507
 508         VXGE_GET_PARAM("hint.vxge.0.low_latency", vdev->config,
 509             low_latency, VXGE_DEFAULT_CONFIG_DISABLE);
 510
 511         VXGE_GET_PARAM("hint.vxge.0.func_mode", vdev->config,
 512             function_mode, VXGE_DEFAULT_CONFIG_VALUE);
 513
 514         if (vdev->config.function_mode == VXGE_DEFAULT_USER_HARDCODED)
 515                 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
 516
 517         if (!(is_multi_func(vdev->config.function_mode) ||
 518             is_single_func(vdev->config.function_mode)))
 519                 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
 520
 521         for (i = 0; i < VXGE_HAL_MAX_FUNCTIONS; i++) {
 522
 523                 bw_info.func_id = i;
 524
 525                 sprintf(temp_buffer, "hint.vxge.0.bandwidth_%d", i);
 526                 VXGE_GET_PARAM(temp_buffer, bw_info,
 527                     bandwidth, VXGE_DEFAULT_USER_HARDCODED);
 528
 529                 if (bw_info.bandwidth == VXGE_DEFAULT_USER_HARDCODED)
 530                         bw_info.bandwidth = VXGE_HAL_VPATH_BW_LIMIT_DEFAULT;
 531
 532                 sprintf(temp_buffer, "hint.vxge.0.priority_%d", i);
 533                 VXGE_GET_PARAM(temp_buffer, bw_info,
 534                     priority, VXGE_DEFAULT_USER_HARDCODED);
 535
 536                 if (bw_info.priority == VXGE_DEFAULT_USER_HARDCODED)
 537                         bw_info.priority = VXGE_HAL_VPATH_PRIORITY_DEFAULT;
 538
 539                 vxge_os_memcpy(&vdev->config.bw_info[i], &bw_info,
 540                     sizeof(vxge_bw_info_t));
 541         }
 542
 543 _exit0:
 544         return (err);
 545 }
 546
 547 /*
 548  * vxge_stop
 549  */
 550 void
 551 vxge_stop(vxge_dev_t *vdev)
 552 {
 553         VXGE_DRV_LOCK(vdev);
 554         vxge_stop_locked(vdev);
 555         VXGE_DRV_UNLOCK(vdev);
 556 }
 557
 558 /*
 559  * vxge_stop_locked
 560  * Common code for both stop and part of reset.
 561  * disables device, interrupts and closes vpaths handle
 562  */
 563 void
 564 vxge_stop_locked(vxge_dev_t *vdev)
 565 {
 566         u64 adapter_status = 0;
 567         vxge_hal_status_e status;
 568         vxge_hal_device_t *hldev = vdev->devh;
 569         ifnet_t ifp = vdev->ifp;
 570
 571         VXGE_DRV_LOCK_ASSERT(vdev);
 572
 573         /* If device is not in "Running" state, return */
 574         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
 575                 return;
 576
 577         /* Set appropriate flags */
 578         vdev->is_initialized = FALSE;
 579         hldev->link_state = VXGE_HAL_LINK_NONE;
 580         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
 581         if_link_state_change(ifp, LINK_STATE_DOWN);
 582
 583         /* Disable interrupts */
 584         vxge_hal_device_intr_disable(hldev);
 585
 586         /* Disable HAL device */
 587         status = vxge_hal_device_disable(hldev);
 588         if (status != VXGE_HAL_OK) {
 589                 vxge_hal_device_status(hldev, &adapter_status);
 590                 device_printf(vdev->ndev,
 591                     "adapter status: 0x%llx\n", adapter_status);
 592         }
 593
 594         /* reset vpaths */
 595         vxge_vpath_reset(vdev);
 596
 597         vxge_os_mdelay(1000);
 598
 599         /* Close Vpaths */
 600         vxge_vpath_close(vdev);
 601 }
 602
 603 void
 604 vxge_send(ifnet_t ifp)
 605 {
 606         vxge_vpath_t *vpath;
 607         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 608
 609         vpath = &(vdev->vpaths[0]);
 610
 611         if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
 612                 if (VXGE_TX_TRYLOCK(vpath)) {
 613                         vxge_send_locked(ifp, vpath);
 614                         VXGE_TX_UNLOCK(vpath);
 615                 }
 616         }
 617 }
 618
 619 static inline void
 620 vxge_send_locked(ifnet_t ifp, vxge_vpath_t *vpath)
 621 {
 622         mbuf_t m_head = NULL;
 623         vxge_dev_t *vdev = vpath->vdev;
 624
 625         VXGE_TX_LOCK_ASSERT(vpath);
 626
 627         if ((!vdev->is_initialized) ||
 628             ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
 629             IFF_DRV_RUNNING))
 630                 return;
 631
 632         while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
 633                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
 634                 if (m_head == NULL)
 635                         break;
 636
 637                 if (vxge_xmit(ifp, vpath, &m_head)) {
 638                         if (m_head == NULL)
 639                                 break;
 640
 641                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 642                         IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
 643                         VXGE_DRV_STATS(vpath, tx_again);
 644                         break;
 645                 }
 646                 /* Send a copy of the frame to the BPF listener */
 647                 ETHER_BPF_MTAP(ifp, m_head);
 648         }
 649 }
 650
 651 #if __FreeBSD_version >= 800000
 652
 653 int
 654 vxge_mq_send(ifnet_t ifp, mbuf_t m_head)
 655 {
 656         int i = 0, err = 0;
 657
 658         vxge_vpath_t *vpath;
 659         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 660
 661         if (vdev->config.tx_steering) {
 662                 i = vxge_vpath_get(vdev, m_head);
 663         } else if ((m_head->m_flags & M_FLOWID) != 0) {
 664                 i = m_head->m_pkthdr.flowid % vdev->no_of_vpath;
 665         }
 666
 667         vpath = &(vdev->vpaths[i]);
 668         if (VXGE_TX_TRYLOCK(vpath)) {
 669                 err = vxge_mq_send_locked(ifp, vpath, m_head);
 670                 VXGE_TX_UNLOCK(vpath);
 671         } else
 672                 err = drbr_enqueue(ifp, vpath->br, m_head);
 673
 674         return (err);
 675 }
 676
 677 static inline int
 678 vxge_mq_send_locked(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t m_head)
 679 {
 680         int err = 0;
 681         mbuf_t next = NULL;
 682         vxge_dev_t *vdev = vpath->vdev;
 683
 684         VXGE_TX_LOCK_ASSERT(vpath);
 685
 686         if ((!vdev->is_initialized) ||
 687             ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
 688             IFF_DRV_RUNNING)) {
 689                 err = drbr_enqueue(ifp, vpath->br, m_head);
 690                 goto _exit0;
 691         }
 692         if (m_head == NULL) {
 693                 next = drbr_dequeue(ifp, vpath->br);
 694         } else if (drbr_needs_enqueue(ifp, vpath->br)) {
 695                 if ((err = drbr_enqueue(ifp, vpath->br, m_head)) != 0)
 696                         goto _exit0;
 697                 next = drbr_dequeue(ifp, vpath->br);
 698         } else
 699                 next = m_head;
 700
 701         /* Process the queue */
 702         while (next != NULL) {
 703                 if ((err = vxge_xmit(ifp, vpath, &next)) != 0) {
 704                         if (next == NULL)
 705                                 break;
 706
 707                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 708                         err = drbr_enqueue(ifp, vpath->br, next);
 709                         VXGE_DRV_STATS(vpath, tx_again);
 710                         break;
 711                 }
 712                 drbr_stats_update(ifp, next->m_pkthdr.len, next->m_flags);
 713
 714                 /* Send a copy of the frame to the BPF listener */
 715                 ETHER_BPF_MTAP(ifp, next);
 716                 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
 717                         break;
 718
 719                 next = drbr_dequeue(ifp, vpath->br);
 720         }
 721
 722 _exit0:
 723         return (err);
 724 }
 725
 726 void
 727 vxge_mq_qflush(ifnet_t ifp)
 728 {
 729         int i;
 730         mbuf_t m_head;
 731         vxge_vpath_t *vpath;
 732
 733         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 734
 735         for (i = 0; i < vdev->no_of_vpath; i++) {
 736                 vpath = &(vdev->vpaths[i]);
 737                 if (!vpath->handle)
 738                         continue;
 739
 740                 VXGE_TX_LOCK(vpath);
 741                 while ((m_head = buf_ring_dequeue_sc(vpath->br)) != NULL)
 742                         vxge_free_packet(m_head);
 743
 744                 VXGE_TX_UNLOCK(vpath);
 745         }
 746         if_qflush(ifp);
 747 }
 748 #endif
 749
 750 static inline int
 751 vxge_xmit(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t *m_headp)
 752 {
 753         int err, num_segs = 0;
 754         u32 txdl_avail, dma_index, tagged = 0;
 755
 756         dma_addr_t dma_addr;
 757         bus_size_t dma_sizes;
 758
 759         void *dtr_priv;
 760         vxge_txdl_priv_t *txdl_priv;
 761         vxge_hal_txdl_h txdlh;
 762         vxge_hal_status_e status;
 763         vxge_dev_t *vdev = vpath->vdev;
 764
 765         VXGE_DRV_STATS(vpath, tx_xmit);
 766
 767         txdl_avail = vxge_hal_fifo_free_txdl_count_get(vpath->handle);
 768         if (txdl_avail < VXGE_TX_LOW_THRESHOLD) {
 769
 770                 VXGE_DRV_STATS(vpath, tx_low_dtr_cnt);
 771                 err = ENOBUFS;
 772                 goto _exit0;
 773         }
 774
 775         /* Reserve descriptors */
 776         status = vxge_hal_fifo_txdl_reserve(vpath->handle, &txdlh, &dtr_priv);
 777         if (status != VXGE_HAL_OK) {
 778                 VXGE_DRV_STATS(vpath, tx_reserve_failed);
 779                 err = ENOBUFS;
 780                 goto _exit0;
 781         }
 782
 783         /* Update Tx private structure for this descriptor */
 784         txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 785
 786         /*
 787          * Map the packet for DMA.
 788          * Returns number of segments through num_segs.
 789          */
 790         err = vxge_dma_mbuf_coalesce(vpath->dma_tag_tx, txdl_priv->dma_map,
 791             m_headp, txdl_priv->dma_buffers, &num_segs);
 792
 793         if (vpath->driver_stats.tx_max_frags < num_segs)
 794                 vpath->driver_stats.tx_max_frags = num_segs;
 795
 796         if (err == ENOMEM) {
 797                 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
 798                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 799                 goto _exit0;
 800         } else if (err != 0) {
 801                 vxge_free_packet(*m_headp);
 802                 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
 803                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 804                 goto _exit0;
 805         }
 806
 807         txdl_priv->mbuf_pkt = *m_headp;
 808
 809         /* Set VLAN tag in descriptor only if this packet has it */
 810         if ((*m_headp)->m_flags & M_VLANTAG)
 811                 vxge_hal_fifo_txdl_vlan_set(txdlh,
 812                     (*m_headp)->m_pkthdr.ether_vtag);
 813
 814         /* Set descriptor buffer for header and each fragment/segment */
 815         for (dma_index = 0; dma_index < num_segs; dma_index++) {
 816
 817                 dma_sizes = txdl_priv->dma_buffers[dma_index].ds_len;
 818                 dma_addr = htole64(txdl_priv->dma_buffers[dma_index].ds_addr);
 819
 820                 vxge_hal_fifo_txdl_buffer_set(vpath->handle, txdlh, dma_index,
 821                     dma_addr, dma_sizes);
 822         }
 823
 824         /* Pre-write Sync of mapping */
 825         bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
 826             BUS_DMASYNC_PREWRITE);
 827
 828         if ((*m_headp)->m_pkthdr.csum_flags & CSUM_TSO) {
 829                 if ((*m_headp)->m_pkthdr.tso_segsz) {
 830                         VXGE_DRV_STATS(vpath, tx_tso);
 831                         vxge_hal_fifo_txdl_lso_set(txdlh,
 832                             VXGE_HAL_FIFO_LSO_FRM_ENCAP_AUTO,
 833                             (*m_headp)->m_pkthdr.tso_segsz);
 834                 }
 835         }
 836
 837         /* Checksum */
 838         if (ifp->if_hwassist > 0) {
 839                 vxge_hal_fifo_txdl_cksum_set_bits(txdlh,
 840                     VXGE_HAL_FIFO_TXD_TX_CKO_IPV4_EN |
 841                     VXGE_HAL_FIFO_TXD_TX_CKO_TCP_EN |
 842                     VXGE_HAL_FIFO_TXD_TX_CKO_UDP_EN);
 843         }
 844
 845         if ((vxge_hal_device_check_id(vdev->devh) == VXGE_HAL_CARD_TITAN_1A) &&
 846             (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)))
 847                 tagged = 1;
 848
 849         vxge_hal_fifo_txdl_post(vpath->handle, txdlh, tagged);
 850         VXGE_DRV_STATS(vpath, tx_posted);
 851
 852 _exit0:
 853         return (err);
 854 }
 855
 856 /*
 857  * vxge_tx_replenish
 858  * Allocate buffers and set them into descriptors for later use
 859  */
 860 /* ARGSUSED */
 861 vxge_hal_status_e
 862 vxge_tx_replenish(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 863     void *dtr_priv, u32 dtr_index, void *userdata, vxge_hal_reopen_e reopen)
 864 {
 865         int err = 0;
 866
 867         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 868         vxge_txdl_priv_t *txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 869
 870         err = bus_dmamap_create(vpath->dma_tag_tx, BUS_DMA_NOWAIT,
 871             &txdl_priv->dma_map);
 872
 873         return ((err == 0) ? VXGE_HAL_OK : VXGE_HAL_FAIL);
 874 }
 875
 876 /*
 877  * vxge_tx_compl
 878  * If the interrupt is due to Tx completion, free the sent buffer
 879  */
 880 vxge_hal_status_e
 881 vxge_tx_compl(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 882     void *dtr_priv, vxge_hal_fifo_tcode_e t_code, void *userdata)
 883 {
 884         vxge_hal_status_e status = VXGE_HAL_OK;
 885
 886         vxge_txdl_priv_t *txdl_priv;
 887         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 888         vxge_dev_t *vdev = vpath->vdev;
 889
 890         ifnet_t ifp = vdev->ifp;
 891
 892         VXGE_TX_LOCK(vpath);
 893
 894         /*
 895          * For each completed descriptor
 896          * Get private structure, free buffer, do unmapping, and free descriptor
 897          */
 898
 899         do {
 900                 VXGE_DRV_STATS(vpath, tx_compl);
 901                 if (t_code != VXGE_HAL_FIFO_T_CODE_OK) {
 902                         device_printf(vdev->ndev, "tx transfer code %d\n",
 903                             t_code);
 904
 905                         ifp->if_oerrors++;
 906                         VXGE_DRV_STATS(vpath, tx_tcode);
 907                         vxge_hal_fifo_handle_tcode(vpath_handle, txdlh, t_code);
 908                 }
 909                 ifp->if_opackets++;
 910                 txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 911
 912                 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
 913
 914                 vxge_free_packet(txdl_priv->mbuf_pkt);
 915                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 916
 917         } while (vxge_hal_fifo_txdl_next_completed(vpath_handle, &txdlh,
 918             &dtr_priv, &t_code) == VXGE_HAL_OK);
 919
 920
 921         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 922         VXGE_TX_UNLOCK(vpath);
 923
 924         return (status);
 925 }
 926
 927 /* ARGSUSED */
 928 void
 929 vxge_tx_term(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 930     void *dtr_priv, vxge_hal_txdl_state_e state,
 931     void *userdata, vxge_hal_reopen_e reopen)
 932 {
 933         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 934         vxge_txdl_priv_t *txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 935
 936         if (state != VXGE_HAL_TXDL_STATE_POSTED)
 937                 return;
 938
 939         if (txdl_priv != NULL) {
 940                 bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
 941                     BUS_DMASYNC_POSTWRITE);
 942
 943                 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
 944                 bus_dmamap_destroy(vpath->dma_tag_tx, txdl_priv->dma_map);
 945                 vxge_free_packet(txdl_priv->mbuf_pkt);
 946         }
 947
 948         /* Free the descriptor */
 949         vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 950 }
 951
 952 /*
 953  * vxge_rx_replenish
 954  * Allocate buffers and set them into descriptors for later use
 955  */
 956 /* ARGSUSED */
 957 vxge_hal_status_e
 958 vxge_rx_replenish(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
 959     void *dtr_priv, u32 dtr_index, void *userdata, vxge_hal_reopen_e reopen)
 960 {
 961         int err = 0;
 962         vxge_hal_status_e status = VXGE_HAL_OK;
 963
 964         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 965         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
 966
 967         /* Create DMA map for these descriptors */
 968         err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
 969             &rxd_priv->dma_map);
 970         if (err == 0) {
 971                 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
 972                         bus_dmamap_destroy(vpath->dma_tag_rx,
 973                             rxd_priv->dma_map);
 974                         status = VXGE_HAL_FAIL;
 975                 }
 976         }
 977
 978         return (status);
 979 }
 980
 981 /*
 982  * vxge_rx_compl
 983  */
 984 vxge_hal_status_e
 985 vxge_rx_compl(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
 986     void *dtr_priv, u8 t_code, void *userdata)
 987 {
 988         mbuf_t mbuf_up;
 989
 990         vxge_rxd_priv_t *rxd_priv;
 991         vxge_hal_ring_rxd_info_t ext_info;
 992         vxge_hal_status_e status = VXGE_HAL_OK;
 993
 994         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 995         vxge_dev_t *vdev = vpath->vdev;
 996
 997         struct lro_entry *queued = NULL;
 998         struct lro_ctrl *lro = &vpath->lro;
 999
1000         /* get the interface pointer */
1001         ifnet_t ifp = vdev->ifp;
1002
1003         do {
1004                 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1005                         vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1006                         status = VXGE_HAL_FAIL;
1007                         break;
1008                 }
1009
1010                 VXGE_DRV_STATS(vpath, rx_compl);
1011                 rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1012
1013                 /* Gets details of mbuf i.e., packet length */
1014                 vxge_rx_rxd_1b_get(vpath, rxdh, dtr_priv);
1015
1016                 /*
1017                  * Prepare one buffer to send it to upper layer Since upper
1018                  * layer frees the buffer do not use rxd_priv->mbuf_pkt.
1019                  * Meanwhile prepare a new buffer, do mapping, use with the
1020                  * current descriptor and post descriptor back to ring vpath
1021                  */
1022                 mbuf_up = rxd_priv->mbuf_pkt;
1023                 if (t_code != VXGE_HAL_RING_RXD_T_CODE_OK) {
1024
1025                         ifp->if_ierrors++;
1026                         VXGE_DRV_STATS(vpath, rx_tcode);
1027                         status = vxge_hal_ring_handle_tcode(vpath_handle,
1028                             rxdh, t_code);
1029
1030                         /*
1031                          * If transfer code is not for unknown protocols and
1032                          * vxge_hal_device_handle_tcode is NOT returned
1033                          * VXGE_HAL_OK
1034                          * drop this packet and increment rx_tcode stats
1035                          */
1036                         if ((status != VXGE_HAL_OK) &&
1037                             (t_code != VXGE_HAL_RING_T_CODE_L3_PKT_ERR)) {
1038
1039                                 vxge_free_packet(mbuf_up);
1040                                 vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1041                                 continue;
1042                         }
1043                 }
1044
1045                 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
1046                         /*
1047                          * If unable to allocate buffer, post descriptor back
1048                          * to vpath for future processing of same packet.
1049                          */
1050                         vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1051                         continue;
1052                 }
1053
1054                 /* Get the extended information */
1055                 vxge_hal_ring_rxd_1b_info_get(vpath_handle, rxdh, &ext_info);
1056
1057                 /* post descriptor with newly allocated mbuf back to vpath */
1058                 vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1059                 vpath->rxd_posted++;
1060
1061                 if (vpath->rxd_posted % VXGE_RXD_REPLENISH_COUNT == 0)
1062                         vxge_hal_ring_rxd_post_post_db(vpath_handle);
1063
1064                 /*
1065                  * Set successfully computed checksums in the mbuf.
1066                  * Leave the rest to the stack to be reverified.
1067                  */
1068                 vxge_rx_checksum(ext_info, mbuf_up);
1069
1070 #if __FreeBSD_version >= 800000
1071                 mbuf_up->m_flags |= M_FLOWID;
1072                 mbuf_up->m_pkthdr.flowid = vpath->vp_index;
1073 #endif
1074                 /* Post-Read sync for buffers */
1075                 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1076                     BUS_DMASYNC_POSTREAD);
1077
1078                 vxge_rx_input(ifp, mbuf_up, vpath);
1079
1080         } while (vxge_hal_ring_rxd_next_completed(vpath_handle, &rxdh,
1081             &dtr_priv, &t_code) == VXGE_HAL_OK);
1082
1083         /* Flush any outstanding LRO work */
1084         if (vpath->lro_enable && vpath->lro.lro_cnt) {
1085                 while ((queued = SLIST_FIRST(&lro->lro_active)) != NULL) {
1086                         SLIST_REMOVE_HEAD(&lro->lro_active, next);
1087                         tcp_lro_flush(lro, queued);
1088                 }
1089         }
1090
1091         return (status);
1092 }
1093
1094 static inline void
1095 vxge_rx_input(ifnet_t ifp, mbuf_t mbuf_up, vxge_vpath_t *vpath)
1096 {
1097         if (vpath->lro_enable && vpath->lro.lro_cnt) {
1098                 if (tcp_lro_rx(&vpath->lro, mbuf_up, 0) == 0)
1099                         return;
1100         }
1101         (*ifp->if_input) (ifp, mbuf_up);
1102 }
1103
1104 static inline void
1105 vxge_rx_checksum(vxge_hal_ring_rxd_info_t ext_info, mbuf_t mbuf_up)
1106 {
1107
1108         if (!(ext_info.proto & VXGE_HAL_FRAME_PROTO_IP_FRAG) &&
1109             (ext_info.proto & VXGE_HAL_FRAME_PROTO_TCP_OR_UDP) &&
1110             ext_info.l3_cksum_valid && ext_info.l4_cksum_valid) {
1111
1112                 mbuf_up->m_pkthdr.csum_data = htons(0xffff);
1113
1114                 mbuf_up->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1115                 mbuf_up->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1116                 mbuf_up->m_pkthdr.csum_flags |=
1117                     (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
1118
1119         } else {
1120
1121                 if (ext_info.vlan) {
1122                         mbuf_up->m_pkthdr.ether_vtag = ext_info.vlan;
1123                         mbuf_up->m_flags |= M_VLANTAG;
1124                 }
1125         }
1126 }
1127
1128 /*
1129  * vxge_rx_term During unload terminate and free all descriptors
1130  * @vpath_handle Rx vpath Handle @rxdh Rx Descriptor Handle @state Descriptor
1131  * State @userdata Per-adapter Data @reopen vpath open/reopen option
1132  */
1133 /* ARGSUSED */
1134 void
1135 vxge_rx_term(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
1136     void *dtr_priv, vxge_hal_rxd_state_e state, void *userdata,
1137     vxge_hal_reopen_e reopen)
1138 {
1139         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
1140         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1141
1142         if (state != VXGE_HAL_RXD_STATE_POSTED)
1143                 return;
1144
1145         if (rxd_priv != NULL) {
1146                 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1147                     BUS_DMASYNC_POSTREAD);
1148                 bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1149                 bus_dmamap_destroy(vpath->dma_tag_rx, rxd_priv->dma_map);
1150
1151                 vxge_free_packet(rxd_priv->mbuf_pkt);
1152         }
1153         /* Free the descriptor */
1154         vxge_hal_ring_rxd_free(vpath_handle, rxdh);
1155 }
1156
1157 /*
1158  * vxge_rx_rxd_1b_get
1159  * Get descriptors of packet to send up
1160  */
1161 void
1162 vxge_rx_rxd_1b_get(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1163 {
1164         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1165         mbuf_t mbuf_up = rxd_priv->mbuf_pkt;
1166
1167         /* Retrieve data from completed descriptor */
1168         vxge_hal_ring_rxd_1b_get(vpath->handle, rxdh, &rxd_priv->dma_addr[0],
1169             (u32 *) &rxd_priv->dma_sizes[0]);
1170
1171         /* Update newly created buffer to be sent up with packet length */
1172         mbuf_up->m_len = rxd_priv->dma_sizes[0];
1173         mbuf_up->m_pkthdr.len = rxd_priv->dma_sizes[0];
1174         mbuf_up->m_next = NULL;
1175 }
1176
1177 /*
1178  * vxge_rx_rxd_1b_set
1179  * Allocates new mbufs to be placed into descriptors
1180  */
1181 int
1182 vxge_rx_rxd_1b_set(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1183 {
1184         int num_segs, err = 0;
1185
1186         mbuf_t mbuf_pkt;
1187         bus_dmamap_t dma_map;
1188         bus_dma_segment_t dma_buffers[1];
1189         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1190
1191         vxge_dev_t *vdev = vpath->vdev;
1192
1193         mbuf_pkt = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, vdev->rx_mbuf_sz);
1194         if (!mbuf_pkt) {
1195                 err = ENOBUFS;
1196                 VXGE_DRV_STATS(vpath, rx_no_buf);
1197                 device_printf(vdev->ndev, "out of memory to allocate mbuf\n");
1198                 goto _exit0;
1199         }
1200
1201         /* Update mbuf's length, packet length and receive interface */
1202         mbuf_pkt->m_len = vdev->rx_mbuf_sz;
1203         mbuf_pkt->m_pkthdr.len = vdev->rx_mbuf_sz;
1204         mbuf_pkt->m_pkthdr.rcvif = vdev->ifp;
1205
1206         /* Load DMA map */
1207         err = vxge_dma_mbuf_coalesce(vpath->dma_tag_rx, vpath->extra_dma_map,
1208             &mbuf_pkt, dma_buffers, &num_segs);
1209         if (err != 0) {
1210                 VXGE_DRV_STATS(vpath, rx_map_fail);
1211                 vxge_free_packet(mbuf_pkt);
1212                 goto _exit0;
1213         }
1214
1215         /* Unload DMA map of mbuf in current descriptor */
1216         bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1217             BUS_DMASYNC_POSTREAD);
1218         bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1219
1220         /* Update descriptor private data */
1221         dma_map = rxd_priv->dma_map;
1222         rxd_priv->mbuf_pkt = mbuf_pkt;
1223         rxd_priv->dma_addr[0] = htole64(dma_buffers->ds_addr);
1224         rxd_priv->dma_map = vpath->extra_dma_map;
1225         vpath->extra_dma_map = dma_map;
1226
1227         /* Pre-Read/Write sync */
1228         bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1229             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1230
1231         /* Set descriptor buffer */
1232         vxge_hal_ring_rxd_1b_set(rxdh, rxd_priv->dma_addr[0], vdev->rx_mbuf_sz);
1233
1234 _exit0:
1235         return (err);
1236 }
1237
1238 /*
1239  * vxge_link_up
1240  * Callback for Link-up indication from HAL
1241  */
1242 /* ARGSUSED */
1243 void
1244 vxge_link_up(vxge_hal_device_h devh, void *userdata)
1245 {
1246         int i;
1247         vxge_vpath_t *vpath;
1248         vxge_hal_device_hw_info_t *hw_info;
1249
1250         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1251         hw_info = &vdev->config.hw_info;
1252
1253         ifnet_t ifp = vdev->ifp;
1254
1255         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1256                 for (i = 0; i < vdev->no_of_vpath; i++) {
1257                         vpath = &(vdev->vpaths[i]);
1258                         vxge_hal_vpath_tti_ci_set(vpath->handle);
1259                         vxge_hal_vpath_rti_ci_set(vpath->handle);
1260                 }
1261         }
1262
1263         if (vdev->is_privilaged && (hw_info->ports > 1)) {
1264                 vxge_active_port_update(vdev);
1265                 device_printf(vdev->ndev,
1266                     "Active Port : %lld\n", vdev->active_port);
1267         }
1268
1269         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1270         if_link_state_change(ifp, LINK_STATE_UP);
1271 }
1272
1273 /*
1274  * vxge_link_down
1275  * Callback for Link-down indication from HAL
1276  */
1277 /* ARGSUSED */
1278 void
1279 vxge_link_down(vxge_hal_device_h devh, void *userdata)
1280 {
1281         int i;
1282         vxge_vpath_t *vpath;
1283         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1284
1285         ifnet_t ifp = vdev->ifp;
1286
1287         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1288                 for (i = 0; i < vdev->no_of_vpath; i++) {
1289                         vpath = &(vdev->vpaths[i]);
1290                         vxge_hal_vpath_tti_ci_reset(vpath->handle);
1291                         vxge_hal_vpath_rti_ci_reset(vpath->handle);
1292                 }
1293         }
1294
1295         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1296         if_link_state_change(ifp, LINK_STATE_DOWN);
1297 }
1298
1299 /*
1300  * vxge_reset
1301  */
1302 void
1303 vxge_reset(vxge_dev_t *vdev)
1304 {
1305         if (!vdev->is_initialized)
1306                 return;
1307
1308         VXGE_DRV_LOCK(vdev);
1309         vxge_stop_locked(vdev);
1310         vxge_init_locked(vdev);
1311         VXGE_DRV_UNLOCK(vdev);
1312 }
1313
1314 /*
1315  * vxge_crit_error
1316  * Callback for Critical error indication from HAL
1317  */
1318 /* ARGSUSED */
1319 void
1320 vxge_crit_error(vxge_hal_device_h devh, void *userdata,
1321     vxge_hal_event_e type, u64 serr_data)
1322 {
1323         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1324         ifnet_t ifp = vdev->ifp;
1325
1326         switch (type) {
1327         case VXGE_HAL_EVENT_SERR:
1328         case VXGE_HAL_EVENT_KDFCCTL:
1329         case VXGE_HAL_EVENT_CRITICAL:
1330                 vxge_hal_device_intr_disable(vdev->devh);
1331                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1332                 if_link_state_change(ifp, LINK_STATE_DOWN);
1333                 break;
1334         default:
1335                 break;
1336         }
1337 }
1338
1339 /*
1340  * vxge_ifp_setup
1341  */
1342 int
1343 vxge_ifp_setup(device_t ndev)
1344 {
1345         ifnet_t ifp;
1346         int i, j, err = 0;
1347
1348         vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
1349
1350         for (i = 0, j = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1351                 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
1352                         continue;
1353
1354                 if (j >= vdev->no_of_vpath)
1355                         break;
1356
1357                 vdev->vpaths[j].vp_id = i;
1358                 vdev->vpaths[j].vp_index = j;
1359                 vdev->vpaths[j].vdev = vdev;
1360                 vdev->vpaths[j].is_configured = TRUE;
1361
1362                 vxge_os_memcpy((u8 *) vdev->vpaths[j].mac_addr,
1363                     (u8 *) (vdev->config.hw_info.mac_addrs[i]),
1364                     (size_t) ETHER_ADDR_LEN);
1365                 j++;
1366         }
1367
1368         /* Get interface ifnet structure for this Ether device */
1369         ifp = if_alloc(IFT_ETHER);
1370         if (ifp == NULL) {
1371                 device_printf(vdev->ndev,
1372                     "memory allocation for ifnet failed\n");
1373                 err = ENXIO;
1374                 goto _exit0;
1375         }
1376         vdev->ifp = ifp;
1377
1378         /* Initialize interface ifnet structure */
1379         if_initname(ifp, device_get_name(ndev), device_get_unit(ndev));
1380
1381         ifp->if_mtu = ETHERMTU;
1382         ifp->if_baudrate = VXGE_BAUDRATE;
1383         ifp->if_init = vxge_init;
1384         ifp->if_softc = vdev;
1385         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1386         ifp->if_ioctl = vxge_ioctl;
1387         ifp->if_start = vxge_send;
1388
1389 #if __FreeBSD_version >= 800000
1390         ifp->if_transmit = vxge_mq_send;
1391         ifp->if_qflush = vxge_mq_qflush;
1392 #endif
1393         ifp->if_snd.ifq_drv_maxlen = max(vdev->config.ifq_maxlen, ifqmaxlen);
1394         IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
1395         /* IFQ_SET_READY(&ifp->if_snd); */
1396
1397         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
1398
1399         ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM;
1400         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
1401         ifp->if_capabilities |= IFCAP_JUMBO_MTU;
1402
1403         if (vdev->config.tso_enable)
1404                 vxge_tso_config(vdev);
1405
1406         if (vdev->config.lro_enable)
1407                 ifp->if_capabilities |= IFCAP_LRO;
1408
1409         ifp->if_capenable = ifp->if_capabilities;
1410
1411         strlcpy(vdev->ndev_name, device_get_nameunit(ndev),
1412             sizeof(vdev->ndev_name));
1413
1414         /* Attach the interface */
1415         ether_ifattach(ifp, vdev->vpaths[0].mac_addr);
1416
1417 _exit0:
1418         return (err);
1419 }
1420
1421 /*
1422  * vxge_isr_setup
1423  * Register isr functions
1424  */
1425 int
1426 vxge_isr_setup(vxge_dev_t *vdev)
1427 {
1428         int i, irq_rid, err = 0;
1429         vxge_vpath_t *vpath;
1430
1431         void *isr_func_arg;
1432         void (*isr_func_ptr) (void *);
1433
1434         switch (vdev->config.intr_mode) {
1435         case VXGE_HAL_INTR_MODE_IRQLINE:
1436                 err = bus_setup_intr(vdev->ndev,
1437                     vdev->config.isr_info[0].irq_res,
1438                     (INTR_TYPE_NET | INTR_MPSAFE),
1439                     vxge_isr_filter, vxge_isr_line, vdev,
1440                     &vdev->config.isr_info[0].irq_handle);
1441                 break;
1442
1443         case VXGE_HAL_INTR_MODE_MSIX:
1444                 for (i = 0; i < vdev->intr_count; i++) {
1445
1446                         irq_rid = vdev->config.isr_info[i].irq_rid;
1447                         vpath = &vdev->vpaths[irq_rid / 4];
1448
1449                         if ((irq_rid % 4) == 2) {
1450                                 isr_func_ptr = vxge_isr_msix;
1451                                 isr_func_arg = (void *) vpath;
1452                         } else if ((irq_rid % 4) == 3) {
1453                                 isr_func_ptr = vxge_isr_msix_alarm;
1454                                 isr_func_arg = (void *) vpath;
1455                         } else
1456                                 break;
1457
1458                         err = bus_setup_intr(vdev->ndev,
1459                             vdev->config.isr_info[i].irq_res,
1460                             (INTR_TYPE_NET | INTR_MPSAFE), NULL,
1461                             (void *) isr_func_ptr, (void *) isr_func_arg,
1462                             &vdev->config.isr_info[i].irq_handle);
1463                         if (err != 0)
1464                                 break;
1465                 }
1466
1467                 if (err != 0) {
1468                         /* Teardown interrupt handler */
1469                         while (--i > 0)
1470                                 bus_teardown_intr(vdev->ndev,
1471                                     vdev->config.isr_info[i].irq_res,
1472                                     vdev->config.isr_info[i].irq_handle);
1473                 }
1474                 break;
1475         }
1476
1477         return (err);
1478 }
1479
1480 /*
1481  * vxge_isr_filter
1482  * ISR filter function - filter interrupts from other shared devices
1483  */
1484 int
1485 vxge_isr_filter(void *handle)
1486 {
1487         u64 val64 = 0;
1488         vxge_dev_t *vdev = (vxge_dev_t *) handle;
1489         __hal_device_t *hldev = (__hal_device_t *) vdev->devh;
1490
1491         vxge_hal_common_reg_t *common_reg =
1492         (vxge_hal_common_reg_t *) (hldev->common_reg);
1493
1494         val64 = vxge_os_pio_mem_read64(vdev->pdev, (vdev->devh)->regh0,
1495             &common_reg->titan_general_int_status);
1496
1497         return ((val64) ? FILTER_SCHEDULE_THREAD : FILTER_STRAY);
1498 }
1499
1500 /*
1501  * vxge_isr_line
1502  * Interrupt service routine for Line interrupts
1503  */
1504 void
1505 vxge_isr_line(void *vdev_ptr)
1506 {
1507         vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
1508
1509         vxge_hal_device_handle_irq(vdev->devh, 0);
1510 }
1511
1512 void
1513 vxge_isr_msix(void *vpath_ptr)
1514 {
1515         u32 got_rx = 0;
1516         u32 got_tx = 0;
1517
1518         __hal_virtualpath_t *hal_vpath;
1519         vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1520         vxge_dev_t *vdev = vpath->vdev;
1521         hal_vpath = ((__hal_vpath_handle_t *) vpath->handle)->vpath;
1522
1523         VXGE_DRV_STATS(vpath, isr_msix);
1524         VXGE_HAL_DEVICE_STATS_SW_INFO_TRAFFIC_INTR(vdev->devh);
1525
1526         vxge_hal_vpath_mf_msix_mask(vpath->handle, vpath->msix_vec);
1527
1528         /* processing rx */
1529         vxge_hal_vpath_poll_rx(vpath->handle, &got_rx);
1530
1531         /* processing tx */
1532         if (hal_vpath->vp_config->fifo.enable) {
1533                 vxge_intr_coalesce_tx(vpath);
1534                 vxge_hal_vpath_poll_tx(vpath->handle, &got_tx);
1535         }
1536
1537         vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1538 }
1539
1540 void
1541 vxge_isr_msix_alarm(void *vpath_ptr)
1542 {
1543         int i;
1544         vxge_hal_status_e status = VXGE_HAL_OK;
1545
1546         vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1547         vxge_dev_t *vdev = vpath->vdev;
1548
1549         VXGE_HAL_DEVICE_STATS_SW_INFO_NOT_TRAFFIC_INTR(vdev->devh);
1550
1551         /* Process alarms in each vpath */
1552         for (i = 0; i < vdev->no_of_vpath; i++) {
1553
1554                 vpath = &(vdev->vpaths[i]);
1555                 vxge_hal_vpath_mf_msix_mask(vpath->handle,
1556                     vpath->msix_vec_alarm);
1557                 status = vxge_hal_vpath_alarm_process(vpath->handle, 0);
1558                 if ((status == VXGE_HAL_ERR_EVENT_SLOT_FREEZE) ||
1559                     (status == VXGE_HAL_ERR_EVENT_SERR)) {
1560                         device_printf(vdev->ndev,
1561                             "processing alarms urecoverable error %x\n",
1562                             status);
1563
1564                         /* Stop the driver */
1565                         vdev->is_initialized = FALSE;
1566                         break;
1567                 }
1568                 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1569                     vpath->msix_vec_alarm);
1570         }
1571 }
1572
1573 /*
1574  * vxge_msix_enable
1575  */
1576 vxge_hal_status_e
1577 vxge_msix_enable(vxge_dev_t *vdev)
1578 {
1579         int i, first_vp_id, msix_id;
1580
1581         vxge_vpath_t *vpath;
1582         vxge_hal_status_e status = VXGE_HAL_OK;
1583
1584         /*
1585          * Unmasking and Setting MSIX vectors before enabling interrupts
1586          * tim[] : 0 - Tx ## 1 - Rx ## 2 - UMQ-DMQ ## 0 - BITMAP
1587          */
1588         int tim[4] = {0, 1, 0, 0};
1589
1590         for (i = 0; i < vdev->no_of_vpath; i++) {
1591
1592                 vpath = vdev->vpaths + i;
1593                 first_vp_id = vdev->vpaths[0].vp_id;
1594
1595                 msix_id = vpath->vp_id * VXGE_HAL_VPATH_MSIX_ACTIVE;
1596                 tim[1] = vpath->msix_vec = msix_id + 1;
1597
1598                 vpath->msix_vec_alarm = first_vp_id *
1599                     VXGE_HAL_VPATH_MSIX_ACTIVE + VXGE_HAL_VPATH_MSIX_ALARM_ID;
1600
1601                 status = vxge_hal_vpath_mf_msix_set(vpath->handle,
1602                     tim, VXGE_HAL_VPATH_MSIX_ALARM_ID);
1603
1604                 if (status != VXGE_HAL_OK) {
1605                         device_printf(vdev->ndev,
1606                             "failed to set msix vectors to vpath\n");
1607                         break;
1608                 }
1609
1610                 vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1611                 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1612                     vpath->msix_vec_alarm);
1613         }
1614
1615         return (status);
1616 }
1617
1618 /*
1619  * vxge_media_init
1620  * Initializes, adds and sets media
1621  */
1622 void
1623 vxge_media_init(vxge_dev_t *vdev)
1624 {
1625         ifmedia_init(&vdev->media,
1626             IFM_IMASK, vxge_media_change, vxge_media_status);
1627
1628         /* Add supported media */
1629         ifmedia_add(&vdev->media,
1630             IFM_ETHER | vdev->ifm_optics | IFM_FDX,
1631             0, NULL);
1632
1633         /* Set media */
1634         ifmedia_add(&vdev->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1635         ifmedia_set(&vdev->media, IFM_ETHER | IFM_AUTO);
1636 }
1637
1638 /*
1639  * vxge_media_status
1640  * Callback  for interface media settings
1641  */
1642 void
1643 vxge_media_status(ifnet_t ifp, struct ifmediareq *ifmr)
1644 {
1645         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1646         vxge_hal_device_t *hldev = vdev->devh;
1647
1648         ifmr->ifm_status = IFM_AVALID;
1649         ifmr->ifm_active = IFM_ETHER;
1650
1651         /* set link state */
1652         if (vxge_hal_device_link_state_get(hldev) == VXGE_HAL_LINK_UP) {
1653                 ifmr->ifm_status |= IFM_ACTIVE;
1654                 ifmr->ifm_active |= vdev->ifm_optics | IFM_FDX;
1655                 if_link_state_change(ifp, LINK_STATE_UP);
1656         }
1657 }
1658
1659 /*
1660  * vxge_media_change
1661  * Media change driver callback
1662  */
1663 int
1664 vxge_media_change(ifnet_t ifp)
1665 {
1666         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1667         struct ifmedia *ifmediap = &vdev->media;
1668
1669         return (IFM_TYPE(ifmediap->ifm_media) != IFM_ETHER ? EINVAL : 0);
1670 }
1671
1672 /*
1673  * Allocate PCI resources
1674  */
1675 int
1676 vxge_alloc_resources(vxge_dev_t *vdev)
1677 {
1678         int err = 0;
1679         vxge_pci_info_t *pci_info = NULL;
1680         vxge_free_resources_e error_level = VXGE_FREE_NONE;
1681
1682         device_t ndev = vdev->ndev;
1683
1684         /* Allocate Buffer for HAL Device Configuration */
1685         vdev->device_config = (vxge_hal_device_config_t *)
1686             vxge_mem_alloc(sizeof(vxge_hal_device_config_t));
1687
1688         if (!vdev->device_config) {
1689                 err = ENOMEM;
1690                 error_level = VXGE_DISABLE_PCI_BUSMASTER;
1691                 device_printf(vdev->ndev,
1692                     "failed to allocate memory for device config\n");
1693                 goto _exit0;
1694         }
1695
1696
1697         pci_info = (vxge_pci_info_t *) vxge_mem_alloc(sizeof(vxge_pci_info_t));
1698         if (!pci_info) {
1699                 error_level = VXGE_FREE_DEVICE_CONFIG;
1700                 err = ENOMEM;
1701                 device_printf(vdev->ndev,
1702                     "failed to allocate memory for pci info\n");
1703                 goto _exit0;
1704         }
1705         pci_info->ndev = ndev;
1706         vdev->pdev = pci_info;
1707
1708         err = vxge_alloc_bar_resources(vdev, 0);
1709         if (err != 0) {
1710                 error_level = VXGE_FREE_BAR0;
1711                 goto _exit0;
1712         }
1713
1714         err = vxge_alloc_bar_resources(vdev, 1);
1715         if (err != 0) {
1716                 error_level = VXGE_FREE_BAR1;
1717                 goto _exit0;
1718         }
1719
1720         err = vxge_alloc_bar_resources(vdev, 2);
1721         if (err != 0)
1722                 error_level = VXGE_FREE_BAR2;
1723
1724 _exit0:
1725         if (error_level)
1726                 vxge_free_resources(ndev, error_level);
1727
1728         return (err);
1729 }
1730
1731 /*
1732  * vxge_alloc_bar_resources
1733  * Allocates BAR resources
1734  */
1735 int
1736 vxge_alloc_bar_resources(vxge_dev_t *vdev, int i)
1737 {
1738         int err = 0;
1739         int res_id = 0;
1740         vxge_pci_info_t *pci_info = vdev->pdev;
1741
1742         res_id = PCIR_BAR((i == 0) ? 0 : (i * 2));
1743
1744         pci_info->bar_info[i] =
1745             bus_alloc_resource_any(vdev->ndev,
1746             SYS_RES_MEMORY, &res_id, RF_ACTIVE);
1747
1748         if (pci_info->bar_info[i] == NULL) {
1749                 device_printf(vdev->ndev,
1750                     "failed to allocate memory for bus resources\n");
1751                 err = ENOMEM;
1752                 goto _exit0;
1753         }
1754
1755         pci_info->reg_map[i] =
1756             (vxge_bus_res_t *) vxge_mem_alloc(sizeof(vxge_bus_res_t));
1757
1758         if (pci_info->reg_map[i] == NULL) {
1759                 device_printf(vdev->ndev,
1760                     "failed to allocate memory bar resources\n");
1761                 err = ENOMEM;
1762                 goto _exit0;
1763         }
1764
1765         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_space_tag =
1766             rman_get_bustag(pci_info->bar_info[i]);
1767
1768         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_space_handle =
1769             rman_get_bushandle(pci_info->bar_info[i]);
1770
1771         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bar_start_addr =
1772             pci_info->bar_info[i];
1773
1774         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_res_len =
1775             rman_get_size(pci_info->bar_info[i]);
1776
1777 _exit0:
1778         return (err);
1779 }
1780
1781 /*
1782  * vxge_alloc_isr_resources
1783  */
1784 int
1785 vxge_alloc_isr_resources(vxge_dev_t *vdev)
1786 {
1787         int i, err = 0, irq_rid;
1788         int msix_vec_reqd, intr_count, msix_count;
1789
1790         int intr_mode = VXGE_HAL_INTR_MODE_IRQLINE;
1791
1792         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1793                 /* MSI-X messages supported by device */
1794                 intr_count = pci_msix_count(vdev->ndev);
1795                 if (intr_count) {
1796
1797                         msix_vec_reqd = 4 * vdev->no_of_vpath;
1798                         if (intr_count >= msix_vec_reqd) {
1799                                 intr_count = msix_vec_reqd;
1800
1801                                 err = pci_alloc_msix(vdev->ndev, &intr_count);
1802                                 if (err == 0)
1803                                         intr_mode = VXGE_HAL_INTR_MODE_MSIX;
1804                         }
1805
1806                         if ((err != 0) || (intr_count < msix_vec_reqd)) {
1807                                 device_printf(vdev->ndev, "Unable to allocate "
1808                                     "msi/x vectors switching to INTA mode\n");
1809                         }
1810                 }
1811         }
1812
1813         err = 0;
1814         vdev->intr_count = 0;
1815         vdev->config.intr_mode = intr_mode;
1816
1817         switch (vdev->config.intr_mode) {
1818         case VXGE_HAL_INTR_MODE_IRQLINE:
1819                 vdev->config.isr_info[0].irq_rid = 0;
1820                 vdev->config.isr_info[0].irq_res =
1821                     bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1822                     &vdev->config.isr_info[0].irq_rid,
1823                     (RF_SHAREABLE | RF_ACTIVE));
1824
1825                 if (vdev->config.isr_info[0].irq_res == NULL) {
1826                         device_printf(vdev->ndev,
1827                             "failed to allocate line interrupt resource\n");
1828                         err = ENOMEM;
1829                         goto _exit0;
1830                 }
1831                 vdev->intr_count++;
1832                 break;
1833
1834         case VXGE_HAL_INTR_MODE_MSIX:
1835                 msix_count = 0;
1836                 for (i = 0; i < vdev->no_of_vpath; i++) {
1837                         irq_rid = i * 4;
1838
1839                         vdev->config.isr_info[msix_count].irq_rid = irq_rid + 2;
1840                         vdev->config.isr_info[msix_count].irq_res =
1841                             bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1842                             &vdev->config.isr_info[msix_count].irq_rid,
1843                             (RF_SHAREABLE | RF_ACTIVE));
1844
1845                         if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1846                                 device_printf(vdev->ndev,
1847                                     "allocating bus resource (rid %d) failed\n",
1848                                     vdev->config.isr_info[msix_count].irq_rid);
1849                                 err = ENOMEM;
1850                                 goto _exit0;
1851                         }
1852
1853                         vdev->intr_count++;
1854                         err = bus_bind_intr(vdev->ndev,
1855                             vdev->config.isr_info[msix_count].irq_res,
1856                             (i % mp_ncpus));
1857                         if (err != 0)
1858                                 break;
1859
1860                         msix_count++;
1861                 }
1862
1863                 vdev->config.isr_info[msix_count].irq_rid = 3;
1864                 vdev->config.isr_info[msix_count].irq_res =
1865                     bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1866                     &vdev->config.isr_info[msix_count].irq_rid,
1867                     (RF_SHAREABLE | RF_ACTIVE));
1868
1869                 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1870                         device_printf(vdev->ndev,
1871                             "allocating bus resource (rid %d) failed\n",
1872                             vdev->config.isr_info[msix_count].irq_rid);
1873                         err = ENOMEM;
1874                         goto _exit0;
1875                 }
1876
1877                 vdev->intr_count++;
1878                 err = bus_bind_intr(vdev->ndev,
1879                     vdev->config.isr_info[msix_count].irq_res, (i % mp_ncpus));
1880
1881                 break;
1882         }
1883
1884         vdev->device_config->intr_mode = vdev->config.intr_mode;
1885
1886 _exit0:
1887         return (err);
1888 }
1889
1890 /*
1891  * vxge_free_resources
1892  * Undo what-all we did during load/attach
1893  */
1894 void
1895 vxge_free_resources(device_t ndev, vxge_free_resources_e vxge_free_resource)
1896 {
1897         int i;
1898         vxge_dev_t *vdev;
1899
1900         vdev = (vxge_dev_t *) device_get_softc(ndev);
1901
1902         switch (vxge_free_resource) {
1903         case VXGE_FREE_ALL:
1904                 for (i = 0; i < vdev->intr_count; i++) {
1905                         bus_teardown_intr(ndev,
1906                             vdev->config.isr_info[i].irq_res,
1907                             vdev->config.isr_info[i].irq_handle);
1908                 }
1909                 /* FALLTHROUGH */
1910
1911         case VXGE_FREE_INTERFACE:
1912                 ether_ifdetach(vdev->ifp);
1913                 bus_generic_detach(ndev);
1914                 if_free(vdev->ifp);
1915                 /* FALLTHROUGH */
1916
1917         case VXGE_FREE_MEDIA:
1918                 ifmedia_removeall(&vdev->media);
1919                 /* FALLTHROUGH */
1920
1921         case VXGE_FREE_MUTEX:
1922                 vxge_mutex_destroy(vdev);
1923                 /* FALLTHROUGH */
1924
1925         case VXGE_FREE_VPATH:
1926                 vxge_mem_free(vdev->vpaths,
1927                     vdev->no_of_vpath * sizeof(vxge_vpath_t));
1928                 /* FALLTHROUGH */
1929
1930         case VXGE_FREE_TERMINATE_DEVICE:
1931                 if (vdev->devh != NULL) {
1932                         vxge_hal_device_private_set(vdev->devh, 0);
1933                         vxge_hal_device_terminate(vdev->devh);
1934                 }
1935                 /* FALLTHROUGH */
1936
1937         case VXGE_FREE_ISR_RESOURCE:
1938                 vxge_free_isr_resources(vdev);
1939                 /* FALLTHROUGH */
1940
1941         case VXGE_FREE_BAR2:
1942                 vxge_free_bar_resources(vdev, 2);
1943                 /* FALLTHROUGH */
1944
1945         case VXGE_FREE_BAR1:
1946                 vxge_free_bar_resources(vdev, 1);
1947                 /* FALLTHROUGH */
1948
1949         case VXGE_FREE_BAR0:
1950                 vxge_free_bar_resources(vdev, 0);
1951                 /* FALLTHROUGH */
1952
1953         case VXGE_FREE_PCI_INFO:
1954                 vxge_mem_free(vdev->pdev, sizeof(vxge_pci_info_t));
1955                 /* FALLTHROUGH */
1956
1957         case VXGE_FREE_DEVICE_CONFIG:
1958                 vxge_mem_free(vdev->device_config,
1959                     sizeof(vxge_hal_device_config_t));
1960                 /* FALLTHROUGH */
1961
1962         case VXGE_DISABLE_PCI_BUSMASTER:
1963                 pci_disable_busmaster(ndev);
1964                 /* FALLTHROUGH */
1965
1966         case VXGE_FREE_TERMINATE_DRIVER:
1967                 if (vxge_dev_ref_count) {
1968                         --vxge_dev_ref_count;
1969                         if (0 == vxge_dev_ref_count)
1970                                 vxge_hal_driver_terminate();
1971                 }
1972                 /* FALLTHROUGH */
1973
1974         default:
1975         case VXGE_FREE_NONE:
1976                 break;
1977                 /* NOTREACHED */
1978         }
1979 }
1980
1981 void
1982 vxge_free_isr_resources(vxge_dev_t *vdev)
1983 {
1984         int i;
1985
1986         switch (vdev->config.intr_mode) {
1987         case VXGE_HAL_INTR_MODE_IRQLINE:
1988                 if (vdev->config.isr_info[0].irq_res) {
1989                         bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1990                             vdev->config.isr_info[0].irq_rid,
1991                             vdev->config.isr_info[0].irq_res);
1992
1993                         vdev->config.isr_info[0].irq_res = NULL;
1994                 }
1995                 break;
1996
1997         case VXGE_HAL_INTR_MODE_MSIX:
1998                 for (i = 0; i < vdev->intr_count; i++) {
1999                         if (vdev->config.isr_info[i].irq_res) {
2000                                 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
2001                                     vdev->config.isr_info[i].irq_rid,
2002                                     vdev->config.isr_info[i].irq_res);
2003
2004                                 vdev->config.isr_info[i].irq_res = NULL;
2005                         }
2006                 }
2007
2008                 if (vdev->intr_count)
2009                         pci_release_msi(vdev->ndev);
2010
2011                 break;
2012         }
2013 }
2014
2015 void
2016 vxge_free_bar_resources(vxge_dev_t *vdev, int i)
2017 {
2018         int res_id = 0;
2019         vxge_pci_info_t *pci_info = vdev->pdev;
2020
2021         res_id = PCIR_BAR((i == 0) ? 0 : (i * 2));
2022
2023         if (pci_info->bar_info[i])
2024                 bus_release_resource(vdev->ndev, SYS_RES_MEMORY,
2025                     res_id, pci_info->bar_info[i]);
2026
2027         vxge_mem_free(pci_info->reg_map[i], sizeof(vxge_bus_res_t));
2028 }
2029
2030 /*
2031  * vxge_init_mutex
2032  * Initializes mutexes used in driver
2033  */
2034 void
2035 vxge_mutex_init(vxge_dev_t *vdev)
2036 {
2037         int i;
2038
2039         snprintf(vdev->mtx_drv_name, sizeof(vdev->mtx_drv_name),
2040             "%s_drv", vdev->ndev_name);
2041
2042         mtx_init(&vdev->mtx_drv, vdev->mtx_drv_name,
2043             MTX_NETWORK_LOCK, MTX_DEF);
2044
2045         for (i = 0; i < vdev->no_of_vpath; i++) {
2046                 snprintf(vdev->vpaths[i].mtx_tx_name,
2047                     sizeof(vdev->vpaths[i].mtx_tx_name), "%s_tx_%d",
2048                     vdev->ndev_name, i);
2049
2050                 mtx_init(&vdev->vpaths[i].mtx_tx,
2051                     vdev->vpaths[i].mtx_tx_name, NULL, MTX_DEF);
2052         }
2053 }
2054
2055 /*
2056  * vxge_mutex_destroy
2057  * Destroys mutexes used in driver
2058  */
2059 void
2060 vxge_mutex_destroy(vxge_dev_t *vdev)
2061 {
2062         int i;
2063
2064         for (i = 0; i < vdev->no_of_vpath; i++)
2065                 VXGE_TX_LOCK_DESTROY(&(vdev->vpaths[i]));
2066
2067         VXGE_DRV_LOCK_DESTROY(vdev);
2068 }
2069
2070 /*
2071  * vxge_rth_config
2072  */
2073 vxge_hal_status_e
2074 vxge_rth_config(vxge_dev_t *vdev)
2075 {
2076         int i;
2077         vxge_hal_vpath_h vpath_handle;
2078         vxge_hal_rth_hash_types_t hash_types;
2079         vxge_hal_status_e status = VXGE_HAL_OK;
2080         u8 mtable[256] = {0};
2081
2082         /* Filling matable with bucket-to-vpath mapping */
2083         vdev->config.rth_bkt_sz = VXGE_DEFAULT_RTH_BUCKET_SIZE;
2084
2085         for (i = 0; i < (1 << vdev->config.rth_bkt_sz); i++)
2086                 mtable[i] = i % vdev->no_of_vpath;
2087
2088         /* Fill RTH hash types */
2089         hash_types.hash_type_tcpipv4_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV4;
2090         hash_types.hash_type_tcpipv6_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV6;
2091         hash_types.hash_type_tcpipv6ex_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV6_EX;
2092         hash_types.hash_type_ipv4_en = VXGE_HAL_RING_HASH_TYPE_IPV4;
2093         hash_types.hash_type_ipv6_en = VXGE_HAL_RING_HASH_TYPE_IPV6;
2094         hash_types.hash_type_ipv6ex_en = VXGE_HAL_RING_HASH_TYPE_IPV6_EX;
2095
2096         /* set indirection table, bucket-to-vpath mapping */
2097         status = vxge_hal_vpath_rts_rth_itable_set(vdev->vpath_handles,
2098             vdev->no_of_vpath, mtable,
2099             ((u32) (1 << vdev->config.rth_bkt_sz)));
2100
2101         if (status != VXGE_HAL_OK) {
2102                 device_printf(vdev->ndev, "rth configuration failed\n");
2103                 goto _exit0;
2104         }
2105         for (i = 0; i < vdev->no_of_vpath; i++) {
2106                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2107                 if (!vpath_handle)
2108                         continue;
2109
2110                 status = vxge_hal_vpath_rts_rth_set(vpath_handle,
2111                     RTH_ALG_JENKINS,
2112                     &hash_types, vdev->config.rth_bkt_sz, TRUE);
2113                 if (status != VXGE_HAL_OK) {
2114                         device_printf(vdev->ndev,
2115                             "rth configuration failed for vpath (%d)\n",
2116                             vdev->vpaths[i].vp_id);
2117                         break;
2118                 }
2119         }
2120
2121 _exit0:
2122         return (status);
2123 }
2124
2125 /*
2126  * vxge_vpath_config
2127  * Sets HAL parameter values from kenv
2128  */
2129 void
2130 vxge_vpath_config(vxge_dev_t *vdev)
2131 {
2132         int i;
2133         u32 no_of_vpath = 0;
2134         vxge_hal_vp_config_t *vp_config;
2135         vxge_hal_device_config_t *device_config = vdev->device_config;
2136
2137         device_config->debug_level = VXGE_TRACE;
2138         device_config->debug_mask = VXGE_COMPONENT_ALL;
2139         device_config->device_poll_millis = VXGE_DEFAULT_DEVICE_POLL_MILLIS;
2140
2141         vdev->config.no_of_vpath =
2142             min(vdev->config.no_of_vpath, vdev->max_supported_vpath);
2143
2144         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2145                 vp_config = &(device_config->vp_config[i]);
2146                 vp_config->fifo.enable = VXGE_HAL_FIFO_DISABLE;
2147                 vp_config->ring.enable = VXGE_HAL_RING_DISABLE;
2148         }
2149
2150         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2151                 if (no_of_vpath >= vdev->config.no_of_vpath)
2152                         break;
2153
2154                 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
2155                         continue;
2156
2157                 no_of_vpath++;
2158                 vp_config = &(device_config->vp_config[i]);
2159                 vp_config->mtu = VXGE_HAL_DEFAULT_MTU;
2160                 vp_config->ring.enable = VXGE_HAL_RING_ENABLE;
2161                 vp_config->ring.post_mode = VXGE_HAL_RING_POST_MODE_DOORBELL;
2162                 vp_config->ring.buffer_mode = VXGE_HAL_RING_RXD_BUFFER_MODE_1;
2163                 vp_config->ring.ring_length =
2164                     vxge_ring_length_get(VXGE_HAL_RING_RXD_BUFFER_MODE_1);
2165                 vp_config->ring.scatter_mode = VXGE_HAL_RING_SCATTER_MODE_A;
2166                 vp_config->rpa_all_vid_en = VXGE_DEFAULT_ALL_VID_ENABLE;
2167                 vp_config->rpa_strip_vlan_tag = VXGE_DEFAULT_STRIP_VLAN_TAG;
2168                 vp_config->rpa_ucast_all_addr_en =
2169                     VXGE_HAL_VPATH_RPA_UCAST_ALL_ADDR_DISABLE;
2170
2171                 vp_config->rti.intr_enable = VXGE_HAL_TIM_INTR_ENABLE;
2172                 vp_config->rti.txfrm_cnt_en = VXGE_HAL_TXFRM_CNT_EN_ENABLE;
2173                 vp_config->rti.util_sel =
2174                     VXGE_HAL_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
2175
2176                 vp_config->rti.uec_a = VXGE_DEFAULT_RTI_RX_UFC_A;
2177                 vp_config->rti.uec_b = VXGE_DEFAULT_RTI_RX_UFC_B;
2178                 vp_config->rti.uec_c = VXGE_DEFAULT_RTI_RX_UFC_C;
2179                 vp_config->rti.uec_d = VXGE_DEFAULT_RTI_RX_UFC_D;
2180
2181                 vp_config->rti.urange_a = VXGE_DEFAULT_RTI_RX_URANGE_A;
2182                 vp_config->rti.urange_b = VXGE_DEFAULT_RTI_RX_URANGE_B;
2183                 vp_config->rti.urange_c = VXGE_DEFAULT_RTI_RX_URANGE_C;
2184
2185                 vp_config->rti.timer_ac_en = VXGE_HAL_TIM_TIMER_AC_ENABLE;
2186                 vp_config->rti.timer_ci_en = VXGE_HAL_TIM_TIMER_CI_ENABLE;
2187
2188                 vp_config->rti.btimer_val =
2189                     (VXGE_DEFAULT_RTI_BTIMER_VAL * 1000) / 272;
2190                 vp_config->rti.rtimer_val =
2191                     (VXGE_DEFAULT_RTI_RTIMER_VAL * 1000) / 272;
2192                 vp_config->rti.ltimer_val =
2193                     (VXGE_DEFAULT_RTI_LTIMER_VAL * 1000) / 272;
2194
2195                 if ((no_of_vpath > 1) && (VXGE_DEFAULT_CONFIG_MQ_ENABLE == 0))
2196                         continue;
2197
2198                 vp_config->fifo.enable = VXGE_HAL_FIFO_ENABLE;
2199                 vp_config->fifo.max_aligned_frags =
2200                     VXGE_DEFAULT_FIFO_ALIGNED_FRAGS;
2201
2202                 vp_config->tti.intr_enable = VXGE_HAL_TIM_INTR_ENABLE;
2203                 vp_config->tti.txfrm_cnt_en = VXGE_HAL_TXFRM_CNT_EN_ENABLE;
2204                 vp_config->tti.util_sel =
2205                     VXGE_HAL_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
2206
2207                 vp_config->tti.uec_a = VXGE_DEFAULT_TTI_TX_UFC_A;
2208                 vp_config->tti.uec_b = VXGE_DEFAULT_TTI_TX_UFC_B;
2209                 vp_config->tti.uec_c = VXGE_DEFAULT_TTI_TX_UFC_C;
2210                 vp_config->tti.uec_d = VXGE_DEFAULT_TTI_TX_UFC_D;
2211
2212                 vp_config->tti.urange_a = VXGE_DEFAULT_TTI_TX_URANGE_A;
2213                 vp_config->tti.urange_b = VXGE_DEFAULT_TTI_TX_URANGE_B;
2214                 vp_config->tti.urange_c = VXGE_DEFAULT_TTI_TX_URANGE_C;
2215
2216                 vp_config->tti.timer_ac_en = VXGE_HAL_TIM_TIMER_AC_ENABLE;
2217                 vp_config->tti.timer_ci_en = VXGE_HAL_TIM_TIMER_CI_ENABLE;
2218
2219                 vp_config->tti.btimer_val =
2220                     (VXGE_DEFAULT_TTI_BTIMER_VAL * 1000) / 272;
2221                 vp_config->tti.rtimer_val =
2222                     (VXGE_DEFAULT_TTI_RTIMER_VAL * 1000) / 272;
2223                 vp_config->tti.ltimer_val =
2224                     (VXGE_DEFAULT_TTI_LTIMER_VAL * 1000) / 272;
2225         }
2226
2227         vdev->no_of_vpath = no_of_vpath;
2228
2229         if (vdev->no_of_vpath == 1)
2230                 vdev->config.tx_steering = 0;
2231
2232         if (vdev->config.rth_enable && (vdev->no_of_vpath > 1)) {
2233                 device_config->rth_en = VXGE_HAL_RTH_ENABLE;
2234                 device_config->rth_it_type = VXGE_HAL_RTH_IT_TYPE_MULTI_IT;
2235         }
2236
2237         vdev->config.rth_enable = device_config->rth_en;
2238 }
2239
2240 /*
2241  * vxge_vpath_cb_fn
2242  * Virtual path Callback function
2243  */
2244 /* ARGSUSED */
2245 static vxge_hal_status_e
2246 vxge_vpath_cb_fn(vxge_hal_client_h client_handle, vxge_hal_up_msg_h msgh,
2247     vxge_hal_message_type_e msg_type, vxge_hal_obj_id_t obj_id,
2248     vxge_hal_result_e result, vxge_hal_opaque_handle_t *opaque_handle)
2249 {
2250         return (VXGE_HAL_OK);
2251 }
2252
2253 /*
2254  * vxge_vpath_open
2255  */
2256 int
2257 vxge_vpath_open(vxge_dev_t *vdev)
2258 {
2259         int i, err = EINVAL;
2260         u64 func_id;
2261
2262         vxge_vpath_t *vpath;
2263         vxge_hal_vpath_attr_t vpath_attr;
2264         vxge_hal_status_e status = VXGE_HAL_OK;
2265         struct lro_ctrl *lro = NULL;
2266
2267         bzero(&vpath_attr, sizeof(vxge_hal_vpath_attr_t));
2268
2269         for (i = 0; i < vdev->no_of_vpath; i++) {
2270
2271                 vpath = &(vdev->vpaths[i]);
2272                 lro = &vpath->lro;
2273
2274                 /* Vpath vpath_attr: FIFO */
2275                 vpath_attr.vp_id = vpath->vp_id;
2276                 vpath_attr.fifo_attr.callback = vxge_tx_compl;
2277                 vpath_attr.fifo_attr.txdl_init = vxge_tx_replenish;
2278                 vpath_attr.fifo_attr.txdl_term = vxge_tx_term;
2279                 vpath_attr.fifo_attr.userdata = vpath;
2280                 vpath_attr.fifo_attr.per_txdl_space = sizeof(vxge_txdl_priv_t);
2281
2282                 /* Vpath vpath_attr: Ring */
2283                 vpath_attr.ring_attr.callback = vxge_rx_compl;
2284                 vpath_attr.ring_attr.rxd_init = vxge_rx_replenish;
2285                 vpath_attr.ring_attr.rxd_term = vxge_rx_term;
2286                 vpath_attr.ring_attr.userdata = vpath;
2287                 vpath_attr.ring_attr.per_rxd_space = sizeof(vxge_rxd_priv_t);
2288
2289                 err = vxge_dma_tags_create(vpath);
2290                 if (err != 0) {
2291                         device_printf(vdev->ndev,
2292                             "failed to create dma tags\n");
2293                         break;
2294                 }
2295 #if __FreeBSD_version >= 800000
2296                 vpath->br = buf_ring_alloc(VXGE_DEFAULT_BR_SIZE, M_DEVBUF,
2297                     M_WAITOK, &vpath->mtx_tx);
2298                 if (vpath->br == NULL) {
2299                         err = ENOMEM;
2300                         break;
2301                 }
2302 #endif
2303                 status = vxge_hal_vpath_open(vdev->devh, &vpath_attr,
2304                     (vxge_hal_vpath_callback_f) vxge_vpath_cb_fn,
2305                     NULL, &vpath->handle);
2306                 if (status != VXGE_HAL_OK) {
2307                         device_printf(vdev->ndev,
2308                             "failed to open vpath (%d)\n", vpath->vp_id);
2309                         err = EPERM;
2310                         break;
2311                 }
2312                 vpath->is_open = TRUE;
2313                 vdev->vpath_handles[i] = vpath->handle;
2314
2315                 vpath->tx_ticks = ticks;
2316                 vpath->rx_ticks = ticks;
2317
2318                 vpath->tti_rtimer_val = VXGE_DEFAULT_TTI_RTIMER_VAL;
2319                 vpath->tti_rtimer_val = VXGE_DEFAULT_TTI_RTIMER_VAL;
2320
2321                 vpath->tx_intr_coalesce = vdev->config.intr_coalesce;
2322                 vpath->rx_intr_coalesce = vdev->config.intr_coalesce;
2323
2324                 func_id = vdev->config.hw_info.func_id;
2325
2326                 if (vdev->config.low_latency &&
2327                     (vdev->config.bw_info[func_id].priority ==
2328                         VXGE_DEFAULT_VPATH_PRIORITY_HIGH)) {
2329                         vpath->tx_intr_coalesce = 0;
2330                 }
2331
2332                 if (vdev->ifp->if_capenable & IFCAP_LRO) {
2333                         err = tcp_lro_init(lro);
2334                         if (err != 0) {
2335                                 device_printf(vdev->ndev,
2336                                     "LRO Initialization failed!\n");
2337                                 break;
2338                         }
2339                         vpath->lro_enable = TRUE;
2340                         lro->ifp = vdev->ifp;
2341                 }
2342         }
2343
2344         return (err);
2345 }
2346
2347 void
2348 vxge_tso_config(vxge_dev_t *vdev)
2349 {
2350         u32 func_id, priority;
2351         vxge_hal_status_e status = VXGE_HAL_OK;
2352
2353         vdev->ifp->if_capabilities |= IFCAP_TSO4;
2354
2355         status = vxge_bw_priority_get(vdev, NULL);
2356         if (status == VXGE_HAL_OK) {
2357
2358                 func_id = vdev->config.hw_info.func_id;
2359                 priority = vdev->config.bw_info[func_id].priority;
2360
2361                 if (priority != VXGE_DEFAULT_VPATH_PRIORITY_HIGH)
2362                         vdev->ifp->if_capabilities &= ~IFCAP_TSO4;
2363         }
2364
2365 #if __FreeBSD_version >= 800000
2366         if (vdev->ifp->if_capabilities & IFCAP_TSO4)
2367                 vdev->ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
2368 #endif
2369
2370 }
2371
2372 vxge_hal_status_e
2373 vxge_bw_priority_get(vxge_dev_t *vdev, vxge_bw_info_t *bw_info)
2374 {
2375         u32 priority, bandwidth;
2376         u32 vpath_count;
2377
2378         u64 func_id, func_mode, vpath_list[VXGE_HAL_MAX_VIRTUAL_PATHS];
2379         vxge_hal_status_e status = VXGE_HAL_OK;
2380
2381         func_id = vdev->config.hw_info.func_id;
2382         if (bw_info) {
2383                 func_id = bw_info->func_id;
2384                 func_mode = vdev->config.hw_info.function_mode;
2385                 if ((is_single_func(func_mode)) && (func_id > 0))
2386                         return (VXGE_HAL_FAIL);
2387         }
2388
2389         if (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)) {
2390
2391                 status = vxge_hal_vf_rx_bw_get(vdev->devh,
2392                     func_id, &bandwidth, &priority);
2393
2394         } else {
2395
2396                 status = vxge_hal_get_vpath_list(vdev->devh,
2397                     func_id, vpath_list, &vpath_count);
2398
2399                 if (status == VXGE_HAL_OK) {
2400                         status = vxge_hal_bw_priority_get(vdev->devh,
2401                             vpath_list[0], &bandwidth, &priority);
2402                 }
2403         }
2404
2405         if (status == VXGE_HAL_OK) {
2406                 if (bw_info) {
2407                         bw_info->priority = priority;
2408                         bw_info->bandwidth = bandwidth;
2409                 } else {
2410                         vdev->config.bw_info[func_id].priority = priority;
2411                         vdev->config.bw_info[func_id].bandwidth = bandwidth;
2412                 }
2413         }
2414
2415         return (status);
2416 }
2417
2418 /*
2419  * close vpaths
2420  */
2421 void
2422 vxge_vpath_close(vxge_dev_t *vdev)
2423 {
2424         int i;
2425         vxge_vpath_t *vpath;
2426
2427         for (i = 0; i < vdev->no_of_vpath; i++) {
2428
2429                 vpath = &(vdev->vpaths[i]);
2430                 if (vpath->handle)
2431                         vxge_hal_vpath_close(vpath->handle);
2432
2433 #if __FreeBSD_version >= 800000
2434                 if (vpath->br != NULL)
2435                         buf_ring_free(vpath->br, M_DEVBUF);
2436 #endif
2437                 /* Free LRO memory */
2438                 if (vpath->lro_enable)
2439                         tcp_lro_free(&vpath->lro);
2440
2441                 if (vpath->dma_tag_rx) {
2442                         bus_dmamap_destroy(vpath->dma_tag_rx,
2443                             vpath->extra_dma_map);
2444                         bus_dma_tag_destroy(vpath->dma_tag_rx);
2445                 }
2446
2447                 if (vpath->dma_tag_tx)
2448                         bus_dma_tag_destroy(vpath->dma_tag_tx);
2449
2450                 vpath->handle = NULL;
2451                 vpath->is_open = FALSE;
2452         }
2453 }
2454
2455 /*
2456  * reset vpaths
2457  */
2458 void
2459 vxge_vpath_reset(vxge_dev_t *vdev)
2460 {
2461         int i;
2462         vxge_hal_vpath_h vpath_handle;
2463         vxge_hal_status_e status = VXGE_HAL_OK;
2464
2465         for (i = 0; i < vdev->no_of_vpath; i++) {
2466                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2467                 if (!vpath_handle)
2468                         continue;
2469
2470                 status = vxge_hal_vpath_reset(vpath_handle);
2471                 if (status != VXGE_HAL_OK)
2472                         device_printf(vdev->ndev,
2473                             "failed to reset vpath :%d\n", i);
2474         }
2475 }
2476
2477 static inline int
2478 vxge_vpath_get(vxge_dev_t *vdev, mbuf_t mhead)
2479 {
2480         struct tcphdr *th = NULL;
2481         struct udphdr *uh = NULL;
2482         struct ip *ip = NULL;
2483         struct ip6_hdr *ip6 = NULL;
2484         struct ether_vlan_header *eth = NULL;
2485         void *ulp = NULL;
2486
2487         int ehdrlen, iphlen = 0;
2488         u8 ipproto = 0;
2489         u16 etype, src_port, dst_port;
2490         u16 queue_len, counter = 0;
2491
2492         src_port = dst_port = 0;
2493         queue_len = vdev->no_of_vpath;
2494
2495         eth = mtod(mhead, struct ether_vlan_header *);
2496         if (eth->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2497                 etype = ntohs(eth->evl_proto);
2498                 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
2499         } else {
2500                 etype = ntohs(eth->evl_encap_proto);
2501                 ehdrlen = ETHER_HDR_LEN;
2502         }
2503
2504         switch (etype) {
2505         case ETHERTYPE_IP:
2506                 ip = (struct ip *) (mhead->m_data + ehdrlen);
2507                 iphlen = ip->ip_hl << 2;
2508                 ipproto = ip->ip_p;
2509                 th = (struct tcphdr *) ((caddr_t)ip + iphlen);
2510                 uh = (struct udphdr *) ((caddr_t)ip + iphlen);
2511                 break;
2512
2513         case ETHERTYPE_IPV6:
2514                 ip6 = (struct ip6_hdr *) (mhead->m_data + ehdrlen);
2515                 iphlen = sizeof(struct ip6_hdr);
2516                 ipproto = ip6->ip6_nxt;
2517
2518                 ulp = mtod(mhead, char *) + iphlen;
2519                 th = ((struct tcphdr *) (ulp));
2520                 uh = ((struct udphdr *) (ulp));
2521                 break;
2522
2523         default:
2524                 break;
2525         }
2526
2527         switch (ipproto) {
2528         case IPPROTO_TCP:
2529                 src_port = th->th_sport;
2530                 dst_port = th->th_dport;
2531                 break;
2532
2533         case IPPROTO_UDP:
2534                 src_port = uh->uh_sport;
2535                 dst_port = uh->uh_dport;
2536                 break;
2537
2538         default:
2539                 break;
2540         }
2541
2542         counter = (ntohs(src_port) + ntohs(dst_port)) &
2543             vpath_selector[queue_len - 1];
2544
2545         if (counter >= queue_len)
2546                 counter = queue_len - 1;
2547
2548         return (counter);
2549 }
2550
2551 static inline vxge_hal_vpath_h
2552 vxge_vpath_handle_get(vxge_dev_t *vdev, int i)
2553 {
2554         return (vdev->vpaths[i].is_open ? vdev->vpaths[i].handle : NULL);
2555 }
2556
2557 int
2558 vxge_firmware_verify(vxge_dev_t *vdev)
2559 {
2560         int err = 0;
2561         u64 active_config;
2562         vxge_hal_status_e status = VXGE_HAL_FAIL;
2563
2564         if (vdev->fw_upgrade) {
2565                 status = vxge_firmware_upgrade(vdev);
2566                 if (status == VXGE_HAL_OK) {
2567                         err = ENXIO;
2568                         goto _exit0;
2569                 }
2570         }
2571
2572         if ((vdev->config.function_mode != VXGE_DEFAULT_CONFIG_VALUE) &&
2573             (vdev->config.hw_info.function_mode !=
2574             (u64) vdev->config.function_mode)) {
2575
2576                 status = vxge_func_mode_set(vdev);
2577                 if (status == VXGE_HAL_OK)
2578                         err = ENXIO;
2579         }
2580
2581         /* l2_switch configuration */
2582         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2583         status = vxge_hal_get_active_config(vdev->devh,
2584             VXGE_HAL_XMAC_NWIF_ActConfig_L2SwitchEnabled,
2585             &active_config);
2586
2587         if (status == VXGE_HAL_OK) {
2588                 vdev->l2_switch = active_config;
2589                 if (vdev->config.l2_switch != VXGE_DEFAULT_CONFIG_VALUE) {
2590                         if (vdev->config.l2_switch != active_config) {
2591                                 status = vxge_l2switch_mode_set(vdev);
2592                                 if (status == VXGE_HAL_OK)
2593                                         err = ENXIO;
2594                         }
2595                 }
2596         }
2597
2598         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
2599                 if (vxge_port_mode_update(vdev) == ENXIO)
2600                         err = ENXIO;
2601         }
2602
2603 _exit0:
2604         if (err == ENXIO)
2605                 device_printf(vdev->ndev, "PLEASE POWER CYCLE THE SYSTEM\n");
2606
2607         return (err);
2608 }
2609
2610 vxge_hal_status_e
2611 vxge_firmware_upgrade(vxge_dev_t *vdev)
2612 {
2613         u8 *fw_buffer;
2614         u32 fw_size;
2615         vxge_hal_device_hw_info_t *hw_info;
2616         vxge_hal_status_e status = VXGE_HAL_OK;
2617
2618         hw_info = &vdev->config.hw_info;
2619
2620         fw_size = sizeof(VXGE_FW_ARRAY_NAME);
2621         fw_buffer = (u8 *) VXGE_FW_ARRAY_NAME;
2622
2623         device_printf(vdev->ndev, "Current firmware version : %s (%s)\n",
2624             hw_info->fw_version.version, hw_info->fw_date.date);
2625
2626         device_printf(vdev->ndev, "Upgrading firmware to %d.%d.%d\n",
2627             VXGE_MIN_FW_MAJOR_VERSION, VXGE_MIN_FW_MINOR_VERSION,
2628             VXGE_MIN_FW_BUILD_NUMBER);
2629
2630         /* Call HAL API to upgrade firmware */
2631         status = vxge_hal_mrpcim_fw_upgrade(vdev->pdev,
2632             (pci_reg_h) vdev->pdev->reg_map[0],
2633             (u8 *) vdev->pdev->bar_info[0],
2634             fw_buffer, fw_size);
2635
2636         device_printf(vdev->ndev, "firmware upgrade %s\n",
2637             (status == VXGE_HAL_OK) ? "successful" : "failed");
2638
2639         return (status);
2640 }
2641
2642 vxge_hal_status_e
2643 vxge_func_mode_set(vxge_dev_t *vdev)
2644 {
2645         u64 active_config;
2646         vxge_hal_status_e status = VXGE_HAL_FAIL;
2647
2648         status = vxge_hal_mrpcim_pcie_func_mode_set(vdev->devh,
2649             vdev->config.function_mode);
2650         device_printf(vdev->ndev,
2651             "function mode change %s\n",
2652             (status == VXGE_HAL_OK) ? "successful" : "failed");
2653
2654         if (status == VXGE_HAL_OK) {
2655                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2656                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2657                     0, 0ULL, 0ULL);
2658
2659                 vxge_hal_get_active_config(vdev->devh,
2660                     VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2661                     &active_config);
2662
2663                 /*
2664                  * If in MF + DP mode
2665                  * if user changes to SF, change port_mode to single port mode
2666                  */
2667                 if (((is_multi_func(vdev->config.hw_info.function_mode)) &&
2668                     is_single_func(vdev->config.function_mode)) &&
2669                     (active_config == VXGE_HAL_DP_NP_MODE_DUAL_PORT)) {
2670                         vdev->config.port_mode =
2671                             VXGE_HAL_DP_NP_MODE_SINGLE_PORT;
2672
2673                         status = vxge_port_mode_set(vdev);
2674                 }
2675         }
2676         return (status);
2677 }
2678
2679 vxge_hal_status_e
2680 vxge_port_mode_set(vxge_dev_t *vdev)
2681 {
2682         vxge_hal_status_e status = VXGE_HAL_FAIL;
2683
2684         status = vxge_hal_set_port_mode(vdev->devh, vdev->config.port_mode);
2685         device_printf(vdev->ndev,
2686             "port mode change %s\n",
2687             (status == VXGE_HAL_OK) ? "successful" : "failed");
2688
2689         if (status == VXGE_HAL_OK) {
2690                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2691                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2692                     0, 0ULL, 0ULL);
2693
2694                 /* Configure vpath_mapping for active-active mode only */
2695                 if (vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) {
2696
2697                         status = vxge_hal_config_vpath_map(vdev->devh,
2698                             VXGE_DUAL_PORT_MAP);
2699
2700                         device_printf(vdev->ndev, "dual port map change %s\n",
2701                             (status == VXGE_HAL_OK) ? "successful" : "failed");
2702                 }
2703         }
2704         return (status);
2705 }
2706
2707 int
2708 vxge_port_mode_update(vxge_dev_t *vdev)
2709 {
2710         int err = 0;
2711         u64 active_config;
2712         vxge_hal_status_e status = VXGE_HAL_FAIL;
2713
2714         if ((vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) &&
2715             is_single_func(vdev->config.hw_info.function_mode)) {
2716
2717                 device_printf(vdev->ndev,
2718                     "Adapter in SF mode, dual port mode is not allowed\n");
2719                 err = EPERM;
2720                 goto _exit0;
2721         }
2722
2723         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2724         status = vxge_hal_get_active_config(vdev->devh,
2725             VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2726             &active_config);
2727         if (status != VXGE_HAL_OK) {
2728                 err = EINVAL;
2729                 goto _exit0;
2730         }
2731
2732         vdev->port_mode = active_config;
2733         if (vdev->config.port_mode != VXGE_DEFAULT_CONFIG_VALUE) {
2734                 if (vdev->config.port_mode != vdev->port_mode) {
2735                         status = vxge_port_mode_set(vdev);
2736                         if (status != VXGE_HAL_OK) {
2737                                 err = EINVAL;
2738                                 goto _exit0;
2739                         }
2740                         err = ENXIO;
2741                         vdev->port_mode  = vdev->config.port_mode;
2742                 }
2743         }
2744
2745         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2746         status = vxge_hal_get_active_config(vdev->devh,
2747             VXGE_HAL_XMAC_NWIF_ActConfig_BehaviourOnFail,
2748             &active_config);
2749         if (status != VXGE_HAL_OK) {
2750                 err = EINVAL;
2751                 goto _exit0;
2752         }
2753
2754         vdev->port_failure = active_config;
2755
2756         /*
2757          * active/active mode : set to NoMove
2758          * active/passive mode: set to Failover-Failback
2759          */
2760         if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT)
2761                 vdev->config.port_failure =
2762                     VXGE_HAL_XMAC_NWIF_OnFailure_NoMove;
2763
2764         else if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_ACTIVE_PASSIVE)
2765                 vdev->config.port_failure =
2766                     VXGE_HAL_XMAC_NWIF_OnFailure_OtherPortBackOnRestore;
2767
2768         if ((vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT) &&
2769             (vdev->config.port_failure != vdev->port_failure)) {
2770                 status = vxge_port_behavior_on_failure_set(vdev);
2771                 if (status == VXGE_HAL_OK)
2772                         err = ENXIO;
2773         }
2774
2775 _exit0:
2776         return (err);
2777 }
2778
2779 vxge_hal_status_e
2780 vxge_port_mode_get(vxge_dev_t *vdev, vxge_port_info_t *port_info)
2781 {
2782         int err = 0;
2783         u64 active_config;
2784         vxge_hal_status_e status = VXGE_HAL_FAIL;
2785
2786         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2787         status = vxge_hal_get_active_config(vdev->devh,
2788             VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2789             &active_config);
2790
2791         if (status != VXGE_HAL_OK) {
2792                 err = ENXIO;
2793                 goto _exit0;
2794         }
2795
2796         port_info->port_mode = active_config;
2797
2798         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2799         status = vxge_hal_get_active_config(vdev->devh,
2800             VXGE_HAL_XMAC_NWIF_ActConfig_BehaviourOnFail,
2801             &active_config);
2802         if (status != VXGE_HAL_OK) {
2803                 err = ENXIO;
2804                 goto _exit0;
2805         }
2806
2807         port_info->port_failure = active_config;
2808
2809 _exit0:
2810         return (err);
2811 }
2812
2813 vxge_hal_status_e
2814 vxge_port_behavior_on_failure_set(vxge_dev_t *vdev)
2815 {
2816         vxge_hal_status_e status = VXGE_HAL_FAIL;
2817
2818         status = vxge_hal_set_behavior_on_failure(vdev->devh,
2819             vdev->config.port_failure);
2820
2821         device_printf(vdev->ndev,
2822             "port behaviour on failure change %s\n",
2823             (status == VXGE_HAL_OK) ? "successful" : "failed");
2824
2825         if (status == VXGE_HAL_OK)
2826                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2827                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2828                     0, 0ULL, 0ULL);
2829
2830         return (status);
2831 }
2832
2833 void
2834 vxge_active_port_update(vxge_dev_t *vdev)
2835 {
2836         u64 active_config;
2837         vxge_hal_status_e status = VXGE_HAL_FAIL;
2838
2839         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2840         status = vxge_hal_get_active_config(vdev->devh,
2841             VXGE_HAL_XMAC_NWIF_ActConfig_ActivePort,
2842             &active_config);
2843
2844         if (status == VXGE_HAL_OK)
2845                 vdev->active_port = active_config;
2846 }
2847
2848 vxge_hal_status_e
2849 vxge_l2switch_mode_set(vxge_dev_t *vdev)
2850 {
2851         vxge_hal_status_e status = VXGE_HAL_FAIL;
2852
2853         status = vxge_hal_set_l2switch_mode(vdev->devh,
2854             vdev->config.l2_switch);
2855
2856         device_printf(vdev->ndev, "L2 switch %s\n",
2857             (status == VXGE_HAL_OK) ?
2858             (vdev->config.l2_switch) ? "enable" : "disable" :
2859             "change failed");
2860
2861         if (status == VXGE_HAL_OK)
2862                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2863                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2864                     0, 0ULL, 0ULL);
2865
2866         return (status);
2867 }
2868
2869 /*
2870  * vxge_promisc_set
2871  * Enable Promiscuous Mode
2872  */
2873 void
2874 vxge_promisc_set(vxge_dev_t *vdev)
2875 {
2876         int i;
2877         ifnet_t ifp;
2878         vxge_hal_vpath_h vpath_handle;
2879
2880         if (!vdev->is_initialized)
2881                 return;
2882
2883         ifp = vdev->ifp;
2884
2885         for (i = 0; i < vdev->no_of_vpath; i++) {
2886                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2887                 if (!vpath_handle)
2888                         continue;
2889
2890                 if (ifp->if_flags & IFF_PROMISC)
2891                         vxge_hal_vpath_promisc_enable(vpath_handle);
2892                 else
2893                         vxge_hal_vpath_promisc_disable(vpath_handle);
2894         }
2895 }
2896
2897 /*
2898  * vxge_change_mtu
2899  * Change interface MTU to a requested valid size
2900  */
2901 int
2902 vxge_change_mtu(vxge_dev_t *vdev, unsigned long new_mtu)
2903 {
2904         int err = EINVAL;
2905
2906         if ((new_mtu < VXGE_HAL_MIN_MTU) || (new_mtu > VXGE_HAL_MAX_MTU))
2907                 goto _exit0;
2908
2909         (vdev->ifp)->if_mtu = new_mtu;
2910         device_printf(vdev->ndev, "MTU changed to %ld\n", (vdev->ifp)->if_mtu);
2911
2912         if (vdev->is_initialized) {
2913                 if_down(vdev->ifp);
2914                 vxge_reset(vdev);
2915                 if_up(vdev->ifp);
2916         }
2917         err = 0;
2918
2919 _exit0:
2920         return (err);
2921 }
2922
2923 /*
2924  * Creates DMA tags for both Tx and Rx
2925  */
2926 int
2927 vxge_dma_tags_create(vxge_vpath_t *vpath)
2928 {
2929         int err = 0;
2930         bus_size_t max_size, boundary;
2931         vxge_dev_t *vdev = vpath->vdev;
2932         ifnet_t ifp = vdev->ifp;
2933
2934         max_size = ifp->if_mtu +
2935             VXGE_HAL_MAC_HEADER_MAX_SIZE +
2936             VXGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN;
2937
2938         VXGE_BUFFER_ALIGN(max_size, 128)
2939         if (max_size <= MCLBYTES)
2940                 vdev->rx_mbuf_sz = MCLBYTES;
2941         else
2942                 vdev->rx_mbuf_sz =
2943                     (max_size > MJUMPAGESIZE) ? MJUM9BYTES : MJUMPAGESIZE;
2944
2945         boundary = (max_size > PAGE_SIZE) ? 0 : PAGE_SIZE;
2946
2947         /* DMA tag for Tx */
2948         err = bus_dma_tag_create(
2949             bus_get_dma_tag(vdev->ndev),
2950             1,
2951             PAGE_SIZE,
2952             BUS_SPACE_MAXADDR,
2953             BUS_SPACE_MAXADDR,
2954             NULL,
2955             NULL,
2956             VXGE_TSO_SIZE,
2957             VXGE_MAX_SEGS,
2958             PAGE_SIZE,
2959             BUS_DMA_ALLOCNOW,
2960             NULL,
2961             NULL,
2962             &(vpath->dma_tag_tx));
2963         if (err != 0)
2964                 goto _exit0;
2965
2966         /* DMA tag for Rx */
2967         err = bus_dma_tag_create(
2968             bus_get_dma_tag(vdev->ndev),
2969             1,
2970             boundary,
2971             BUS_SPACE_MAXADDR,
2972             BUS_SPACE_MAXADDR,
2973             NULL,
2974             NULL,
2975             vdev->rx_mbuf_sz,
2976             1,
2977             vdev->rx_mbuf_sz,
2978             BUS_DMA_ALLOCNOW,
2979             NULL,
2980             NULL,
2981             &(vpath->dma_tag_rx));
2982         if (err != 0)
2983                 goto _exit1;
2984
2985         /* Create DMA map for this descriptor */
2986         err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
2987             &vpath->extra_dma_map);
2988         if (err == 0)
2989                 goto _exit0;
2990
2991         bus_dma_tag_destroy(vpath->dma_tag_rx);
2992
2993 _exit1:
2994         bus_dma_tag_destroy(vpath->dma_tag_tx);
2995
2996 _exit0:
2997         return (err);
2998 }
2999
3000 static inline int
3001 vxge_dma_mbuf_coalesce(bus_dma_tag_t dma_tag_tx, bus_dmamap_t dma_map,
3002     mbuf_t * m_headp, bus_dma_segment_t * dma_buffers,
3003     int *num_segs)
3004 {
3005         int err = 0;
3006         mbuf_t mbuf_pkt = NULL;
3007
3008 retry:
3009         err = bus_dmamap_load_mbuf_sg(dma_tag_tx, dma_map, *m_headp,
3010             dma_buffers, num_segs, BUS_DMA_NOWAIT);
3011         if (err == EFBIG) {
3012                 /* try to defrag, too many segments */
3013                 mbuf_pkt = m_defrag(*m_headp, M_DONTWAIT);
3014                 if (mbuf_pkt == NULL) {
3015                         err = ENOBUFS;
3016                         goto _exit0;
3017                 }
3018                 *m_headp = mbuf_pkt;
3019                 goto retry;
3020         }
3021
3022 _exit0:
3023         return (err);
3024 }
3025
3026 int
3027 vxge_device_hw_info_get(vxge_dev_t *vdev)
3028 {
3029         int i, err = ENXIO;
3030         u64 vpath_mask = 0;
3031         u32 max_supported_vpath = 0;
3032         u32 fw_ver_maj_min;
3033         vxge_firmware_upgrade_e fw_option;
3034
3035         vxge_hal_status_e status = VXGE_HAL_OK;
3036         vxge_hal_device_hw_info_t *hw_info;
3037
3038         status = vxge_hal_device_hw_info_get(vdev->pdev,
3039             (pci_reg_h) vdev->pdev->reg_map[0],
3040             (u8 *) vdev->pdev->bar_info[0],
3041             &vdev->config.hw_info);
3042
3043         if (status != VXGE_HAL_OK)
3044                 goto _exit0;
3045
3046         hw_info = &vdev->config.hw_info;
3047
3048         vpath_mask = hw_info->vpath_mask;
3049         if (vpath_mask == 0) {
3050                 device_printf(vdev->ndev, "No vpaths available in device\n");
3051                 goto _exit0;
3052         }
3053
3054         fw_option = vdev->config.fw_option;
3055
3056         /* Check how many vpaths are available */
3057         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3058                 if (!((vpath_mask) & mBIT(i)))
3059                         continue;
3060                 max_supported_vpath++;
3061         }
3062
3063         vdev->max_supported_vpath = max_supported_vpath;
3064         status = vxge_hal_device_is_privileged(hw_info->host_type,
3065             hw_info->func_id);
3066         vdev->is_privilaged = (status == VXGE_HAL_OK) ? TRUE : FALSE;
3067
3068         vdev->hw_fw_version = VXGE_FW_VERSION(
3069             hw_info->fw_version.major,
3070             hw_info->fw_version.minor,
3071             hw_info->fw_version.build);
3072
3073         fw_ver_maj_min =
3074             VXGE_FW_MAJ_MIN_VERSION(hw_info->fw_version.major,
3075             hw_info->fw_version.minor);
3076
3077         if ((fw_option >= VXGE_FW_UPGRADE_FORCE) ||
3078             (vdev->hw_fw_version != VXGE_DRV_FW_VERSION)) {
3079
3080                 /* For fw_ver 1.8.1 and above ignore build number. */
3081                 if ((fw_option == VXGE_FW_UPGRADE_ALL) &&
3082                     ((vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 1)) &&
3083                     (fw_ver_maj_min == VXGE_DRV_FW_MAJ_MIN_VERSION))) {
3084                         goto _exit1;
3085                 }
3086
3087                 if (vdev->hw_fw_version < VXGE_BASE_FW_VERSION) {
3088                         device_printf(vdev->ndev,
3089                             "Upgrade driver through vxge_update, "
3090                             "Unable to load the driver.\n");
3091                         goto _exit0;
3092                 }
3093                 vdev->fw_upgrade = TRUE;
3094         }
3095
3096 _exit1:
3097         err = 0;
3098
3099 _exit0:
3100         return (err);
3101 }
3102
3103 /*
3104  * vxge_device_hw_info_print
3105  * Print device and driver information
3106  */
3107 void
3108 vxge_device_hw_info_print(vxge_dev_t *vdev)
3109 {
3110         u32 i;
3111         device_t ndev;
3112         struct sysctl_ctx_list *ctx;
3113         struct sysctl_oid_list *children;
3114         char pmd_type[2][VXGE_PMD_INFO_LEN];
3115
3116         vxge_hal_device_t *hldev;
3117         vxge_hal_device_hw_info_t *hw_info;
3118         vxge_hal_device_pmd_info_t *pmd_port;
3119
3120         hldev = vdev->devh;
3121         ndev = vdev->ndev;
3122
3123         ctx = device_get_sysctl_ctx(ndev);
3124         children = SYSCTL_CHILDREN(device_get_sysctl_tree(ndev));
3125
3126         hw_info = &(vdev->config.hw_info);
3127
3128         snprintf(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3129             sizeof(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]),
3130             "%d.%d.%d.%d", XGELL_VERSION_MAJOR, XGELL_VERSION_MINOR,
3131             XGELL_VERSION_FIX, XGELL_VERSION_BUILD);
3132
3133         /* Print PCI-e bus type/speed/width info */
3134         snprintf(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3135             sizeof(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]),
3136             "x%d", hldev->link_width);
3137
3138         if (hldev->link_width <= VXGE_HAL_PCI_E_LINK_WIDTH_X4)
3139                 device_printf(ndev, "For optimal performance a x8 "
3140                     "PCI-Express slot is required.\n");
3141
3142         vxge_null_terminate((char *) hw_info->serial_number,
3143             sizeof(hw_info->serial_number));
3144
3145         vxge_null_terminate((char *) hw_info->part_number,
3146             sizeof(hw_info->part_number));
3147
3148         snprintf(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3149             sizeof(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]),
3150             "%s", hw_info->serial_number);
3151
3152         snprintf(vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3153             sizeof(vdev->config.nic_attr[VXGE_PRINT_PART_NO]),
3154             "%s", hw_info->part_number);
3155
3156         snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3157             sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]),
3158             "%s", hw_info->fw_version.version);
3159
3160         snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3161             sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_DATE]),
3162             "%s", hw_info->fw_date.date);
3163
3164         pmd_port = &(hw_info->pmd_port0);
3165         for (i = 0; i < hw_info->ports; i++) {
3166
3167                 vxge_pmd_port_type_get(vdev, pmd_port->type,
3168                     pmd_type[i], sizeof(pmd_type[i]));
3169
3170                 strncpy(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3171                     "vendor=??, sn=??, pn=??, type=??",
3172                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]));
3173
3174                 vxge_null_terminate(pmd_port->vendor, sizeof(pmd_port->vendor));
3175                 if (strlen(pmd_port->vendor) == 0) {
3176                         pmd_port = &(hw_info->pmd_port1);
3177                         continue;
3178                 }
3179
3180                 vxge_null_terminate(pmd_port->ser_num,
3181                     sizeof(pmd_port->ser_num));
3182
3183                 vxge_null_terminate(pmd_port->part_num,
3184                     sizeof(pmd_port->part_num));
3185
3186                 snprintf(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3187                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]),
3188                     "vendor=%s, sn=%s, pn=%s, type=%s",
3189                     pmd_port->vendor, pmd_port->ser_num,
3190                     pmd_port->part_num, pmd_type[i]);
3191
3192                 pmd_port = &(hw_info->pmd_port1);
3193         }
3194
3195         switch (hw_info->function_mode) {
3196         case VXGE_HAL_PCIE_FUNC_MODE_SF1_VP17:
3197                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3198                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3199                     "%s %d %s", "Single Function - 1 function(s)",
3200                     vdev->max_supported_vpath, "VPath(s)/function");
3201                 break;
3202
3203         case VXGE_HAL_PCIE_FUNC_MODE_MF2_VP8:
3204                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3205                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3206                     "%s %d %s", "Multi Function - 2 function(s)",
3207                     vdev->max_supported_vpath, "VPath(s)/function");
3208                 break;
3209
3210         case VXGE_HAL_PCIE_FUNC_MODE_MF4_VP4:
3211                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3212                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3213                     "%s %d %s", "Multi Function - 4 function(s)",
3214                     vdev->max_supported_vpath, "VPath(s)/function");
3215                 break;
3216
3217         case VXGE_HAL_PCIE_FUNC_MODE_MF8_VP2:
3218                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3219                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3220                     "%s %d %s", "Multi Function - 8 function(s)",
3221                     vdev->max_supported_vpath, "VPath(s)/function");
3222                 break;
3223
3224         case VXGE_HAL_PCIE_FUNC_MODE_MF8P_VP2:
3225                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3226                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3227                     "%s %d %s", "Multi Function (DirectIO) - 8 function(s)",
3228                     vdev->max_supported_vpath, "VPath(s)/function");
3229                 break;
3230         }
3231
3232         snprintf(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3233             sizeof(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]),
3234             "%s", ((vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) ?
3235             "MSI-X" : "INTA"));
3236
3237         snprintf(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3238             sizeof(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]),
3239             "%d", vdev->no_of_vpath);
3240
3241         snprintf(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE],
3242             sizeof(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]),
3243             "%lu", vdev->ifp->if_mtu);
3244
3245         snprintf(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3246             sizeof(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]),
3247             "%s", ((vdev->config.lro_enable) ? "Enabled" : "Disabled"));
3248
3249         snprintf(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3250             sizeof(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]),
3251             "%s", ((vdev->config.rth_enable) ? "Enabled" : "Disabled"));
3252
3253         snprintf(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3254             sizeof(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]),
3255             "%s", ((vdev->ifp->if_capenable & IFCAP_TSO4) ?
3256             "Enabled" : "Disabled"));
3257
3258         snprintf(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3259             sizeof(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]),
3260             "%s", ((hw_info->ports == 1) ? "Single Port" : "Dual Port"));
3261
3262         if (vdev->is_privilaged) {
3263
3264                 if (hw_info->ports > 1) {
3265
3266                         snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3267                             sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]),
3268                             "%s", vxge_port_mode[vdev->port_mode]);
3269
3270                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3271                                 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3272                                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]),
3273                                     "%s", vxge_port_failure[vdev->port_failure]);
3274
3275                         vxge_active_port_update(vdev);
3276                         snprintf(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT],
3277                             sizeof(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]),
3278                             "%lld", vdev->active_port);
3279                 }
3280
3281                 if (!is_single_func(hw_info->function_mode)) {
3282                         snprintf(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3283                             sizeof(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]),
3284                             "%s", ((vdev->l2_switch) ? "Enabled" : "Disabled"));
3285                 }
3286         }
3287
3288         device_printf(ndev, "Driver version\t: %s\n",
3289             vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]);
3290
3291         device_printf(ndev, "Serial number\t: %s\n",
3292             vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]);
3293
3294         device_printf(ndev, "Part number\t: %s\n",
3295             vdev->config.nic_attr[VXGE_PRINT_PART_NO]);
3296
3297         device_printf(ndev, "Firmware version\t: %s\n",
3298             vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]);
3299
3300         device_printf(ndev, "Firmware date\t: %s\n",
3301             vdev->config.nic_attr[VXGE_PRINT_FW_DATE]);
3302
3303         device_printf(ndev, "Link width\t: %s\n",
3304             vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]);
3305
3306         if (vdev->is_privilaged) {
3307                 device_printf(ndev, "Function mode\t: %s\n",
3308                     vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]);
3309         }
3310
3311         device_printf(ndev, "Interrupt type\t: %s\n",
3312             vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]);
3313
3314         device_printf(ndev, "VPath(s) opened\t: %s\n",
3315             vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]);
3316
3317         device_printf(ndev, "Adapter Type\t: %s\n",
3318             vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]);
3319
3320         device_printf(ndev, "PMD Port 0\t: %s\n",
3321             vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0]);
3322
3323         if (hw_info->ports > 1) {
3324                 device_printf(ndev, "PMD Port 1\t: %s\n",
3325                     vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1]);
3326
3327                 if (vdev->is_privilaged) {
3328                         device_printf(ndev, "Port Mode\t: %s\n",
3329                             vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]);
3330
3331                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3332                                 device_printf(ndev, "Port Failure\t: %s\n",
3333                                     vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]);
3334
3335                         device_printf(vdev->ndev, "Active Port\t: %s\n",
3336                             vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]);
3337                 }
3338         }
3339
3340         if (vdev->is_privilaged && !is_single_func(hw_info->function_mode)) {
3341                 device_printf(vdev->ndev, "L2 Switch\t: %s\n",
3342                     vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]);
3343         }
3344
3345         device_printf(ndev, "MTU is %s\n",
3346             vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]);
3347
3348         device_printf(ndev, "LRO %s\n",
3349             vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]);
3350
3351         device_printf(ndev, "RTH %s\n",
3352             vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]);
3353
3354         device_printf(ndev, "TSO %s\n",
3355             vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]);
3356
3357         SYSCTL_ADD_STRING(ctx, children,
3358             OID_AUTO, "Driver version", CTLFLAG_RD,
3359             &vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3360             0, "Driver version");
3361
3362         SYSCTL_ADD_STRING(ctx, children,
3363             OID_AUTO, "Serial number", CTLFLAG_RD,
3364             &vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3365             0, "Serial number");
3366
3367         SYSCTL_ADD_STRING(ctx, children,
3368             OID_AUTO, "Part number", CTLFLAG_RD,
3369             &vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3370             0, "Part number");
3371
3372         SYSCTL_ADD_STRING(ctx, children,
3373             OID_AUTO, "Firmware version", CTLFLAG_RD,
3374             &vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3375             0, "Firmware version");
3376
3377         SYSCTL_ADD_STRING(ctx, children,
3378             OID_AUTO, "Firmware date", CTLFLAG_RD,
3379             &vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3380             0, "Firmware date");
3381
3382         SYSCTL_ADD_STRING(ctx, children,
3383             OID_AUTO, "Link width", CTLFLAG_RD,
3384             &vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3385             0, "Link width");
3386
3387         if (vdev->is_privilaged) {
3388                 SYSCTL_ADD_STRING(ctx, children,
3389                     OID_AUTO, "Function mode", CTLFLAG_RD,
3390                     &vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3391                     0, "Function mode");
3392         }
3393
3394         SYSCTL_ADD_STRING(ctx, children,
3395             OID_AUTO, "Interrupt type", CTLFLAG_RD,
3396             &vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3397             0, "Interrupt type");
3398
3399         SYSCTL_ADD_STRING(ctx, children,
3400             OID_AUTO, "VPath(s) opened", CTLFLAG_RD,
3401             &vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3402             0, "VPath(s) opened");
3403
3404         SYSCTL_ADD_STRING(ctx, children,
3405             OID_AUTO, "Adapter Type", CTLFLAG_RD,
3406             &vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3407             0, "Adapter Type");
3408
3409         SYSCTL_ADD_STRING(ctx, children,
3410             OID_AUTO, "pmd port 0", CTLFLAG_RD,
3411             &vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0],
3412             0, "pmd port");
3413
3414         if (hw_info->ports > 1) {
3415
3416                 SYSCTL_ADD_STRING(ctx, children,
3417                     OID_AUTO, "pmd port 1", CTLFLAG_RD,
3418                     &vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1],
3419                     0, "pmd port");
3420
3421                 if (vdev->is_privilaged) {
3422                         SYSCTL_ADD_STRING(ctx, children,
3423                             OID_AUTO, "Port Mode", CTLFLAG_RD,
3424                             &vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3425                             0, "Port Mode");
3426
3427                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3428                                 SYSCTL_ADD_STRING(ctx, children,
3429                                     OID_AUTO, "Port Failure", CTLFLAG_RD,
3430                                     &vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3431                                     0, "Port Failure");
3432
3433                         SYSCTL_ADD_STRING(ctx, children,
3434                             OID_AUTO, "L2 Switch", CTLFLAG_RD,
3435                             &vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3436                             0, "L2 Switch");
3437                 }
3438         }
3439
3440         SYSCTL_ADD_STRING(ctx, children,
3441             OID_AUTO, "LRO mode", CTLFLAG_RD,
3442             &vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3443             0, "LRO mode");
3444
3445         SYSCTL_ADD_STRING(ctx, children,
3446             OID_AUTO, "RTH mode", CTLFLAG_RD,
3447             &vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3448             0, "RTH mode");
3449
3450         SYSCTL_ADD_STRING(ctx, children,
3451             OID_AUTO, "TSO mode", CTLFLAG_RD,
3452             &vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3453             0, "TSO mode");
3454 }
3455
3456 void
3457 vxge_pmd_port_type_get(vxge_dev_t *vdev, u32 port_type,
3458     char *ifm_name, u8 ifm_len)
3459 {
3460
3461         vdev->ifm_optics = IFM_UNKNOWN;
3462
3463         switch (port_type) {
3464         case VXGE_HAL_DEVICE_PMD_TYPE_10G_SR:
3465                 vdev->ifm_optics = IFM_10G_SR;
3466                 strlcpy(ifm_name, "10GbE SR", ifm_len);
3467                 break;
3468
3469         case VXGE_HAL_DEVICE_PMD_TYPE_10G_LR:
3470                 vdev->ifm_optics = IFM_10G_LR;
3471                 strlcpy(ifm_name, "10GbE LR", ifm_len);
3472                 break;
3473
3474         case VXGE_HAL_DEVICE_PMD_TYPE_10G_LRM:
3475                 vdev->ifm_optics = IFM_10G_LRM;
3476                 strlcpy(ifm_name, "10GbE LRM", ifm_len);
3477                 break;
3478
3479         case VXGE_HAL_DEVICE_PMD_TYPE_10G_DIRECT:
3480                 vdev->ifm_optics = IFM_10G_TWINAX;
3481                 strlcpy(ifm_name, "10GbE DA (Direct Attached)", ifm_len);
3482                 break;
3483
3484         case VXGE_HAL_DEVICE_PMD_TYPE_10G_CX4:
3485                 vdev->ifm_optics = IFM_10G_CX4;
3486                 strlcpy(ifm_name, "10GbE CX4", ifm_len);
3487                 break;
3488
3489         case VXGE_HAL_DEVICE_PMD_TYPE_10G_BASE_T:
3490 #if __FreeBSD_version >= 800000
3491                 vdev->ifm_optics = IFM_10G_T;
3492 #endif
3493                 strlcpy(ifm_name, "10GbE baseT", ifm_len);
3494                 break;
3495
3496         case VXGE_HAL_DEVICE_PMD_TYPE_10G_OTHER:
3497                 strlcpy(ifm_name, "10GbE Other", ifm_len);
3498                 break;
3499
3500         case VXGE_HAL_DEVICE_PMD_TYPE_1G_SX:
3501                 vdev->ifm_optics = IFM_1000_SX;
3502                 strlcpy(ifm_name, "1GbE SX", ifm_len);
3503                 break;
3504
3505         case VXGE_HAL_DEVICE_PMD_TYPE_1G_LX:
3506                 vdev->ifm_optics = IFM_1000_LX;
3507                 strlcpy(ifm_name, "1GbE LX", ifm_len);
3508                 break;
3509
3510         case VXGE_HAL_DEVICE_PMD_TYPE_1G_CX:
3511                 vdev->ifm_optics = IFM_1000_CX;
3512                 strlcpy(ifm_name, "1GbE CX", ifm_len);
3513                 break;
3514
3515         case VXGE_HAL_DEVICE_PMD_TYPE_1G_BASE_T:
3516                 vdev->ifm_optics = IFM_1000_T;
3517                 strlcpy(ifm_name, "1GbE baseT", ifm_len);
3518                 break;
3519
3520         case VXGE_HAL_DEVICE_PMD_TYPE_1G_DIRECT:
3521                 strlcpy(ifm_name, "1GbE DA (Direct Attached)",
3522                     ifm_len);
3523                 break;
3524
3525         case VXGE_HAL_DEVICE_PMD_TYPE_1G_CX4:
3526                 strlcpy(ifm_name, "1GbE CX4", ifm_len);
3527                 break;
3528
3529         case VXGE_HAL_DEVICE_PMD_TYPE_1G_OTHER:
3530                 strlcpy(ifm_name, "1GbE Other", ifm_len);
3531                 break;
3532
3533         default:
3534         case VXGE_HAL_DEVICE_PMD_TYPE_UNKNOWN:
3535                 strlcpy(ifm_name, "UNSUP", ifm_len);
3536                 break;
3537         }
3538 }
3539
3540 u32
3541 vxge_ring_length_get(u32 buffer_mode)
3542 {
3543         return (VXGE_DEFAULT_RING_BLOCK *
3544             vxge_hal_ring_rxds_per_block_get(buffer_mode));
3545 }
3546
3547 /*
3548  * Removes trailing spaces padded
3549  * and NULL terminates strings
3550  */
3551 static inline void
3552 vxge_null_terminate(char *str, size_t len)
3553 {
3554         len--;
3555         while (*str && (*str != ' ') && (len != 0))
3556                 ++str;
3557
3558         --len;
3559         if (*str)
3560                 *str = '\0';
3561 }
3562
3563 /*
3564  * vxge_ioctl
3565  * Callback to control the device
3566  */
3567 int
3568 vxge_ioctl(ifnet_t ifp, u_long command, caddr_t data)
3569 {
3570         int mask, err = 0;
3571         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
3572         struct ifreq *ifr = (struct ifreq *) data;
3573
3574         if (!vdev->is_active)
3575                 return (EBUSY);
3576
3577         switch (command) {
3578                 /* Set/Get ifnet address */
3579         case SIOCSIFADDR:
3580         case SIOCGIFADDR:
3581                 ether_ioctl(ifp, command, data);
3582                 break;
3583
3584                 /* Set Interface MTU */
3585         case SIOCSIFMTU:
3586                 err = vxge_change_mtu(vdev, (unsigned long)ifr->ifr_mtu);
3587                 break;
3588
3589                 /* Set Interface Flags */
3590         case SIOCSIFFLAGS:
3591                 VXGE_DRV_LOCK(vdev);
3592                 if (ifp->if_flags & IFF_UP) {
3593                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
3594                                 if ((ifp->if_flags ^ vdev->if_flags) &
3595                                     (IFF_PROMISC | IFF_ALLMULTI))
3596                                         vxge_promisc_set(vdev);
3597                         } else {
3598                                 vxge_init_locked(vdev);
3599                         }
3600                 } else {
3601                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
3602                                 vxge_stop_locked(vdev);
3603                 }
3604                 vdev->if_flags = ifp->if_flags;
3605                 VXGE_DRV_UNLOCK(vdev);
3606                 break;
3607
3608                 /* Add/delete multicast address */
3609         case SIOCADDMULTI:
3610         case SIOCDELMULTI:
3611                 break;
3612
3613                 /* Get/Set Interface Media */
3614         case SIOCSIFMEDIA:
3615         case SIOCGIFMEDIA:
3616                 err = ifmedia_ioctl(ifp, ifr, &vdev->media, command);
3617                 break;
3618
3619                 /* Set Capabilities */
3620         case SIOCSIFCAP:
3621                 VXGE_DRV_LOCK(vdev);
3622                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
3623
3624                 if (mask & IFCAP_TXCSUM) {
3625                         ifp->if_capenable ^= IFCAP_TXCSUM;
3626                         ifp->if_hwassist ^= (CSUM_TCP | CSUM_UDP | CSUM_IP);
3627
3628                         if ((ifp->if_capenable & IFCAP_TSO) &&
3629                             !(ifp->if_capenable & IFCAP_TXCSUM)) {
3630
3631                                 ifp->if_capenable &= ~IFCAP_TSO;
3632                                 ifp->if_hwassist &= ~CSUM_TSO;
3633                                 if_printf(ifp, "TSO Disabled\n");
3634                         }
3635                 }
3636                 if (mask & IFCAP_RXCSUM)
3637                         ifp->if_capenable ^= IFCAP_RXCSUM;
3638
3639                 if (mask & IFCAP_TSO4) {
3640                         ifp->if_capenable ^= IFCAP_TSO4;
3641
3642                         if (ifp->if_capenable & IFCAP_TSO) {
3643                                 if (ifp->if_capenable & IFCAP_TXCSUM) {
3644                                         ifp->if_hwassist |= CSUM_TSO;
3645                                         if_printf(ifp, "TSO Enabled\n");
3646                                 } else {
3647                                         ifp->if_capenable &= ~IFCAP_TSO;
3648                                         ifp->if_hwassist &= ~CSUM_TSO;
3649                                         if_printf(ifp,
3650                                             "Enable tx checksum offload \
3651                                              first.\n");
3652                                         err = EAGAIN;
3653                                 }
3654                         } else {
3655                                 ifp->if_hwassist &= ~CSUM_TSO;
3656                                 if_printf(ifp, "TSO Disabled\n");
3657                         }
3658                 }
3659                 if (mask & IFCAP_LRO)
3660                         ifp->if_capenable ^= IFCAP_LRO;
3661
3662                 if (mask & IFCAP_VLAN_HWTAGGING)
3663                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
3664
3665                 if (mask & IFCAP_VLAN_MTU)
3666                         ifp->if_capenable ^= IFCAP_VLAN_MTU;
3667
3668                 if (mask & IFCAP_VLAN_HWCSUM)
3669                         ifp->if_capenable ^= IFCAP_VLAN_HWCSUM;
3670
3671 #if __FreeBSD_version >= 800000
3672                 if (mask & IFCAP_VLAN_HWTSO)
3673                         ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
3674 #endif
3675
3676 #if defined(VLAN_CAPABILITIES)
3677                 VLAN_CAPABILITIES(ifp);
3678 #endif
3679
3680                 VXGE_DRV_UNLOCK(vdev);
3681                 break;
3682
3683         case SIOCGPRIVATE_0:
3684                 VXGE_DRV_LOCK(vdev);
3685                 err = vxge_ioctl_stats(vdev, ifr);
3686                 VXGE_DRV_UNLOCK(vdev);
3687                 break;
3688
3689         case SIOCGPRIVATE_1:
3690                 VXGE_DRV_LOCK(vdev);
3691                 err = vxge_ioctl_regs(vdev, ifr);
3692                 VXGE_DRV_UNLOCK(vdev);
3693                 break;
3694
3695         default:
3696                 err = ether_ioctl(ifp, command, data);
3697                 break;
3698         }
3699
3700         return (err);
3701 }
3702
3703 /*
3704  * vxge_ioctl_regs
3705  * IOCTL to get registers
3706  */
3707 int
3708 vxge_ioctl_regs(vxge_dev_t *vdev, struct ifreq *ifr)
3709 {
3710         u64 value = 0x0;
3711         u32 vp_id = 0;
3712         u32 offset, reqd_size = 0;
3713         int i, err = EINVAL;
3714
3715         char *command = (char *) ifr->ifr_data;
3716         void *reg_info = (void *) ifr->ifr_data;
3717
3718         vxge_vpath_t *vpath;
3719         vxge_hal_status_e status = VXGE_HAL_OK;
3720         vxge_hal_mgmt_reg_type_e regs_type;
3721
3722         switch (*command) {
3723         case vxge_hal_mgmt_reg_type_pcicfgmgmt:
3724                 if (vdev->is_privilaged) {
3725                         reqd_size = sizeof(vxge_hal_pcicfgmgmt_reg_t);
3726                         regs_type = vxge_hal_mgmt_reg_type_pcicfgmgmt;
3727                 }
3728                 break;
3729
3730         case vxge_hal_mgmt_reg_type_mrpcim:
3731                 if (vdev->is_privilaged) {
3732                         reqd_size = sizeof(vxge_hal_mrpcim_reg_t);
3733                         regs_type = vxge_hal_mgmt_reg_type_mrpcim;
3734                 }
3735                 break;
3736
3737         case vxge_hal_mgmt_reg_type_srpcim:
3738                 if (vdev->is_privilaged) {
3739                         reqd_size = sizeof(vxge_hal_srpcim_reg_t);
3740                         regs_type = vxge_hal_mgmt_reg_type_srpcim;
3741                 }
3742                 break;
3743
3744         case vxge_hal_mgmt_reg_type_memrepair:
3745                 if (vdev->is_privilaged) {
3746                         /* reqd_size = sizeof(vxge_hal_memrepair_reg_t); */
3747                         regs_type = vxge_hal_mgmt_reg_type_memrepair;
3748                 }
3749                 break;
3750
3751         case vxge_hal_mgmt_reg_type_legacy:
3752                 reqd_size = sizeof(vxge_hal_legacy_reg_t);
3753                 regs_type = vxge_hal_mgmt_reg_type_legacy;
3754                 break;
3755
3756         case vxge_hal_mgmt_reg_type_toc:
3757                 reqd_size = sizeof(vxge_hal_toc_reg_t);
3758                 regs_type = vxge_hal_mgmt_reg_type_toc;
3759                 break;
3760
3761         case vxge_hal_mgmt_reg_type_common:
3762                 reqd_size = sizeof(vxge_hal_common_reg_t);
3763                 regs_type = vxge_hal_mgmt_reg_type_common;
3764                 break;
3765
3766         case vxge_hal_mgmt_reg_type_vpmgmt:
3767                 reqd_size = sizeof(vxge_hal_vpmgmt_reg_t);
3768                 regs_type = vxge_hal_mgmt_reg_type_vpmgmt;
3769                 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3770                 vp_id = vpath->vp_id;
3771                 break;
3772
3773         case vxge_hal_mgmt_reg_type_vpath:
3774                 reqd_size = sizeof(vxge_hal_vpath_reg_t);
3775                 regs_type = vxge_hal_mgmt_reg_type_vpath;
3776                 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3777                 vp_id = vpath->vp_id;
3778                 break;
3779
3780         case VXGE_GET_VPATH_COUNT:
3781                 *((u32 *) reg_info) = vdev->no_of_vpath;
3782                 err = 0;
3783                 break;
3784
3785         default:
3786                 reqd_size = 0;
3787                 break;
3788         }
3789
3790         if (reqd_size) {
3791                 for (i = 0, offset = 0; offset < reqd_size;
3792                     i++, offset += 0x0008) {
3793                         value = 0x0;
3794                         status = vxge_hal_mgmt_reg_read(vdev->devh, regs_type,
3795                             vp_id, offset, &value);
3796
3797                         err = (status != VXGE_HAL_OK) ? EINVAL : 0;
3798                         if (err == EINVAL)
3799                                 break;
3800
3801                         *((u64 *) ((u64 *) reg_info + i)) = value;
3802                 }
3803         }
3804         return (err);
3805 }
3806
3807 /*
3808  * vxge_ioctl_stats
3809  * IOCTL to get statistics
3810  */
3811 int
3812 vxge_ioctl_stats(vxge_dev_t *vdev, struct ifreq *ifr)
3813 {
3814         int i, retsize, err = EINVAL;
3815         u32 bufsize;
3816
3817         vxge_vpath_t *vpath;
3818         vxge_bw_info_t *bw_info;
3819         vxge_port_info_t *port_info;
3820         vxge_drv_stats_t *drv_stat;
3821
3822         char *buffer = NULL;
3823         char *command = (char *) ifr->ifr_data;
3824         vxge_hal_status_e status = VXGE_HAL_OK;
3825
3826         switch (*command) {
3827         case VXGE_GET_PCI_CONF:
3828                 bufsize = VXGE_STATS_BUFFER_SIZE;
3829                 buffer = (char *) vxge_mem_alloc(bufsize);
3830                 if (buffer != NULL) {
3831                         status = vxge_hal_aux_pci_config_read(vdev->devh,
3832                             bufsize, buffer, &retsize);
3833                         if (status == VXGE_HAL_OK)
3834                                 err = copyout(buffer, ifr->ifr_data, retsize);
3835                         else
3836                                 device_printf(vdev->ndev,
3837                                     "failed pciconfig statistics query\n");
3838
3839                         vxge_mem_free(buffer, bufsize);
3840                 }
3841                 break;
3842
3843         case VXGE_GET_MRPCIM_STATS:
3844                 if (!vdev->is_privilaged)
3845                         break;
3846
3847                 bufsize = VXGE_STATS_BUFFER_SIZE;
3848                 buffer = (char *) vxge_mem_alloc(bufsize);
3849                 if (buffer != NULL) {
3850                         status = vxge_hal_aux_stats_mrpcim_read(vdev->devh,
3851                             bufsize, buffer, &retsize);
3852                         if (status == VXGE_HAL_OK)
3853                                 err = copyout(buffer, ifr->ifr_data, retsize);
3854                         else
3855                                 device_printf(vdev->ndev,
3856                                     "failed mrpcim statistics query\n");
3857
3858                         vxge_mem_free(buffer, bufsize);
3859                 }
3860                 break;
3861
3862         case VXGE_GET_DEVICE_STATS:
3863                 bufsize = VXGE_STATS_BUFFER_SIZE;
3864                 buffer = (char *) vxge_mem_alloc(bufsize);
3865                 if (buffer != NULL) {
3866                         status = vxge_hal_aux_stats_device_read(vdev->devh,
3867                             bufsize, buffer, &retsize);
3868                         if (status == VXGE_HAL_OK)
3869                                 err = copyout(buffer, ifr->ifr_data, retsize);
3870                         else
3871                                 device_printf(vdev->ndev,
3872                                     "failed device statistics query\n");
3873
3874                         vxge_mem_free(buffer, bufsize);
3875                 }
3876                 break;
3877
3878         case VXGE_GET_DEVICE_HWINFO:
3879                 bufsize = sizeof(vxge_device_hw_info_t);
3880                 buffer = (char *) vxge_mem_alloc(bufsize);
3881                 if (buffer != NULL) {
3882                         vxge_os_memcpy(
3883                             &(((vxge_device_hw_info_t *) buffer)->hw_info),
3884                             &vdev->config.hw_info,
3885                             sizeof(vxge_hal_device_hw_info_t));
3886
3887                         ((vxge_device_hw_info_t *) buffer)->port_mode =
3888                             vdev->port_mode;
3889
3890                         ((vxge_device_hw_info_t *) buffer)->port_failure =
3891                             vdev->port_failure;
3892
3893                         err = copyout(buffer, ifr->ifr_data, bufsize);
3894                         if (err != 0)
3895                                 device_printf(vdev->ndev,
3896                                     "failed device hardware info query\n");
3897
3898                         vxge_mem_free(buffer, bufsize);
3899                 }
3900                 break;
3901
3902         case VXGE_GET_DRIVER_STATS:
3903                 bufsize = sizeof(vxge_drv_stats_t) * vdev->no_of_vpath;
3904                 drv_stat = (vxge_drv_stats_t *) vxge_mem_alloc(bufsize);
3905                 if (drv_stat != NULL) {
3906                         for (i = 0; i < vdev->no_of_vpath; i++) {
3907                                 vpath = &(vdev->vpaths[i]);
3908
3909                                 vpath->driver_stats.rx_lro_queued +=
3910                                     vpath->lro.lro_queued;
3911
3912                                 vpath->driver_stats.rx_lro_flushed +=
3913                                     vpath->lro.lro_flushed;
3914
3915                                 vxge_os_memcpy(&drv_stat[i],
3916                                     &(vpath->driver_stats),
3917                                     sizeof(vxge_drv_stats_t));
3918                         }
3919
3920                         err = copyout(drv_stat, ifr->ifr_data, bufsize);
3921                         if (err != 0)
3922                                 device_printf(vdev->ndev,
3923                                     "failed driver statistics query\n");
3924
3925                         vxge_mem_free(drv_stat, bufsize);
3926                 }
3927                 break;
3928
3929         case VXGE_GET_BANDWIDTH:
3930                 bw_info = (vxge_bw_info_t *) ifr->ifr_data;
3931
3932                 if ((vdev->config.hw_info.func_id != 0) &&
3933                     (vdev->hw_fw_version < VXGE_FW_VERSION(1, 8, 0)))
3934                         break;
3935
3936                 if (vdev->config.hw_info.func_id != 0)
3937                         bw_info->func_id = vdev->config.hw_info.func_id;
3938
3939                 status = vxge_bw_priority_get(vdev, bw_info);
3940                 if (status != VXGE_HAL_OK)
3941                         break;
3942
3943                 err = copyout(bw_info, ifr->ifr_data, sizeof(vxge_bw_info_t));
3944                 break;
3945
3946         case VXGE_SET_BANDWIDTH:
3947                 if (vdev->is_privilaged)
3948                         err = vxge_bw_priority_set(vdev, ifr);
3949                 break;
3950
3951         case VXGE_SET_PORT_MODE:
3952                 if (vdev->is_privilaged) {
3953                         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3954                                 port_info = (vxge_port_info_t *) ifr->ifr_data;
3955                                 vdev->config.port_mode = port_info->port_mode;
3956                                 err = vxge_port_mode_update(vdev);
3957                                 if (err != ENXIO)
3958                                         err = VXGE_HAL_FAIL;
3959                                 else {
3960                                         err = VXGE_HAL_OK;
3961                                         device_printf(vdev->ndev,
3962                                             "PLEASE POWER CYCLE THE SYSTEM\n");
3963                                 }
3964                         }
3965                 }
3966                 break;
3967
3968         case VXGE_GET_PORT_MODE:
3969                 if (vdev->is_privilaged) {
3970                         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3971                                 port_info = (vxge_port_info_t *) ifr->ifr_data;
3972                                 err = vxge_port_mode_get(vdev, port_info);
3973                                 if (err == VXGE_HAL_OK) {
3974                                         err = copyout(port_info, ifr->ifr_data,
3975                                             sizeof(vxge_port_info_t));
3976                                 }
3977                         }
3978                 }
3979                 break;
3980
3981         default:
3982                 break;
3983         }
3984
3985         return (err);
3986 }
3987
3988 int
3989 vxge_bw_priority_config(vxge_dev_t *vdev)
3990 {
3991         u32 i;
3992         int err = EINVAL;
3993
3994         for (i = 0; i < vdev->no_of_func; i++) {
3995                 err = vxge_bw_priority_update(vdev, i, TRUE);
3996                 if (err != 0)
3997                         break;
3998         }
3999
4000         return (err);
4001 }
4002
4003 int
4004 vxge_bw_priority_set(vxge_dev_t *vdev, struct ifreq *ifr)
4005 {
4006         int err;
4007         u32 func_id;
4008         vxge_bw_info_t *bw_info;
4009
4010         bw_info = (vxge_bw_info_t *) ifr->ifr_data;
4011         func_id = bw_info->func_id;
4012
4013         vdev->config.bw_info[func_id].priority = bw_info->priority;
4014         vdev->config.bw_info[func_id].bandwidth = bw_info->bandwidth;
4015
4016         err = vxge_bw_priority_update(vdev, func_id, FALSE);
4017
4018         return (err);
4019 }
4020
4021 int
4022 vxge_bw_priority_update(vxge_dev_t *vdev, u32 func_id, bool binit)
4023 {
4024         u32 i, set = 0;
4025         u32 bandwidth, priority, vpath_count;
4026         u64 vpath_list[VXGE_HAL_MAX_VIRTUAL_PATHS];
4027
4028         vxge_hal_device_t *hldev;
4029         vxge_hal_vp_config_t *vp_config;
4030         vxge_hal_status_e status = VXGE_HAL_OK;
4031
4032         hldev = vdev->devh;
4033
4034         status = vxge_hal_get_vpath_list(vdev->devh, func_id,
4035             vpath_list, &vpath_count);
4036
4037         if (status != VXGE_HAL_OK)
4038                 return (status);
4039
4040         for (i = 0; i < vpath_count; i++) {
4041                 vp_config = &(hldev->config.vp_config[vpath_list[i]]);
4042
4043                 /* Configure Bandwidth */
4044                 if (vdev->config.bw_info[func_id].bandwidth !=
4045                     VXGE_HAL_VPATH_BW_LIMIT_DEFAULT) {
4046
4047                         set = 1;
4048                         bandwidth = vdev->config.bw_info[func_id].bandwidth;
4049                         if (bandwidth < VXGE_HAL_VPATH_BW_LIMIT_MIN ||
4050                             bandwidth > VXGE_HAL_VPATH_BW_LIMIT_MAX) {
4051
4052                                 bandwidth = VXGE_HAL_VPATH_BW_LIMIT_DEFAULT;
4053                         }
4054                         vp_config->bandwidth = bandwidth;
4055                 }
4056
4057                 /*
4058                  * If b/w limiting is enabled on any of the
4059                  * VFs, then for remaining VFs set the priority to 3
4060                  * and b/w limiting to max i.e 10 Gb)
4061                  */
4062                 if (vp_config->bandwidth == VXGE_HAL_VPATH_BW_LIMIT_DEFAULT)
4063                         vp_config->bandwidth = VXGE_HAL_VPATH_BW_LIMIT_MAX;
4064
4065                 if (binit && vdev->config.low_latency) {
4066                         if (func_id == 0)
4067                                 vdev->config.bw_info[func_id].priority =
4068                                     VXGE_DEFAULT_VPATH_PRIORITY_HIGH;
4069                 }
4070
4071                 /* Configure Priority */
4072                 if (vdev->config.bw_info[func_id].priority !=
4073                     VXGE_HAL_VPATH_PRIORITY_DEFAULT) {
4074
4075                         set = 1;
4076                         priority = vdev->config.bw_info[func_id].priority;
4077                         if (priority < VXGE_HAL_VPATH_PRIORITY_MIN ||
4078                             priority > VXGE_HAL_VPATH_PRIORITY_MAX) {
4079
4080                                 priority = VXGE_HAL_VPATH_PRIORITY_DEFAULT;
4081                         }
4082                         vp_config->priority = priority;
4083
4084                 } else if (vdev->config.low_latency) {
4085                         set = 1;
4086                         vp_config->priority = VXGE_DEFAULT_VPATH_PRIORITY_LOW;
4087                 }
4088
4089                 if (set == 1) {
4090                         status = vxge_hal_rx_bw_priority_set(vdev->devh,
4091                             vpath_list[i]);
4092                         if (status != VXGE_HAL_OK)
4093                                 break;
4094
4095                         if (vpath_list[i] < VXGE_HAL_TX_BW_VPATH_LIMIT) {
4096                                 status = vxge_hal_tx_bw_priority_set(
4097                                     vdev->devh, vpath_list[i]);
4098                                 if (status != VXGE_HAL_OK)
4099                                         break;
4100                         }
4101                 }
4102         }
4103
4104         return ((status  == VXGE_HAL_OK) ? 0 : EINVAL);
4105 }
4106
4107 /*
4108  * vxge_intr_coalesce_tx
4109  * Changes interrupt coalescing if the interrupts are not within a range
4110  * Return Value: Nothing
4111  */
4112 void
4113 vxge_intr_coalesce_tx(vxge_vpath_t *vpath)
4114 {
4115         u32 timer;
4116
4117         if (!vpath->tx_intr_coalesce)
4118                 return;
4119
4120         vpath->tx_interrupts++;
4121         if (ticks > vpath->tx_ticks + hz/100) {
4122
4123                 vpath->tx_ticks = ticks;
4124                 timer = vpath->tti_rtimer_val;
4125                 if (vpath->tx_interrupts > VXGE_MAX_TX_INTERRUPT_COUNT) {
4126                         if (timer != VXGE_TTI_RTIMER_ADAPT_VAL) {
4127                                 vpath->tti_rtimer_val =
4128                                     VXGE_TTI_RTIMER_ADAPT_VAL;
4129
4130                                 vxge_hal_vpath_dynamic_tti_rtimer_set(
4131                                     vpath->handle, vpath->tti_rtimer_val);
4132                         }
4133                 } else {
4134                         if (timer != 0) {
4135                                 vpath->tti_rtimer_val = 0;
4136                                 vxge_hal_vpath_dynamic_tti_rtimer_set(
4137                                     vpath->handle, vpath->tti_rtimer_val);
4138                         }
4139                 }
4140                 vpath->tx_interrupts = 0;
4141         }
4142 }
4143
4144 /*
4145  * vxge_intr_coalesce_rx
4146  * Changes interrupt coalescing if the interrupts are not within a range
4147  * Return Value: Nothing
4148  */
4149 void
4150 vxge_intr_coalesce_rx(vxge_vpath_t *vpath)
4151 {
4152         u32 timer;
4153
4154         if (!vpath->rx_intr_coalesce)
4155                 return;
4156
4157         vpath->rx_interrupts++;
4158         if (ticks > vpath->rx_ticks + hz/100) {
4159
4160                 vpath->rx_ticks = ticks;
4161                 timer = vpath->rti_rtimer_val;
4162
4163                 if (vpath->rx_interrupts > VXGE_MAX_RX_INTERRUPT_COUNT) {
4164                         if (timer != VXGE_RTI_RTIMER_ADAPT_VAL) {
4165                                 vpath->rti_rtimer_val =
4166                                     VXGE_RTI_RTIMER_ADAPT_VAL;
4167
4168                                 vxge_hal_vpath_dynamic_rti_rtimer_set(
4169                                     vpath->handle, vpath->rti_rtimer_val);
4170                         }
4171                 } else {
4172                         if (timer != 0) {
4173                                 vpath->rti_rtimer_val = 0;
4174                                 vxge_hal_vpath_dynamic_rti_rtimer_set(
4175                                     vpath->handle, vpath->rti_rtimer_val);
4176                         }
4177                 }
4178                 vpath->rx_interrupts = 0;
4179         }
4180 }
4181
4182 /*
4183  * vxge_methods FreeBSD device interface entry points
4184  */
4185 static device_method_t vxge_methods[] = {
4186         DEVMETHOD(device_probe, vxge_probe),
4187         DEVMETHOD(device_attach, vxge_attach),
4188         DEVMETHOD(device_detach, vxge_detach),
4189         DEVMETHOD(device_shutdown, vxge_shutdown),
4190         {0, 0}
4191 };
4192
4193 static driver_t vxge_driver = {
4194         "vxge", vxge_methods, sizeof(vxge_dev_t),
4195 };
4196
4197 static devclass_t vxge_devclass;
4198
4199 DRIVER_MODULE(vxge, pci, vxge_driver, vxge_devclass, 0, 0);