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1 /*-
2  * Copyright (c) 2003,2004 Marcel Moolenaar
3  * Copyright (c) 2000,2001 Doug Rabson
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_compat.h"
32 #include "opt_ddb.h"
33 #include "opt_kstack_pages.h"
34 #include "opt_sched.h"
35
36 #include <sys/param.h>
37 #include <sys/proc.h>
38 #include <sys/systm.h>
39 #include <sys/bio.h>
40 #include <sys/buf.h>
41 #include <sys/bus.h>
42 #include <sys/cons.h>
43 #include <sys/cpu.h>
44 #include <sys/eventhandler.h>
45 #include <sys/exec.h>
46 #include <sys/imgact.h>
47 #include <sys/kdb.h>
48 #include <sys/kernel.h>
49 #include <sys/linker.h>
50 #include <sys/lock.h>
51 #include <sys/malloc.h>
52 #include <sys/mbuf.h>
53 #include <sys/msgbuf.h>
54 #include <sys/pcpu.h>
55 #include <sys/ptrace.h>
56 #include <sys/random.h>
57 #include <sys/reboot.h>
58 #include <sys/sched.h>
59 #include <sys/signalvar.h>
60 #include <sys/syscall.h>
61 #include <sys/syscallsubr.h>
62 #include <sys/sysctl.h>
63 #include <sys/sysproto.h>
64 #include <sys/ucontext.h>
65 #include <sys/uio.h>
66 #include <sys/uuid.h>
67 #include <sys/vmmeter.h>
68 #include <sys/vnode.h>
69
70 #include <ddb/ddb.h>
71
72 #include <net/netisr.h>
73
74 #include <vm/vm.h>
75 #include <vm/vm_extern.h>
76 #include <vm/vm_kern.h>
77 #include <vm/vm_page.h>
78 #include <vm/vm_map.h>
79 #include <vm/vm_object.h>
80 #include <vm/vm_pager.h>
81
82 #include <machine/bootinfo.h>
83 #include <machine/cpu.h>
84 #include <machine/efi.h>
85 #include <machine/elf.h>
86 #include <machine/fpu.h>
87 #include <machine/intr.h>
88 #include <machine/mca.h>
89 #include <machine/md_var.h>
90 #include <machine/pal.h>
91 #include <machine/pcb.h>
92 #include <machine/reg.h>
93 #include <machine/sal.h>
94 #include <machine/sigframe.h>
95 #ifdef SMP
96 #include <machine/smp.h>
97 #endif
98 #include <machine/unwind.h>
99 #include <machine/vmparam.h>
100
101 SYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, "");
102 SYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, "");
103
104 static u_int bus_freq;
105 SYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0,
106     "Bus clock frequency");
107
108 static u_int cpu_freq;
109 SYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0,
110     "CPU clock frequency");
111
112 static u_int itc_freq;
113 SYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0,
114     "ITC frequency");
115
116 int cold = 1;
117
118 struct bootinfo *bootinfo;
119
120 struct pcpu pcpu0;
121
122 extern u_int64_t kernel_text[], _end[];
123
124 extern u_int64_t ia64_gateway_page[];
125 extern u_int64_t break_sigtramp[];
126 extern u_int64_t epc_sigtramp[];
127
128 struct fpswa_iface *fpswa_iface;
129
130 vm_size_t ia64_pal_size;
131 vm_paddr_t ia64_pal_base;
132 vm_offset_t ia64_port_base;
133
134 u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR;
135
136 struct ia64_pib *ia64_pib;
137
138 static int ia64_sync_icache_needed;
139
140 char machine[] = MACHINE;
141 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
142
143 static char cpu_model[64];
144 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0,
145     "The CPU model name");
146
147 static char cpu_family[64];
148 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0,
149     "The CPU family name");
150
151 #ifdef DDB
152 extern vm_offset_t ksym_start, ksym_end;
153 #endif
154
155
156 struct msgbuf *msgbufp = NULL;
157
158 /* Other subsystems (e.g., ACPI) can hook this later. */
159 void (*cpu_idle_hook)(void) = NULL;
160
161 long Maxmem = 0;
162 long realmem = 0;
163
164 #define PHYSMAP_SIZE    (2 * VM_PHYSSEG_MAX)
165
166 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
167
168 /* must be 2 less so 0 0 can signal end of chunks */
169 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
170
171 struct kva_md_info kmi;
172
173 #define Mhz     1000000L
174 #define Ghz     (1000L*Mhz)
175
176 static void
177 identifycpu(void)
178 {
179         char vendor[17];
180         char *family_name, *model_name;
181         u_int64_t features, tmp;
182         int number, revision, model, family, archrev;
183
184         /*
185          * Assumes little-endian.
186          */
187         *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0);
188         *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1);
189         vendor[16] = '\0';
190
191         tmp = ia64_get_cpuid(3);
192         number = (tmp >> 0) & 0xff;
193         revision = (tmp >> 8) & 0xff;
194         model = (tmp >> 16) & 0xff;
195         family = (tmp >> 24) & 0xff;
196         archrev = (tmp >> 32) & 0xff;
197
198         family_name = model_name = "unknown";
199         switch (family) {
200         case 0x07:
201                 family_name = "Itanium";
202                 model_name = "Merced";
203                 break;
204         case 0x1f:
205                 family_name = "Itanium 2";
206                 switch (model) {
207                 case 0x00:
208                         model_name = "McKinley";
209                         break;
210                 case 0x01:
211                         /*
212                          * Deerfield is a low-voltage variant based on the
213                          * Madison core. We need circumstantial evidence
214                          * (i.e. the clock frequency) to identify those.
215                          * Allow for roughly 1% error margin.
216                          */
217                         if (cpu_freq > 990 && cpu_freq < 1010)
218                                 model_name = "Deerfield";
219                         else
220                                 model_name = "Madison";
221                         break;
222                 case 0x02:
223                         model_name = "Madison II";
224                         break;
225                 }
226                 break;
227         case 0x20:
228                 ia64_sync_icache_needed = 1;
229
230                 family_name = "Itanium 2";
231                 switch (model) {
232                 case 0x00:
233                         model_name = "Montecito";
234                         break;
235                 case 0x01:
236                         model_name = "Montvale";
237                         break;
238                 }
239                 break;
240         }
241         snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
242         snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
243
244         features = ia64_get_cpuid(4);
245
246         printf("CPU: %s (", model_name);
247         if (cpu_freq)
248                 printf("%u Mhz ", cpu_freq);
249         printf("%s)\n", family_name);
250         printf("  Origin = \"%s\"  Revision = %d\n", vendor, revision);
251         printf("  Features = 0x%b\n", (u_int32_t) features,
252             "\020"
253             "\001LB"    /* long branch (brl) instruction. */
254             "\002SD"    /* Spontaneous deferral. */
255             "\003AO"    /* 16-byte atomic operations (ld, st, cmpxchg). */ );
256 }
257
258 static void
259 cpu_startup(void *dummy)
260 {
261         char nodename[16];
262         struct pcpu *pc;
263         struct pcpu_stats *pcs;
264
265         /*
266          * Good {morning,afternoon,evening,night}.
267          */
268         identifycpu();
269
270 #ifdef PERFMON
271         perfmon_init();
272 #endif
273         printf("real memory  = %ld (%ld MB)\n", ia64_ptob(Maxmem),
274             ia64_ptob(Maxmem) / 1048576);
275         realmem = Maxmem;
276
277         /*
278          * Display any holes after the first chunk of extended memory.
279          */
280         if (bootverbose) {
281                 int indx;
282
283                 printf("Physical memory chunk(s):\n");
284                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
285                         long size1 = phys_avail[indx + 1] - phys_avail[indx];
286
287                         printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n",
288                             phys_avail[indx], phys_avail[indx + 1] - 1, size1,
289                             size1 >> PAGE_SHIFT);
290                 }
291         }
292
293         vm_ksubmap_init(&kmi);
294
295         printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
296             ptoa(cnt.v_free_count) / 1048576);
297  
298         if (fpswa_iface == NULL)
299                 printf("Warning: no FPSWA package supplied\n");
300         else
301                 printf("FPSWA Revision = 0x%lx, Entry = %p\n",
302                     (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
303
304         /*
305          * Set up buffers, so they can be used to read disk labels.
306          */
307         bufinit();
308         vm_pager_bufferinit();
309
310         /*
311          * Traverse the MADT to discover IOSAPIC and Local SAPIC
312          * information.
313          */
314         ia64_probe_sapics();
315         ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib));
316
317         ia64_mca_init();
318
319         /*
320          * Create sysctl tree for per-CPU information.
321          */
322         STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
323                 snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid);
324                 sysctl_ctx_init(&pc->pc_md.sysctl_ctx);
325                 pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx,
326                     SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename,
327                     CTLFLAG_RD, NULL, "");
328                 if (pc->pc_md.sysctl_tree == NULL)
329                         continue;
330
331                 pcs = &pc->pc_md.stats;
332
333                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
334                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
335                     "nasts", CTLFLAG_RD, &pcs->pcs_nasts,
336                     "Number of IPI_AST interrupts");
337
338                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
339                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
340                     "nclks", CTLFLAG_RD, &pcs->pcs_nclks,
341                     "Number of clock interrupts");
342
343                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
344                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
345                     "nextints", CTLFLAG_RD, &pcs->pcs_nextints,
346                     "Number of ExtINT interrupts");
347
348                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
349                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
350                     "nhardclocks", CTLFLAG_RD, &pcs->pcs_nhardclocks,
351                     "Number of IPI_HARDCLOCK interrupts");
352
353                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
354                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
355                     "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps,
356                     "Number of IPI_HIGH_FP interrupts");
357
358                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
359                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
360                     "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints,
361                     "Number of hardware (device) interrupts");
362
363                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
364                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
365                     "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts,
366                     "Number of IPI_PREEMPT interrupts");
367
368                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
369                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
370                     "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs,
371                     "Number of IPI_RENDEZVOUS interrupts");
372
373                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
374                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
375                     "nstops", CTLFLAG_RD, &pcs->pcs_nstops,
376                     "Number of IPI_STOP interrupts");
377
378                 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
379                     SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
380                     "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays,
381                     "Number of stray interrupts");
382         }
383 }
384 SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
385
386 void
387 cpu_flush_dcache(void *ptr, size_t len)
388 {
389         vm_offset_t lim, va;
390
391         va = (uintptr_t)ptr & ~31;
392         lim = (uintptr_t)ptr + len;
393         while (va < lim) {
394                 ia64_fc(va);
395                 va += 32;
396         }
397
398         ia64_srlz_d();
399 }
400
401 /* Get current clock frequency for the given cpu id. */
402 int
403 cpu_est_clockrate(int cpu_id, uint64_t *rate)
404 {
405
406         if (pcpu_find(cpu_id) == NULL || rate == NULL)
407                 return (EINVAL);
408         *rate = (u_long)cpu_freq * 1000000ul;
409         return (0);
410 }
411
412 void
413 cpu_halt()
414 {
415
416         efi_reset_system();
417 }
418
419 void
420 cpu_idle(int busy)
421 {
422         register_t ie;
423
424         if (!busy) {
425                 critical_enter();
426                 cpu_idleclock();
427         }
428
429         ie = intr_disable();
430         KASSERT(ie != 0, ("%s called with interrupts disabled\n", __func__));
431
432         if (sched_runnable())
433                 ia64_enable_intr();
434         else if (cpu_idle_hook != NULL) {
435                 (*cpu_idle_hook)();
436                 /* The hook must enable interrupts! */
437         } else {
438                 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
439                 ia64_enable_intr();
440         }
441
442         if (!busy) {
443                 cpu_activeclock();
444                 critical_exit();
445         }
446 }
447
448 int
449 cpu_idle_wakeup(int cpu)
450 {
451
452         return (0);
453 }
454
455 void
456 cpu_reset()
457 {
458
459         efi_reset_system();
460 }
461
462 void
463 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx)
464 {
465         struct pcb *oldpcb, *newpcb;
466
467         oldpcb = old->td_pcb;
468 #ifdef COMPAT_FREEBSD32
469         ia32_savectx(oldpcb);
470 #endif
471         if (PCPU_GET(fpcurthread) == old)
472                 old->td_frame->tf_special.psr |= IA64_PSR_DFH;
473         if (!savectx(oldpcb)) {
474                 newpcb = new->td_pcb;
475                 oldpcb->pcb_current_pmap =
476                     pmap_switch(newpcb->pcb_current_pmap);
477
478                 atomic_store_rel_ptr(&old->td_lock, mtx);
479
480 #if defined(SCHED_ULE) && defined(SMP)
481                 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
482                         cpu_spinwait();
483 #endif
484
485                 PCPU_SET(curthread, new);
486
487 #ifdef COMPAT_FREEBSD32
488                 ia32_restorectx(newpcb);
489 #endif
490
491                 if (PCPU_GET(fpcurthread) == new)
492                         new->td_frame->tf_special.psr &= ~IA64_PSR_DFH;
493                 restorectx(newpcb);
494                 /* We should not get here. */
495                 panic("cpu_switch: restorectx() returned");
496                 /* NOTREACHED */
497         }
498 }
499
500 void
501 cpu_throw(struct thread *old __unused, struct thread *new)
502 {
503         struct pcb *newpcb;
504
505         newpcb = new->td_pcb;
506         (void)pmap_switch(newpcb->pcb_current_pmap);
507
508 #if defined(SCHED_ULE) && defined(SMP)
509         while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
510                 cpu_spinwait();
511 #endif
512
513         PCPU_SET(curthread, new);
514
515 #ifdef COMPAT_FREEBSD32
516         ia32_restorectx(newpcb);
517 #endif
518
519         restorectx(newpcb);
520         /* We should not get here. */
521         panic("cpu_throw: restorectx() returned");
522         /* NOTREACHED */
523 }
524
525 void
526 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
527 {
528
529         /*
530          * Set pc_acpi_id to "uninitialized".
531          * See sys/dev/acpica/acpi_cpu.c
532          */
533         pcpu->pc_acpi_id = 0xffffffff;
534 }
535
536 void
537 spinlock_enter(void)
538 {
539         struct thread *td;
540         int intr;
541
542         td = curthread;
543         if (td->td_md.md_spinlock_count == 0) {
544                 intr = intr_disable();
545                 td->td_md.md_spinlock_count = 1;
546                 td->td_md.md_saved_intr = intr;
547         } else
548                 td->td_md.md_spinlock_count++;
549         critical_enter();
550 }
551
552 void
553 spinlock_exit(void)
554 {
555         struct thread *td;
556         int intr;
557
558         td = curthread;
559         critical_exit();
560         intr = td->td_md.md_saved_intr;
561         td->td_md.md_spinlock_count--;
562         if (td->td_md.md_spinlock_count == 0)
563                 intr_restore(intr);
564 }
565
566 void
567 map_vhpt(uintptr_t vhpt)
568 {
569         pt_entry_t pte;
570         uint64_t psr;
571
572         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
573             PTE_PL_KERN | PTE_AR_RW;
574         pte |= vhpt & PTE_PPN_MASK;
575
576         __asm __volatile("ptr.d %0,%1" :: "r"(vhpt),
577             "r"(pmap_vhpt_log2size << 2));
578
579         __asm __volatile("mov   %0=psr" : "=r"(psr));
580         __asm __volatile("rsm   psr.ic|psr.i");
581         ia64_srlz_i();
582         ia64_set_ifa(vhpt);
583         ia64_set_itir(pmap_vhpt_log2size << 2);
584         ia64_srlz_d();
585         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte));
586         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
587         ia64_srlz_i();
588 }
589
590 void
591 map_pal_code(void)
592 {
593         pt_entry_t pte;
594         vm_offset_t va;
595         vm_size_t sz;
596         uint64_t psr;
597         u_int shft;
598
599         if (ia64_pal_size == 0)
600                 return;
601
602         va = IA64_PHYS_TO_RR7(ia64_pal_base);
603
604         sz = ia64_pal_size;
605         shft = 0;
606         while (sz > 1) {
607                 shft++;
608                 sz >>= 1;
609         }
610
611         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
612             PTE_PL_KERN | PTE_AR_RWX;
613         pte |= ia64_pal_base & PTE_PPN_MASK;
614
615         __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: "r"(va), "r"(shft<<2));
616
617         __asm __volatile("mov   %0=psr" : "=r"(psr));
618         __asm __volatile("rsm   psr.ic|psr.i");
619         ia64_srlz_i();
620         ia64_set_ifa(va);
621         ia64_set_itir(shft << 2);
622         ia64_srlz_d();
623         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(4), "r"(pte));
624         ia64_srlz_d();
625         __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte));
626         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
627         ia64_srlz_i();
628 }
629
630 void
631 map_gateway_page(void)
632 {
633         pt_entry_t pte;
634         uint64_t psr;
635
636         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
637             PTE_PL_KERN | PTE_AR_X_RX;
638         pte |= ia64_tpa((uint64_t)ia64_gateway_page) & PTE_PPN_MASK;
639
640         __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
641             "r"(VM_MAXUSER_ADDRESS), "r"(PAGE_SHIFT << 2));
642
643         __asm __volatile("mov   %0=psr" : "=r"(psr));
644         __asm __volatile("rsm   psr.ic|psr.i");
645         ia64_srlz_i();
646         ia64_set_ifa(VM_MAXUSER_ADDRESS);
647         ia64_set_itir(PAGE_SHIFT << 2);
648         ia64_srlz_d();
649         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(5), "r"(pte));
650         ia64_srlz_d();
651         __asm __volatile("itr.i itr[%0]=%1" :: "r"(2), "r"(pte));
652         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
653         ia64_srlz_i();
654
655         /* Expose the mapping to userland in ar.k5 */
656         ia64_set_k5(VM_MAXUSER_ADDRESS);
657 }
658
659 static u_int
660 freq_ratio(u_long base, u_long ratio)
661 {
662         u_long f;
663
664         f = (base * (ratio >> 32)) / (ratio & 0xfffffffful);
665         return ((f + 500000) / 1000000);
666 }
667
668 static void
669 calculate_frequencies(void)
670 {
671         struct ia64_sal_result sal;
672         struct ia64_pal_result pal;
673         register_t ie;
674
675         ie = intr_disable();
676         sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
677         pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
678         intr_restore(ie);
679
680         if (sal.sal_status == 0 && pal.pal_status == 0) {
681                 if (bootverbose) {
682                         printf("Platform clock frequency %ld Hz\n",
683                                sal.sal_result[0]);
684                         printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
685                                "ITC ratio %ld/%ld\n",
686                                pal.pal_result[0] >> 32,
687                                pal.pal_result[0] & ((1L << 32) - 1),
688                                pal.pal_result[1] >> 32,
689                                pal.pal_result[1] & ((1L << 32) - 1),
690                                pal.pal_result[2] >> 32,
691                                pal.pal_result[2] & ((1L << 32) - 1));
692                 }
693                 cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]);
694                 bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]);
695                 itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]);
696         }
697 }
698
699 struct ia64_init_return
700 ia64_init(void)
701 {
702         struct ia64_init_return ret;
703         int phys_avail_cnt;
704         vm_offset_t kernstart, kernend;
705         vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1;
706         char *p;
707         struct efi_md *md;
708         int metadata_missing;
709
710         /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
711
712         /*
713          * TODO: Disable interrupts, floating point etc.
714          * Maybe flush cache and tlb
715          */
716         ia64_set_fpsr(IA64_FPSR_DEFAULT);
717
718         /*
719          * TODO: Get critical system information (if possible, from the
720          * information provided by the boot program).
721          */
722
723         /*
724          * Look for the I/O ports first - we need them for console
725          * probing.
726          */
727         for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
728                 switch (md->md_type) {
729                 case EFI_MD_TYPE_IOPORT:
730                         ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys,
731                             md->md_pages * EFI_PAGE_SIZE);
732                         break;
733                 case EFI_MD_TYPE_PALCODE:
734                         ia64_pal_size = md->md_pages * EFI_PAGE_SIZE;
735                         ia64_pal_base = md->md_phys;
736                         break;
737                 }
738         }
739
740         metadata_missing = 0;
741         if (bootinfo->bi_modulep)
742                 preload_metadata = (caddr_t)bootinfo->bi_modulep;
743         else
744                 metadata_missing = 1;
745
746         if (envmode == 0 && bootinfo->bi_envp)
747                 kern_envp = (caddr_t)bootinfo->bi_envp;
748         else
749                 kern_envp = static_env;
750
751         /*
752          * Look at arguments passed to us and compute boothowto.
753          */
754         boothowto = bootinfo->bi_boothowto;
755
756         if (boothowto & RB_VERBOSE)
757                 bootverbose = 1;
758
759         /*
760          * Find the beginning and end of the kernel.
761          */
762         kernstart = trunc_page(kernel_text);
763 #ifdef DDB
764         ksym_start = bootinfo->bi_symtab;
765         ksym_end = bootinfo->bi_esymtab;
766         kernend = (vm_offset_t)round_page(ksym_end);
767 #else
768         kernend = (vm_offset_t)round_page(_end);
769 #endif
770         /* But if the bootstrap tells us otherwise, believe it! */
771         if (bootinfo->bi_kernend)
772                 kernend = round_page(bootinfo->bi_kernend);
773
774         /*
775          * Region 6 is direct mapped UC and region 7 is direct mapped
776          * WC. The details of this is controlled by the Alt {I,D}TLB
777          * handlers. Here we just make sure that they have the largest
778          * possible page size to minimise TLB usage.
779          */
780         ia64_set_rr(IA64_RR_BASE(6), (6 << 8) | (PAGE_SHIFT << 2));
781         ia64_set_rr(IA64_RR_BASE(7), (7 << 8) | (PAGE_SHIFT << 2));
782         ia64_srlz_d();
783
784         /*
785          * Wire things up so we can call the firmware.
786          */
787         map_pal_code();
788         efi_boot_minimal(bootinfo->bi_systab);
789         ia64_xiv_init();
790         ia64_sal_init();
791         calculate_frequencies();
792
793         set_cputicker(ia64_get_itc, (u_long)itc_freq * 1000000, 0);
794
795         /*
796          * Setup the PCPU data for the bootstrap processor. It is needed
797          * by printf(). Also, since printf() has critical sections, we
798          * need to initialize at least pc_curthread.
799          */
800         pcpup = &pcpu0;
801         ia64_set_k4((u_int64_t)pcpup);
802         pcpu_init(pcpup, 0, sizeof(pcpu0));
803         dpcpu_init((void *)kernend, 0);
804         PCPU_SET(md.lid, ia64_get_lid());
805         kernend += DPCPU_SIZE;
806         PCPU_SET(curthread, &thread0);
807
808         /*
809          * Initialize the console before we print anything out.
810          */
811         cninit();
812
813         /* OUTPUT NOW ALLOWED */
814
815         if (metadata_missing)
816                 printf("WARNING: loader(8) metadata is missing!\n");
817
818         /* Get FPSWA interface */
819         fpswa_iface = (bootinfo->bi_fpswa == 0) ? NULL :
820             (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo->bi_fpswa);
821
822         /* Init basic tunables, including hz */
823         init_param1();
824
825         p = getenv("kernelname");
826         if (p != NULL) {
827                 strlcpy(kernelname, p, sizeof(kernelname));
828                 freeenv(p);
829         }
830
831         kernstartpfn = atop(IA64_RR_MASK(kernstart));
832         kernendpfn = atop(IA64_RR_MASK(kernend));
833
834         /*
835          * Size the memory regions and load phys_avail[] with the results.
836          */
837
838         /*
839          * Find out how much memory is available, by looking at
840          * the memory descriptors.
841          */
842
843 #ifdef DEBUG_MD
844         printf("Memory descriptor count: %d\n", mdcount);
845 #endif
846
847         phys_avail_cnt = 0;
848         for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
849 #ifdef DEBUG_MD
850                 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md,
851                     md->md_type, md->md_phys, md->md_pages);
852 #endif
853
854                 pfn0 = ia64_btop(round_page(md->md_phys));
855                 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096));
856                 if (pfn1 <= pfn0)
857                         continue;
858
859                 if (md->md_type != EFI_MD_TYPE_FREE)
860                         continue;
861
862                 /*
863                  * We have a memory descriptor that describes conventional
864                  * memory that is for general use. We must determine if the
865                  * loader has put the kernel in this region.
866                  */
867                 physmem += (pfn1 - pfn0);
868                 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) {
869                         /*
870                          * Must compute the location of the kernel
871                          * within the segment.
872                          */
873 #ifdef DEBUG_MD
874                         printf("Descriptor %p contains kernel\n", mp);
875 #endif
876                         if (pfn0 < kernstartpfn) {
877                                 /*
878                                  * There is a chunk before the kernel.
879                                  */
880 #ifdef DEBUG_MD
881                                 printf("Loading chunk before kernel: "
882                                        "0x%lx / 0x%lx\n", pfn0, kernstartpfn);
883 #endif
884                                 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
885                                 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn);
886                                 phys_avail_cnt += 2;
887                         }
888                         if (kernendpfn < pfn1) {
889                                 /*
890                                  * There is a chunk after the kernel.
891                                  */
892 #ifdef DEBUG_MD
893                                 printf("Loading chunk after kernel: "
894                                        "0x%lx / 0x%lx\n", kernendpfn, pfn1);
895 #endif
896                                 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn);
897                                 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
898                                 phys_avail_cnt += 2;
899                         }
900                 } else {
901                         /*
902                          * Just load this cluster as one chunk.
903                          */
904 #ifdef DEBUG_MD
905                         printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i,
906                                pfn0, pfn1);
907 #endif
908                         phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
909                         phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
910                         phys_avail_cnt += 2;
911                         
912                 }
913         }
914         phys_avail[phys_avail_cnt] = 0;
915
916         Maxmem = physmem;
917         init_param2(physmem);
918
919         /*
920          * Initialize error message buffer (at end of core).
921          */
922         msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize);
923         msgbufinit(msgbufp, msgbufsize);
924
925         proc_linkup0(&proc0, &thread0);
926         /*
927          * Init mapping for kernel stack for proc 0
928          */
929         thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE);
930         thread0.td_kstack_pages = KSTACK_PAGES;
931
932         mutex_init();
933
934         /*
935          * Initialize the rest of proc 0's PCB.
936          *
937          * Set the kernel sp, reserving space for an (empty) trapframe,
938          * and make proc0's trapframe pointer point to it for sanity.
939          * Initialise proc0's backing store to start after u area.
940          */
941         cpu_thread_alloc(&thread0);
942         thread0.td_frame->tf_flags = FRAME_SYSCALL;
943         thread0.td_pcb->pcb_special.sp =
944             (u_int64_t)thread0.td_frame - 16;
945         thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack;
946
947         /*
948          * Initialize the virtual memory system.
949          */
950         pmap_bootstrap();
951
952         /*
953          * Initialize debuggers, and break into them if appropriate.
954          */
955         kdb_init();
956
957 #ifdef KDB
958         if (boothowto & RB_KDB)
959                 kdb_enter(KDB_WHY_BOOTFLAGS,
960                     "Boot flags requested debugger\n");
961 #endif
962
963         ia64_set_tpr(0);
964         ia64_srlz_d();
965
966         ret.bspstore = thread0.td_pcb->pcb_special.bspstore;
967         ret.sp = thread0.td_pcb->pcb_special.sp;
968         return (ret);
969 }
970
971 uint64_t
972 ia64_get_hcdp(void)
973 {
974
975         return (bootinfo->bi_hcdp);
976 }
977
978 void
979 bzero(void *buf, size_t len)
980 {
981         caddr_t p = buf;
982
983         while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
984                 *p++ = 0;
985                 len--;
986         }
987         while (len >= sizeof(u_long) * 8) {
988                 *(u_long*) p = 0;
989                 *((u_long*) p + 1) = 0;
990                 *((u_long*) p + 2) = 0;
991                 *((u_long*) p + 3) = 0;
992                 len -= sizeof(u_long) * 8;
993                 *((u_long*) p + 4) = 0;
994                 *((u_long*) p + 5) = 0;
995                 *((u_long*) p + 6) = 0;
996                 *((u_long*) p + 7) = 0;
997                 p += sizeof(u_long) * 8;
998         }
999         while (len >= sizeof(u_long)) {
1000                 *(u_long*) p = 0;
1001                 len -= sizeof(u_long);
1002                 p += sizeof(u_long);
1003         }
1004         while (len) {
1005                 *p++ = 0;
1006                 len--;
1007         }
1008 }
1009
1010 u_int
1011 ia64_itc_freq(void)
1012 {
1013
1014         return (itc_freq);
1015 }
1016
1017 void
1018 DELAY(int n)
1019 {
1020         u_int64_t start, end, now;
1021
1022         sched_pin();
1023
1024         start = ia64_get_itc();
1025         end = start + itc_freq * n;
1026         /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */
1027         do {
1028                 now = ia64_get_itc();
1029         } while (now < end || (now > start && end < start));
1030
1031         sched_unpin();
1032 }
1033
1034 /*
1035  * Send an interrupt (signal) to a process.
1036  */
1037 void
1038 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
1039 {
1040         struct proc *p;
1041         struct thread *td;
1042         struct trapframe *tf;
1043         struct sigacts *psp;
1044         struct sigframe sf, *sfp;
1045         u_int64_t sbs, sp;
1046         int oonstack;
1047         int sig;
1048         u_long code;
1049
1050         td = curthread;
1051         p = td->td_proc;
1052         PROC_LOCK_ASSERT(p, MA_OWNED);
1053         sig = ksi->ksi_signo;
1054         code = ksi->ksi_code;
1055         psp = p->p_sigacts;
1056         mtx_assert(&psp->ps_mtx, MA_OWNED);
1057         tf = td->td_frame;
1058         sp = tf->tf_special.sp;
1059         oonstack = sigonstack(sp);
1060         sbs = 0;
1061
1062         /* save user context */
1063         bzero(&sf, sizeof(struct sigframe));
1064         sf.sf_uc.uc_sigmask = *mask;
1065         sf.sf_uc.uc_stack = td->td_sigstk;
1066         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
1067             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
1068
1069         /*
1070          * Allocate and validate space for the signal handler
1071          * context. Note that if the stack is in P0 space, the
1072          * call to grow() is a nop, and the useracc() check
1073          * will fail if the process has not already allocated
1074          * the space with a `brk'.
1075          */
1076         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
1077             SIGISMEMBER(psp->ps_sigonstack, sig)) {
1078                 sbs = (u_int64_t)td->td_sigstk.ss_sp;
1079                 sbs = (sbs + 15) & ~15;
1080                 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size);
1081 #if defined(COMPAT_43)
1082                 td->td_sigstk.ss_flags |= SS_ONSTACK;
1083 #endif
1084         } else
1085                 sfp = (struct sigframe *)sp;
1086         sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15);
1087
1088         /* Fill in the siginfo structure for POSIX handlers. */
1089         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
1090                 sf.sf_si = ksi->ksi_info;
1091                 sf.sf_si.si_signo = sig;
1092                 /*
1093                  * XXX this shouldn't be here after code in trap.c
1094                  * is fixed
1095                  */
1096                 sf.sf_si.si_addr = (void*)tf->tf_special.ifa;
1097                 code = (u_int64_t)&sfp->sf_si;
1098         }
1099
1100         mtx_unlock(&psp->ps_mtx);
1101         PROC_UNLOCK(p);
1102
1103         get_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
1104
1105         /* Copy the frame out to userland. */
1106         if (copyout(&sf, sfp, sizeof(sf)) != 0) {
1107                 /*
1108                  * Process has trashed its stack; give it an illegal
1109                  * instruction to halt it in its tracks.
1110                  */
1111                 PROC_LOCK(p);
1112                 sigexit(td, SIGILL);
1113                 return;
1114         }
1115
1116         if ((tf->tf_flags & FRAME_SYSCALL) == 0) {
1117                 tf->tf_special.psr &= ~IA64_PSR_RI;
1118                 tf->tf_special.iip = ia64_get_k5() +
1119                     ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page);
1120         } else
1121                 tf->tf_special.iip = ia64_get_k5() +
1122                     ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page);
1123
1124         /*
1125          * Setup the trapframe to return to the signal trampoline. We pass
1126          * information to the trampoline in the following registers:
1127          *
1128          *      gp      new backing store or NULL
1129          *      r8      signal number
1130          *      r9      signal code or siginfo pointer
1131          *      r10     signal handler (function descriptor)
1132          */
1133         tf->tf_special.sp = (u_int64_t)sfp - 16;
1134         tf->tf_special.gp = sbs;
1135         tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore;
1136         tf->tf_special.ndirty = 0;
1137         tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat;
1138         tf->tf_scratch.gr8 = sig;
1139         tf->tf_scratch.gr9 = code;
1140         tf->tf_scratch.gr10 = (u_int64_t)catcher;
1141
1142         PROC_LOCK(p);
1143         mtx_lock(&psp->ps_mtx);
1144 }
1145
1146 /*
1147  * System call to cleanup state after a signal
1148  * has been taken.  Reset signal mask and
1149  * stack state from context left by sendsig (above).
1150  * Return to previous pc and psl as specified by
1151  * context left by sendsig. Check carefully to
1152  * make sure that the user has not modified the
1153  * state to gain improper privileges.
1154  *
1155  * MPSAFE
1156  */
1157 int
1158 sys_sigreturn(struct thread *td,
1159         struct sigreturn_args /* {
1160                 ucontext_t *sigcntxp;
1161         } */ *uap)
1162 {
1163         ucontext_t uc;
1164         struct trapframe *tf;
1165         struct pcb *pcb;
1166
1167         tf = td->td_frame;
1168         pcb = td->td_pcb;
1169
1170         /*
1171          * Fetch the entire context structure at once for speed.
1172          * We don't use a normal argument to simplify RSE handling.
1173          */
1174         if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc)))
1175                 return (EFAULT);
1176
1177         set_mcontext(td, &uc.uc_mcontext);
1178
1179 #if defined(COMPAT_43)
1180         if (sigonstack(tf->tf_special.sp))
1181                 td->td_sigstk.ss_flags |= SS_ONSTACK;
1182         else
1183                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1184 #endif
1185         kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
1186
1187         return (EJUSTRETURN);
1188 }
1189
1190 #ifdef COMPAT_FREEBSD4
1191 int
1192 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
1193 {
1194
1195         return sys_sigreturn(td, (struct sigreturn_args *)uap);
1196 }
1197 #endif
1198
1199 /*
1200  * Construct a PCB from a trapframe. This is called from kdb_trap() where
1201  * we want to start a backtrace from the function that caused us to enter
1202  * the debugger. We have the context in the trapframe, but base the trace
1203  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1204  * enough for a backtrace.
1205  */
1206 void
1207 makectx(struct trapframe *tf, struct pcb *pcb)
1208 {
1209
1210         pcb->pcb_special = tf->tf_special;
1211         pcb->pcb_special.__spare = ~0UL;        /* XXX see unwind.c */
1212         save_callee_saved(&pcb->pcb_preserved);
1213         save_callee_saved_fp(&pcb->pcb_preserved_fp);
1214 }
1215
1216 int
1217 ia64_flush_dirty(struct thread *td, struct _special *r)
1218 {
1219         struct iovec iov;
1220         struct uio uio;
1221         uint64_t bspst, kstk, rnat;
1222         int error, locked;
1223
1224         if (r->ndirty == 0)
1225                 return (0);
1226
1227         kstk = td->td_kstack + (r->bspstore & 0x1ffUL);
1228         if (td == curthread) {
1229                 __asm __volatile("mov   ar.rsc=0;;");
1230                 __asm __volatile("mov   %0=ar.bspstore" : "=r"(bspst));
1231                 /* Make sure we have all the user registers written out. */
1232                 if (bspst - kstk < r->ndirty) {
1233                         __asm __volatile("flushrs;;");
1234                         __asm __volatile("mov   %0=ar.bspstore" : "=r"(bspst));
1235                 }
1236                 __asm __volatile("mov   %0=ar.rnat;;" : "=r"(rnat));
1237                 __asm __volatile("mov   ar.rsc=3");
1238                 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty);
1239                 kstk += r->ndirty;
1240                 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL))
1241                     ? *(uint64_t*)(kstk | 0x1f8L) : rnat;
1242         } else {
1243                 locked = PROC_LOCKED(td->td_proc);
1244                 if (!locked)
1245                         PHOLD(td->td_proc);
1246                 iov.iov_base = (void*)(uintptr_t)kstk;
1247                 iov.iov_len = r->ndirty;
1248                 uio.uio_iov = &iov;
1249                 uio.uio_iovcnt = 1;
1250                 uio.uio_offset = r->bspstore;
1251                 uio.uio_resid = r->ndirty;
1252                 uio.uio_segflg = UIO_SYSSPACE;
1253                 uio.uio_rw = UIO_WRITE;
1254                 uio.uio_td = td;
1255                 error = proc_rwmem(td->td_proc, &uio);
1256                 /*
1257                  * XXX proc_rwmem() doesn't currently return ENOSPC,
1258                  * so I think it can bogusly return 0. Neither do
1259                  * we allow short writes.
1260                  */
1261                 if (uio.uio_resid != 0 && error == 0)
1262                         error = ENOSPC;
1263                 if (!locked)
1264                         PRELE(td->td_proc);
1265         }
1266
1267         r->bspstore += r->ndirty;
1268         r->ndirty = 0;
1269         return (error);
1270 }
1271
1272 int
1273 get_mcontext(struct thread *td, mcontext_t *mc, int flags)
1274 {
1275         struct trapframe *tf;
1276         int error;
1277
1278         tf = td->td_frame;
1279         bzero(mc, sizeof(*mc));
1280         mc->mc_special = tf->tf_special;
1281         error = ia64_flush_dirty(td, &mc->mc_special);
1282         if (tf->tf_flags & FRAME_SYSCALL) {
1283                 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT;
1284                 mc->mc_scratch = tf->tf_scratch;
1285                 if (flags & GET_MC_CLEAR_RET) {
1286                         mc->mc_scratch.gr8 = 0;
1287                         mc->mc_scratch.gr9 = 0;
1288                         mc->mc_scratch.gr10 = 0;
1289                         mc->mc_scratch.gr11 = 0;
1290                 }
1291         } else {
1292                 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT;
1293                 mc->mc_scratch = tf->tf_scratch;
1294                 mc->mc_scratch_fp = tf->tf_scratch_fp;
1295                 /*
1296                  * XXX If the thread never used the high FP registers, we
1297                  * probably shouldn't waste time saving them.
1298                  */
1299                 ia64_highfp_save(td);
1300                 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID;
1301                 mc->mc_high_fp = td->td_pcb->pcb_high_fp;
1302         }
1303         save_callee_saved(&mc->mc_preserved);
1304         save_callee_saved_fp(&mc->mc_preserved_fp);
1305         return (error);
1306 }
1307
1308 int
1309 set_mcontext(struct thread *td, const mcontext_t *mc)
1310 {
1311         struct _special s;
1312         struct trapframe *tf;
1313         uint64_t psrmask;
1314
1315         tf = td->td_frame;
1316
1317         KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1318             ("Whoa there! We have more than 8KB of dirty registers!"));
1319
1320         s = mc->mc_special;
1321         /*
1322          * Only copy the user mask and the restart instruction bit from
1323          * the new context.
1324          */
1325         psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL |
1326             IA64_PSR_MFH | IA64_PSR_RI;
1327         s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask);
1328         /* We don't have any dirty registers of the new context. */
1329         s.ndirty = 0;
1330         if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) {
1331                 /*
1332                  * We can get an async context passed to us while we
1333                  * entered the kernel through a syscall: sigreturn(2)
1334                  * takes contexts that could previously be the result of
1335                  * a trap or interrupt.
1336                  * Hence, we cannot assert that the trapframe is not
1337                  * a syscall frame, but we can assert that it's at
1338                  * least an expected syscall.
1339                  */
1340                 if (tf->tf_flags & FRAME_SYSCALL) {
1341                         KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo"));
1342                         tf->tf_flags &= ~FRAME_SYSCALL;
1343                 }
1344                 tf->tf_scratch = mc->mc_scratch;
1345                 tf->tf_scratch_fp = mc->mc_scratch_fp;
1346                 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID)
1347                         td->td_pcb->pcb_high_fp = mc->mc_high_fp;
1348         } else {
1349                 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo"));
1350                 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) {
1351                         s.cfm = tf->tf_special.cfm;
1352                         s.iip = tf->tf_special.iip;
1353                         tf->tf_scratch.gr15 = 0;        /* Clear syscall nr. */
1354                 } else
1355                         tf->tf_scratch = mc->mc_scratch;
1356         }
1357         tf->tf_special = s;
1358         restore_callee_saved(&mc->mc_preserved);
1359         restore_callee_saved_fp(&mc->mc_preserved_fp);
1360
1361         return (0);
1362 }
1363
1364 /*
1365  * Clear registers on exec.
1366  */
1367 void
1368 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1369 {
1370         struct trapframe *tf;
1371         uint64_t *ksttop, *kst;
1372
1373         tf = td->td_frame;
1374         ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty +
1375             (tf->tf_special.bspstore & 0x1ffUL));
1376
1377         /*
1378          * We can ignore up to 8KB of dirty registers by masking off the
1379          * lower 13 bits in exception_restore() or epc_syscall(). This
1380          * should be enough for a couple of years, but if there are more
1381          * than 8KB of dirty registers, we lose track of the bottom of
1382          * the kernel stack. The solution is to copy the active part of
1383          * the kernel stack down 1 page (or 2, but not more than that)
1384          * so that we always have less than 8KB of dirty registers.
1385          */
1386         KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1387             ("Whoa there! We have more than 8KB of dirty registers!"));
1388
1389         bzero(&tf->tf_special, sizeof(tf->tf_special));
1390         if ((tf->tf_flags & FRAME_SYSCALL) == 0) {      /* break syscalls. */
1391                 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
1392                 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
1393                 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
1394                 tf->tf_special.bspstore = IA64_BACKINGSTORE;
1395                 /*
1396                  * Copy the arguments onto the kernel register stack so that
1397                  * they get loaded by the loadrs instruction. Skip over the
1398                  * NaT collection points.
1399                  */
1400                 kst = ksttop - 1;
1401                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1402                         *kst-- = 0;
1403                 *kst-- = 0;
1404                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1405                         *kst-- = 0;
1406                 *kst-- = imgp->ps_strings;
1407                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1408                         *kst-- = 0;
1409                 *kst = stack;
1410                 tf->tf_special.ndirty = (ksttop - kst) << 3;
1411         } else {                                /* epc syscalls (default). */
1412                 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
1413                 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
1414                 /*
1415                  * Write values for out0, out1 and out2 to the user's backing
1416                  * store and arrange for them to be restored into the user's
1417                  * initial register frame.
1418                  * Assumes that (bspstore & 0x1f8) < 0x1e0.
1419                  */
1420                 suword((caddr_t)tf->tf_special.bspstore - 24, stack);
1421                 suword((caddr_t)tf->tf_special.bspstore - 16, imgp->ps_strings);
1422                 suword((caddr_t)tf->tf_special.bspstore -  8, 0);
1423         }
1424
1425         tf->tf_special.iip = imgp->entry_addr;
1426         tf->tf_special.sp = (stack & ~15) - 16;
1427         tf->tf_special.rsc = 0xf;
1428         tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
1429         tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
1430             IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
1431             IA64_PSR_CPL_USER;
1432 }
1433
1434 int
1435 ptrace_set_pc(struct thread *td, unsigned long addr)
1436 {
1437         uint64_t slot;
1438
1439         switch (addr & 0xFUL) {
1440         case 0:
1441                 slot = IA64_PSR_RI_0;
1442                 break;
1443         case 1:
1444                 /* XXX we need to deal with MLX bundles here */
1445                 slot = IA64_PSR_RI_1;
1446                 break;
1447         case 2:
1448                 slot = IA64_PSR_RI_2;
1449                 break;
1450         default:
1451                 return (EINVAL);
1452         }
1453
1454         td->td_frame->tf_special.iip = addr & ~0x0FULL;
1455         td->td_frame->tf_special.psr =
1456             (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot;
1457         return (0);
1458 }
1459
1460 int
1461 ptrace_single_step(struct thread *td)
1462 {
1463         struct trapframe *tf;
1464
1465         /*
1466          * There's no way to set single stepping when we're leaving the
1467          * kernel through the EPC syscall path. The way we solve this is
1468          * by enabling the lower-privilege trap so that we re-enter the
1469          * kernel as soon as the privilege level changes. See trap.c for
1470          * how we proceed from there.
1471          */
1472         tf = td->td_frame;
1473         if (tf->tf_flags & FRAME_SYSCALL)
1474                 tf->tf_special.psr |= IA64_PSR_LP;
1475         else
1476                 tf->tf_special.psr |= IA64_PSR_SS;
1477         return (0);
1478 }
1479
1480 int
1481 ptrace_clear_single_step(struct thread *td)
1482 {
1483         struct trapframe *tf;
1484
1485         /*
1486          * Clear any and all status bits we may use to implement single
1487          * stepping.
1488          */
1489         tf = td->td_frame;
1490         tf->tf_special.psr &= ~IA64_PSR_SS;
1491         tf->tf_special.psr &= ~IA64_PSR_LP;
1492         tf->tf_special.psr &= ~IA64_PSR_TB;
1493         return (0);
1494 }
1495
1496 int
1497 fill_regs(struct thread *td, struct reg *regs)
1498 {
1499         struct trapframe *tf;
1500
1501         tf = td->td_frame;
1502         regs->r_special = tf->tf_special;
1503         regs->r_scratch = tf->tf_scratch;
1504         save_callee_saved(&regs->r_preserved);
1505         return (0);
1506 }
1507
1508 int
1509 set_regs(struct thread *td, struct reg *regs)
1510 {
1511         struct trapframe *tf;
1512         int error;
1513
1514         tf = td->td_frame;
1515         error = ia64_flush_dirty(td, &tf->tf_special);
1516         if (!error) {
1517                 tf->tf_special = regs->r_special;
1518                 tf->tf_special.bspstore += tf->tf_special.ndirty;
1519                 tf->tf_special.ndirty = 0;
1520                 tf->tf_scratch = regs->r_scratch;
1521                 restore_callee_saved(&regs->r_preserved);
1522         }
1523         return (error);
1524 }
1525
1526 int
1527 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1528 {
1529
1530         return (ENOSYS);
1531 }
1532
1533 int
1534 set_dbregs(struct thread *td, struct dbreg *dbregs)
1535 {
1536
1537         return (ENOSYS);
1538 }
1539
1540 int
1541 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1542 {
1543         struct trapframe *frame = td->td_frame;
1544         struct pcb *pcb = td->td_pcb;
1545
1546         /* Save the high FP registers. */
1547         ia64_highfp_save(td);
1548
1549         fpregs->fpr_scratch = frame->tf_scratch_fp;
1550         save_callee_saved_fp(&fpregs->fpr_preserved);
1551         fpregs->fpr_high = pcb->pcb_high_fp;
1552         return (0);
1553 }
1554
1555 int
1556 set_fpregs(struct thread *td, struct fpreg *fpregs)
1557 {
1558         struct trapframe *frame = td->td_frame;
1559         struct pcb *pcb = td->td_pcb;
1560
1561         /* Throw away the high FP registers (should be redundant). */
1562         ia64_highfp_drop(td);
1563
1564         frame->tf_scratch_fp = fpregs->fpr_scratch;
1565         restore_callee_saved_fp(&fpregs->fpr_preserved);
1566         pcb->pcb_high_fp = fpregs->fpr_high;
1567         return (0);
1568 }
1569
1570 void
1571 ia64_sync_icache(vm_offset_t va, vm_offset_t sz)
1572 {
1573         vm_offset_t lim;
1574
1575         if (!ia64_sync_icache_needed)
1576                 return;
1577
1578         lim = va + sz;
1579         while (va < lim) {
1580                 ia64_fc_i(va);
1581                 va += 32;       /* XXX */
1582         }
1583
1584         ia64_sync_i();
1585         ia64_srlz_i();
1586 }