2 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * Copyright (C) 2001 Benno Rice
27 * All rights reserved.
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
32 * 1. Redistributions of source code must retain the above copyright
33 * notice, this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright
35 * notice, this list of conditions and the following disclaimer in the
36 * documentation and/or other materials provided with the distribution.
38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
51 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
52 * Copyright (C) 1995, 1996 TooLs GmbH.
53 * All rights reserved.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
63 * 3. All advertising materials mentioning features or use of this software
64 * must display the following acknowledgement:
65 * This product includes software developed by TooLs GmbH.
66 * 4. The name of TooLs GmbH may not be used to endorse or promote products
67 * derived from this software without specific prior written permission.
69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81 #include <sys/cdefs.h>
82 __FBSDID("$FreeBSD$");
84 #include "opt_compat.h"
86 #include "opt_kstack_pages.h"
87 #include "opt_platform.h"
89 #include <sys/cdefs.h>
90 #include <sys/types.h>
91 #include <sys/param.h>
93 #include <sys/systm.h>
101 #include <sys/kernel.h>
102 #include <sys/lock.h>
103 #include <sys/mutex.h>
104 #include <sys/sysctl.h>
105 #include <sys/exec.h>
107 #include <sys/syscallsubr.h>
108 #include <sys/sysproto.h>
109 #include <sys/signalvar.h>
110 #include <sys/sysent.h>
111 #include <sys/imgact.h>
112 #include <sys/msgbuf.h>
113 #include <sys/ptrace.h>
117 #include <vm/vm_page.h>
118 #include <vm/vm_object.h>
119 #include <vm/vm_pager.h>
121 #include <machine/cpu.h>
122 #include <machine/kdb.h>
123 #include <machine/reg.h>
124 #include <machine/vmparam.h>
125 #include <machine/spr.h>
126 #include <machine/hid.h>
127 #include <machine/psl.h>
128 #include <machine/trap.h>
129 #include <machine/md_var.h>
130 #include <machine/mmuvar.h>
131 #include <machine/sigframe.h>
132 #include <machine/metadata.h>
133 #include <machine/platform.h>
135 #include <sys/linker.h>
136 #include <sys/reboot.h>
138 #include <dev/fdt/fdt_common.h>
139 #include <dev/ofw/openfirm.h>
141 #include <powerpc/mpc85xx/mpc85xx.h>
144 extern vm_offset_t ksym_start, ksym_end;
148 #define debugf(fmt, args...) printf(fmt, ##args)
150 #define debugf(fmt, args...)
153 extern unsigned char kernel_text[];
154 extern unsigned char _etext[];
155 extern unsigned char _edata[];
156 extern unsigned char __bss_start[];
157 extern unsigned char __sbss_start[];
158 extern unsigned char __sbss_end[];
159 extern unsigned char _end[];
161 extern void dcache_enable(void);
162 extern void dcache_inval(void);
163 extern void icache_enable(void);
164 extern void icache_inval(void);
167 * Bootinfo is passed to us by legacy loaders. Save the address of the
168 * structure to handle backward compatibility.
172 struct kva_md_info kmi;
173 struct pcpu __pcpu[MAXCPU];
174 struct trapframe frame0;
178 char machine[] = "powerpc";
179 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
181 int cacheline_size = 32;
183 SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
184 CTLFLAG_RD, &cacheline_size, 0, "");
186 int hw_direct_map = 0;
188 static void cpu_e500_startup(void *);
189 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL);
191 void print_kernel_section_addr(void);
192 void print_kenv(void);
193 u_int booke_init(uint32_t, uint32_t);
196 cpu_e500_startup(void *dummy)
200 /* Initialise the decrementer-based clock. */
203 /* Good {morning,afternoon,evening,night}. */
204 cpu_setup(PCPU_GET(cpuid));
206 printf("real memory = %ld (%ld MB)\n", ptoa(physmem),
207 ptoa(physmem) / 1048576);
210 /* Display any holes after the first chunk of extended memory. */
212 printf("Physical memory chunk(s):\n");
213 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
214 size = phys_avail[indx + 1] - phys_avail[indx];
216 printf("0x%08x - 0x%08x, %d bytes (%ld pages)\n",
217 phys_avail[indx], phys_avail[indx + 1] - 1,
218 size, size / PAGE_SIZE);
222 vm_ksubmap_init(&kmi);
224 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
225 ptoa(cnt.v_free_count) / 1048576);
227 /* Set up buffers, so they can be used to read disk labels. */
229 vm_pager_bufferinit();
252 debugf("loader passed (static) kenv:\n");
253 if (kern_envp == NULL) {
254 debugf(" no env, null ptr\n");
257 debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp);
260 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
261 debugf(" %x %s\n", (u_int32_t)cp, cp);
265 print_kernel_section_addr(void)
268 debugf("kernel image addresses:\n");
269 debugf(" kernel_text = 0x%08x\n", (uint32_t)kernel_text);
270 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
271 debugf(" _edata = 0x%08x\n", (uint32_t)_edata);
272 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__sbss_start);
273 debugf(" __sbss_end = 0x%08x\n", (uint32_t)__sbss_end);
274 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__bss_start);
275 debugf(" _end = 0x%08x\n", (uint32_t)_end);
279 booke_init(uint32_t arg1, uint32_t arg2)
283 vm_offset_t dtbp, end;
288 end = (uintptr_t)_end;
289 dtbp = (vm_offset_t)NULL;
292 * Handle the various ways we can get loaded and started:
293 * - FreeBSD's loader passes the pointer to the metadata
294 * in arg1, with arg2 undefined. arg1 has a value that's
295 * relative to the kernel's link address (i.e. larger
297 * - Juniper's loader passes the metadata pointer in arg2
298 * and sets arg1 to zero. This is to signal that the
299 * loader maps the kernel and starts it at its link
300 * address (unlike the FreeBSD loader).
301 * - U-Boot passes the standard argc and argv parameters
302 * in arg1 and arg2 (resp). arg1 is between 1 and some
303 * relatively small number, such as 64K. arg2 is the
304 * physical address of the argv vector.
306 if (arg1 > (uintptr_t)kernel_text) /* FreeBSD loader */
308 else if (arg1 == 0) /* Juniper loader */
314 * Parse metadata and fetch parameters.
317 preload_metadata = mdp;
318 kmdp = preload_search_by_type("elf kernel");
320 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
321 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
322 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
323 end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
325 bootinfo = (uint32_t *)preload_search_info(kmdp,
326 MODINFO_METADATA | MODINFOMD_BOOTINFO);
329 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
330 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
334 bzero(__sbss_start, __sbss_end - __sbss_start);
335 bzero(__bss_start, _end - __bss_start);
338 #if defined(FDT_DTB_STATIC)
340 * In case the device tree blob was not retrieved (from metadata) try
341 * to use the statically embedded one.
343 if (dtbp == (vm_offset_t)NULL)
344 dtbp = (vm_offset_t)&fdt_static_dtb;
347 if (OF_install(OFW_FDT, 0) == FALSE)
350 if (OF_init((void *)dtbp) != 0)
353 if (fdt_immr_addr(CCSRBAR_VA) != 0)
356 OF_interpret("perform-fixup", 0);
358 /* Initialize TLB1 handling */
359 tlb1_init(fdt_immr_pa);
361 /* Reset Time Base */
364 /* Init params/tunables that can be overridden by the loader. */
367 /* Start initializing proc0 and thread0. */
368 proc_linkup0(&proc0, &thread0);
369 thread0.td_frame = &frame0;
371 /* Set up per-cpu data and store the pointer in SPR general 0. */
373 pcpu_init(pc, 0, sizeof(struct pcpu));
374 pc->pc_curthread = &thread0;
375 __asm __volatile("mtsprg 0, %0" :: "r"(pc));
377 /* Initialize system mutexes. */
380 /* Initialize the console before printing anything. */
383 /* Print out some debug info... */
384 debugf("%s: console initialized\n", __func__);
385 debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp);
386 debugf(" end = 0x%08x\n", (u_int32_t)end);
387 debugf(" boothowto = 0x%08x\n", boothowto);
388 debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA);
389 debugf(" MSR = 0x%08x\n", mfmsr());
390 debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0));
391 debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1));
392 debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR));
394 __asm __volatile("msync; isync");
395 csr = ccsr_read4(OCP85XX_L2CTL);
396 debugf(" L2CTL = 0x%08x\n", csr);
398 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
400 print_kernel_section_addr();
402 //tlb1_print_entries();
403 //tlb1_print_tlbentries();
408 if (boothowto & RB_KDB)
409 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
412 /* Initialise platform module */
413 platform_probe_and_attach();
415 /* Initialise virtual memory. */
416 pmap_mmu_install(MMU_TYPE_BOOKE, 0);
417 pmap_bootstrap((uintptr_t)kernel_text, end);
418 debugf("MSR = 0x%08x\n", mfmsr());
419 //tlb1_print_entries();
420 //tlb1_print_tlbentries();
422 /* Initialize params/tunables that are derived from memsize. */
423 init_param2(physmem);
425 /* Finish setting up thread0. */
426 thread0.td_pcb = (struct pcb *)
427 ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
428 sizeof(struct pcb)) & ~15);
429 bzero((void *)thread0.td_pcb, sizeof(struct pcb));
430 pc->pc_curpcb = thread0.td_pcb;
432 /* Initialise the message buffer. */
433 msgbufinit(msgbufp, msgbufsize);
435 /* Enable Machine Check interrupt. */
436 mtmsr(mfmsr() | PSL_ME);
439 /* Enable D-cache if applicable */
440 csr = mfspr(SPR_L1CSR0);
441 if ((csr & L1CSR0_DCE) == 0) {
446 csr = mfspr(SPR_L1CSR0);
447 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
448 printf("L1 D-cache %sabled\n",
449 (csr & L1CSR0_DCE) ? "en" : "dis");
451 /* Enable L1 I-cache if applicable. */
452 csr = mfspr(SPR_L1CSR1);
453 if ((csr & L1CSR1_ICE) == 0) {
458 csr = mfspr(SPR_L1CSR1);
459 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
460 printf("L1 I-cache %sabled\n",
461 (csr & L1CSR1_ICE) ? "en" : "dis");
463 debugf("%s: SP = 0x%08x\n", __func__,
464 ((uintptr_t)thread0.td_pcb - 16) & ~15);
466 return (((uintptr_t)thread0.td_pcb - 16) & ~15);
469 #define RES_GRANULE 32
470 extern uint32_t tlb0_miss_locks[];
472 /* Initialise a struct pcpu. */
474 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
477 pcpu->pc_tid_next = TID_MIN;
481 int words_per_gran = RES_GRANULE / sizeof(uint32_t);
483 ptr = &tlb0_miss_locks[cpuid * words_per_gran];
484 pcpu->pc_booke_tlb_lock = ptr;
486 *(ptr + 1) = 0; /* recurse counter */
491 * Flush the D-cache for non-DMA I/O so that the I-cache can
492 * be made coherent later.
495 cpu_flush_dcache(void *ptr, size_t len)
507 if (td->td_md.md_spinlock_count == 0) {
508 msr = intr_disable();
509 td->td_md.md_spinlock_count = 1;
510 td->td_md.md_saved_msr = msr;
512 td->td_md.md_spinlock_count++;
524 msr = td->td_md.md_saved_msr;
525 td->td_md.md_spinlock_count--;
526 if (td->td_md.md_spinlock_count == 0)
530 /* Shutdown the CPU as much as possible. */
535 mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
540 ptrace_set_pc(struct thread *td, unsigned long addr)
542 struct trapframe *tf;
545 tf->srr0 = (register_t)addr;
551 ptrace_single_step(struct thread *td)
553 struct trapframe *tf;
557 tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
562 ptrace_clear_single_step(struct thread *td)
564 struct trapframe *tf;
568 tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
573 kdb_cpu_clear_singlestep(void)
577 r = mfspr(SPR_DBCR0);
578 mtspr(SPR_DBCR0, r & ~DBCR0_IC);
579 kdb_frame->srr1 &= ~PSL_DE;
583 kdb_cpu_set_singlestep(void)
587 r = mfspr(SPR_DBCR0);
588 mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
589 kdb_frame->srr1 |= PSL_DE;
593 bzero(void *buf, size_t len)
599 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
604 while (len >= sizeof(u_long) * 8) {
606 *((u_long*) p + 1) = 0;
607 *((u_long*) p + 2) = 0;
608 *((u_long*) p + 3) = 0;
609 len -= sizeof(u_long) * 8;
610 *((u_long*) p + 4) = 0;
611 *((u_long*) p + 5) = 0;
612 *((u_long*) p + 6) = 0;
613 *((u_long*) p + 7) = 0;
614 p += sizeof(u_long) * 8;
617 while (len >= sizeof(u_long)) {
619 len -= sizeof(u_long);