1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 // This pass provides an optional shrink wrapping variant of prolog/epilog
18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
20 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "pei"
23 #include "PrologEpilogInserter.h"
24 #include "llvm/ADT/IndexedMap.h"
25 #include "llvm/ADT/STLExtras.h"
26 #include "llvm/ADT/SmallSet.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/CodeGen/MachineDominators.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/CodeGen/MachineLoopInfo.h"
32 #include "llvm/CodeGen/MachineModuleInfo.h"
33 #include "llvm/CodeGen/MachineRegisterInfo.h"
34 #include "llvm/CodeGen/RegisterScavenging.h"
35 #include "llvm/IR/InlineAsm.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/Compiler.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Target/TargetFrameLowering.h"
40 #include "llvm/Target/TargetInstrInfo.h"
41 #include "llvm/Target/TargetMachine.h"
42 #include "llvm/Target/TargetRegisterInfo.h"
48 char &llvm::PrologEpilogCodeInserterID = PEI::ID;
50 INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
51 "Prologue/Epilogue Insertion", false, false)
52 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
53 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
54 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
55 INITIALIZE_PASS_END(PEI, "prologepilog",
56 "Prologue/Epilogue Insertion & Frame Finalization",
59 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
60 STATISTIC(NumBytesStackSpace,
61 "Number of bytes used for stack in all functions");
63 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
64 /// frame indexes with appropriate references.
66 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
67 const Function* F = Fn.getFunction();
68 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
69 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
71 assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
73 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
74 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
76 // Calculate the MaxCallFrameSize and AdjustsStack variables for the
77 // function's frame information. Also eliminates call frame pseudo
79 calculateCallsInformation(Fn);
81 // Allow the target machine to make some adjustments to the function
82 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
83 TFI->processFunctionBeforeCalleeSavedScan(Fn, RS);
85 // Scan the function for modified callee saved registers and insert spill code
86 // for any callee saved registers that are modified.
87 calculateCalleeSavedRegisters(Fn);
89 // Determine placement of CSR spill/restore code:
90 // - With shrink wrapping, place spills and restores to tightly
91 // enclose regions in the Machine CFG of the function where
93 // - Without shink wrapping (default), place all spills in the
94 // entry block, all restores in return blocks.
95 placeCSRSpillsAndRestores(Fn);
97 // Add the code to save and restore the callee saved registers
98 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
100 insertCSRSpillsAndRestores(Fn);
102 // Allow the target machine to make final modifications to the function
103 // before the frame layout is finalized.
104 TFI->processFunctionBeforeFrameFinalized(Fn, RS);
106 // Calculate actual frame offsets for all abstract stack objects...
107 calculateFrameObjectOffsets(Fn);
109 // Add prolog and epilog code to the function. This function is required
110 // to align the stack frame as necessary for any stack variables or
111 // called functions. Because of this, calculateCalleeSavedRegisters()
112 // must be called before this function in order to set the AdjustsStack
113 // and MaxCallFrameSize variables.
114 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
116 insertPrologEpilogCode(Fn);
118 // Replace all MO_FrameIndex operands with physical register references
119 // and actual offsets.
121 replaceFrameIndices(Fn);
123 // If register scavenging is needed, as we've enabled doing it as a
124 // post-pass, scavenge the virtual registers that frame index elimiation
126 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
127 scavengeFrameVirtualRegs(Fn);
129 // Clear any vregs created by virtual scavenging.
130 Fn.getRegInfo().clearVirtRegs();
137 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
138 /// variables for the function's frame information and eliminate call frame
139 /// pseudo instructions.
140 void PEI::calculateCallsInformation(MachineFunction &Fn) {
141 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
142 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
143 MachineFrameInfo *MFI = Fn.getFrameInfo();
145 unsigned MaxCallFrameSize = 0;
146 bool AdjustsStack = MFI->adjustsStack();
148 // Get the function call frame set-up and tear-down instruction opcode
149 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
150 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
152 // Early exit for targets which have no call frame setup/destroy pseudo
154 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
157 std::vector<MachineBasicBlock::iterator> FrameSDOps;
158 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
159 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
160 if (I->getOpcode() == FrameSetupOpcode ||
161 I->getOpcode() == FrameDestroyOpcode) {
162 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
163 " instructions should have a single immediate argument!");
164 unsigned Size = I->getOperand(0).getImm();
165 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
167 FrameSDOps.push_back(I);
168 } else if (I->isInlineAsm()) {
169 // Some inline asm's need a stack frame, as indicated by operand 1.
170 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
171 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
175 MFI->setAdjustsStack(AdjustsStack);
176 MFI->setMaxCallFrameSize(MaxCallFrameSize);
178 for (std::vector<MachineBasicBlock::iterator>::iterator
179 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
180 MachineBasicBlock::iterator I = *i;
182 // If call frames are not being included as part of the stack frame, and
183 // the target doesn't indicate otherwise, remove the call frame pseudos
184 // here. The sub/add sp instruction pairs are still inserted, but we don't
185 // need to track the SP adjustment for frame index elimination.
186 if (TFI->canSimplifyCallFramePseudos(Fn))
187 TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
192 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved
194 void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
195 const TargetRegisterInfo *RegInfo = F.getTarget().getRegisterInfo();
196 const TargetFrameLowering *TFI = F.getTarget().getFrameLowering();
197 MachineFrameInfo *MFI = F.getFrameInfo();
199 // Get the callee saved register list...
200 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&F);
202 // These are used to keep track the callee-save area. Initialize them.
203 MinCSFrameIndex = INT_MAX;
206 // Early exit for targets which have no callee saved registers.
207 if (CSRegs == 0 || CSRegs[0] == 0)
210 // In Naked functions we aren't going to save any registers.
211 if (F.getFunction()->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
215 std::vector<CalleeSavedInfo> CSI;
216 for (unsigned i = 0; CSRegs[i]; ++i) {
217 unsigned Reg = CSRegs[i];
218 // Functions which call __builtin_unwind_init get all their registers saved.
219 if (F.getRegInfo().isPhysRegUsed(Reg) || F.getMMI().callsUnwindInit()) {
220 // If the reg is modified, save it!
221 CSI.push_back(CalleeSavedInfo(Reg));
226 return; // Early exit if no callee saved registers are modified!
228 unsigned NumFixedSpillSlots;
229 const TargetFrameLowering::SpillSlot *FixedSpillSlots =
230 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
232 // Now that we know which registers need to be saved and restored, allocate
233 // stack slots for them.
234 for (std::vector<CalleeSavedInfo>::iterator
235 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
236 unsigned Reg = I->getReg();
237 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
240 if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
241 I->setFrameIdx(FrameIdx);
245 // Check to see if this physreg must be spilled to a particular stack slot
247 const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
248 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
249 FixedSlot->Reg != Reg)
252 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
253 // Nope, just spill it anywhere convenient.
254 unsigned Align = RC->getAlignment();
255 unsigned StackAlign = TFI->getStackAlignment();
257 // We may not be able to satisfy the desired alignment specification of
258 // the TargetRegisterClass if the stack alignment is smaller. Use the
260 Align = std::min(Align, StackAlign);
261 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
262 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
263 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
265 // Spill it to the stack where we must.
266 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true);
269 I->setFrameIdx(FrameIdx);
272 MFI->setCalleeSavedInfo(CSI);
275 /// insertCSRSpillsAndRestores - Insert spill and restore code for
276 /// callee saved registers used in the function, handling shrink wrapping.
278 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
279 // Get callee saved register information.
280 MachineFrameInfo *MFI = Fn.getFrameInfo();
281 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
283 MFI->setCalleeSavedInfoValid(true);
285 // Early exit if no callee saved registers are modified!
289 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
290 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
291 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
292 MachineBasicBlock::iterator I;
294 if (!ShrinkWrapThisFunction) {
295 // Spill using target interface.
296 I = EntryBlock->begin();
297 if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
298 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
299 // Add the callee-saved register as live-in.
300 // It's killed at the spill.
301 EntryBlock->addLiveIn(CSI[i].getReg());
303 // Insert the spill to the stack frame.
304 unsigned Reg = CSI[i].getReg();
305 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
306 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
307 CSI[i].getFrameIdx(), RC, TRI);
311 // Restore using target interface.
312 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
313 MachineBasicBlock* MBB = ReturnBlocks[ri];
316 // Skip over all terminator instructions, which are part of the return
318 MachineBasicBlock::iterator I2 = I;
319 while (I2 != MBB->begin() && (--I2)->isTerminator())
322 bool AtStart = I == MBB->begin();
323 MachineBasicBlock::iterator BeforeI = I;
327 // Restore all registers immediately before the return and any
328 // terminators that precede it.
329 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
330 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
331 unsigned Reg = CSI[i].getReg();
332 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
333 TII.loadRegFromStackSlot(*MBB, I, Reg,
334 CSI[i].getFrameIdx(),
336 assert(I != MBB->begin() &&
337 "loadRegFromStackSlot didn't insert any code!");
338 // Insert in reverse order. loadRegFromStackSlot can insert
339 // multiple instructions.
353 std::vector<CalleeSavedInfo> blockCSI;
354 for (CSRegBlockMap::iterator BI = CSRSave.begin(),
355 BE = CSRSave.end(); BI != BE; ++BI) {
356 MachineBasicBlock* MBB = BI->first;
357 CSRegSet save = BI->second;
363 for (CSRegSet::iterator RI = save.begin(),
364 RE = save.end(); RI != RE; ++RI) {
365 blockCSI.push_back(CSI[*RI]);
367 assert(blockCSI.size() > 0 &&
368 "Could not collect callee saved register info");
372 // When shrink wrapping, use stack slot stores/loads.
373 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
374 // Add the callee-saved register as live-in.
375 // It's killed at the spill.
376 MBB->addLiveIn(blockCSI[i].getReg());
378 // Insert the spill to the stack frame.
379 unsigned Reg = blockCSI[i].getReg();
380 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
381 TII.storeRegToStackSlot(*MBB, I, Reg,
383 blockCSI[i].getFrameIdx(),
388 for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
389 BE = CSRRestore.end(); BI != BE; ++BI) {
390 MachineBasicBlock* MBB = BI->first;
391 CSRegSet restore = BI->second;
397 for (CSRegSet::iterator RI = restore.begin(),
398 RE = restore.end(); RI != RE; ++RI) {
399 blockCSI.push_back(CSI[*RI]);
401 assert(blockCSI.size() > 0 &&
402 "Could not find callee saved register info");
404 // If MBB is empty and needs restores, insert at the _beginning_.
411 // Skip over all terminator instructions, which are part of the
413 if (! I->isTerminator()) {
416 MachineBasicBlock::iterator I2 = I;
417 while (I2 != MBB->begin() && (--I2)->isTerminator())
422 bool AtStart = I == MBB->begin();
423 MachineBasicBlock::iterator BeforeI = I;
427 // Restore all registers immediately before the return and any
428 // terminators that precede it.
429 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
430 unsigned Reg = blockCSI[i].getReg();
431 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
432 TII.loadRegFromStackSlot(*MBB, I, Reg,
433 blockCSI[i].getFrameIdx(),
435 assert(I != MBB->begin() &&
436 "loadRegFromStackSlot didn't insert any code!");
437 // Insert in reverse order. loadRegFromStackSlot can insert
438 // multiple instructions.
449 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
451 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
452 bool StackGrowsDown, int64_t &Offset,
453 unsigned &MaxAlign) {
454 // If the stack grows down, add the object size to find the lowest address.
456 Offset += MFI->getObjectSize(FrameIdx);
458 unsigned Align = MFI->getObjectAlignment(FrameIdx);
460 // If the alignment of this object is greater than that of the stack, then
461 // increase the stack alignment to match.
462 MaxAlign = std::max(MaxAlign, Align);
464 // Adjust to alignment boundary.
465 Offset = (Offset + Align - 1) / Align * Align;
467 if (StackGrowsDown) {
468 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
469 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
471 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
472 MFI->setObjectOffset(FrameIdx, Offset);
473 Offset += MFI->getObjectSize(FrameIdx);
477 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
478 /// abstract stack objects.
480 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
481 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
483 bool StackGrowsDown =
484 TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
486 // Loop over all of the stack objects, assigning sequential addresses...
487 MachineFrameInfo *MFI = Fn.getFrameInfo();
489 // Start at the beginning of the local area.
490 // The Offset is the distance from the stack top in the direction
491 // of stack growth -- so it's always nonnegative.
492 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
494 LocalAreaOffset = -LocalAreaOffset;
495 assert(LocalAreaOffset >= 0
496 && "Local area offset should be in direction of stack growth");
497 int64_t Offset = LocalAreaOffset;
499 // If there are fixed sized objects that are preallocated in the local area,
500 // non-fixed objects can't be allocated right at the start of local area.
501 // We currently don't support filling in holes in between fixed sized
502 // objects, so we adjust 'Offset' to point to the end of last fixed sized
503 // preallocated object.
504 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
506 if (StackGrowsDown) {
507 // The maximum distance from the stack pointer is at lower address of
508 // the object -- which is given by offset. For down growing stack
509 // the offset is negative, so we negate the offset to get the distance.
510 FixedOff = -MFI->getObjectOffset(i);
512 // The maximum distance from the start pointer is at the upper
513 // address of the object.
514 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
516 if (FixedOff > Offset) Offset = FixedOff;
519 // First assign frame offsets to stack objects that are used to spill
520 // callee saved registers.
521 if (StackGrowsDown) {
522 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
523 // If the stack grows down, we need to add the size to find the lowest
524 // address of the object.
525 Offset += MFI->getObjectSize(i);
527 unsigned Align = MFI->getObjectAlignment(i);
528 // Adjust to alignment boundary
529 Offset = (Offset+Align-1)/Align*Align;
531 MFI->setObjectOffset(i, -Offset); // Set the computed offset
534 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
535 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
536 unsigned Align = MFI->getObjectAlignment(i);
537 // Adjust to alignment boundary
538 Offset = (Offset+Align-1)/Align*Align;
540 MFI->setObjectOffset(i, Offset);
541 Offset += MFI->getObjectSize(i);
545 unsigned MaxAlign = MFI->getMaxAlignment();
547 // Make sure the special register scavenging spill slot is closest to the
548 // frame pointer if a frame pointer is required.
549 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
550 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) &&
551 !RegInfo->needsStackRealignment(Fn)) {
552 SmallVector<int, 2> SFIs;
553 RS->getScavengingFrameIndices(SFIs);
554 for (SmallVector<int, 2>::iterator I = SFIs.begin(),
555 IE = SFIs.end(); I != IE; ++I)
556 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
559 // FIXME: Once this is working, then enable flag will change to a target
560 // check for whether the frame is large enough to want to use virtual
561 // frame index registers. Functions which don't want/need this optimization
562 // will continue to use the existing code path.
563 if (MFI->getUseLocalStackAllocationBlock()) {
564 unsigned Align = MFI->getLocalFrameMaxAlign();
566 // Adjust to alignment boundary.
567 Offset = (Offset + Align - 1) / Align * Align;
569 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
571 // Resolve offsets for objects in the local block.
572 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
573 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
574 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
575 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
577 MFI->setObjectOffset(Entry.first, FIOffset);
579 // Allocate the local block
580 Offset += MFI->getLocalFrameSize();
582 MaxAlign = std::max(Align, MaxAlign);
585 // Make sure that the stack protector comes before the local variables on the
587 SmallSet<int, 16> LargeStackObjs;
588 if (MFI->getStackProtectorIndex() >= 0) {
589 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
592 // Assign large stack objects first.
593 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
594 if (MFI->isObjectPreAllocated(i) &&
595 MFI->getUseLocalStackAllocationBlock())
597 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
599 if (RS && RS->isScavengingFrameIndex((int)i))
601 if (MFI->isDeadObjectIndex(i))
603 if (MFI->getStackProtectorIndex() == (int)i)
605 if (!MFI->MayNeedStackProtector(i))
608 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
609 LargeStackObjs.insert(i);
613 // Then assign frame offsets to stack objects that are not used to spill
614 // callee saved registers.
615 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
616 if (MFI->isObjectPreAllocated(i) &&
617 MFI->getUseLocalStackAllocationBlock())
619 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
621 if (RS && RS->isScavengingFrameIndex((int)i))
623 if (MFI->isDeadObjectIndex(i))
625 if (MFI->getStackProtectorIndex() == (int)i)
627 if (LargeStackObjs.count(i))
630 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
633 // Make sure the special register scavenging spill slot is closest to the
635 if (RS && (!TFI.hasFP(Fn) || RegInfo->needsStackRealignment(Fn) ||
636 !RegInfo->useFPForScavengingIndex(Fn))) {
637 SmallVector<int, 2> SFIs;
638 RS->getScavengingFrameIndices(SFIs);
639 for (SmallVector<int, 2>::iterator I = SFIs.begin(),
640 IE = SFIs.end(); I != IE; ++I)
641 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
644 if (!TFI.targetHandlesStackFrameRounding()) {
645 // If we have reserved argument space for call sites in the function
646 // immediately on entry to the current function, count it as part of the
647 // overall stack size.
648 if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
649 Offset += MFI->getMaxCallFrameSize();
651 // Round up the size to a multiple of the alignment. If the function has
652 // any calls or alloca's, align to the target's StackAlignment value to
653 // ensure that the callee's frame or the alloca data is suitably aligned;
654 // otherwise, for leaf functions, align to the TransientStackAlignment
657 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
658 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
659 StackAlign = TFI.getStackAlignment();
661 StackAlign = TFI.getTransientStackAlignment();
663 // If the frame pointer is eliminated, all frame offsets will be relative to
664 // SP not FP. Align to MaxAlign so this works.
665 StackAlign = std::max(StackAlign, MaxAlign);
666 unsigned AlignMask = StackAlign - 1;
667 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
670 // Update frame info to pretend that this is part of the stack...
671 int64_t StackSize = Offset - LocalAreaOffset;
672 MFI->setStackSize(StackSize);
673 NumBytesStackSpace += StackSize;
676 /// insertPrologEpilogCode - Scan the function for modified callee saved
677 /// registers, insert spill code for these callee saved registers, then add
678 /// prolog and epilog code to the function.
680 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
681 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
683 // Add prologue to the function...
684 TFI.emitPrologue(Fn);
686 // Add epilogue to restore the callee-save registers in each exiting block
687 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
688 // If last instruction is a return instruction, add an epilogue
689 if (!I->empty() && I->back().isReturn())
690 TFI.emitEpilogue(Fn, *I);
693 // Emit additional code that is required to support segmented stacks, if
694 // we've been asked for it. This, when linked with a runtime with support
695 // for segmented stacks (libgcc is one), will result in allocating stack
696 // space in small chunks instead of one large contiguous block.
697 if (Fn.getTarget().Options.EnableSegmentedStacks)
698 TFI.adjustForSegmentedStacks(Fn);
700 // Emit additional code that is required to explicitly handle the stack in
701 // HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
702 // approach is rather similar to that of Segmented Stacks, but it uses a
703 // different conditional check and another BIF for allocating more stack
705 if (Fn.getFunction()->getCallingConv() == CallingConv::HiPE)
706 TFI.adjustForHiPEPrologue(Fn);
709 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
710 /// register references and actual offsets.
712 void PEI::replaceFrameIndices(MachineFunction &Fn) {
713 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
715 const TargetMachine &TM = Fn.getTarget();
716 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
717 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
718 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
719 const TargetFrameLowering *TFI = TM.getFrameLowering();
720 bool StackGrowsDown =
721 TFI->getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
722 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
723 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
725 for (MachineFunction::iterator BB = Fn.begin(),
726 E = Fn.end(); BB != E; ++BB) {
728 int SPAdjCount = 0; // frame setup / destroy count.
730 int SPAdj = 0; // SP offset due to call frame setup / destroy.
731 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
733 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
735 if (I->getOpcode() == FrameSetupOpcode ||
736 I->getOpcode() == FrameDestroyOpcode) {
738 // Track whether we see even pairs of them
739 SPAdjCount += I->getOpcode() == FrameSetupOpcode ? 1 : -1;
741 // Remember how much SP has been adjusted to create the call
743 int Size = I->getOperand(0).getImm();
745 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
746 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
751 MachineBasicBlock::iterator PrevI = BB->end();
752 if (I != BB->begin()) PrevI = prior(I);
753 TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
755 // Visit the instructions created by eliminateCallFramePseudoInstr().
756 if (PrevI == BB->end())
757 I = BB->begin(); // The replaced instr was the first in the block.
759 I = llvm::next(PrevI);
763 MachineInstr *MI = I;
765 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
766 if (!MI->getOperand(i).isFI())
769 // Some instructions (e.g. inline asm instructions) can have
770 // multiple frame indices and/or cause eliminateFrameIndex
771 // to insert more than one instruction. We need the register
772 // scavenger to go through all of these instructions so that
773 // it can update its register information. We keep the
774 // iterator at the point before insertion so that we can
775 // revisit them in full.
776 bool AtBeginning = (I == BB->begin());
777 if (!AtBeginning) --I;
779 // If this instruction has a FrameIndex operand, we need to
780 // use that target machine register info object to eliminate
782 TRI.eliminateFrameIndex(MI, SPAdj, i,
783 FrameIndexVirtualScavenging ? NULL : RS);
785 // Reset the iterator if we were at the beginning of the BB.
795 if (DoIncr && I != BB->end()) ++I;
797 // Update register states.
798 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
801 // If we have evenly matched pairs of frame setup / destroy instructions,
802 // make sure the adjustments come out to zero. If we don't have matched
803 // pairs, we can't be sure the missing bit isn't in another basic block
804 // due to a custom inserter playing tricks, so just asserting SPAdj==0
805 // isn't sufficient. See tMOVCC on Thumb1, for example.
806 assert((SPAdjCount || SPAdj == 0) &&
807 "Unbalanced call frame setup / destroy pairs?");
811 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
812 /// with physical registers. Use the register scavenger to find an
813 /// appropriate register to use.
815 /// FIXME: Iterating over the instruction stream is unnecessary. We can simply
816 /// iterate over the vreg use list, which at this point only contains machine
817 /// operands for which eliminateFrameIndex need a new scratch reg.
818 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
819 // Run through the instructions and find any virtual registers.
820 for (MachineFunction::iterator BB = Fn.begin(),
821 E = Fn.end(); BB != E; ++BB) {
822 RS->enterBasicBlock(BB);
826 // The instruction stream may change in the loop, so check BB->end()
828 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
829 // We might end up here again with a NULL iterator if we scavenged a
830 // register for which we inserted spill code for definition by what was
831 // originally the first instruction in BB.
832 if (I == MachineBasicBlock::iterator(NULL))
835 MachineInstr *MI = I;
836 MachineBasicBlock::iterator J = llvm::next(I);
837 MachineBasicBlock::iterator P = I == BB->begin() ?
838 MachineBasicBlock::iterator(NULL) : llvm::prior(I);
840 // RS should process this instruction before we might scavenge at this
841 // location. This is because we might be replacing a virtual register
842 // defined by this instruction, and if so, registers killed by this
843 // instruction are available, and defined registers are not.
846 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
847 if (MI->getOperand(i).isReg()) {
848 MachineOperand &MO = MI->getOperand(i);
849 unsigned Reg = MO.getReg();
852 if (!TargetRegisterInfo::isVirtualRegister(Reg))
855 // When we first encounter a new virtual register, it
856 // must be a definition.
857 assert(MI->getOperand(i).isDef() &&
858 "frame index virtual missing def!");
859 // Scavenge a new scratch register
860 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
861 unsigned ScratchReg = RS->scavengeRegister(RC, J, SPAdj);
865 // Replace this reference to the virtual register with the
867 assert (ScratchReg && "Missing scratch register!");
868 Fn.getRegInfo().replaceRegWith(Reg, ScratchReg);
870 // Because this instruction was processed by the RS before this
871 // register was allocated, make sure that the RS now records the
872 // register as being used.
873 RS->setUsed(ScratchReg);
877 // If the scavenger needed to use one of its spill slots, the
878 // spill code will have been inserted in between I and J. This is a
879 // problem because we need the spill code before I: Move I to just
881 if (I != llvm::prior(J)) {
882 BB->splice(J, BB, I);
884 // Before we move I, we need to prepare the RS to visit I again.
885 // Specifically, RS will assert if it sees uses of registers that
886 // it believes are undefined. Because we have already processed
887 // register kills in I, when it visits I again, it will believe that
888 // those registers are undefined. To avoid this situation, unprocess
889 // the instruction I.
890 assert(RS->getCurrentPosition() == I &&
891 "The register scavenger has an unexpected position");