2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
6 * This code is derived from software written for Brini by Mark Brinicombe
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Brini.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
39 #include "opt_platform.h"
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #define _ARM32_BUS_DMA_PRIVATE
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sysproto.h>
48 #include <sys/signalvar.h>
49 #include <sys/imgact.h>
50 #include <sys/kernel.h>
52 #include <sys/linker.h>
54 #include <sys/malloc.h>
55 #include <sys/mutex.h>
58 #include <sys/ptrace.h>
65 #include <sys/msgbuf.h>
66 #include <machine/reg.h>
67 #include <machine/cpu.h>
68 #include <machine/fdt.h>
70 #include <dev/fdt/fdt_common.h>
71 #include <dev/ofw/openfirm.h>
75 #include <vm/vm_object.h>
76 #include <vm/vm_page.h>
77 #include <vm/vm_pager.h>
78 #include <vm/vm_map.h>
79 #include <machine/pte.h>
80 #include <machine/pmap.h>
81 #include <machine/vmparam.h>
82 #include <machine/pcb.h>
83 #include <machine/undefined.h>
84 #include <machine/machdep.h>
85 #include <machine/metadata.h>
86 #include <machine/armreg.h>
87 #include <machine/bus.h>
88 #include <sys/reboot.h>
90 #include <arm/mv/mvreg.h> /* XXX */
91 #include <arm/mv/mvvar.h> /* XXX eventually this should be eliminated */
92 #include <arm/mv/mvwin.h>
98 #define debugf(fmt, args...) printf(fmt, ##args)
100 #define debugf(fmt, args...)
104 * This is the number of L2 page tables required for covering max
105 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
106 * stacks etc.), uprounded to be divisible by 4.
108 #define KERNEL_PT_MAX 78
110 /* Define various stack sizes in pages */
111 #define IRQ_STACK_SIZE 1
112 #define ABT_STACK_SIZE 1
113 #define UND_STACK_SIZE 1
115 extern unsigned char kernbase[];
116 extern unsigned char _etext[];
117 extern unsigned char _edata[];
118 extern unsigned char __bss_start[];
119 extern unsigned char _end[];
122 extern vm_offset_t ksym_start, ksym_end;
125 extern u_int data_abort_handler_address;
126 extern u_int prefetch_abort_handler_address;
127 extern u_int undefined_handler_address;
129 extern vm_offset_t pmap_bootstrap_lastaddr;
132 struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
134 struct pcpu *pcpup = &__pcpu;
136 /* Physical and virtual addresses for some global pages */
138 vm_paddr_t phys_avail[10];
139 vm_paddr_t dump_avail[4];
140 vm_offset_t physical_pages;
141 vm_offset_t pmap_bootstrap_lastaddr;
143 const struct pmap_devmap *pmap_devmap_bootstrap_table;
144 struct pv_addr systempage;
145 struct pv_addr msgbufpv;
146 struct pv_addr irqstack;
147 struct pv_addr undstack;
148 struct pv_addr abtstack;
149 struct pv_addr kernelstack;
151 static struct trapframe proc0_tf;
153 static struct mem_region availmem_regions[FDT_MEM_REGIONS];
154 static int availmem_regions_sz;
156 static void print_kenv(void);
157 static void print_kernel_section_addr(void);
159 static void physmap_init(void);
160 static int platform_devmap_init(void);
161 static int platform_mpp_init(void);
183 debugf("loader passed (static) kenv:\n");
184 if (kern_envp == NULL) {
185 debugf(" no env, null ptr\n");
188 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
191 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
192 debugf(" %x %s\n", (uint32_t)cp, cp);
196 print_kernel_section_addr(void)
199 debugf("kernel image addresses:\n");
200 debugf(" kernbase = 0x%08x\n", (uint32_t)kernbase);
201 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
202 debugf(" _edata = 0x%08x\n", (uint32_t)_edata);
203 debugf(" __bss_start = 0x%08x\n", (uint32_t)__bss_start);
204 debugf(" _end = 0x%08x\n", (uint32_t)_end);
211 vm_offset_t phys_kernelend, kernload;
213 struct mem_region *mp, *mp1;
215 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR);
216 kernload = KERNPHYSADDR;
219 * Remove kernel physical address range from avail
220 * regions list. Page align all regions.
221 * Non-page aligned memory isn't very interesting to us.
222 * Also, sort the entries for ascending addresses.
225 cnt = availmem_regions_sz;
226 debugf("processing avail regions:\n");
227 for (mp = availmem_regions; mp->mr_size; mp++) {
229 e = mp->mr_start + mp->mr_size;
230 debugf(" %08x-%08x -> ", s, e);
231 /* Check whether this region holds all of the kernel. */
232 if (s < kernload && e > phys_kernelend) {
233 availmem_regions[cnt].mr_start = phys_kernelend;
234 availmem_regions[cnt++].mr_size = e - phys_kernelend;
237 /* Look whether this regions starts within the kernel. */
238 if (s >= kernload && s < phys_kernelend) {
239 if (e <= phys_kernelend)
243 /* Now look whether this region ends within the kernel. */
244 if (e > kernload && e <= phys_kernelend) {
250 /* Now page align the start and size of the region. */
256 debugf("%08x-%08x = %x\n", s, e, sz);
258 /* Check whether some memory is left here. */
261 printf("skipping\n");
263 (cnt - (mp - availmem_regions)) * sizeof(*mp));
269 /* Do an insertion sort. */
270 for (mp1 = availmem_regions; mp1 < mp; mp1++)
271 if (s < mp1->mr_start)
274 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1);
282 availmem_regions_sz = cnt;
284 /* Fill in phys_avail table, based on availmem_regions */
285 debugf("fill in phys_avail:\n");
286 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) {
288 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n",
289 availmem_regions[i].mr_start,
290 availmem_regions[i].mr_start + availmem_regions[i].mr_size,
291 availmem_regions[i].mr_size);
293 phys_avail[j] = availmem_regions[i].mr_start;
294 phys_avail[j + 1] = availmem_regions[i].mr_start +
295 availmem_regions[i].mr_size;
298 phys_avail[j + 1] = 0;
302 initarm(void *mdp, void *unused __unused)
304 struct pv_addr kernel_l1pt;
305 struct pv_addr dpcpu;
306 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
307 uint32_t memsize, l2size;
315 dtbp = (vm_offset_t)NULL;
320 * Mask metadata pointer: it is supposed to be on page boundary. If
321 * the first argument (mdp) doesn't point to a valid address the
322 * bootloader must have passed us something else than the metadata
323 * ptr... In this case we want to fall back to some built-in settings.
325 mdp = (void *)((uint32_t)mdp & ~PAGE_MASK);
327 /* Parse metadata and fetch parameters */
329 preload_metadata = mdp;
330 kmdp = preload_search_by_type("elf kernel");
332 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
333 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
334 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
335 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND,
338 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
339 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
343 preload_addr_relocate = KERNVIRTADDR - KERNPHYSADDR;
345 /* Fall back to hardcoded metadata. */
346 lastaddr = fake_preload_metadata();
349 #if defined(FDT_DTB_STATIC)
351 * In case the device tree blob was not retrieved (from metadata) try
352 * to use the statically embedded one.
354 if (dtbp == (vm_offset_t)NULL)
355 dtbp = (vm_offset_t)&fdt_static_dtb;
358 if (OF_install(OFW_FDT, 0) == FALSE)
361 if (OF_init((void *)dtbp) != 0)
364 /* Grab physical memory regions information from device tree. */
365 if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz,
369 if (fdt_immr_addr(MV_BASE) != 0)
372 /* Platform-specific initialisation */
373 pmap_bootstrap_lastaddr = fdt_immr_va - ARM_NOCACHE_KVA_SIZE;
375 pcpu_init(pcpup, 0, sizeof(struct pcpu));
376 PCPU_SET(curthread, &thread0);
378 /* Calculate number of L2 tables needed for mapping vm_page_array */
379 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
380 l2size = (l2size >> L1_S_SHIFT) + 1;
383 * Add one table for end of kernel map, one for stacks, msgbuf and
384 * L1 and L2 tables map and one for vectors map.
388 /* Make it divisible by 4 */
389 l2size = (l2size + 3) & ~3;
391 #define KERNEL_TEXT_BASE (KERNBASE)
392 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
394 /* Define a macro to simplify memory allocation */
395 #define valloc_pages(var, np) \
396 alloc_pages((var).pv_va, (np)); \
397 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
399 #define alloc_pages(var, np) \
400 (var) = freemempos; \
401 freemempos += (np * PAGE_SIZE); \
402 memset((char *)(var), 0, ((np) * PAGE_SIZE));
404 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
405 freemempos += PAGE_SIZE;
406 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
408 for (i = 0; i < l2size; ++i) {
409 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
410 valloc_pages(kernel_pt_table[i],
411 L2_TABLE_SIZE / PAGE_SIZE);
414 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
415 L2_TABLE_SIZE_REAL * (i - j);
416 kernel_pt_table[i].pv_pa =
417 kernel_pt_table[i].pv_va - KERNVIRTADDR +
423 * Allocate a page for the system page mapped to 0x00000000
424 * or 0xffff0000. This page will just contain the system vectors
425 * and can be shared by all processes.
427 valloc_pages(systempage, 1);
429 /* Allocate dynamic per-cpu area. */
430 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
431 dpcpu_init((void *)dpcpu.pv_va, 0);
433 /* Allocate stacks for all modes */
434 valloc_pages(irqstack, IRQ_STACK_SIZE);
435 valloc_pages(abtstack, ABT_STACK_SIZE);
436 valloc_pages(undstack, UND_STACK_SIZE);
437 valloc_pages(kernelstack, KSTACK_PAGES);
441 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
444 * Now we start construction of the L1 page table
445 * We start by mapping the L2 page tables into the L1.
446 * This means that we can replace L1 mappings later on if necessary
448 l1pagetable = kernel_l1pt.pv_va;
451 * Try to map as much as possible of kernel text and data using
452 * 1MB section mapping and for the rest of initial kernel address
453 * space use L2 coarse tables.
455 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
456 * and kernel structures
458 l2_start = lastaddr & ~(L1_S_OFFSET);
459 for (i = 0 ; i < l2size - 1; i++)
460 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
461 &kernel_pt_table[i]);
463 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
465 /* Map kernel code and data */
466 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR,
467 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
468 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
471 /* Map L1 directory and allocated L2 page tables */
472 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
473 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
475 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
476 kernel_pt_table[0].pv_pa,
477 L2_TABLE_SIZE_REAL * l2size,
478 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
480 /* Map allocated DPCPU, stacks and msgbuf */
481 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
482 freemempos - dpcpu.pv_va,
483 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
485 /* Link and map the vector page */
486 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
487 &kernel_pt_table[l2size - 1]);
488 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
489 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
491 /* Map pmap_devmap[] entries */
492 if (platform_devmap_init() != 0)
494 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table);
496 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
498 setttb(kernel_l1pt.pv_pa);
500 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
503 * Only after the SOC registers block is mapped we can perform device
504 * tree fixups, as they may attempt to read parameters from hardware.
506 OF_interpret("perform-fixup", 0);
509 * Re-initialise MPP. It is important to call this prior to using
510 * console as the physical connection can be routed via MPP.
512 if (platform_mpp_init() != 0)
517 physmem = memsize / PAGE_SIZE;
519 debugf("initarm: console initialized\n");
520 debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp);
521 debugf(" boothowto = 0x%08x\n", boothowto);
522 printf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
523 print_kernel_section_addr();
527 * Re-initialise decode windows
529 if (soc_decode_win() != 0)
530 printf("WARNING: could not re-initialise decode windows! "
531 "Running with existing settings...\n");
533 * Pages were allocated during the secondary bootstrap for the
534 * stacks for different CPU modes.
535 * We must now set the r13 registers in the different CPU modes to
536 * point to these stacks.
537 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
538 * of the stack memory.
540 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
541 set_stackptr(PSR_IRQ32_MODE,
542 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
543 set_stackptr(PSR_ABT32_MODE,
544 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
545 set_stackptr(PSR_UND32_MODE,
546 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
549 * We must now clean the cache again....
550 * Cleaning may be done by reading new data to displace any
551 * dirty data in the cache. This will have happened in setttb()
552 * but since we are boot strapping the addresses used for the read
553 * may have just been remapped and thus the cache could be out
554 * of sync. A re-clean after the switch will cure this.
555 * After booting there are no gross relocations of the kernel thus
556 * this problem will not occur after initarm().
558 cpu_idcache_wbinv_all();
560 /* Set stack for exception handlers */
561 data_abort_handler_address = (u_int)data_abort_handler;
562 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
563 undefined_handler_address = (u_int)undefinedinstruction_bounce;
566 proc_linkup0(&proc0, &thread0);
567 thread0.td_kstack = kernelstack.pv_va;
568 thread0.td_kstack_pages = KSTACK_PAGES;
569 thread0.td_pcb = (struct pcb *)
570 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
571 thread0.td_pcb->pcb_flags = 0;
572 thread0.td_frame = &proc0_tf;
573 pcpup->pc_curpcb = thread0.td_pcb;
575 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
578 dump_avail[1] = memsize;
582 pmap_bootstrap(freemempos, pmap_bootstrap_lastaddr, &kernel_l1pt);
583 msgbufp = (void *)msgbufpv.pv_va;
584 msgbufinit(msgbufp, msgbufsize);
588 * Prepare map of physical memory regions available to vm subsystem.
592 /* Do basic tuning, hz etc */
593 init_param2(physmem);
595 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
596 sizeof(struct pcb)));
599 #define MPP_PIN_MAX 50
600 #define MPP_PIN_CELLS 2
601 #define MPP_PINS_PER_REG 8
602 #define MPP_SEL(pin,func) (((func) & 0xf) << \
603 (((pin) % MPP_PINS_PER_REG) * 4))
606 platform_mpp_init(void)
608 pcell_t pinmap[MPP_PIN_MAX * MPP_PIN_CELLS];
609 int mpp[MPP_PIN_MAX];
610 uint32_t ctrl_val, ctrl_offset;
614 pcell_t pin_cells, *pinmap_ptr, pin_count;
616 int par_addr_cells, par_size_cells;
617 int tuple_size, tuples, rv, pins, i, j;
618 int mpp_pin, mpp_function;
621 * Try to access the MPP node directly i.e. through /aliases/mpp.
623 if ((node = OF_finddevice("mpp")) != 0)
624 if (fdt_is_compatible(node, "mrvl,mpp"))
627 * Find the node the long way.
629 if ((node = OF_finddevice("/")) == 0)
632 if ((node = fdt_find_compatible(node, "simple-bus", 0)) == 0)
635 if ((node = fdt_find_compatible(node, "mrvl,mpp", 0)) == 0)
639 * Process 'reg' prop.
641 if ((rv = fdt_addrsize_cells(OF_parent(node), &par_addr_cells,
642 &par_size_cells)) != 0)
645 tuple_size = sizeof(pcell_t) * (par_addr_cells + par_size_cells);
646 len = OF_getprop(node, "reg", reg, sizeof(reg));
647 tuples = len / tuple_size;
652 * Get address/size. XXX we assume only the first 'reg' tuple is used.
654 rv = fdt_data_to_res(reg, par_addr_cells, par_size_cells,
658 start += fdt_immr_va;
661 * Process 'pin-count' and 'pin-map' props.
663 if (OF_getprop(node, "pin-count", &pin_count, sizeof(pin_count)) <= 0)
665 pin_count = fdt32_to_cpu(pin_count);
666 if (pin_count > MPP_PIN_MAX)
669 if (OF_getprop(node, "#pin-cells", &pin_cells, sizeof(pin_cells)) <= 0)
670 pin_cells = MPP_PIN_CELLS;
671 pin_cells = fdt32_to_cpu(pin_cells);
672 if (pin_cells > MPP_PIN_CELLS)
674 tuple_size = sizeof(pcell_t) * pin_cells;
676 bzero(pinmap, sizeof(pinmap));
677 len = OF_getprop(node, "pin-map", pinmap, sizeof(pinmap));
680 if (len % tuple_size)
682 pins = len / tuple_size;
683 if (pins > pin_count)
686 * Fill out a "mpp[pin] => function" table. All pins unspecified in
687 * the 'pin-map' property are defaulted to 0 function i.e. GPIO.
689 bzero(mpp, sizeof(mpp));
691 for (i = 0; i < pins; i++) {
692 mpp_pin = fdt32_to_cpu(*pinmap_ptr);
693 mpp_function = fdt32_to_cpu(*(pinmap_ptr + 1));
694 mpp[mpp_pin] = mpp_function;
695 pinmap_ptr += pin_cells;
699 * Prepare and program MPP control register values.
702 for (i = 0; i < pin_count;) {
705 for (j = 0; j < MPP_PINS_PER_REG; j++) {
706 if (i + j == pin_count - 1)
708 ctrl_val |= MPP_SEL(i + j, mpp[i + j]);
710 i += MPP_PINS_PER_REG;
711 bus_space_write_4(fdtbus_bs_tag, start, ctrl_offset,
714 #if defined(SOC_MV_ORION)
716 * Third MPP reg on Orion SoC is placed
717 * non-linearly (with different offset).
719 if (i == (2 * MPP_PINS_PER_REG))
729 #define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
730 static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = {
735 * Construct pmap_devmap[] with DT-derived config data.
738 platform_devmap_init(void)
740 phandle_t root, child;
748 fdt_devmap[i].pd_va = fdt_immr_va;
749 fdt_devmap[i].pd_pa = fdt_immr_pa;
750 fdt_devmap[i].pd_size = fdt_immr_size;
751 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
752 fdt_devmap[i].pd_cache = PTE_NOCACHE;
758 if ((root = OF_finddevice("/")) == 0)
761 for (child = OF_child(root); child != 0; child = OF_peer(child))
762 if (fdt_is_type(child, "pci")) {
764 * Check space: each PCI node will consume 2 devmap
767 if (i + 1 >= FDT_DEVMAP_MAX) {
773 * XXX this should account for PCI and multiple ranges
776 if (fdt_pci_devmap(child, &fdt_devmap[i],
777 MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) != 0)
785 if ((child = OF_finddevice("sram")) != 0)
786 if (fdt_is_compatible(child, "mrvl,cesa-sram"))
789 if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0)
790 /* No CESA SRAM node. */
793 if (i >= FDT_DEVMAP_MAX)
796 if (fdt_regsize(child, &base, &size) != 0)
799 fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */
800 fdt_devmap[i].pd_pa = base;
801 fdt_devmap[i].pd_size = size;
802 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
803 fdt_devmap[i].pd_cache = PTE_NOCACHE;
806 pmap_devmap_bootstrap_table = &fdt_devmap[0];
810 struct arm32_dma_range *
811 bus_dma_get_range(void)
818 bus_dma_get_range_nb(void)