2 * Copyright (c) 1996-2000 Distributed Processing Technology Corporation
3 * Copyright (c) 2000-2001 Adaptec Corporation
6 * TERMS AND CONDITIONS OF USE
8 * Redistribution and use in source form, with or without modification, are
9 * permitted provided that redistributions of source code must retain the
10 * above copyright notice, this list of conditions and the following disclaimer.
12 * This software is provided `as is' by Adaptec and any express or implied
13 * warranties, including, but not limited to, the implied warranties of
14 * merchantability and fitness for a particular purpose, are disclaimed. In no
15 * event shall Adaptec be liable for any direct, indirect, incidental, special,
16 * exemplary or consequential damages (including, but not limited to,
17 * procurement of substitute goods or services; loss of use, data, or profits;
18 * or business interruptions) however caused and on any theory of liability,
19 * whether in contract, strict liability, or tort (including negligence or
20 * otherwise) arising in any way out of the use of this driver software, even
21 * if advised of the possibility of such damage.
23 * SCSI I2O host adapter driver
25 * V1.10 2004/05/05 scottl@freebsd.org
26 * - Massive cleanup of the driver to remove dead code and
27 * non-conformant style.
28 * - Removed most i386-specific code to make it more portable.
29 * - Converted to the bus_space API.
30 * V1.08 2001/08/21 Mark_Salyzyn@adaptec.com
31 * - The 2000S and 2005S do not initialize on some machines,
32 * increased timeout to 255ms from 50ms for the StatusGet
34 * V1.07 2001/05/22 Mark_Salyzyn@adaptec.com
35 * - I knew this one was too good to be true. The error return
36 * on ioctl commands needs to be compared to CAM_REQ_CMP, not
37 * to the bit masked status.
38 * V1.06 2001/05/08 Mark_Salyzyn@adaptec.com
39 * - The 2005S that was supported is affectionately called the
40 * Conjoined BAR Firmware. In order to support RAID-5 in a
41 * 16MB low-cost configuration, Firmware was forced to go
42 * to a Split BAR Firmware. This requires a separate IOP and
43 * Messaging base address.
44 * V1.05 2001/04/25 Mark_Salyzyn@adaptec.com
45 * - Handle support for 2005S Zero Channel RAID solution.
46 * - System locked up if the Adapter locked up. Do not try
47 * to send other commands if the resetIOP command fails. The
48 * fail outstanding command discovery loop was flawed as the
49 * removal of the command from the list prevented discovering
51 * - Comment changes to clarify driver.
52 * - SysInfo searched for an EATA SmartROM, not an I2O SmartROM.
53 * - We do not use the AC_FOUND_DEV event because of I2O.
55 * V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org,
56 * lampa@fee.vutbr.cz and Scott_Long@adaptec.com.
57 * - Removed support for PM1554, PM2554 and PM2654 in Mode-0
58 * mode as this is confused with competitor adapters in run
60 * - critical locking needed in ASR_ccbAdd and ASR_ccbRemove
61 * to prevent operating system panic.
62 * - moved default major number to 154 from 97.
63 * V1.03 2000/07/12 Mark_Salyzyn@adaptec.com
64 * - The controller is not actually an ASR (Adaptec SCSI RAID)
65 * series that is visible, it's more of an internal code name.
66 * remove any visible references within reason for now.
67 * - bus_ptr->LUN was not correctly zeroed when initially
68 * allocated causing a possible panic of the operating system
70 * V1.02 2000/06/26 Mark_Salyzyn@adaptec.com
71 * - Code always fails for ASR_getTid affecting performance.
72 * - initiated a set of changes that resulted from a formal
73 * code inspection by Mark_Salyzyn@adaptec.com,
74 * George_Dake@adaptec.com, Jeff_Zeak@adaptec.com,
75 * Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com.
76 * Their findings were focussed on the LCT & TID handler, and
77 * all resulting changes were to improve code readability,
78 * consistency or have a positive effect on performance.
79 * V1.01 2000/06/14 Mark_Salyzyn@adaptec.com
80 * - Passthrough returned an incorrect error.
81 * - Passthrough did not migrate the intrinsic scsi layer wakeup
82 * on command completion.
83 * - generate control device nodes using make_dev and delete_dev.
84 * - Performance affected by TID caching reallocing.
85 * - Made suggested changes by Justin_Gibbs@adaptec.com
86 * - use splcam instead of splbio.
87 * - use cam_imask instead of bio_imask.
88 * - use u_int8_t instead of u_char.
89 * - use u_int16_t instead of u_short.
90 * - use u_int32_t instead of u_long where appropriate.
91 * - use 64 bit context handler instead of 32 bit.
92 * - create_ccb should only allocate the worst case
93 * requirements for the driver since CAM may evolve
94 * making union ccb much larger than needed here.
95 * renamed create_ccb to asr_alloc_ccb.
96 * - go nutz justifying all debug prints as macros
97 * defined at the top and remove unsightly ifdefs.
98 * - INLINE STATIC viewed as confusing. Historically
99 * utilized to affect code performance and debug
100 * issues in OS, Compiler or OEM specific situations.
101 * V1.00 2000/05/31 Mark_Salyzyn@adaptec.com
102 * - Ported from FreeBSD 2.2.X DPT I2O driver.
103 * changed struct scsi_xfer to union ccb/struct ccb_hdr
104 * changed variable name xs to ccb
105 * changed struct scsi_link to struct cam_path
106 * changed struct scsibus_data to struct cam_sim
107 * stopped using fordriver for holding on to the TID
108 * use proprietary packet creation instead of scsi_inquire
109 * CAM layer sends synchronize commands.
112 #include <sys/cdefs.h>
113 #include <sys/param.h> /* TRUE=1 and FALSE=0 defined here */
114 #include <sys/kernel.h>
115 #include <sys/module.h>
116 #include <sys/systm.h>
117 #include <sys/malloc.h>
118 #include <sys/conf.h>
119 #include <sys/ioccom.h>
120 #include <sys/priv.h>
121 #include <sys/proc.h>
123 #include <machine/resource.h>
124 #include <machine/bus.h>
125 #include <sys/rman.h>
126 #include <sys/stat.h>
127 #include <sys/bus_dma.h>
130 #include <cam/cam_ccb.h>
131 #include <cam/cam_sim.h>
132 #include <cam/cam_xpt_sim.h>
134 #include <cam/scsi/scsi_all.h>
135 #include <cam/scsi/scsi_message.h>
140 #if defined(__i386__)
142 #include <i386/include/cputypes.h>
144 #if defined(ASR_COMPAT)
145 #define ASR_IOCTL_COMPAT
146 #endif /* ASR_COMPAT */
148 #include <machine/vmparam.h>
150 #include <dev/pci/pcivar.h>
151 #include <dev/pci/pcireg.h>
153 #define osdSwap4(x) ((u_long)ntohl((u_long)(x)))
154 #define KVTOPHYS(x) vtophys(x)
155 #include <dev/asr/dptalign.h>
156 #include <dev/asr/i2oexec.h>
157 #include <dev/asr/i2obscsi.h>
158 #include <dev/asr/i2odpt.h>
159 #include <dev/asr/i2oadptr.h>
161 #include <dev/asr/sys_info.h>
163 __FBSDID("$FreeBSD$");
165 #define ASR_VERSION 1
166 #define ASR_REVISION '1'
167 #define ASR_SUBREVISION '0'
170 #define ASR_YEAR (2004 - 1980)
173 * Debug macros to reduce the unsightly ifdefs
175 #if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD))
177 debug_asr_message(PI2O_MESSAGE_FRAME message)
179 u_int32_t * pointer = (u_int32_t *)message;
180 u_int32_t length = I2O_MESSAGE_FRAME_getMessageSize(message);
181 u_int32_t counter = 0;
184 printf("%08lx%c", (u_long)*(pointer++),
185 (((++counter & 7) == 0) || (length == 0)) ? '\n' : ' ');
188 #endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */
191 /* Breaks on none STDC based compilers :-( */
192 #define debug_asr_printf(fmt,args...) printf(fmt, ##args)
193 #define debug_asr_dump_message(message) debug_asr_message(message)
194 #define debug_asr_print_path(ccb) xpt_print_path(ccb->ccb_h.path);
195 #else /* DEBUG_ASR */
196 #define debug_asr_printf(fmt,args...)
197 #define debug_asr_dump_message(message)
198 #define debug_asr_print_path(ccb)
199 #endif /* DEBUG_ASR */
202 * If DEBUG_ASR_CMD is defined:
203 * 0 - Display incoming SCSI commands
204 * 1 - add in a quick character before queueing.
205 * 2 - add in outgoing message frames.
207 #if (defined(DEBUG_ASR_CMD))
208 #define debug_asr_cmd_printf(fmt,args...) printf(fmt,##args)
210 debug_asr_dump_ccb(union ccb *ccb)
212 u_int8_t *cp = (unsigned char *)&(ccb->csio.cdb_io);
213 int len = ccb->csio.cdb_len;
216 debug_asr_cmd_printf (" %02x", *(cp++));
220 #if (DEBUG_ASR_CMD > 0)
221 #define debug_asr_cmd1_printf debug_asr_cmd_printf
223 #define debug_asr_cmd1_printf(fmt,args...)
225 #if (DEBUG_ASR_CMD > 1)
226 #define debug_asr_cmd2_printf debug_asr_cmd_printf
227 #define debug_asr_cmd2_dump_message(message) debug_asr_message(message)
229 #define debug_asr_cmd2_printf(fmt,args...)
230 #define debug_asr_cmd2_dump_message(message)
232 #else /* DEBUG_ASR_CMD */
233 #define debug_asr_cmd_printf(fmt,args...)
234 #define debug_asr_dump_ccb(ccb)
235 #define debug_asr_cmd1_printf(fmt,args...)
236 #define debug_asr_cmd2_printf(fmt,args...)
237 #define debug_asr_cmd2_dump_message(message)
238 #endif /* DEBUG_ASR_CMD */
240 #if (defined(DEBUG_ASR_USR_CMD))
241 #define debug_usr_cmd_printf(fmt,args...) printf(fmt,##args)
242 #define debug_usr_cmd_dump_message(message) debug_usr_message(message)
243 #else /* DEBUG_ASR_USR_CMD */
244 #define debug_usr_cmd_printf(fmt,args...)
245 #define debug_usr_cmd_dump_message(message)
246 #endif /* DEBUG_ASR_USR_CMD */
248 #ifdef ASR_IOCTL_COMPAT
249 #define dsDescription_size 46 /* Snug as a bug in a rug */
250 #endif /* ASR_IOCTL_COMPAT */
252 #include "dev/asr/dptsig.h"
254 static dpt_sig_S ASR_sig = {
255 { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL,
256 PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0,
257 OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL, ADF_ALL_SC5,
258 0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION,
259 ASR_MONTH, ASR_DAY, ASR_YEAR,
260 /* 01234567890123456789012345678901234567890123456789 < 50 chars */
261 "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver"
262 /* ^^^^^ asr_attach alters these to match OS */
265 /* Configuration Definitions */
267 #define SG_SIZE 58 /* Scatter Gather list Size */
268 #define MAX_TARGET_ID 126 /* Maximum Target ID supported */
269 #define MAX_LUN 255 /* Maximum LUN Supported */
270 #define MAX_CHANNEL 7 /* Maximum Channel # Supported by driver */
271 #define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */
272 #define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */
273 #define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */
274 #define MAX_MAP 4194304L /* Maximum mapping size of IOP */
275 /* Also serves as the minimum map for */
276 /* the 2005S zero channel RAID product */
278 /* I2O register set */
279 #define I2O_REG_STATUS 0x30
280 #define I2O_REG_MASK 0x34
281 #define I2O_REG_TOFIFO 0x40
282 #define I2O_REG_FROMFIFO 0x44
284 #define Mask_InterruptsDisabled 0x08
287 * A MIX of performance and space considerations for TID lookups
289 typedef u_int16_t tid_t;
292 u_int32_t size; /* up to MAX_LUN */
297 u_int32_t size; /* up to MAX_TARGET */
302 * To ensure that we only allocate and use the worst case ccb here, lets
303 * make our own local ccb union. If asr_alloc_ccb is utilized for another
304 * ccb type, ensure that you add the additional structures into our local
305 * ccb union. To ensure strict type checking, we will utilize the local
306 * ccb definition wherever possible.
309 struct ccb_hdr ccb_h; /* For convenience */
310 struct ccb_scsiio csio;
311 struct ccb_setasync csa;
314 struct Asr_status_mem {
315 I2O_EXEC_STATUS_GET_REPLY status;
319 /**************************************************************************
320 ** ASR Host Adapter structure - One Structure For Each Host Adapter That **
321 ** Is Configured Into The System. The Structure Supplies Configuration **
322 ** Information, Status Info, Queue Info And An Active CCB List Pointer. **
323 ***************************************************************************/
325 typedef struct Asr_softc {
328 u_long ha_Base; /* base port for each board */
329 bus_size_t ha_blinkLED;
330 bus_space_handle_t ha_i2o_bhandle;
331 bus_space_tag_t ha_i2o_btag;
332 bus_space_handle_t ha_frame_bhandle;
333 bus_space_tag_t ha_frame_btag;
334 I2O_IOP_ENTRY ha_SystemTable;
335 LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */
337 bus_dma_tag_t ha_parent_dmat;
338 bus_dma_tag_t ha_statusmem_dmat;
339 bus_dmamap_t ha_statusmem_dmamap;
340 struct Asr_status_mem * ha_statusmem;
341 u_int32_t ha_rstatus_phys;
342 u_int32_t ha_status_phys;
343 struct cam_path * ha_path[MAX_CHANNEL+1];
344 struct cam_sim * ha_sim[MAX_CHANNEL+1];
345 struct resource * ha_mem_res;
346 struct resource * ha_mes_res;
347 struct resource * ha_irq_res;
349 PI2O_LCT ha_LCT; /* Complete list of devices */
350 #define le_type IdentityTag[0]
353 #define I2O_SCSI 0x00
354 #define I2O_PORT 0x80
355 #define I2O_UNKNOWN 0x7F
356 #define le_bus IdentityTag[1]
357 #define le_target IdentityTag[2]
358 #define le_lun IdentityTag[3]
359 target2lun_t * ha_targets[MAX_CHANNEL+1];
360 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs;
363 u_int8_t ha_in_reset;
364 #define HA_OPERATIONAL 0
365 #define HA_IN_RESET 1
366 #define HA_OFF_LINE 2
367 #define HA_OFF_LINE_RECOVERY 3
368 /* Configuration information */
369 /* The target id maximums we take */
370 u_int8_t ha_MaxBus; /* Maximum bus */
371 u_int8_t ha_MaxId; /* Maximum target ID */
372 u_int8_t ha_MaxLun; /* Maximum target LUN */
373 u_int8_t ha_SgSize; /* Max SG elements */
374 u_int8_t ha_pciBusNum;
375 u_int8_t ha_pciDeviceNum;
376 u_int8_t ha_adapter_target[MAX_CHANNEL+1];
377 u_int16_t ha_QueueSize; /* Max outstanding commands */
378 u_int16_t ha_Msgs_Count;
380 /* Links into other parents and HBAs */
381 STAILQ_ENTRY(Asr_softc) ha_next; /* HBA list */
382 struct cdev *ha_devt;
385 static STAILQ_HEAD(, Asr_softc) Asr_softc_list =
386 STAILQ_HEAD_INITIALIZER(Asr_softc_list);
389 * Prototypes of the routines we have in this object.
392 /* I2O HDM interface */
393 static int asr_probe(device_t dev);
394 static int asr_attach(device_t dev);
396 static int asr_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flag,
398 static int asr_open(struct cdev *dev, int32_t flags, int32_t ifmt,
400 static int asr_close(struct cdev *dev, int flags, int ifmt, struct thread *td);
401 static int asr_intr(Asr_softc_t *sc);
402 static void asr_timeout(void *arg);
403 static int ASR_init(Asr_softc_t *sc);
404 static int ASR_acquireLct(Asr_softc_t *sc);
405 static int ASR_acquireHrt(Asr_softc_t *sc);
406 static void asr_action(struct cam_sim *sim, union ccb *ccb);
407 static void asr_poll(struct cam_sim *sim);
408 static int ASR_queue(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message);
411 * Here is the auto-probe structure used to nest our tests appropriately
412 * during the startup phase of the operating system.
414 static device_method_t asr_methods[] = {
415 DEVMETHOD(device_probe, asr_probe),
416 DEVMETHOD(device_attach, asr_attach),
420 static driver_t asr_driver = {
426 static devclass_t asr_devclass;
427 DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0);
428 MODULE_DEPEND(asr, pci, 1, 1, 1);
429 MODULE_DEPEND(asr, cam, 1, 1, 1);
432 * devsw for asr hba driver
434 * only ioctl is used. the sd driver provides all other access.
436 static struct cdevsw asr_cdevsw = {
437 .d_version = D_VERSION,
438 .d_flags = D_NEEDGIANT,
440 .d_close = asr_close,
441 .d_ioctl = asr_ioctl,
445 /* I2O support routines */
447 static __inline u_int32_t
448 asr_get_FromFIFO(Asr_softc_t *sc)
450 return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
454 static __inline u_int32_t
455 asr_get_ToFIFO(Asr_softc_t *sc)
457 return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
461 static __inline u_int32_t
462 asr_get_intr(Asr_softc_t *sc)
464 return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
468 static __inline u_int32_t
469 asr_get_status(Asr_softc_t *sc)
471 return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
476 asr_set_FromFIFO(Asr_softc_t *sc, u_int32_t val)
478 bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_FROMFIFO,
483 asr_set_ToFIFO(Asr_softc_t *sc, u_int32_t val)
485 bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_TOFIFO,
490 asr_set_intr(Asr_softc_t *sc, u_int32_t val)
492 bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_MASK,
497 asr_set_frame(Asr_softc_t *sc, void *frame, u_int32_t offset, int len)
499 bus_space_write_region_4(sc->ha_frame_btag, sc->ha_frame_bhandle,
500 offset, (u_int32_t *)frame, len);
504 * Fill message with default.
506 static PI2O_MESSAGE_FRAME
507 ASR_fillMessage(void *Message, u_int16_t size)
509 PI2O_MESSAGE_FRAME Message_Ptr;
511 Message_Ptr = (I2O_MESSAGE_FRAME *)Message;
512 bzero(Message_Ptr, size);
513 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11);
514 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
515 (size + sizeof(U32) - 1) >> 2);
516 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
517 KASSERT(Message_Ptr != NULL, ("Message_Ptr == NULL"));
518 return (Message_Ptr);
519 } /* ASR_fillMessage */
521 #define EMPTY_QUEUE (0xffffffff)
524 ASR_getMessage(Asr_softc_t *sc)
528 MessageOffset = asr_get_ToFIFO(sc);
529 if (MessageOffset == EMPTY_QUEUE)
530 MessageOffset = asr_get_ToFIFO(sc);
532 return (MessageOffset);
533 } /* ASR_getMessage */
535 /* Issue a polled command */
537 ASR_initiateCp(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message)
539 U32 Mask = 0xffffffff;
544 * ASR_initiateCp is only used for synchronous commands and will
545 * be made more resiliant to adapter delays since commands like
546 * resetIOP can cause the adapter to be deaf for a little time.
548 while (((MessageOffset = ASR_getMessage(sc)) == EMPTY_QUEUE)
552 if (MessageOffset != EMPTY_QUEUE) {
553 asr_set_frame(sc, Message, MessageOffset,
554 I2O_MESSAGE_FRAME_getMessageSize(Message));
556 * Disable the Interrupts
558 Mask = asr_get_intr(sc);
559 asr_set_intr(sc, Mask | Mask_InterruptsDisabled);
560 asr_set_ToFIFO(sc, MessageOffset);
563 } /* ASR_initiateCp */
569 ASR_resetIOP(Asr_softc_t *sc)
571 I2O_EXEC_IOP_RESET_MESSAGE Message;
572 PI2O_EXEC_IOP_RESET_MESSAGE Message_Ptr;
577 * Build up our copy of the Message.
579 Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(&Message,
580 sizeof(I2O_EXEC_IOP_RESET_MESSAGE));
581 I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET);
583 * Reset the Reply Status
585 Reply_Ptr = &sc->ha_statusmem->rstatus;
587 I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr,
588 sc->ha_rstatus_phys);
590 * Send the Message out
592 if ((Old = ASR_initiateCp(sc, (PI2O_MESSAGE_FRAME)Message_Ptr)) !=
595 * Wait for a response (Poll), timeouts are dangerous if
596 * the card is truly responsive. We assume response in 2s.
598 u_int8_t Delay = 200;
600 while ((*Reply_Ptr == 0) && (--Delay != 0)) {
604 * Re-enable the interrupts.
606 asr_set_intr(sc, Old);
607 KASSERT(*Reply_Ptr != 0, ("*Reply_Ptr == 0"));
610 KASSERT(Old != 0xffffffff, ("Old == -1"));
615 * Get the curent state of the adapter
617 static PI2O_EXEC_STATUS_GET_REPLY
618 ASR_getStatus(Asr_softc_t *sc)
620 I2O_EXEC_STATUS_GET_MESSAGE Message;
621 PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr;
622 PI2O_EXEC_STATUS_GET_REPLY buffer;
626 * Build up our copy of the Message.
628 Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(&Message,
629 sizeof(I2O_EXEC_STATUS_GET_MESSAGE));
630 I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr,
631 I2O_EXEC_STATUS_GET);
632 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr,
634 /* This one is a Byte Count */
635 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr,
636 sizeof(I2O_EXEC_STATUS_GET_REPLY));
638 * Reset the Reply Status
640 buffer = &sc->ha_statusmem->status;
641 bzero(buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY));
643 * Send the Message out
645 if ((Old = ASR_initiateCp(sc, (PI2O_MESSAGE_FRAME)Message_Ptr)) !=
648 * Wait for a response (Poll), timeouts are dangerous if
649 * the card is truly responsive. We assume response in 50ms.
651 u_int8_t Delay = 255;
653 while (*((U8 * volatile)&(buffer->SyncByte)) == 0) {
661 * Re-enable the interrupts.
663 asr_set_intr(sc, Old);
667 } /* ASR_getStatus */
670 * Check if the device is a SCSI I2O HBA, and add it to the list.
674 * Probe for ASR controller. If we find it, we will use it.
678 asr_probe(device_t dev)
682 id = (pci_get_device(dev) << 16) | pci_get_vendor(dev);
683 if ((id == 0xA5011044) || (id == 0xA5111044)) {
684 device_set_desc(dev, "Adaptec Caching SCSI RAID");
685 return (BUS_PROBE_DEFAULT);
690 static __inline union asr_ccb *
691 asr_alloc_ccb(Asr_softc_t *sc)
693 union asr_ccb *new_ccb;
695 if ((new_ccb = (union asr_ccb *)malloc(sizeof(*new_ccb),
696 M_DEVBUF, M_WAITOK | M_ZERO)) != NULL) {
697 new_ccb->ccb_h.pinfo.priority = 1;
698 new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
699 new_ccb->ccb_h.spriv_ptr0 = sc;
702 } /* asr_alloc_ccb */
705 asr_free_ccb(union asr_ccb *free_ccb)
707 free(free_ccb, M_DEVBUF);
711 * Print inquiry data `carefully'
714 ASR_prstring(u_int8_t *s, int len)
716 while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) {
717 printf ("%c", *(s++));
722 * Send a message synchronously and without Interrupt to a ccb.
725 ASR_queue_s(union asr_ccb *ccb, PI2O_MESSAGE_FRAME Message)
729 Asr_softc_t *sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
732 * We do not need any (optional byteswapping) method access to
733 * the Initiator context field.
735 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
737 /* Prevent interrupt service */
739 Mask = asr_get_intr(sc);
740 asr_set_intr(sc, Mask | Mask_InterruptsDisabled);
742 if (ASR_queue(sc, Message) == EMPTY_QUEUE) {
743 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
744 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
748 * Wait for this board to report a finished instruction.
750 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
754 /* Re-enable Interrupts */
755 asr_set_intr(sc, Mask);
758 return (ccb->ccb_h.status);
762 * Send a message synchronously to an Asr_softc_t.
765 ASR_queue_c(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message)
770 if ((ccb = asr_alloc_ccb (sc)) == NULL) {
771 return (CAM_REQUEUE_REQ);
774 status = ASR_queue_s (ccb, Message);
782 * Add the specified ccb to the active queue
785 ASR_ccbAdd(Asr_softc_t *sc, union asr_ccb *ccb)
790 LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le);
791 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
792 if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) {
794 * RAID systems can take considerable time to
795 * complete some commands given the large cache
796 * flashes switching from write back to write thru.
798 ccb->ccb_h.timeout = 6 * 60 * 1000;
800 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
801 (ccb->ccb_h.timeout * hz) / 1000);
807 * Remove the specified ccb from the active queue.
810 ASR_ccbRemove(Asr_softc_t *sc, union asr_ccb *ccb)
815 untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
816 LIST_REMOVE(&(ccb->ccb_h), sim_links.le);
818 } /* ASR_ccbRemove */
821 * Fail all the active commands, so they get re-issued by the operating
825 ASR_failActiveCommands(Asr_softc_t *sc)
832 * We do not need to inform the CAM layer that we had a bus
833 * reset since we manage it on our own, this also prevents the
834 * SCSI_DELAY settling that would be required on other systems.
835 * The `SCSI_DELAY' has already been handled by the card via the
836 * acquisition of the LCT table while we are at CAM priority level.
837 * for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) {
838 * xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL);
841 while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != NULL) {
842 ASR_ccbRemove (sc, (union asr_ccb *)ccb);
844 ccb->status &= ~CAM_STATUS_MASK;
845 ccb->status |= CAM_REQUEUE_REQ;
846 /* Nothing Transfered */
847 ((struct ccb_scsiio *)ccb)->resid
848 = ((struct ccb_scsiio *)ccb)->dxfer_len;
851 xpt_done ((union ccb *)ccb);
857 } /* ASR_failActiveCommands */
860 * The following command causes the HBA to reset the specific bus
863 ASR_resetBus(Asr_softc_t *sc, int bus)
865 I2O_HBA_BUS_RESET_MESSAGE Message;
866 I2O_HBA_BUS_RESET_MESSAGE *Message_Ptr;
867 PI2O_LCT_ENTRY Device;
869 Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(&Message,
870 sizeof(I2O_HBA_BUS_RESET_MESSAGE));
871 I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame,
873 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
874 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
876 if (((Device->le_type & I2O_PORT) != 0)
877 && (Device->le_bus == bus)) {
878 I2O_MESSAGE_FRAME_setTargetAddress(
879 &Message_Ptr->StdMessageFrame,
880 I2O_LCT_ENTRY_getLocalTID(Device));
881 /* Asynchronous command, with no expectations */
882 (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
889 ASR_getBlinkLedCode(Asr_softc_t *sc)
896 blink = bus_space_read_1(sc->ha_frame_btag,
897 sc->ha_frame_bhandle, sc->ha_blinkLED + 1);
901 blink = bus_space_read_1(sc->ha_frame_btag,
902 sc->ha_frame_bhandle, sc->ha_blinkLED);
904 } /* ASR_getBlinkCode */
907 * Determine the address of an TID lookup. Must be done at high priority
908 * since the address can be changed by other threads of execution.
910 * Returns NULL pointer if not indexible (but will attempt to generate
911 * an index if `new_entry' flag is set to TRUE).
913 * All addressible entries are to be guaranteed zero if never initialized.
916 ASR_getTidAddress(Asr_softc_t *sc, int bus, int target, int lun, int new_entry)
918 target2lun_t *bus_ptr;
919 lun2tid_t *target_ptr;
923 * Validity checking of incoming parameters. More of a bound
924 * expansion limit than an issue with the code dealing with the
927 * sc must be valid before it gets here, so that check could be
928 * dropped if speed a critical issue.
931 || (bus > MAX_CHANNEL)
932 || (target > sc->ha_MaxId)
933 || (lun > sc->ha_MaxLun)) {
934 debug_asr_printf("(%lx,%d,%d,%d) target out of range\n",
935 (u_long)sc, bus, target, lun);
939 * See if there is an associated bus list.
941 * for performance, allocate in size of BUS_CHUNK chunks.
942 * BUS_CHUNK must be a power of two. This is to reduce
943 * fragmentation effects on the allocations.
946 new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1));
947 if ((bus_ptr = sc->ha_targets[bus]) == NULL) {
949 * Allocate a new structure?
950 * Since one element in structure, the +1
951 * needed for size has been abstracted.
953 if ((new_entry == FALSE)
954 || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)malloc (
955 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
956 M_TEMP, M_WAITOK | M_ZERO))
958 debug_asr_printf("failed to allocate bus list\n");
961 bus_ptr->size = new_size + 1;
962 } else if (bus_ptr->size <= new_size) {
963 target2lun_t * new_bus_ptr;
966 * Reallocate a new structure?
967 * Since one element in structure, the +1
968 * needed for size has been abstracted.
970 if ((new_entry == FALSE)
971 || ((new_bus_ptr = (target2lun_t *)malloc (
972 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
973 M_TEMP, M_WAITOK | M_ZERO)) == NULL)) {
974 debug_asr_printf("failed to reallocate bus list\n");
978 * Copy the whole thing, safer, simpler coding
979 * and not really performance critical at this point.
981 bcopy(bus_ptr, new_bus_ptr, sizeof(*bus_ptr)
982 + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1)));
983 sc->ha_targets[bus] = new_bus_ptr;
984 free(bus_ptr, M_TEMP);
985 bus_ptr = new_bus_ptr;
986 bus_ptr->size = new_size + 1;
989 * We now have the bus list, lets get to the target list.
990 * Since most systems have only *one* lun, we do not allocate
991 * in chunks as above, here we allow one, then in chunk sizes.
992 * TARGET_CHUNK must be a power of two. This is to reduce
993 * fragmentation effects on the allocations.
995 #define TARGET_CHUNK 8
996 if ((new_size = lun) != 0) {
997 new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1));
999 if ((target_ptr = bus_ptr->LUN[target]) == NULL) {
1001 * Allocate a new structure?
1002 * Since one element in structure, the +1
1003 * needed for size has been abstracted.
1005 if ((new_entry == FALSE)
1006 || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)malloc (
1007 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1008 M_TEMP, M_WAITOK | M_ZERO)) == NULL)) {
1009 debug_asr_printf("failed to allocate target list\n");
1012 target_ptr->size = new_size + 1;
1013 } else if (target_ptr->size <= new_size) {
1014 lun2tid_t * new_target_ptr;
1017 * Reallocate a new structure?
1018 * Since one element in structure, the +1
1019 * needed for size has been abstracted.
1021 if ((new_entry == FALSE)
1022 || ((new_target_ptr = (lun2tid_t *)malloc (
1023 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1024 M_TEMP, M_WAITOK | M_ZERO)) == NULL)) {
1025 debug_asr_printf("failed to reallocate target list\n");
1029 * Copy the whole thing, safer, simpler coding
1030 * and not really performance critical at this point.
1032 bcopy(target_ptr, new_target_ptr, sizeof(*target_ptr)
1033 + (sizeof(target_ptr->TID) * (target_ptr->size - 1)));
1034 bus_ptr->LUN[target] = new_target_ptr;
1035 free(target_ptr, M_TEMP);
1036 target_ptr = new_target_ptr;
1037 target_ptr->size = new_size + 1;
1040 * Now, acquire the TID address from the LUN indexed list.
1042 return (&(target_ptr->TID[lun]));
1043 } /* ASR_getTidAddress */
1046 * Get a pre-existing TID relationship.
1048 * If the TID was never set, return (tid_t)-1.
1050 * should use mutex rather than spl.
1052 static __inline tid_t
1053 ASR_getTid(Asr_softc_t *sc, int bus, int target, int lun)
1060 if (((tid_ptr = ASR_getTidAddress(sc, bus, target, lun, FALSE)) == NULL)
1061 /* (tid_t)0 or (tid_t)-1 indicate no TID */
1062 || (*tid_ptr == (tid_t)0)) {
1072 * Set a TID relationship.
1074 * If the TID was not set, return (tid_t)-1.
1076 * should use mutex rather than spl.
1078 static __inline tid_t
1079 ASR_setTid(Asr_softc_t *sc, int bus, int target, int lun, tid_t TID)
1084 if (TID != (tid_t)-1) {
1089 if ((tid_ptr = ASR_getTidAddress(sc, bus, target, lun, TRUE))
1100 /*-------------------------------------------------------------------------*/
1101 /* Function ASR_rescan */
1102 /*-------------------------------------------------------------------------*/
1103 /* The Parameters Passed To This Function Are : */
1104 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1106 /* This Function Will rescan the adapter and resynchronize any data */
1108 /* Return : 0 For OK, Error Code Otherwise */
1109 /*-------------------------------------------------------------------------*/
1112 ASR_rescan(Asr_softc_t *sc)
1118 * Re-acquire the LCT table and synchronize us to the adapter.
1120 if ((error = ASR_acquireLct(sc)) == 0) {
1121 error = ASR_acquireHrt(sc);
1128 bus = sc->ha_MaxBus;
1129 /* Reset all existing cached TID lookups */
1131 int target, event = 0;
1134 * Scan for all targets on this bus to see if they
1135 * got affected by the rescan.
1137 for (target = 0; target <= sc->ha_MaxId; ++target) {
1140 /* Stay away from the controller ID */
1141 if (target == sc->ha_adapter_target[bus]) {
1144 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
1145 PI2O_LCT_ENTRY Device;
1146 tid_t TID = (tid_t)-1;
1150 * See if the cached TID changed. Search for
1151 * the device in our new LCT.
1153 for (Device = sc->ha_LCT->LCTEntry;
1154 Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT)
1155 + I2O_LCT_getTableSize(sc->ha_LCT));
1157 if ((Device->le_type != I2O_UNKNOWN)
1158 && (Device->le_bus == bus)
1159 && (Device->le_target == target)
1160 && (Device->le_lun == lun)
1161 && (I2O_LCT_ENTRY_getUserTID(Device)
1163 TID = I2O_LCT_ENTRY_getLocalTID(
1169 * Indicate to the OS that the label needs
1170 * to be recalculated, or that the specific
1171 * open device is no longer valid (Merde)
1172 * because the cached TID changed.
1174 LastTID = ASR_getTid (sc, bus, target, lun);
1175 if (LastTID != TID) {
1176 struct cam_path * path;
1178 if (xpt_create_path(&path,
1180 cam_sim_path(sc->ha_sim[bus]),
1181 target, lun) != CAM_REQ_CMP) {
1182 if (TID == (tid_t)-1) {
1183 event |= AC_LOST_DEVICE;
1185 event |= AC_INQ_CHANGED
1186 | AC_GETDEV_CHANGED;
1189 if (TID == (tid_t)-1) {
1193 } else if (LastTID == (tid_t)-1) {
1194 struct ccb_getdev ccb;
1198 path, /*priority*/5);
1214 * We have the option of clearing the
1215 * cached TID for it to be rescanned, or to
1216 * set it now even if the device never got
1217 * accessed. We chose the later since we
1218 * currently do not use the condition that
1219 * the TID ever got cached.
1221 ASR_setTid (sc, bus, target, lun, TID);
1225 * The xpt layer can not handle multiple events at the
1228 if (event & AC_LOST_DEVICE) {
1229 xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL);
1231 if (event & AC_INQ_CHANGED) {
1232 xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL);
1234 if (event & AC_GETDEV_CHANGED) {
1235 xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL);
1237 } while (--bus >= 0);
1241 /*-------------------------------------------------------------------------*/
1242 /* Function ASR_reset */
1243 /*-------------------------------------------------------------------------*/
1244 /* The Parameters Passed To This Function Are : */
1245 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1247 /* This Function Will reset the adapter and resynchronize any data */
1250 /*-------------------------------------------------------------------------*/
1253 ASR_reset(Asr_softc_t *sc)
1258 if ((sc->ha_in_reset == HA_IN_RESET)
1259 || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) {
1264 * Promotes HA_OPERATIONAL to HA_IN_RESET,
1265 * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
1267 ++(sc->ha_in_reset);
1268 if (ASR_resetIOP(sc) == 0) {
1269 debug_asr_printf ("ASR_resetIOP failed\n");
1271 * We really need to take this card off-line, easier said
1272 * than make sense. Better to keep retrying for now since if a
1273 * UART cable is connected the blinkLEDs the adapter is now in
1274 * a hard state requiring action from the monitor commands to
1275 * the HBA to continue. For debugging waiting forever is a
1276 * good thing. In a production system, however, one may wish
1277 * to instead take the card off-line ...
1280 while (ASR_resetIOP(sc) == 0);
1282 retVal = ASR_init (sc);
1285 debug_asr_printf ("ASR_init failed\n");
1286 sc->ha_in_reset = HA_OFF_LINE;
1289 if (ASR_rescan (sc) != 0) {
1290 debug_asr_printf ("ASR_rescan failed\n");
1292 ASR_failActiveCommands (sc);
1293 if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) {
1294 printf ("asr%d: Brining adapter back on-line\n",
1296 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1299 sc->ha_in_reset = HA_OPERATIONAL;
1304 * Device timeout handler.
1307 asr_timeout(void *arg)
1309 union asr_ccb *ccb = (union asr_ccb *)arg;
1310 Asr_softc_t *sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1313 debug_asr_print_path(ccb);
1314 debug_asr_printf("timed out");
1317 * Check if the adapter has locked up?
1319 if ((s = ASR_getBlinkLedCode(sc)) != 0) {
1321 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
1322 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
1323 if (ASR_reset (sc) == ENXIO) {
1324 /* Try again later */
1325 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1327 (ccb->ccb_h.timeout * hz) / 1000);
1332 * Abort does not function on the ASR card!!! Walking away from
1333 * the SCSI command is also *very* dangerous. A SCSI BUS reset is
1334 * our best bet, followed by a complete adapter reset if that fails.
1337 /* Check if we already timed out once to raise the issue */
1338 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
1339 debug_asr_printf (" AGAIN\nreinitializing adapter\n");
1340 if (ASR_reset (sc) == ENXIO) {
1341 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1343 (ccb->ccb_h.timeout * hz) / 1000);
1348 debug_asr_printf ("\nresetting bus\n");
1349 /* If the BUS reset does not take, then an adapter reset is next! */
1350 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1351 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
1352 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1353 (ccb->ccb_h.timeout * hz) / 1000);
1354 ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
1355 xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
1360 * send a message asynchronously
1363 ASR_queue(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message)
1368 debug_asr_printf("Host Command Dump:\n");
1369 debug_asr_dump_message(Message);
1371 ccb = (union asr_ccb *)(long)
1372 I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
1374 if ((MessageOffset = ASR_getMessage(sc)) != EMPTY_QUEUE) {
1375 asr_set_frame(sc, Message, MessageOffset,
1376 I2O_MESSAGE_FRAME_getMessageSize(Message));
1378 ASR_ccbAdd (sc, ccb);
1380 /* Post the command */
1381 asr_set_ToFIFO(sc, MessageOffset);
1383 if (ASR_getBlinkLedCode(sc)) {
1385 * Unlikely we can do anything if we can't grab a
1386 * message frame :-(, but lets give it a try.
1388 (void)ASR_reset(sc);
1391 return (MessageOffset);
1395 /* Simple Scatter Gather elements */
1396 #define SG(SGL,Index,Flags,Buffer,Size) \
1397 I2O_FLAGS_COUNT_setCount( \
1398 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1400 I2O_FLAGS_COUNT_setFlags( \
1401 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1402 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags)); \
1403 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress( \
1404 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]), \
1405 (Buffer == NULL) ? 0 : KVTOPHYS(Buffer))
1408 * Retrieve Parameter Group.
1411 ASR_getParams(Asr_softc_t *sc, tid_t TID, int Group, void *Buffer,
1412 unsigned BufferSize)
1414 struct paramGetMessage {
1415 I2O_UTIL_PARAMS_GET_MESSAGE M;
1417 F[sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)];
1419 I2O_PARAM_OPERATIONS_LIST_HEADER Header;
1420 I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1];
1423 struct Operations *Operations_Ptr;
1424 I2O_UTIL_PARAMS_GET_MESSAGE *Message_Ptr;
1425 struct ParamBuffer {
1426 I2O_PARAM_RESULTS_LIST_HEADER Header;
1427 I2O_PARAM_READ_OPERATION_RESULT Read;
1431 Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(&Message,
1432 sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1433 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1434 Operations_Ptr = (struct Operations *)((char *)Message_Ptr
1435 + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1436 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1437 bzero(Operations_Ptr, sizeof(struct Operations));
1438 I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount(
1439 &(Operations_Ptr->Header), 1);
1440 I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation(
1441 &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET);
1442 I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount(
1443 &(Operations_Ptr->Template[0]), 0xFFFF);
1444 I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber(
1445 &(Operations_Ptr->Template[0]), Group);
1446 Buffer_Ptr = (struct ParamBuffer *)Buffer;
1447 bzero(Buffer_Ptr, BufferSize);
1449 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1451 + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1452 / sizeof(U32)) << 4));
1453 I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame),
1455 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
1456 I2O_UTIL_PARAMS_GET);
1458 * Set up the buffers as scatter gather elements.
1460 SG(&(Message_Ptr->SGL), 0,
1461 I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER,
1462 Operations_Ptr, sizeof(struct Operations));
1463 SG(&(Message_Ptr->SGL), 1,
1464 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
1465 Buffer_Ptr, BufferSize);
1467 if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP)
1468 && (Buffer_Ptr->Header.ResultCount)) {
1469 return ((void *)(Buffer_Ptr->Info));
1472 } /* ASR_getParams */
1475 * Acquire the LCT information.
1478 ASR_acquireLct(Asr_softc_t *sc)
1480 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1481 PI2O_SGE_SIMPLE_ELEMENT sg;
1482 int MessageSizeInBytes;
1486 PI2O_LCT_ENTRY Entry;
1489 * sc value assumed valid
1491 MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) -
1492 sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT);
1493 if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)malloc(
1494 MessageSizeInBytes, M_TEMP, M_WAITOK)) == NULL) {
1497 (void)ASR_fillMessage((void *)Message_Ptr, MessageSizeInBytes);
1498 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1499 (I2O_VERSION_11 + (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) -
1500 sizeof(I2O_SG_ELEMENT)) / sizeof(U32)) << 4)));
1501 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1502 I2O_EXEC_LCT_NOTIFY);
1503 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1504 I2O_CLASS_MATCH_ANYCLASS);
1506 * Call the LCT table to determine the number of device entries
1507 * to reserve space for.
1509 SG(&(Message_Ptr->SGL), 0,
1510 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table,
1513 * since this code is reused in several systems, code efficiency
1514 * is greater by using a shift operation rather than a divide by
1515 * sizeof(u_int32_t).
1517 I2O_LCT_setTableSize(&Table,
1518 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1519 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1521 * Determine the size of the LCT table.
1524 free(sc->ha_LCT, M_TEMP);
1527 * malloc only generates contiguous memory when less than a
1528 * page is expected. We must break the request up into an SG list ...
1530 if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <=
1531 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)))
1532 || (len > (128 * 1024))) { /* Arbitrary */
1533 free(Message_Ptr, M_TEMP);
1536 if ((sc->ha_LCT = (PI2O_LCT)malloc (len, M_TEMP, M_WAITOK)) == NULL) {
1537 free(Message_Ptr, M_TEMP);
1541 * since this code is reused in several systems, code efficiency
1542 * is greater by using a shift operation rather than a divide by
1543 * sizeof(u_int32_t).
1545 I2O_LCT_setTableSize(sc->ha_LCT,
1546 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1548 * Convert the access to the LCT table into a SG list.
1550 sg = Message_Ptr->SGL.u.Simple;
1551 v = (caddr_t)(sc->ha_LCT);
1553 int next, base, span;
1556 next = base = KVTOPHYS(v);
1557 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
1559 /* How far can we go contiguously */
1560 while ((len > 0) && (base == next)) {
1563 next = trunc_page(base) + PAGE_SIZE;
1574 /* Construct the Flags */
1575 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
1577 int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT;
1579 rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT
1580 | I2O_SGL_FLAGS_LAST_ELEMENT
1581 | I2O_SGL_FLAGS_END_OF_BUFFER);
1583 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw);
1591 * Incrementing requires resizing of the packet.
1594 MessageSizeInBytes += sizeof(*sg);
1595 I2O_MESSAGE_FRAME_setMessageSize(
1596 &(Message_Ptr->StdMessageFrame),
1597 I2O_MESSAGE_FRAME_getMessageSize(
1598 &(Message_Ptr->StdMessageFrame))
1599 + (sizeof(*sg) / sizeof(U32)));
1601 PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr;
1603 if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)
1604 malloc(MessageSizeInBytes, M_TEMP, M_WAITOK))
1606 free(sc->ha_LCT, M_TEMP);
1608 free(Message_Ptr, M_TEMP);
1611 span = ((caddr_t)sg) - (caddr_t)Message_Ptr;
1612 bcopy(Message_Ptr, NewMessage_Ptr, span);
1613 free(Message_Ptr, M_TEMP);
1614 sg = (PI2O_SGE_SIMPLE_ELEMENT)
1615 (((caddr_t)NewMessage_Ptr) + span);
1616 Message_Ptr = NewMessage_Ptr;
1621 retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1622 free(Message_Ptr, M_TEMP);
1623 if (retval != CAM_REQ_CMP) {
1627 /* If the LCT table grew, lets truncate accesses */
1628 if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) {
1629 I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table));
1631 for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY)
1632 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1634 Entry->le_type = I2O_UNKNOWN;
1635 switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) {
1637 case I2O_CLASS_RANDOM_BLOCK_STORAGE:
1638 Entry->le_type = I2O_BSA;
1641 case I2O_CLASS_SCSI_PERIPHERAL:
1642 Entry->le_type = I2O_SCSI;
1645 case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL:
1646 Entry->le_type = I2O_FCA;
1649 case I2O_CLASS_BUS_ADAPTER_PORT:
1650 Entry->le_type = I2O_PORT | I2O_SCSI;
1652 case I2O_CLASS_FIBRE_CHANNEL_PORT:
1653 if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) ==
1654 I2O_CLASS_FIBRE_CHANNEL_PORT) {
1655 Entry->le_type = I2O_PORT | I2O_FCA;
1657 { struct ControllerInfo {
1658 I2O_PARAM_RESULTS_LIST_HEADER Header;
1659 I2O_PARAM_READ_OPERATION_RESULT Read;
1660 I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1662 PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1664 Entry->le_bus = 0xff;
1665 Entry->le_target = 0xff;
1666 Entry->le_lun = 0xff;
1668 if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)
1670 I2O_LCT_ENTRY_getLocalTID(Entry),
1671 I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO,
1672 &Buffer, sizeof(struct ControllerInfo))) == NULL) {
1676 = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID(
1683 { struct DeviceInfo {
1684 I2O_PARAM_RESULTS_LIST_HEADER Header;
1685 I2O_PARAM_READ_OPERATION_RESULT Read;
1686 I2O_DPT_DEVICE_INFO_SCALAR Info;
1688 PI2O_DPT_DEVICE_INFO_SCALAR Info;
1690 Entry->le_bus = 0xff;
1691 Entry->le_target = 0xff;
1692 Entry->le_lun = 0xff;
1694 if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR)
1696 I2O_LCT_ENTRY_getLocalTID(Entry),
1697 I2O_DPT_DEVICE_INFO_GROUP_NO,
1698 &Buffer, sizeof(struct DeviceInfo))) == NULL) {
1702 |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info);
1704 = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info);
1705 if ((Entry->le_bus > sc->ha_MaxBus)
1706 && (Entry->le_bus <= MAX_CHANNEL)) {
1707 sc->ha_MaxBus = Entry->le_bus;
1710 = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info);
1712 = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info);
1716 * A zero return value indicates success.
1719 } /* ASR_acquireLct */
1722 * Initialize a message frame.
1723 * We assume that the CDB has already been set up, so all we do here is
1724 * generate the Scatter Gather list.
1726 static PI2O_MESSAGE_FRAME
1727 ASR_init_message(union asr_ccb *ccb, PI2O_MESSAGE_FRAME Message)
1729 PI2O_MESSAGE_FRAME Message_Ptr;
1730 PI2O_SGE_SIMPLE_ELEMENT sg;
1731 Asr_softc_t *sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1732 vm_size_t size, len;
1735 int next, span, base, rw;
1736 int target = ccb->ccb_h.target_id;
1737 int lun = ccb->ccb_h.target_lun;
1738 int bus =cam_sim_bus(xpt_path_sim(ccb->ccb_h.path));
1741 /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */
1742 Message_Ptr = (I2O_MESSAGE_FRAME *)Message;
1743 bzero(Message_Ptr, (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) -
1744 sizeof(I2O_SG_ELEMENT)));
1746 if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) {
1747 PI2O_LCT_ENTRY Device;
1750 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
1751 (((U32 *)sc->ha_LCT) + I2O_LCT_getTableSize(sc->ha_LCT));
1753 if ((Device->le_type != I2O_UNKNOWN)
1754 && (Device->le_bus == bus)
1755 && (Device->le_target == target)
1756 && (Device->le_lun == lun)
1757 && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) {
1758 TID = I2O_LCT_ENTRY_getLocalTID(Device);
1759 ASR_setTid(sc, Device->le_bus,
1760 Device->le_target, Device->le_lun,
1766 if (TID == (tid_t)0) {
1769 I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID);
1770 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(
1771 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID);
1772 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 |
1773 (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1774 / sizeof(U32)) << 4));
1775 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
1776 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
1777 - sizeof(I2O_SG_ELEMENT)) / sizeof(U32));
1778 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
1779 I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE);
1780 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
1781 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC);
1782 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
1783 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
1784 I2O_SCB_FLAG_ENABLE_DISCONNECT
1785 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
1786 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
1788 * We do not need any (optional byteswapping) method access to
1789 * the Initiator & Transaction context field.
1791 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
1793 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
1794 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID);
1798 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(
1799 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len);
1800 bcopy(&(ccb->csio.cdb_io),
1801 ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB,
1805 * Given a buffer describing a transfer, set up a scatter/gather map
1806 * in a ccb to map that SCSI transfer.
1809 rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR;
1811 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
1812 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
1813 (ccb->csio.dxfer_len)
1814 ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE
1815 | I2O_SCB_FLAG_ENABLE_DISCONNECT
1816 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
1817 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)
1818 : (I2O_SCB_FLAG_XFER_FROM_DEVICE
1819 | I2O_SCB_FLAG_ENABLE_DISCONNECT
1820 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
1821 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER))
1822 : (I2O_SCB_FLAG_ENABLE_DISCONNECT
1823 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
1824 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
1827 * Given a transfer described by a `data', fill in the SG list.
1829 sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0];
1831 len = ccb->csio.dxfer_len;
1832 v = ccb->csio.data_ptr;
1833 KASSERT(ccb->csio.dxfer_len >= 0, ("csio.dxfer_len < 0"));
1834 MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr);
1835 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
1836 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len);
1837 while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
1838 Message_Ptr)->SGL.u.Simple[SG_SIZE])) {
1840 next = base = KVTOPHYS(v);
1841 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
1843 /* How far can we go contiguously */
1844 while ((len > 0) && (base == next)) {
1845 next = trunc_page(base) + PAGE_SIZE;
1856 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
1858 rw |= I2O_SGL_FLAGS_LAST_ELEMENT;
1860 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount),
1861 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw);
1863 MessageSize += sizeof(*sg) / sizeof(U32);
1865 /* We always do the request sense ... */
1866 if ((span = ccb->csio.sense_len) == 0) {
1867 span = sizeof(ccb->csio.sense_data);
1869 SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
1870 &(ccb->csio.sense_data), span);
1871 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
1872 MessageSize + (sizeof(*sg) / sizeof(U32)));
1873 return (Message_Ptr);
1874 } /* ASR_init_message */
1877 * Reset the adapter.
1880 ASR_initOutBound(Asr_softc_t *sc)
1882 struct initOutBoundMessage {
1883 I2O_EXEC_OUTBOUND_INIT_MESSAGE M;
1886 PI2O_EXEC_OUTBOUND_INIT_MESSAGE Message_Ptr;
1887 U32 *volatile Reply_Ptr;
1891 * Build up our copy of the Message.
1893 Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(&Message,
1894 sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE));
1895 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1896 I2O_EXEC_OUTBOUND_INIT);
1897 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE);
1898 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr,
1899 sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME));
1901 * Reset the Reply Status
1903 *(Reply_Ptr = (U32 *)((char *)Message_Ptr
1904 + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0;
1905 SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr,
1908 * Send the Message out
1910 if ((Old = ASR_initiateCp(sc, (PI2O_MESSAGE_FRAME)Message_Ptr)) !=
1915 * Wait for a response (Poll).
1917 while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED);
1919 * Re-enable the interrupts.
1921 asr_set_intr(sc, Old);
1923 * Populate the outbound table.
1925 if (sc->ha_Msgs == NULL) {
1927 /* Allocate the reply frames */
1928 size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
1929 * sc->ha_Msgs_Count;
1932 * contigmalloc only works reliably at
1933 * initialization time.
1935 if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
1936 contigmalloc (size, M_DEVBUF, M_WAITOK, 0ul,
1937 0xFFFFFFFFul, (u_long)sizeof(U32), 0ul)) != NULL) {
1938 bzero(sc->ha_Msgs, size);
1939 sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs);
1943 /* Initialize the outbound FIFO */
1944 if (sc->ha_Msgs != NULL)
1945 for(size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
1947 asr_set_FromFIFO(sc, addr);
1948 addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME);
1950 return (*Reply_Ptr);
1953 } /* ASR_initOutBound */
1956 * Set the system table
1959 ASR_setSysTab(Asr_softc_t *sc)
1961 PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr;
1962 PI2O_SET_SYSTAB_HEADER SystemTable;
1963 Asr_softc_t * ha, *next;
1964 PI2O_SGE_SIMPLE_ELEMENT sg;
1967 if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)malloc (
1968 sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK | M_ZERO)) == NULL) {
1971 STAILQ_FOREACH(ha, &Asr_softc_list, ha_next) {
1972 ++SystemTable->NumberEntries;
1974 if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)malloc (
1975 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
1976 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)),
1977 M_TEMP, M_WAITOK)) == NULL) {
1978 free(SystemTable, M_TEMP);
1981 (void)ASR_fillMessage((void *)Message_Ptr,
1982 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
1983 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)));
1984 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1986 (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1987 / sizeof(U32)) << 4)));
1988 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1989 I2O_EXEC_SYS_TAB_SET);
1991 * Call the LCT table to determine the number of device entries
1992 * to reserve space for.
1993 * since this code is reused in several systems, code efficiency
1994 * is greater by using a shift operation rather than a divide by
1995 * sizeof(u_int32_t).
1997 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
1998 + ((I2O_MESSAGE_FRAME_getVersionOffset(
1999 &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2));
2000 SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2002 STAILQ_FOREACH_SAFE(ha, &Asr_softc_list, ha_next, next) {
2005 ? (I2O_SGL_FLAGS_DIR)
2006 : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)),
2007 &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable));
2010 SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2011 SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT
2012 | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2013 retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2014 free(Message_Ptr, M_TEMP);
2015 free(SystemTable, M_TEMP);
2017 } /* ASR_setSysTab */
2020 ASR_acquireHrt(Asr_softc_t *sc)
2022 I2O_EXEC_HRT_GET_MESSAGE Message;
2023 I2O_EXEC_HRT_GET_MESSAGE *Message_Ptr;
2026 I2O_HRT_ENTRY Entry[MAX_CHANNEL];
2028 u_int8_t NumberOfEntries;
2029 PI2O_HRT_ENTRY Entry;
2031 bzero(&Hrt, sizeof (Hrt));
2032 Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(&Message,
2033 sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2034 + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2035 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2037 + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2038 / sizeof(U32)) << 4)));
2039 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
2043 * Set up the buffers as scatter gather elements.
2045 SG(&(Message_Ptr->SGL), 0,
2046 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2048 if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) {
2051 if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header))
2052 > (MAX_CHANNEL + 1)) {
2053 NumberOfEntries = MAX_CHANNEL + 1;
2055 for (Entry = Hrt.Header.HRTEntry;
2056 NumberOfEntries != 0;
2057 ++Entry, --NumberOfEntries) {
2058 PI2O_LCT_ENTRY Device;
2060 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2061 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2063 if (I2O_LCT_ENTRY_getLocalTID(Device)
2064 == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) {
2065 Device->le_bus = I2O_HRT_ENTRY_getAdapterID(
2067 if ((Device->le_bus > sc->ha_MaxBus)
2068 && (Device->le_bus <= MAX_CHANNEL)) {
2069 sc->ha_MaxBus = Device->le_bus;
2075 } /* ASR_acquireHrt */
2078 * Enable the adapter.
2081 ASR_enableSys(Asr_softc_t *sc)
2083 I2O_EXEC_SYS_ENABLE_MESSAGE Message;
2084 PI2O_EXEC_SYS_ENABLE_MESSAGE Message_Ptr;
2086 Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(&Message,
2087 sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE));
2088 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2089 I2O_EXEC_SYS_ENABLE);
2090 return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0);
2091 } /* ASR_enableSys */
2094 * Perform the stages necessary to initialize the adapter
2097 ASR_init(Asr_softc_t *sc)
2099 return ((ASR_initOutBound(sc) == 0)
2100 || (ASR_setSysTab(sc) != CAM_REQ_CMP)
2101 || (ASR_enableSys(sc) != CAM_REQ_CMP));
2105 * Send a Synchronize Cache command to the target device.
2108 ASR_sync(Asr_softc_t *sc, int bus, int target, int lun)
2113 * We will not synchronize the device when there are outstanding
2114 * commands issued by the OS (this is due to a locked up device,
2115 * as the OS normally would flush all outstanding commands before
2116 * issuing a shutdown or an adapter reset).
2119 && (LIST_FIRST(&(sc->ha_ccb)) != NULL)
2120 && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1)
2121 && (TID != (tid_t)0)) {
2122 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message;
2123 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
2125 Message_Ptr = (PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *)&Message;
2126 bzero(Message_Ptr, sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2127 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2129 I2O_MESSAGE_FRAME_setVersionOffset(
2130 (PI2O_MESSAGE_FRAME)Message_Ptr,
2132 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2133 - sizeof(I2O_SG_ELEMENT))
2134 / sizeof(U32)) << 4));
2135 I2O_MESSAGE_FRAME_setMessageSize(
2136 (PI2O_MESSAGE_FRAME)Message_Ptr,
2137 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2138 - sizeof(I2O_SG_ELEMENT))
2140 I2O_MESSAGE_FRAME_setInitiatorAddress (
2141 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2142 I2O_MESSAGE_FRAME_setFunction(
2143 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2144 I2O_MESSAGE_FRAME_setTargetAddress(
2145 (PI2O_MESSAGE_FRAME)Message_Ptr, TID);
2146 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2147 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2149 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID);
2150 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2151 I2O_SCB_FLAG_ENABLE_DISCONNECT
2152 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2153 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2154 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2155 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2156 DPT_ORGANIZATION_ID);
2157 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
2158 Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE;
2159 Message_Ptr->CDB[1] = (lun << 5);
2161 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2162 (I2O_SCB_FLAG_XFER_FROM_DEVICE
2163 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2164 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2165 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2167 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2173 ASR_synchronize(Asr_softc_t *sc)
2175 int bus, target, lun;
2177 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
2178 for (target = 0; target <= sc->ha_MaxId; ++target) {
2179 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
2180 ASR_sync(sc,bus,target,lun);
2187 * Reset the HBA, targets and BUS.
2188 * Currently this resets *all* the SCSI busses.
2190 static __inline void
2191 asr_hbareset(Asr_softc_t *sc)
2193 ASR_synchronize(sc);
2194 (void)ASR_reset(sc);
2195 } /* asr_hbareset */
2198 * A reduced copy of the real pci_map_mem, incorporating the MAX_MAP
2199 * limit and a reduction in error checking (in the pre 4.0 case).
2202 asr_pci_map_mem(device_t dev, Asr_softc_t *sc)
2208 * I2O specification says we must find first *memory* mapped BAR
2210 for (rid = 0; rid < 4; rid++) {
2211 p = pci_read_config(dev, PCIR_BAR(rid), sizeof(p));
2222 rid = PCIR_BAR(rid);
2223 p = pci_read_config(dev, rid, sizeof(p));
2224 pci_write_config(dev, rid, -1, sizeof(p));
2225 l = 0 - (pci_read_config(dev, rid, sizeof(l)) & ~15);
2226 pci_write_config(dev, rid, p, sizeof(p));
2231 * The 2005S Zero Channel RAID solution is not a perfect PCI
2232 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2233 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2234 * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2235 * accessible via BAR0, the messaging registers are accessible
2236 * via BAR1. If the subdevice code is 50 to 59 decimal.
2238 s = pci_read_config(dev, PCIR_DEVVENDOR, sizeof(s));
2239 if (s != 0xA5111044) {
2240 s = pci_read_config(dev, PCIR_SUBVEND_0, sizeof(s));
2241 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2242 && (ADPTDOMINATOR_SUB_ID_START <= s)
2243 && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2244 l = MAX_MAP; /* Conjoined BAR Raptor Daptor */
2248 sc->ha_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
2249 p, p + l, l, RF_ACTIVE);
2250 if (sc->ha_mem_res == NULL) {
2253 sc->ha_Base = rman_get_start(sc->ha_mem_res);
2254 sc->ha_i2o_bhandle = rman_get_bushandle(sc->ha_mem_res);
2255 sc->ha_i2o_btag = rman_get_bustag(sc->ha_mem_res);
2257 if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
2258 if ((rid += sizeof(u_int32_t)) >= PCIR_BAR(4)) {
2261 p = pci_read_config(dev, rid, sizeof(p));
2262 pci_write_config(dev, rid, -1, sizeof(p));
2263 l = 0 - (pci_read_config(dev, rid, sizeof(l)) & ~15);
2264 pci_write_config(dev, rid, p, sizeof(p));
2269 sc->ha_mes_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
2270 p, p + l, l, RF_ACTIVE);
2271 if (sc->ha_mes_res == NULL) {
2274 sc->ha_frame_bhandle = rman_get_bushandle(sc->ha_mes_res);
2275 sc->ha_frame_btag = rman_get_bustag(sc->ha_mes_res);
2277 sc->ha_frame_bhandle = sc->ha_i2o_bhandle;
2278 sc->ha_frame_btag = sc->ha_i2o_btag;
2281 } /* asr_pci_map_mem */
2284 * A simplified copy of the real pci_map_int with additional
2285 * registration requirements.
2288 asr_pci_map_int(device_t dev, Asr_softc_t *sc)
2292 sc->ha_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
2293 RF_ACTIVE | RF_SHAREABLE);
2294 if (sc->ha_irq_res == NULL) {
2297 if (bus_setup_intr(dev, sc->ha_irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
2298 NULL, (driver_intr_t *)asr_intr, (void *)sc, &(sc->ha_intr))) {
2301 sc->ha_irq = pci_read_config(dev, PCIR_INTLINE, sizeof(char));
2303 } /* asr_pci_map_int */
2306 asr_status_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2313 sc = (Asr_softc_t *)arg;
2316 * The status word can be at a 64-bit address, but the existing
2317 * accessor macros simply cannot manipulate 64-bit addresses.
2319 sc->ha_status_phys = (u_int32_t)segs[0].ds_addr +
2320 offsetof(struct Asr_status_mem, status);
2321 sc->ha_rstatus_phys = (u_int32_t)segs[0].ds_addr +
2322 offsetof(struct Asr_status_mem, rstatus);
2326 asr_alloc_dma(Asr_softc_t *sc)
2332 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* PCI parent */
2333 1, 0, /* algnmnt, boundary */
2334 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
2335 BUS_SPACE_MAXADDR, /* highaddr */
2336 NULL, NULL, /* filter, filterarg */
2337 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
2338 BUS_SPACE_UNRESTRICTED, /* nsegments */
2339 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
2341 NULL, NULL, /* lockfunc, lockarg */
2342 &sc->ha_parent_dmat)) {
2343 device_printf(dev, "Cannot allocate parent DMA tag\n");
2347 if (bus_dma_tag_create(sc->ha_parent_dmat, /* parent */
2348 1, 0, /* algnmnt, boundary */
2349 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
2350 BUS_SPACE_MAXADDR, /* highaddr */
2351 NULL, NULL, /* filter, filterarg */
2352 sizeof(sc->ha_statusmem),/* maxsize */
2354 sizeof(sc->ha_statusmem),/* maxsegsize */
2356 NULL, NULL, /* lockfunc, lockarg */
2357 &sc->ha_statusmem_dmat)) {
2358 device_printf(dev, "Cannot allocate status DMA tag\n");
2359 bus_dma_tag_destroy(sc->ha_parent_dmat);
2363 if (bus_dmamem_alloc(sc->ha_statusmem_dmat, (void **)&sc->ha_statusmem,
2364 BUS_DMA_NOWAIT, &sc->ha_statusmem_dmamap)) {
2365 device_printf(dev, "Cannot allocate status memory\n");
2366 bus_dma_tag_destroy(sc->ha_statusmem_dmat);
2367 bus_dma_tag_destroy(sc->ha_parent_dmat);
2370 (void)bus_dmamap_load(sc->ha_statusmem_dmat, sc->ha_statusmem_dmamap,
2371 sc->ha_statusmem, sizeof(sc->ha_statusmem), asr_status_cb, sc, 0);
2377 asr_release_dma(Asr_softc_t *sc)
2380 if (sc->ha_rstatus_phys != 0)
2381 bus_dmamap_unload(sc->ha_statusmem_dmat,
2382 sc->ha_statusmem_dmamap);
2383 if (sc->ha_statusmem != NULL)
2384 bus_dmamem_free(sc->ha_statusmem_dmat, sc->ha_statusmem,
2385 sc->ha_statusmem_dmamap);
2386 if (sc->ha_statusmem_dmat != NULL)
2387 bus_dma_tag_destroy(sc->ha_statusmem_dmat);
2388 if (sc->ha_parent_dmat != NULL)
2389 bus_dma_tag_destroy(sc->ha_parent_dmat);
2393 * Attach the devices, and virtual devices to the driver list.
2396 asr_attach(device_t dev)
2398 PI2O_EXEC_STATUS_GET_REPLY status;
2399 PI2O_LCT_ENTRY Device;
2401 struct scsi_inquiry_data *iq;
2402 int bus, size, unit;
2405 sc = device_get_softc(dev);
2406 unit = device_get_unit(dev);
2409 if (STAILQ_EMPTY(&Asr_softc_list)) {
2411 * Fixup the OS revision as saved in the dptsig for the
2412 * engine (dptioctl.h) to pick up.
2414 bcopy(osrelease, &ASR_sig.dsDescription[16], 5);
2417 * Initialize the software structure
2419 LIST_INIT(&(sc->ha_ccb));
2420 /* Link us into the HA list */
2421 STAILQ_INSERT_TAIL(&Asr_softc_list, sc, ha_next);
2424 * This is the real McCoy!
2426 if (!asr_pci_map_mem(dev, sc)) {
2427 device_printf(dev, "could not map memory\n");
2430 /* Enable if not formerly enabled */
2431 pci_enable_busmaster(dev);
2433 sc->ha_pciBusNum = pci_get_bus(dev);
2434 sc->ha_pciDeviceNum = (pci_get_slot(dev) << 3) | pci_get_function(dev);
2436 if ((error = asr_alloc_dma(sc)) != 0)
2439 /* Check if the device is there? */
2440 if (ASR_resetIOP(sc) == 0) {
2441 device_printf(dev, "Cannot reset adapter\n");
2442 asr_release_dma(sc);
2445 status = &sc->ha_statusmem->status;
2446 if (ASR_getStatus(sc) == NULL) {
2447 device_printf(dev, "could not initialize hardware\n");
2448 asr_release_dma(sc);
2451 sc->ha_SystemTable.OrganizationID = status->OrganizationID;
2452 sc->ha_SystemTable.IOP_ID = status->IOP_ID;
2453 sc->ha_SystemTable.I2oVersion = status->I2oVersion;
2454 sc->ha_SystemTable.IopState = status->IopState;
2455 sc->ha_SystemTable.MessengerType = status->MessengerType;
2456 sc->ha_SystemTable.InboundMessageFrameSize = status->InboundMFrameSize;
2457 sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow =
2458 (U32)(sc->ha_Base + I2O_REG_TOFIFO); /* XXX 64-bit */
2460 if (!asr_pci_map_int(dev, (void *)sc)) {
2461 device_printf(dev, "could not map interrupt\n");
2462 asr_release_dma(sc);
2466 /* Adjust the maximim inbound count */
2467 if (((sc->ha_QueueSize =
2468 I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status)) >
2469 MAX_INBOUND) || (sc->ha_QueueSize == 0)) {
2470 sc->ha_QueueSize = MAX_INBOUND;
2473 /* Adjust the maximum outbound count */
2474 if (((sc->ha_Msgs_Count =
2475 I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status)) >
2476 MAX_OUTBOUND) || (sc->ha_Msgs_Count == 0)) {
2477 sc->ha_Msgs_Count = MAX_OUTBOUND;
2479 if (sc->ha_Msgs_Count > sc->ha_QueueSize) {
2480 sc->ha_Msgs_Count = sc->ha_QueueSize;
2483 /* Adjust the maximum SG size to adapter */
2484 if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize(status) <<
2485 2)) > MAX_INBOUND_SIZE) {
2486 size = MAX_INBOUND_SIZE;
2488 sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2489 + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT);
2492 * Only do a bus/HBA reset on the first time through. On this
2493 * first time through, we do not send a flush to the devices.
2495 if (ASR_init(sc) == 0) {
2497 I2O_PARAM_RESULTS_LIST_HEADER Header;
2498 I2O_PARAM_READ_OPERATION_RESULT Read;
2499 I2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2501 PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2502 #define FW_DEBUG_BLED_OFFSET 8
2504 if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)
2505 ASR_getParams(sc, 0, I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
2506 &Buffer, sizeof(struct BufferInfo))) != NULL) {
2507 sc->ha_blinkLED = FW_DEBUG_BLED_OFFSET +
2508 I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info);
2510 if (ASR_acquireLct(sc) == 0) {
2511 (void)ASR_acquireHrt(sc);
2514 device_printf(dev, "failed to initialize\n");
2515 asr_release_dma(sc);
2519 * Add in additional probe responses for more channels. We
2520 * are reusing the variable `target' for a channel loop counter.
2521 * Done here because of we need both the acquireLct and
2524 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2525 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); ++Device) {
2526 if (Device->le_type == I2O_UNKNOWN) {
2529 if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) {
2530 if (Device->le_target > sc->ha_MaxId) {
2531 sc->ha_MaxId = Device->le_target;
2533 if (Device->le_lun > sc->ha_MaxLun) {
2534 sc->ha_MaxLun = Device->le_lun;
2537 if (((Device->le_type & I2O_PORT) != 0)
2538 && (Device->le_bus <= MAX_CHANNEL)) {
2539 /* Do not increase MaxId for efficiency */
2540 sc->ha_adapter_target[Device->le_bus] =
2546 * Print the HBA model number as inquired from the card.
2549 device_printf(dev, " ");
2551 if ((iq = (struct scsi_inquiry_data *)malloc(
2552 sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK | M_ZERO)) !=
2554 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message;
2555 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
2558 Message_Ptr = (PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *)&Message;
2559 bzero(Message_Ptr, sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) -
2560 sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2562 I2O_MESSAGE_FRAME_setVersionOffset(
2563 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_VERSION_11 |
2564 (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2565 - sizeof(I2O_SG_ELEMENT)) / sizeof(U32)) << 4));
2566 I2O_MESSAGE_FRAME_setMessageSize(
2567 (PI2O_MESSAGE_FRAME)Message_Ptr,
2568 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) -
2569 sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)) /
2571 I2O_MESSAGE_FRAME_setInitiatorAddress(
2572 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2573 I2O_MESSAGE_FRAME_setFunction(
2574 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2575 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode(
2576 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC);
2577 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2578 I2O_SCB_FLAG_ENABLE_DISCONNECT
2579 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2580 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2581 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1);
2582 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2583 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2584 DPT_ORGANIZATION_ID);
2585 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
2586 Message_Ptr->CDB[0] = INQUIRY;
2587 Message_Ptr->CDB[4] =
2588 (unsigned char)sizeof(struct scsi_inquiry_data);
2589 if (Message_Ptr->CDB[4] == 0) {
2590 Message_Ptr->CDB[4] = 255;
2593 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2594 (I2O_SCB_FLAG_XFER_FROM_DEVICE
2595 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2596 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2597 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2599 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
2600 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2601 sizeof(struct scsi_inquiry_data));
2602 SG(&(Message_Ptr->SGL), 0,
2603 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2604 iq, sizeof(struct scsi_inquiry_data));
2605 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2607 if (iq->vendor[0] && (iq->vendor[0] != ' ')) {
2609 ASR_prstring (iq->vendor, 8);
2612 if (iq->product[0] && (iq->product[0] != ' ')) {
2614 ASR_prstring (iq->product, 16);
2617 if (iq->revision[0] && (iq->revision[0] != ' ')) {
2618 printf (" FW Rev. ");
2619 ASR_prstring (iq->revision, 4);
2627 printf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1,
2628 (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize);
2630 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
2631 struct cam_devq * devq;
2632 int QueueSize = sc->ha_QueueSize;
2634 if (QueueSize > MAX_INBOUND) {
2635 QueueSize = MAX_INBOUND;
2639 * Create the device queue for our SIM(s).
2641 if ((devq = cam_simq_alloc(QueueSize)) == NULL) {
2646 * Construct our first channel SIM entry
2648 sc->ha_sim[bus] = cam_sim_alloc(asr_action, asr_poll, "asr", sc,
2650 1, QueueSize, devq);
2651 if (sc->ha_sim[bus] == NULL) {
2655 if (xpt_bus_register(sc->ha_sim[bus], dev, bus) != CAM_SUCCESS){
2656 cam_sim_free(sc->ha_sim[bus],
2658 sc->ha_sim[bus] = NULL;
2662 if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL,
2663 cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD,
2664 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
2665 xpt_bus_deregister( cam_sim_path(sc->ha_sim[bus]));
2666 cam_sim_free(sc->ha_sim[bus], /*free_devq*/TRUE);
2667 sc->ha_sim[bus] = NULL;
2673 * Generate the device node information
2675 sc->ha_devt = make_dev(&asr_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0640,
2677 if (sc->ha_devt != NULL)
2678 (void)make_dev_alias(sc->ha_devt, "rdpti%d", unit);
2679 sc->ha_devt->si_drv1 = sc;
2684 asr_poll(struct cam_sim *sim)
2686 asr_intr(cam_sim_softc(sim));
2690 asr_action(struct cam_sim *sim, union ccb *ccb)
2692 struct Asr_softc *sc;
2694 debug_asr_printf("asr_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb,
2695 ccb->ccb_h.func_code);
2697 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n"));
2699 ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim);
2701 switch ((int)ccb->ccb_h.func_code) {
2703 /* Common cases first */
2704 case XPT_SCSI_IO: /* Execute the requested I/O operation */
2707 char M[MAX_INBOUND_SIZE];
2709 PI2O_MESSAGE_FRAME Message_Ptr;
2711 /* Reject incoming commands while we are resetting the card */
2712 if (sc->ha_in_reset != HA_OPERATIONAL) {
2713 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2714 if (sc->ha_in_reset >= HA_OFF_LINE) {
2715 /* HBA is now off-line */
2716 ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR;
2718 /* HBA currently resetting, try again later. */
2719 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
2721 debug_asr_cmd_printf (" e\n");
2723 debug_asr_cmd_printf (" q\n");
2726 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
2728 "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n",
2729 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
2730 ccb->csio.cdb_io.cdb_bytes[0],
2732 ccb->ccb_h.target_id,
2733 ccb->ccb_h.target_lun);
2735 debug_asr_cmd_printf("(%d,%d,%d,%d)", cam_sim_unit(sim),
2736 cam_sim_bus(sim), ccb->ccb_h.target_id,
2737 ccb->ccb_h.target_lun);
2738 debug_asr_dump_ccb(ccb);
2740 if ((Message_Ptr = ASR_init_message((union asr_ccb *)ccb,
2741 (PI2O_MESSAGE_FRAME)&Message)) != NULL) {
2742 debug_asr_cmd2_printf ("TID=%x:\n",
2743 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID(
2744 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr));
2745 debug_asr_cmd2_dump_message(Message_Ptr);
2746 debug_asr_cmd1_printf (" q");
2748 if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) {
2749 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2750 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
2751 debug_asr_cmd_printf (" E\n");
2754 debug_asr_cmd_printf(" Q\n");
2758 * We will get here if there is no valid TID for the device
2759 * referenced in the scsi command packet.
2761 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2762 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
2763 debug_asr_cmd_printf (" B\n");
2768 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
2769 /* Rese HBA device ... */
2771 ccb->ccb_h.status = CAM_REQ_CMP;
2775 #if (defined(REPORT_LUNS))
2778 case XPT_ABORT: /* Abort the specified CCB */
2780 ccb->ccb_h.status = CAM_REQ_INVALID;
2784 case XPT_SET_TRAN_SETTINGS:
2786 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
2790 case XPT_GET_TRAN_SETTINGS:
2791 /* Get default/user set transfer settings for the target */
2793 struct ccb_trans_settings *cts = &(ccb->cts);
2794 struct ccb_trans_settings_scsi *scsi =
2795 &cts->proto_specific.scsi;
2796 struct ccb_trans_settings_spi *spi =
2797 &cts->xport_specific.spi;
2799 if (cts->type == CTS_TYPE_USER_SETTINGS) {
2800 cts->protocol = PROTO_SCSI;
2801 cts->protocol_version = SCSI_REV_2;
2802 cts->transport = XPORT_SPI;
2803 cts->transport_version = 2;
2805 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
2806 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
2807 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
2808 spi->sync_period = 6; /* 40MHz */
2809 spi->sync_offset = 15;
2810 spi->valid = CTS_SPI_VALID_SYNC_RATE
2811 | CTS_SPI_VALID_SYNC_OFFSET
2812 | CTS_SPI_VALID_BUS_WIDTH
2813 | CTS_SPI_VALID_DISC;
2814 scsi->valid = CTS_SCSI_VALID_TQ;
2816 ccb->ccb_h.status = CAM_REQ_CMP;
2818 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
2824 case XPT_CALC_GEOMETRY:
2826 struct ccb_calc_geometry *ccg;
2828 u_int32_t secs_per_cylinder;
2831 size_mb = ccg->volume_size
2832 / ((1024L * 1024L) / ccg->block_size);
2834 if (size_mb > 4096) {
2836 ccg->secs_per_track = 63;
2837 } else if (size_mb > 2048) {
2839 ccg->secs_per_track = 63;
2840 } else if (size_mb > 1024) {
2842 ccg->secs_per_track = 63;
2845 ccg->secs_per_track = 32;
2847 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
2848 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
2849 ccb->ccb_h.status = CAM_REQ_CMP;
2854 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
2855 ASR_resetBus (sc, cam_sim_bus(sim));
2856 ccb->ccb_h.status = CAM_REQ_CMP;
2860 case XPT_TERM_IO: /* Terminate the I/O process */
2862 ccb->ccb_h.status = CAM_REQ_INVALID;
2866 case XPT_PATH_INQ: /* Path routing inquiry */
2868 struct ccb_pathinq *cpi = &(ccb->cpi);
2870 cpi->version_num = 1; /* XXX??? */
2871 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
2872 cpi->target_sprt = 0;
2873 /* Not necessary to reset bus, done by HDM initialization */
2874 cpi->hba_misc = PIM_NOBUSRESET;
2875 cpi->hba_eng_cnt = 0;
2876 cpi->max_target = sc->ha_MaxId;
2877 cpi->max_lun = sc->ha_MaxLun;
2878 cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)];
2879 cpi->bus_id = cam_sim_bus(sim);
2880 cpi->base_transfer_speed = 3300;
2881 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2882 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
2883 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
2884 cpi->unit_number = cam_sim_unit(sim);
2885 cpi->ccb_h.status = CAM_REQ_CMP;
2886 cpi->transport = XPORT_SPI;
2887 cpi->transport_version = 2;
2888 cpi->protocol = PROTO_SCSI;
2889 cpi->protocol_version = SCSI_REV_2;
2894 ccb->ccb_h.status = CAM_REQ_INVALID;
2901 * Handle processing of current CCB as pointed to by the Status.
2904 asr_intr(Asr_softc_t *sc)
2908 for(processed = 0; asr_get_status(sc) & Mask_InterruptsDisabled;
2913 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
2915 if (((ReplyOffset = asr_get_FromFIFO(sc)) == EMPTY_QUEUE)
2916 && ((ReplyOffset = asr_get_FromFIFO(sc)) == EMPTY_QUEUE)) {
2919 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset
2920 - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs));
2922 * We do not need any (optional byteswapping) method access to
2923 * the Initiator context field.
2925 ccb = (union asr_ccb *)(long)
2926 I2O_MESSAGE_FRAME_getInitiatorContext64(
2927 &(Reply->StdReplyFrame.StdMessageFrame));
2928 if (I2O_MESSAGE_FRAME_getMsgFlags(
2929 &(Reply->StdReplyFrame.StdMessageFrame))
2930 & I2O_MESSAGE_FLAGS_FAIL) {
2931 I2O_UTIL_NOP_MESSAGE Message;
2932 PI2O_UTIL_NOP_MESSAGE Message_Ptr;
2935 MessageOffset = (u_long)
2936 I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA(
2937 (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply);
2939 * Get the Original Message Frame's address, and get
2940 * it's Transaction Context into our space. (Currently
2941 * unused at original authorship, but better to be
2942 * safe than sorry). Straight copy means that we
2943 * need not concern ourselves with the (optional
2944 * byteswapping) method access.
2946 Reply->StdReplyFrame.TransactionContext =
2947 bus_space_read_4(sc->ha_frame_btag,
2948 sc->ha_frame_bhandle, MessageOffset +
2949 offsetof(I2O_SINGLE_REPLY_MESSAGE_FRAME,
2950 TransactionContext));
2952 * For 64 bit machines, we need to reconstruct the
2955 ccb = (union asr_ccb *)(long)
2956 I2O_MESSAGE_FRAME_getInitiatorContext64(
2957 &(Reply->StdReplyFrame.StdMessageFrame));
2959 * Unique error code for command failure.
2961 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
2962 &(Reply->StdReplyFrame), (u_int16_t)-2);
2964 * Modify the message frame to contain a NOP and
2965 * re-issue it to the controller.
2967 Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage(
2968 &Message, sizeof(I2O_UTIL_NOP_MESSAGE));
2969 #if (I2O_UTIL_NOP != 0)
2970 I2O_MESSAGE_FRAME_setFunction (
2971 &(Message_Ptr->StdMessageFrame),
2975 * Copy the packet out to the Original Message
2977 asr_set_frame(sc, Message_Ptr, MessageOffset,
2978 sizeof(I2O_UTIL_NOP_MESSAGE));
2982 asr_set_ToFIFO(sc, MessageOffset);
2986 * Asynchronous command with no return requirements,
2987 * and a generic handler for immunity against odd error
2988 * returns from the adapter.
2992 * Return Reply so that it can be used for the
2995 asr_set_FromFIFO(sc, ReplyOffset);
2999 /* Welease Wadjah! (and stop timeouts) */
3000 ASR_ccbRemove (sc, ccb);
3002 dsc = I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode(
3003 &(Reply->StdReplyFrame));
3004 ccb->csio.scsi_status = dsc & I2O_SCSI_DEVICE_DSC_MASK;
3005 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3008 case I2O_SCSI_DSC_SUCCESS:
3009 ccb->ccb_h.status |= CAM_REQ_CMP;
3012 case I2O_SCSI_DSC_CHECK_CONDITION:
3013 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR |
3017 case I2O_SCSI_DSC_BUSY:
3019 case I2O_SCSI_HBA_DSC_ADAPTER_BUSY:
3021 case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET:
3023 case I2O_SCSI_HBA_DSC_BUS_BUSY:
3024 ccb->ccb_h.status |= CAM_SCSI_BUSY;
3027 case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT:
3028 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3031 case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT:
3033 case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT:
3035 case I2O_SCSI_HBA_DSC_LUN_INVALID:
3037 case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID:
3038 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
3041 case I2O_SCSI_HBA_DSC_DATA_OVERRUN:
3043 case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR:
3044 ccb->ccb_h.status |= CAM_DATA_RUN_ERR;
3048 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3051 if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) {
3053 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount(
3057 /* Sense data in reply packet */
3058 if (ccb->ccb_h.status & CAM_AUTOSNS_VALID) {
3059 u_int16_t size = I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(Reply);
3062 if (size > sizeof(ccb->csio.sense_data)) {
3063 size = sizeof(ccb->csio.sense_data);
3065 if (size > I2O_SCSI_SENSE_DATA_SZ) {
3066 size = I2O_SCSI_SENSE_DATA_SZ;
3068 if ((ccb->csio.sense_len)
3069 && (size > ccb->csio.sense_len)) {
3070 size = ccb->csio.sense_len;
3072 if (size < ccb->csio.sense_len) {
3073 ccb->csio.sense_resid =
3074 ccb->csio.sense_len - size;
3076 ccb->csio.sense_resid = 0;
3078 bzero(&(ccb->csio.sense_data),
3079 sizeof(ccb->csio.sense_data));
3080 bcopy(Reply->SenseData,
3081 &(ccb->csio.sense_data), size);
3086 * Return Reply so that it can be used for the next command
3087 * since we have no more need for it now
3089 asr_set_FromFIFO(sc, ReplyOffset);
3091 if (ccb->ccb_h.path) {
3092 xpt_done ((union ccb *)ccb);
3100 #undef QueueSize /* Grrrr */
3101 #undef SG_Size /* Grrrr */
3104 * Meant to be included at the bottom of asr.c !!!
3108 * Included here as hard coded. Done because other necessary include
3109 * files utilize C++ comment structures which make them a nuisance to
3110 * included here just to pick up these three typedefs.
3112 typedef U32 DPT_TAG_T;
3113 typedef U32 DPT_MSG_T;
3114 typedef U32 DPT_RTN_T;
3116 #undef SCSI_RESET /* Conflicts with "scsi/scsiconf.h" defintion */
3117 #include "dev/asr/osd_unix.h"
3119 #define asr_unit(dev) dev2unit(dev)
3121 static u_int8_t ASR_ctlr_held;
3124 asr_open(struct cdev *dev, int32_t flags, int32_t ifmt, struct thread *td)
3129 if (dev->si_drv1 == NULL) {
3133 if (ASR_ctlr_held) {
3135 } else if ((error = priv_check(td, PRIV_DRIVER)) == 0) {
3143 asr_close(struct cdev *dev, int flags, int ifmt, struct thread *td)
3151 /*-------------------------------------------------------------------------*/
3152 /* Function ASR_queue_i */
3153 /*-------------------------------------------------------------------------*/
3154 /* The Parameters Passed To This Function Are : */
3155 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
3156 /* PI2O_MESSAGE_FRAME : Msg Structure Pointer For This Command */
3157 /* I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME following the Msg Structure */
3159 /* This Function Will Take The User Request Packet And Convert It To An */
3160 /* I2O MSG And Send It Off To The Adapter. */
3162 /* Return : 0 For OK, Error Code Otherwise */
3163 /*-------------------------------------------------------------------------*/
3165 ASR_queue_i(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Packet)
3167 union asr_ccb * ccb;
3168 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3169 PI2O_MESSAGE_FRAME Message_Ptr;
3170 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply_Ptr;
3171 int MessageSizeInBytes;
3172 int ReplySizeInBytes;
3175 /* Scatter Gather buffer list */
3176 struct ioctlSgList_S {
3177 SLIST_ENTRY(ioctlSgList_S) link;
3179 I2O_FLAGS_COUNT FlagsCount;
3180 char KernelSpace[sizeof(long)];
3182 /* Generates a `first' entry */
3183 SLIST_HEAD(ioctlSgListHead_S, ioctlSgList_S) sgList;
3185 if (ASR_getBlinkLedCode(sc)) {
3186 debug_usr_cmd_printf ("Adapter currently in BlinkLed %x\n",
3187 ASR_getBlinkLedCode(sc));
3190 /* Copy in the message into a local allocation */
3191 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (
3192 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) == NULL) {
3193 debug_usr_cmd_printf (
3194 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
3197 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
3198 sizeof(I2O_MESSAGE_FRAME))) != 0) {
3199 free(Message_Ptr, M_TEMP);
3200 debug_usr_cmd_printf ("Can't copy in packet errno=%d\n", error);
3203 /* Acquire information to determine type of packet */
3204 MessageSizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)<<2);
3205 /* The offset of the reply information within the user packet */
3206 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)((char *)Packet
3207 + MessageSizeInBytes);
3209 /* Check if the message is a synchronous initialization command */
3210 s = I2O_MESSAGE_FRAME_getFunction(Message_Ptr);
3211 free(Message_Ptr, M_TEMP);
3214 case I2O_EXEC_IOP_RESET:
3217 status = ASR_resetIOP(sc);
3218 ReplySizeInBytes = sizeof(status);
3219 debug_usr_cmd_printf ("resetIOP done\n");
3220 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3224 case I2O_EXEC_STATUS_GET:
3225 { PI2O_EXEC_STATUS_GET_REPLY status;
3227 status = &sc->ha_statusmem->status;
3228 if (ASR_getStatus(sc) == NULL) {
3229 debug_usr_cmd_printf ("getStatus failed\n");
3232 ReplySizeInBytes = sizeof(status);
3233 debug_usr_cmd_printf ("getStatus done\n");
3234 return (copyout ((caddr_t)status, (caddr_t)Reply,
3238 case I2O_EXEC_OUTBOUND_INIT:
3241 status = ASR_initOutBound(sc);
3242 ReplySizeInBytes = sizeof(status);
3243 debug_usr_cmd_printf ("intOutBound done\n");
3244 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3249 /* Determine if the message size is valid */
3250 if ((MessageSizeInBytes < sizeof(I2O_MESSAGE_FRAME))
3251 || (MAX_INBOUND_SIZE < MessageSizeInBytes)) {
3252 debug_usr_cmd_printf ("Packet size %d incorrect\n",
3253 MessageSizeInBytes);
3257 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (MessageSizeInBytes,
3258 M_TEMP, M_WAITOK)) == NULL) {
3259 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
3260 MessageSizeInBytes);
3263 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
3264 MessageSizeInBytes)) != 0) {
3265 free(Message_Ptr, M_TEMP);
3266 debug_usr_cmd_printf ("Can't copy in packet[%d] errno=%d\n",
3267 MessageSizeInBytes, error);
3271 /* Check the size of the reply frame, and start constructing */
3273 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
3274 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) == NULL) {
3275 free(Message_Ptr, M_TEMP);
3276 debug_usr_cmd_printf (
3277 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
3280 if ((error = copyin ((caddr_t)Reply, (caddr_t)Reply_Ptr,
3281 sizeof(I2O_MESSAGE_FRAME))) != 0) {
3282 free(Reply_Ptr, M_TEMP);
3283 free(Message_Ptr, M_TEMP);
3284 debug_usr_cmd_printf (
3285 "Failed to copy in reply frame, errno=%d\n",
3289 ReplySizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(
3290 &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) << 2);
3291 free(Reply_Ptr, M_TEMP);
3292 if (ReplySizeInBytes < sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)) {
3293 free(Message_Ptr, M_TEMP);
3294 debug_usr_cmd_printf (
3295 "Failed to copy in reply frame[%d], errno=%d\n",
3296 ReplySizeInBytes, error);
3300 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
3301 ((ReplySizeInBytes > sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME))
3302 ? ReplySizeInBytes : sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)),
3303 M_TEMP, M_WAITOK)) == NULL) {
3304 free(Message_Ptr, M_TEMP);
3305 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
3309 (void)ASR_fillMessage((void *)Reply_Ptr, ReplySizeInBytes);
3310 Reply_Ptr->StdReplyFrame.StdMessageFrame.InitiatorContext
3311 = Message_Ptr->InitiatorContext;
3312 Reply_Ptr->StdReplyFrame.TransactionContext
3313 = ((PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr)->TransactionContext;
3314 I2O_MESSAGE_FRAME_setMsgFlags(
3315 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
3316 I2O_MESSAGE_FRAME_getMsgFlags(
3317 &(Reply_Ptr->StdReplyFrame.StdMessageFrame))
3318 | I2O_MESSAGE_FLAGS_REPLY);
3320 /* Check if the message is a special case command */
3321 switch (I2O_MESSAGE_FRAME_getFunction(Message_Ptr)) {
3322 case I2O_EXEC_SYS_TAB_SET: /* Special Case of empty Scatter Gather */
3323 if (MessageSizeInBytes == ((I2O_MESSAGE_FRAME_getVersionOffset(
3324 Message_Ptr) & 0xF0) >> 2)) {
3325 free(Message_Ptr, M_TEMP);
3326 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3327 &(Reply_Ptr->StdReplyFrame),
3328 (ASR_setSysTab(sc) != CAM_REQ_CMP));
3329 I2O_MESSAGE_FRAME_setMessageSize(
3330 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
3331 sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME));
3332 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply,
3334 free(Reply_Ptr, M_TEMP);
3339 /* Deal in the general case */
3340 /* First allocate and optionally copy in each scatter gather element */
3341 SLIST_INIT(&sgList);
3342 if ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) != 0) {
3343 PI2O_SGE_SIMPLE_ELEMENT sg;
3346 * since this code is reused in several systems, code
3347 * efficiency is greater by using a shift operation rather
3348 * than a divide by sizeof(u_int32_t).
3350 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
3351 + ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0)
3353 while (sg < (PI2O_SGE_SIMPLE_ELEMENT)(((caddr_t)Message_Ptr)
3354 + MessageSizeInBytes)) {
3358 if ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
3359 & I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT) == 0) {
3363 len = I2O_FLAGS_COUNT_getCount(&(sg->FlagsCount));
3364 debug_usr_cmd_printf ("SG[%d] = %x[%d]\n",
3365 sg - (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
3366 + ((I2O_MESSAGE_FRAME_getVersionOffset(
3367 Message_Ptr) & 0xF0) >> 2)),
3368 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), len);
3370 if ((elm = (struct ioctlSgList_S *)malloc (
3371 sizeof(*elm) - sizeof(elm->KernelSpace) + len,
3372 M_TEMP, M_WAITOK)) == NULL) {
3373 debug_usr_cmd_printf (
3374 "Failed to allocate SG[%d]\n", len);
3378 SLIST_INSERT_HEAD(&sgList, elm, link);
3379 elm->FlagsCount = sg->FlagsCount;
3380 elm->UserSpace = (caddr_t)
3381 (I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg));
3382 v = elm->KernelSpace;
3383 /* Copy in outgoing data (DIR bit could be invalid) */
3384 if ((error = copyin (elm->UserSpace, (caddr_t)v, len))
3389 * If the buffer is not contiguous, lets
3390 * break up the scatter/gather entries.
3393 && (sg < (PI2O_SGE_SIMPLE_ELEMENT)
3394 (((caddr_t)Message_Ptr) + MAX_INBOUND_SIZE))) {
3395 int next, base, span;
3398 next = base = KVTOPHYS(v);
3399 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg,
3402 /* How far can we go physically contiguously */
3403 while ((len > 0) && (base == next)) {
3406 next = trunc_page(base) + PAGE_SIZE;
3417 /* Construct the Flags */
3418 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount),
3421 int flags = I2O_FLAGS_COUNT_getFlags(
3422 &(elm->FlagsCount));
3423 /* Any remaining length? */
3426 ~(I2O_SGL_FLAGS_END_OF_BUFFER
3427 | I2O_SGL_FLAGS_LAST_ELEMENT);
3429 I2O_FLAGS_COUNT_setFlags(
3430 &(sg->FlagsCount), flags);
3433 debug_usr_cmd_printf ("sg[%d] = %x[%d]\n",
3434 sg - (PI2O_SGE_SIMPLE_ELEMENT)
3435 ((char *)Message_Ptr
3436 + ((I2O_MESSAGE_FRAME_getVersionOffset(
3437 Message_Ptr) & 0xF0) >> 2)),
3438 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg),
3445 * Incrementing requires resizing of the
3446 * packet, and moving up the existing SG
3450 MessageSizeInBytes += sizeof(*sg);
3451 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
3452 I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)
3453 + (sizeof(*sg) / sizeof(U32)));
3455 PI2O_MESSAGE_FRAME NewMessage_Ptr;
3458 = (PI2O_MESSAGE_FRAME)
3459 malloc (MessageSizeInBytes,
3460 M_TEMP, M_WAITOK)) == NULL) {
3461 debug_usr_cmd_printf (
3462 "Failed to acquire frame[%d] memory\n",
3463 MessageSizeInBytes);
3467 span = ((caddr_t)sg)
3468 - (caddr_t)Message_Ptr;
3469 bcopy(Message_Ptr,NewMessage_Ptr, span);
3470 bcopy((caddr_t)(sg-1),
3471 ((caddr_t)NewMessage_Ptr) + span,
3472 MessageSizeInBytes - span);
3473 free(Message_Ptr, M_TEMP);
3474 sg = (PI2O_SGE_SIMPLE_ELEMENT)
3475 (((caddr_t)NewMessage_Ptr) + span);
3476 Message_Ptr = NewMessage_Ptr;
3480 || ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
3481 & I2O_SGL_FLAGS_LAST_ELEMENT) != 0)) {
3487 while ((elm = SLIST_FIRST(&sgList)) != NULL) {
3488 SLIST_REMOVE_HEAD(&sgList, link);
3491 free(Reply_Ptr, M_TEMP);
3492 free(Message_Ptr, M_TEMP);
3497 debug_usr_cmd_printf ("Inbound: ");
3498 debug_usr_cmd_dump_message(Message_Ptr);
3500 /* Send the command */
3501 if ((ccb = asr_alloc_ccb (sc)) == NULL) {
3502 /* Free up in-kernel buffers */
3503 while ((elm = SLIST_FIRST(&sgList)) != NULL) {
3504 SLIST_REMOVE_HEAD(&sgList, link);
3507 free(Reply_Ptr, M_TEMP);
3508 free(Message_Ptr, M_TEMP);
3513 * We do not need any (optional byteswapping) method access to
3514 * the Initiator context field.
3516 I2O_MESSAGE_FRAME_setInitiatorContext64(
3517 (PI2O_MESSAGE_FRAME)Message_Ptr, (long)ccb);
3519 (void)ASR_queue (sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
3521 free(Message_Ptr, M_TEMP);
3524 * Wait for the board to report a finished instruction.
3527 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
3528 if (ASR_getBlinkLedCode(sc)) {
3530 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
3531 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
3532 ASR_getBlinkLedCode(sc));
3533 if (ASR_reset (sc) == ENXIO) {
3534 /* Command Cleanup */
3535 ASR_ccbRemove(sc, ccb);
3538 /* Free up in-kernel buffers */
3539 while ((elm = SLIST_FIRST(&sgList)) != NULL) {
3540 SLIST_REMOVE_HEAD(&sgList, link);
3543 free(Reply_Ptr, M_TEMP);
3547 /* Check every second for BlinkLed */
3548 /* There is no PRICAM, but outwardly PRIBIO is functional */
3549 tsleep(ccb, PRIBIO, "asr", hz);
3553 debug_usr_cmd_printf ("Outbound: ");
3554 debug_usr_cmd_dump_message(Reply_Ptr);
3556 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3557 &(Reply_Ptr->StdReplyFrame),
3558 (ccb->ccb_h.status != CAM_REQ_CMP));
3560 if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
3561 - I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) {
3562 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(Reply_Ptr,
3563 ccb->csio.dxfer_len - ccb->csio.resid);
3565 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) && (ReplySizeInBytes
3566 > (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
3567 - I2O_SCSI_SENSE_DATA_SZ))) {
3568 int size = ReplySizeInBytes
3569 - sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
3570 - I2O_SCSI_SENSE_DATA_SZ;
3572 if (size > sizeof(ccb->csio.sense_data)) {
3573 size = sizeof(ccb->csio.sense_data);
3575 if (size < ccb->csio.sense_len) {
3576 ccb->csio.sense_resid = ccb->csio.sense_len - size;
3578 ccb->csio.sense_resid = 0;
3580 bzero(&(ccb->csio.sense_data), sizeof(ccb->csio.sense_data));
3581 bcopy(&(ccb->csio.sense_data), Reply_Ptr->SenseData, size);
3582 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount(
3586 /* Free up in-kernel buffers */
3587 while ((elm = SLIST_FIRST(&sgList)) != NULL) {
3588 /* Copy out as necessary */
3590 /* DIR bit considered `valid', error due to ignorance works */
3591 && ((I2O_FLAGS_COUNT_getFlags(&(elm->FlagsCount))
3592 & I2O_SGL_FLAGS_DIR) == 0)) {
3593 error = copyout((caddr_t)(elm->KernelSpace),
3595 I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount)));
3597 SLIST_REMOVE_HEAD(&sgList, link);
3601 /* Copy reply frame to user space */
3602 error = copyout((caddr_t)Reply_Ptr, (caddr_t)Reply,
3605 free(Reply_Ptr, M_TEMP);
3611 /*----------------------------------------------------------------------*/
3612 /* Function asr_ioctl */
3613 /*----------------------------------------------------------------------*/
3614 /* The parameters passed to this function are : */
3615 /* dev : Device number. */
3616 /* cmd : Ioctl Command */
3617 /* data : User Argument Passed In. */
3618 /* flag : Mode Parameter */
3619 /* proc : Process Parameter */
3621 /* This function is the user interface into this adapter driver */
3623 /* Return : zero if OK, error code if not */
3624 /*----------------------------------------------------------------------*/
3627 asr_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flag, struct thread *td)
3629 Asr_softc_t *sc = dev->si_drv1;
3631 #ifdef ASR_IOCTL_COMPAT
3633 #endif /* ASR_IOCTL_COMPAT */
3639 #ifdef ASR_IOCTL_COMPAT
3640 #if (dsDescription_size != 50)
3641 case DPT_SIGNATURE + ((50 - dsDescription_size) << 16):
3643 if (cmd & 0xFFFF0000) {
3644 bcopy(&ASR_sig, data, sizeof(dpt_sig_S));
3647 /* Traditional version of the ioctl interface */
3648 case DPT_SIGNATURE & 0x0000FFFF:
3650 return (copyout((caddr_t)(&ASR_sig), *((caddr_t *)data),
3651 sizeof(dpt_sig_S)));
3653 /* Traditional version of the ioctl interface */
3654 case DPT_CTRLINFO & 0x0000FFFF:
3655 case DPT_CTRLINFO: {
3658 u_int16_t drvrHBAnum;
3660 u_int16_t blinkState;
3662 u_int8_t pciDeviceNum;
3664 u_int16_t Interrupt;
3665 u_int32_t reserved1;
3666 u_int32_t reserved2;
3667 u_int32_t reserved3;
3670 bzero(&CtlrInfo, sizeof(CtlrInfo));
3671 CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t);
3672 CtlrInfo.drvrHBAnum = asr_unit(dev);
3673 CtlrInfo.baseAddr = sc->ha_Base;
3674 i = ASR_getBlinkLedCode (sc);
3678 CtlrInfo.blinkState = i;
3679 CtlrInfo.pciBusNum = sc->ha_pciBusNum;
3680 CtlrInfo.pciDeviceNum = sc->ha_pciDeviceNum;
3681 #define FLG_OSD_PCI_VALID 0x0001
3682 #define FLG_OSD_DMA 0x0002
3683 #define FLG_OSD_I2O 0x0004
3684 CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID|FLG_OSD_DMA|FLG_OSD_I2O;
3685 CtlrInfo.Interrupt = sc->ha_irq;
3686 #ifdef ASR_IOCTL_COMPAT
3687 if (cmd & 0xffff0000)
3688 bcopy(&CtlrInfo, data, sizeof(CtlrInfo));
3690 #endif /* ASR_IOCTL_COMPAT */
3691 error = copyout(&CtlrInfo, *(caddr_t *)data, sizeof(CtlrInfo));
3694 /* Traditional version of the ioctl interface */
3695 case DPT_SYSINFO & 0x0000FFFF:
3698 #ifdef ASR_IOCTL_COMPAT
3700 /* Kernel Specific ptok `hack' */
3701 #define ptok(a) ((char *)(uintptr_t)(a) + KERNBASE)
3703 bzero(&Info, sizeof(Info));
3705 /* Appears I am the only person in the Kernel doing this */
3713 Info.drive0CMOS = j;
3720 Info.drive1CMOS = j;
3722 Info.numDrives = *((char *)ptok(0x475));
3723 #else /* ASR_IOCTL_COMPAT */
3724 bzero(&Info, sizeof(Info));
3725 #endif /* ASR_IOCTL_COMPAT */
3727 Info.processorFamily = ASR_sig.dsProcessorFamily;
3728 #if defined(__i386__)
3730 case CPU_386SX: case CPU_386:
3731 Info.processorType = PROC_386; break;
3732 case CPU_486SX: case CPU_486:
3733 Info.processorType = PROC_486; break;
3735 Info.processorType = PROC_PENTIUM; break;
3737 Info.processorType = PROC_SEXIUM; break;
3741 Info.osType = OS_BSDI_UNIX;
3742 Info.osMajorVersion = osrelease[0] - '0';
3743 Info.osMinorVersion = osrelease[2] - '0';
3744 /* Info.osRevision = 0; */
3745 /* Info.osSubRevision = 0; */
3746 Info.busType = SI_PCI_BUS;
3747 Info.flags = SI_OSversionValid|SI_BusTypeValid|SI_NO_SmartROM;
3749 #ifdef ASR_IOCTL_COMPAT
3750 Info.flags |= SI_CMOS_Valid | SI_NumDrivesValid;
3751 /* Go Out And Look For I2O SmartROM */
3752 for(j = 0xC8000; j < 0xE0000; j += 2048) {
3756 if (*((unsigned short *)cp) != 0xAA55) {
3759 j += (cp[2] * 512) - 2048;
3760 if ((*((u_long *)(cp + 6))
3761 != ('S' + (' ' * 256) + (' ' * 65536L)))
3762 || (*((u_long *)(cp + 10))
3763 != ('I' + ('2' * 256) + ('0' * 65536L)))) {
3767 for (k = 0; k < 64; ++k) {
3768 if (*((unsigned short *)cp)
3769 == (' ' + ('v' * 256))) {
3774 Info.smartROMMajorVersion
3775 = *((unsigned char *)(cp += 4)) - '0';
3776 Info.smartROMMinorVersion
3777 = *((unsigned char *)(cp += 2));
3778 Info.smartROMRevision
3779 = *((unsigned char *)(++cp));
3780 Info.flags |= SI_SmartROMverValid;
3781 Info.flags &= ~SI_NO_SmartROM;
3785 /* Get The Conventional Memory Size From CMOS */
3791 Info.conventionalMemSize = j;
3793 /* Get The Extended Memory Found At Power On From CMOS */
3799 Info.extendedMemSize = j;
3800 Info.flags |= SI_MemorySizeValid;
3802 /* Copy Out The Info Structure To The User */
3803 if (cmd & 0xFFFF0000)
3804 bcopy(&Info, data, sizeof(Info));
3806 #endif /* ASR_IOCTL_COMPAT */
3807 error = copyout(&Info, *(caddr_t *)data, sizeof(Info));
3810 /* Get The BlinkLED State */
3812 i = ASR_getBlinkLedCode (sc);
3815 #ifdef ASR_IOCTL_COMPAT
3816 if (cmd & 0xffff0000)
3817 bcopy(&i, data, sizeof(i));
3819 #endif /* ASR_IOCTL_COMPAT */
3820 error = copyout(&i, *(caddr_t *)data, sizeof(i));
3823 /* Send an I2O command */
3825 return (ASR_queue_i(sc, *((PI2O_MESSAGE_FRAME *)data)));
3827 /* Reset and re-initialize the adapter */
3829 return (ASR_reset(sc));
3831 /* Rescan the LCT table and resynchronize the information */
3833 return (ASR_rescan(sc));