sys/dev/siba/sibavar.h

   1 /*-
   2  * Copyright (c) 2007 Bruce M. Simpson.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef _SIBA_SIBAVAR_H_
  30 #define _SIBA_SIBAVAR_H_
  31
  32 #include <sys/rman.h>
  33
  34 struct siba_softc;
  35 struct siba_dev_softc;
  36
  37 enum siba_type {
  38         SIBA_TYPE_SSB,
  39         SIBA_TYPE_PCI,
  40         SIBA_TYPE_PCMCIA,
  41 };
  42
  43 enum siba_device_ivars {
  44         SIBA_IVAR_VENDOR,
  45         SIBA_IVAR_DEVICE,
  46         SIBA_IVAR_REVID,
  47         SIBA_IVAR_CORE_INDEX,
  48         SIBA_IVAR_PCI_VENDOR,
  49         SIBA_IVAR_PCI_DEVICE,
  50         SIBA_IVAR_PCI_SUBVENDOR,
  51         SIBA_IVAR_PCI_SUBDEVICE,
  52         SIBA_IVAR_PCI_REVID,
  53         SIBA_IVAR_CHIPID,
  54         SIBA_IVAR_CHIPREV,
  55         SIBA_IVAR_CHIPPKG,
  56         SIBA_IVAR_TYPE,
  57         SIBA_IVAR_CC_PMUFREQ,
  58         SIBA_IVAR_CC_CAPS,
  59         SIBA_IVAR_CC_POWERDELAY,
  60         SIBA_IVAR_PCICORE_REVID
  61 };
  62
  63 #define SIBA_ACCESSOR(var, ivar, type)                          \
  64         __BUS_ACCESSOR(siba, var, SIBA, ivar, type)
  65
  66 SIBA_ACCESSOR(vendor,           VENDOR,         uint16_t)
  67 SIBA_ACCESSOR(device,           DEVICE,         uint16_t)
  68 SIBA_ACCESSOR(revid,            REVID,          uint8_t)
  69 SIBA_ACCESSOR(core_index,       CORE_INDEX,     uint8_t)
  70 SIBA_ACCESSOR(pci_vendor,       PCI_VENDOR,     uint16_t)
  71 SIBA_ACCESSOR(pci_device,       PCI_DEVICE,     uint16_t)
  72 SIBA_ACCESSOR(pci_subvendor,    PCI_SUBVENDOR,  uint16_t)
  73 SIBA_ACCESSOR(pci_subdevice,    PCI_SUBDEVICE,  uint16_t)
  74 SIBA_ACCESSOR(pci_revid,        PCI_REVID,      uint8_t)
  75 SIBA_ACCESSOR(chipid,           CHIPID,         uint16_t)
  76 SIBA_ACCESSOR(chiprev,          CHIPREV,        uint16_t)
  77 SIBA_ACCESSOR(chippkg,          CHIPPKG,        uint8_t)
  78 SIBA_ACCESSOR(type,             TYPE,           enum siba_type)
  79 SIBA_ACCESSOR(cc_pmufreq,       CC_PMUFREQ,     uint32_t)
  80 SIBA_ACCESSOR(cc_caps,          CC_CAPS,        uint32_t)
  81 SIBA_ACCESSOR(cc_powerdelay,    CC_POWERDELAY,  uint16_t)
  82 SIBA_ACCESSOR(pcicore_revid,    PCICORE_REVID,  uint8_t)
  83
  84 #undef SIBA_ACCESSOR
  85
  86 /* XXX just for SPROM1? */
  87 enum {
  88         SIBA_CCODE_WORLD,
  89         SIBA_CCODE_THAILAND,
  90         SIBA_CCODE_ISRAEL,
  91         SIBA_CCODE_JORDAN,
  92         SIBA_CCODE_CHINA,
  93         SIBA_CCODE_JAPAN,
  94         SIBA_CCODE_USA_CANADA_ANZ,
  95         SIBA_CCODE_EUROPE,
  96         SIBA_CCODE_USA_LOW,
  97         SIBA_CCODE_JAPAN_HIGH,
  98         SIBA_CCODE_ALL,
  99         SIBA_CCODE_NONE,
 100 };
 101
 102 #define siba_mips_read_2(sc, core, reg)                         \
 103         bus_space_read_2((sc)->siba_mem_bt, (sc)->siba_mem_bh,  \
 104                          (core * SIBA_CORE_LEN) + (reg))
 105
 106 #define siba_mips_read_4(sc, core, reg)                         \
 107         bus_space_read_4((sc)->siba_mem_bt, (sc)->siba_mem_bh,  \
 108                          (core * SIBA_CORE_LEN) + (reg))
 109
 110 #define siba_mips_write_2(sc, core, reg, val)                   \
 111         bus_space_write_2((sc)->siba_mem_bt, (sc)->siba_mem_bh, \
 112                          (core * SIBA_CORE_LEN) + (reg), (val))
 113
 114 #define siba_mips_write_4(sc, core, reg, val)                   \
 115         bus_space_write_4((sc)->siba_mem_bt, (sc)->siba_mem_bh, \
 116                          (core * SIBA_CORE_LEN) + (reg), (val))
 117
 118 #define SIBA_READ_4(siba, reg)          \
 119         bus_space_read_4((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg))
 120 #define SIBA_READ_2(siba, reg)          \
 121         bus_space_read_2((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg))
 122 #define SIBA_READ_MULTI_1(siba, reg, addr, count)                       \
 123         bus_space_read_multi_1((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 124             (reg), (addr), (count))
 125 #define SIBA_READ_MULTI_2(siba, reg, addr, count)                       \
 126         bus_space_read_multi_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 127             (reg), (addr), (count))
 128 #define SIBA_READ_MULTI_4(siba, reg, addr, count)                       \
 129         bus_space_read_multi_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 130             (reg), (addr), (count))
 131
 132 #define SIBA_WRITE_4(siba, reg, val)    \
 133         bus_space_write_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,     \
 134             (reg), (val))
 135 #define SIBA_WRITE_2(siba, reg, val)    \
 136         bus_space_write_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,     \
 137             (reg), (val))
 138 #define SIBA_WRITE_MULTI_1(siba, reg, addr, count)                      \
 139         bus_space_write_multi_1((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 140             (reg), (addr), (count))
 141 #define SIBA_WRITE_MULTI_2(siba, reg, addr, count)                      \
 142         bus_space_write_multi_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 143             (reg), (addr), (count))
 144 #define SIBA_WRITE_MULTI_4(siba, reg, addr, count)                      \
 145         bus_space_write_multi_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
 146             (reg), (addr), (count))
 147
 148 #define SIBA_BARRIER(siba, flags)                                       \
 149         bus_space_barrier((siba)->siba_mem_bt, (siba)->siba_mem_bh, (0),\
 150             (0), (flags))
 151
 152 #define SIBA_SETBITS_4(siba, reg, bits) \
 153         SIBA_WRITE_4((siba), (reg), SIBA_READ_4((siba), (reg)) | (bits))
 154 #define SIBA_SETBITS_2(siba, reg, bits) \
 155         SIBA_WRITE_2((siba), (reg), SIBA_READ_2((siba), (reg)) | (bits))
 156
 157 #define SIBA_FILT_SETBITS_4(siba, reg, filt, bits) \
 158         SIBA_WRITE_4((siba), (reg), (SIBA_READ_4((siba),        \
 159             (reg)) & (filt)) | (bits))
 160 #define SIBA_FILT_SETBITS_2(siba, reg, filt, bits)      \
 161         SIBA_WRITE_2((siba), (reg), (SIBA_READ_2((siba),        \
 162             (reg)) & (filt)) | (bits))
 163
 164 #define SIBA_CLRBITS_4(siba, reg, bits) \
 165         SIBA_WRITE_4((siba), (reg), SIBA_READ_4((siba), (reg)) & ~(bits))
 166 #define SIBA_CLRBITS_2(siba, reg, bits) \
 167         SIBA_WRITE_2((siba), (reg), SIBA_READ_2((siba), (reg)) & ~(bits))
 168
 169 #define SIBA_CC_READ32(scc, offset) \
 170         siba_read_4_sub((scc)->scc_dev, offset)
 171 #define SIBA_CC_WRITE32(scc, offset, val) \
 172         siba_write_4_sub((scc)->scc_dev, offset, val)
 173 #define SIBA_CC_MASK32(scc, offset, mask) \
 174         SIBA_CC_WRITE32(scc, offset, SIBA_CC_READ32(scc, offset) & (mask))
 175 #define SIBA_CC_SET32(scc, offset, set) \
 176         SIBA_CC_WRITE32(scc, offset, SIBA_CC_READ32(scc, offset) | (set))
 177 #define SIBA_CC_MASKSET32(scc, offset, mask, set)       \
 178         SIBA_CC_WRITE32(scc, offset,                    \
 179             (SIBA_CC_READ32(scc, offset) & (mask)) | (set))
 180
 181 enum siba_clock {
 182         SIBA_CLOCK_DYNAMIC,
 183         SIBA_CLOCK_SLOW,
 184         SIBA_CLOCK_FAST,
 185 };
 186
 187 enum siba_clksrc {
 188         SIBA_CC_CLKSRC_PCI,
 189         SIBA_CC_CLKSRC_CRYSTAL,
 190         SIBA_CC_CLKSRC_LOWPW,
 191 };
 192
 193 struct siba_cc_pmu0_plltab {
 194         uint16_t                freq;   /* in kHz.*/
 195         uint8_t                 xf;     /* crystal frequency */
 196         uint8_t                 wb_int;
 197         uint32_t                wb_frac;
 198 };
 199
 200 struct siba_cc_pmu1_plltab {
 201         uint16_t                freq;
 202         uint8_t                 xf;
 203         uint8_t                 p1div;
 204         uint8_t                 p2div;
 205         uint8_t                 ndiv_int;
 206         uint32_t                ndiv_frac;
 207 };
 208
 209 struct siba_cc_pmu_res_updown {
 210         uint8_t                 res;
 211         uint16_t                updown;
 212 };
 213
 214 #define SIBA_CC_PMU_DEP_SET     1
 215 #define SIBA_CC_PMU_DEP_ADD     2
 216 #define SIBA_CC_PMU_DEP_REMOVE  3
 217
 218 struct siba_cc_pmu_res_depend {
 219         uint8_t                 res;
 220         uint8_t                 task;
 221         uint32_t                depend;
 222 };
 223
 224 enum siba_sprom_vars {
 225         SIBA_SPROMVAR_REV,
 226         SIBA_SPROMVAR_MAC_80211BG,
 227         SIBA_SPROMVAR_MAC_ETH,
 228         SIBA_SPROMVAR_MAC_80211A,
 229         SIBA_SPROMVAR_MII_ETH0,
 230         SIBA_SPROMVAR_MII_ETH1,
 231         SIBA_SPROMVAR_MDIO_ETH0,
 232         SIBA_SPROMVAR_MDIO_ETH1,
 233         SIBA_SPROMVAR_BREV,
 234         SIBA_SPROMVAR_CCODE,
 235         SIBA_SPROMVAR_ANT_A,
 236         SIBA_SPROMVAR_ANT_BG,
 237         SIBA_SPROMVAR_PA0B0,
 238         SIBA_SPROMVAR_PA0B1,
 239         SIBA_SPROMVAR_PA0B2,
 240         SIBA_SPROMVAR_PA1B0,
 241         SIBA_SPROMVAR_PA1B1,
 242         SIBA_SPROMVAR_PA1B2,
 243         SIBA_SPROMVAR_PA1LOB0,
 244         SIBA_SPROMVAR_PA1LOB1,
 245         SIBA_SPROMVAR_PA1LOB2,
 246         SIBA_SPROMVAR_PA1HIB0,
 247         SIBA_SPROMVAR_PA1HIB1,
 248         SIBA_SPROMVAR_PA1HIB2,
 249         SIBA_SPROMVAR_GPIO0,
 250         SIBA_SPROMVAR_GPIO1,
 251         SIBA_SPROMVAR_GPIO2,
 252         SIBA_SPROMVAR_GPIO3,
 253         SIBA_SPROMVAR_MAXPWR_AL,
 254         SIBA_SPROMVAR_MAXPWR_A,
 255         SIBA_SPROMVAR_MAXPWR_AH,
 256         SIBA_SPROMVAR_MAXPWR_BG,
 257         SIBA_SPROMVAR_RXPO2G,
 258         SIBA_SPROMVAR_RXPO5G,
 259         SIBA_SPROMVAR_TSSI_A,
 260         SIBA_SPROMVAR_TSSI_BG,
 261         SIBA_SPROMVAR_TRI2G,
 262         SIBA_SPROMVAR_TRI5GL,
 263         SIBA_SPROMVAR_TRI5G,
 264         SIBA_SPROMVAR_TRI5GH,
 265         SIBA_SPROMVAR_RSSISAV2G,
 266         SIBA_SPROMVAR_RSSISMC2G,
 267         SIBA_SPROMVAR_RSSISMF2G,
 268         SIBA_SPROMVAR_BXA2G,
 269         SIBA_SPROMVAR_RSSISAV5G,
 270         SIBA_SPROMVAR_RSSISMC5G,
 271         SIBA_SPROMVAR_RSSISMF5G,
 272         SIBA_SPROMVAR_BXA5G,
 273         SIBA_SPROMVAR_CCK2GPO,
 274         SIBA_SPROMVAR_OFDM2GPO,
 275         SIBA_SPROMVAR_OFDM5GLPO,
 276         SIBA_SPROMVAR_OFDM5GPO,
 277         SIBA_SPROMVAR_OFDM5GHPO,
 278         SIBA_SPROMVAR_BF_LO,
 279         SIBA_SPROMVAR_BF_HI,
 280         SIBA_SPROMVAR_BF2_LO,
 281         SIBA_SPROMVAR_BF2_HI
 282 };
 283
 284 int             siba_read_sprom(device_t, device_t, int, uintptr_t *);
 285 int             siba_write_sprom(device_t, device_t, int, uintptr_t);
 286
 287 /**
 288  * Generic sprom accessor generation macros for siba(4) drivers
 289  */
 290 #define __SPROM_ACCESSOR(varp, var, ivarp, ivar, type)                  \
 291                                                                         \
 292 static __inline type varp ## _get_ ## var(device_t dev)                 \
 293 {                                                                       \
 294         uintptr_t v;                                                    \
 295         siba_read_sprom(device_get_parent(dev), dev,                    \
 296             ivarp ## _SPROMVAR_ ## ivar, &v);                           \
 297         return ((type) v);                                              \
 298 }                                                                       \
 299                                                                         \
 300 static __inline void varp ## _set_ ## var(device_t dev, type t)         \
 301 {                                                                       \
 302         uintptr_t v = (uintptr_t) t;                                    \
 303         siba_write_sprom(device_get_parent(dev), dev,                   \
 304             ivarp ## _SPROMVAR_ ## ivar, v);                            \
 305 }
 306
 307 #define SIBA_SPROM_ACCESSOR(var, ivar, type)                            \
 308         __SPROM_ACCESSOR(siba_sprom, var, SIBA, ivar, type)
 309
 310 SIBA_SPROM_ACCESSOR(rev,        REV,            uint8_t);
 311 SIBA_SPROM_ACCESSOR(mac_80211bg,        MAC_80211BG,    uint8_t *);
 312 SIBA_SPROM_ACCESSOR(mac_eth,    MAC_ETH,        uint8_t *);
 313 SIBA_SPROM_ACCESSOR(mac_80211a, MAC_80211A,     uint8_t *);
 314 SIBA_SPROM_ACCESSOR(mii_eth0,   MII_ETH0,       uint8_t);
 315 SIBA_SPROM_ACCESSOR(mii_eth1,   MII_ETH1,       uint8_t);
 316 SIBA_SPROM_ACCESSOR(mdio_eth0,  MDIO_ETH0,      uint8_t);
 317 SIBA_SPROM_ACCESSOR(mdio_eth1,  MDIO_ETH1,      uint8_t);
 318 SIBA_SPROM_ACCESSOR(brev,       BREV,           uint8_t);
 319 SIBA_SPROM_ACCESSOR(ccode,      CCODE,          uint8_t);
 320 SIBA_SPROM_ACCESSOR(ant_a,      ANT_A,          uint8_t);
 321 SIBA_SPROM_ACCESSOR(ant_bg,     ANT_BG,         uint8_t);
 322 SIBA_SPROM_ACCESSOR(pa0b0,      PA0B0,          uint16_t);
 323 SIBA_SPROM_ACCESSOR(pa0b1,      PA0B1,          uint16_t);
 324 SIBA_SPROM_ACCESSOR(pa0b2,      PA0B2,          uint16_t);
 325 SIBA_SPROM_ACCESSOR(pa1b0,      PA1B0,          uint16_t);
 326 SIBA_SPROM_ACCESSOR(pa1b1,      PA1B1,          uint16_t);
 327 SIBA_SPROM_ACCESSOR(pa1b2,      PA1B2,          uint16_t);
 328 SIBA_SPROM_ACCESSOR(pa1lob0,    PA1LOB0,        uint16_t);
 329 SIBA_SPROM_ACCESSOR(pa1lob1,    PA1LOB1,        uint16_t);
 330 SIBA_SPROM_ACCESSOR(pa1lob2,    PA1LOB2,        uint16_t);
 331 SIBA_SPROM_ACCESSOR(pa1hib0,    PA1HIB0,        uint16_t);
 332 SIBA_SPROM_ACCESSOR(pa1hib1,    PA1HIB1,        uint16_t);
 333 SIBA_SPROM_ACCESSOR(pa1hib2,    PA1HIB2,        uint16_t);
 334 SIBA_SPROM_ACCESSOR(gpio0,      GPIO0,          uint8_t);
 335 SIBA_SPROM_ACCESSOR(gpio1,      GPIO1,          uint8_t);
 336 SIBA_SPROM_ACCESSOR(gpio2,      GPIO2,          uint8_t);
 337 SIBA_SPROM_ACCESSOR(gpio3,      GPIO3,          uint8_t);
 338 SIBA_SPROM_ACCESSOR(maxpwr_al,  MAXPWR_AL,      uint16_t);
 339 SIBA_SPROM_ACCESSOR(maxpwr_a,   MAXPWR_A,       uint16_t);
 340 SIBA_SPROM_ACCESSOR(maxpwr_ah,  MAXPWR_AH,      uint16_t);
 341 SIBA_SPROM_ACCESSOR(maxpwr_bg,  MAXPWR_BG,      uint16_t);
 342 SIBA_SPROM_ACCESSOR(rxpo2g,     RXPO2G,         uint8_t);
 343 SIBA_SPROM_ACCESSOR(rxpo5g,     RXPO5G,         uint8_t);
 344 SIBA_SPROM_ACCESSOR(tssi_a,     TSSI_A,         uint8_t);
 345 SIBA_SPROM_ACCESSOR(tssi_bg,    TSSI_BG,        uint8_t);
 346 SIBA_SPROM_ACCESSOR(tri2g,      TRI2G,          uint8_t);
 347 SIBA_SPROM_ACCESSOR(tri5gl,     TRI5GL,         uint8_t);
 348 SIBA_SPROM_ACCESSOR(tri5g,      TRI5G,          uint8_t);
 349 SIBA_SPROM_ACCESSOR(tri5gh,     TRI5GH,         uint8_t);
 350 SIBA_SPROM_ACCESSOR(rssisav2g,  RSSISAV2G,      uint8_t);
 351 SIBA_SPROM_ACCESSOR(rssismc2g,  RSSISMC2G,      uint8_t);
 352 SIBA_SPROM_ACCESSOR(rssismf2g,  RSSISMF2G,      uint8_t);
 353 SIBA_SPROM_ACCESSOR(bxa2g,      BXA2G,          uint8_t);
 354 SIBA_SPROM_ACCESSOR(rssisav5g,  RSSISAV5G,      uint8_t);
 355 SIBA_SPROM_ACCESSOR(rssismc5g,  RSSISMC5G,      uint8_t);
 356 SIBA_SPROM_ACCESSOR(rssismf5g,  RSSISMF5G,      uint8_t);
 357 SIBA_SPROM_ACCESSOR(bxa5g,      BXA5G,          uint8_t);
 358 SIBA_SPROM_ACCESSOR(cck2gpo,    CCK2GPO,        uint16_t);
 359 SIBA_SPROM_ACCESSOR(ofdm2gpo,   OFDM2GPO,       uint32_t);
 360 SIBA_SPROM_ACCESSOR(ofdm5glpo,  OFDM5GLPO,      uint32_t);
 361 SIBA_SPROM_ACCESSOR(ofdm5gpo,   OFDM5GPO,       uint32_t);
 362 SIBA_SPROM_ACCESSOR(ofdm5ghpo,  OFDM5GHPO,      uint32_t);
 363 SIBA_SPROM_ACCESSOR(bf_lo,      BF_LO,          uint16_t);
 364 SIBA_SPROM_ACCESSOR(bf_hi,      BF_HI,          uint16_t);
 365 SIBA_SPROM_ACCESSOR(bf2_lo,     BF2_LO,         uint16_t);
 366 SIBA_SPROM_ACCESSOR(bf2_hi,     BF2_HI,         uint16_t);
 367
 368 #undef SIBA_SPROM_ACCESSOR
 369
 370 struct siba_sprom {
 371         uint8_t                 rev;            /* revision */
 372         uint8_t                 mac_80211bg[6]; /* address for 802.11b/g */
 373         uint8_t                 mac_eth[6];     /* address for Ethernet */
 374         uint8_t                 mac_80211a[6];  /* address for 802.11a */
 375         uint8_t                 mii_eth0;       /* MII address for eth0 */
 376         uint8_t                 mii_eth1;       /* MII address for eth1 */
 377         uint8_t                 mdio_eth0;      /* MDIO for eth0 */
 378         uint8_t                 mdio_eth1;      /* MDIO for eth1 */
 379         uint8_t                 brev;           /* board revision */
 380         uint8_t                 ccode;          /* Country Code */
 381         uint8_t                 ant_a;          /* A-PHY antenna */
 382         uint8_t                 ant_bg;         /* B/G-PHY antenna */
 383         uint16_t                pa0b0;
 384         uint16_t                pa0b1;
 385         uint16_t                pa0b2;
 386         uint16_t                pa1b0;
 387         uint16_t                pa1b1;
 388         uint16_t                pa1b2;
 389         uint16_t                pa1lob0;
 390         uint16_t                pa1lob1;
 391         uint16_t                pa1lob2;
 392         uint16_t                pa1hib0;
 393         uint16_t                pa1hib1;
 394         uint16_t                pa1hib2;
 395         uint8_t                 gpio0;
 396         uint8_t                 gpio1;
 397         uint8_t                 gpio2;
 398         uint8_t                 gpio3;
 399         uint16_t                maxpwr_al;
 400         uint16_t                maxpwr_a;       /* A-PHY Max Power */
 401         uint16_t                maxpwr_ah;
 402         uint16_t                maxpwr_bg;      /* BG-PHY Max Power */
 403         uint8_t                 rxpo2g;
 404         uint8_t                 rxpo5g;
 405         uint8_t                 tssi_a;         /* Idle TSSI */
 406         uint8_t                 tssi_bg;        /* Idle TSSI */
 407         uint8_t                 tri2g;
 408         uint8_t                 tri5gl;
 409         uint8_t                 tri5g;
 410         uint8_t                 tri5gh;
 411         uint8_t                 rssisav2g;
 412         uint8_t                 rssismc2g;
 413         uint8_t                 rssismf2g;
 414         uint8_t                 bxa2g;
 415         uint8_t                 rssisav5g;
 416         uint8_t                 rssismc5g;
 417         uint8_t                 rssismf5g;
 418         uint8_t                 bxa5g;
 419         uint16_t                cck2gpo;
 420         uint32_t                ofdm2gpo;
 421         uint32_t                ofdm5glpo;
 422         uint32_t                ofdm5gpo;
 423         uint32_t                ofdm5ghpo;
 424         uint16_t                bf_lo;          /* boardflags */
 425         uint16_t                bf_hi;          /* boardflags */
 426         uint16_t                bf2_lo;
 427         uint16_t                bf2_hi;
 428
 429         struct {
 430                 struct {
 431                         int8_t a0, a1, a2, a3;
 432                 } ghz24;
 433                 struct {
 434                         int8_t a0, a1, a2, a3;
 435                 } ghz5;
 436         } again;        /* antenna gain */
 437 };
 438
 439 #define SIBA_LDO_PAREF                  0
 440 #define SIBA_LDO_VOLT1                  1
 441 #define SIBA_LDO_VOLT2                  2
 442 #define SIBA_LDO_VOLT3                  3
 443
 444 struct siba_cc_pmu {
 445         uint8_t                         rev;    /* PMU rev */
 446         uint32_t                        freq;   /* crystal freq in kHz */
 447 };
 448
 449 struct siba_cc {
 450         struct siba_dev_softc           *scc_dev;
 451         uint32_t                        scc_caps;
 452         struct siba_cc_pmu              scc_pmu;
 453         uint16_t                        scc_powerup_delay;
 454 };
 455
 456 struct siba_pci {
 457         struct siba_dev_softc           *spc_dev;
 458         uint8_t                         spc_inited;
 459         uint8_t                         spc_hostmode;
 460 };
 461
 462 struct siba_bus_ops {
 463         uint16_t                (*read_2)(struct siba_dev_softc *,
 464                                     uint16_t);
 465         uint32_t                (*read_4)(struct siba_dev_softc *,
 466                                     uint16_t);
 467         void                    (*write_2)(struct siba_dev_softc *,
 468                                     uint16_t, uint16_t);
 469         void                    (*write_4)(struct siba_dev_softc *,
 470                                     uint16_t, uint32_t);
 471         void                    (*read_multi_1)(struct siba_dev_softc *,
 472                                     void *, size_t, uint16_t);
 473         void                    (*read_multi_2)(struct siba_dev_softc *,
 474                                     void *, size_t, uint16_t);
 475         void                    (*read_multi_4)(struct siba_dev_softc *,
 476                                     void *, size_t, uint16_t);
 477         void                    (*write_multi_1)(struct siba_dev_softc *,
 478                                     const void *, size_t, uint16_t);
 479         void                    (*write_multi_2)(struct siba_dev_softc *,
 480                                     const void *, size_t, uint16_t);
 481         void                    (*write_multi_4)(struct siba_dev_softc *,
 482                                     const void *, size_t, uint16_t);
 483 };
 484
 485 struct siba_dev_softc {
 486         struct siba_softc               *sd_bus;
 487         struct siba_devid               sd_id;
 488         const struct siba_bus_ops       *sd_ops;
 489
 490         uint8_t                         sd_coreidx;
 491 };
 492
 493 struct siba_devinfo {
 494         struct resource_list             sdi_rl;
 495         /*devhandle_t                    sdi_devhandle; XXX*/
 496         /*struct rman sdi_intr_rman;*/
 497
 498         /* Accessors are needed for ivars below. */
 499         uint16_t                         sdi_vid;
 500         uint16_t                         sdi_devid;
 501         uint8_t                          sdi_rev;
 502         uint8_t                          sdi_idx;       /* core index on bus */
 503         uint8_t                          sdi_irq;       /* TODO */
 504 };
 505
 506 struct siba_softc {
 507         /*
 508          * common variables which used for siba(4) bus and siba_bwn bridge.
 509          */
 510         device_t                        siba_dev;       /* Device ID */
 511         struct resource                 *siba_mem_res;
 512         bus_space_tag_t                 siba_mem_bt;
 513         bus_space_handle_t              siba_mem_bh;
 514         bus_addr_t                      siba_maddr;
 515         bus_size_t                      siba_msize;
 516         uint8_t                         siba_ncores;
 517
 518         /*
 519          * the following variables are only used for siba_bwn bridge.
 520          */
 521
 522         enum siba_type                  siba_type;
 523         int                             siba_invalid;
 524
 525         struct siba_dev_softc           *siba_curdev;   /* only for PCI */
 526         struct siba_dev_softc           siba_devs[SIBA_MAX_CORES];
 527         int                             siba_ndevs;
 528
 529         uint16_t                        siba_pci_vid;
 530         uint16_t                        siba_pci_did;
 531         uint16_t                        siba_pci_subvid;
 532         uint16_t                        siba_pci_subdid;
 533         uint8_t                         siba_pci_revid;
 534         int                             siba_mem_rid;
 535
 536         uint16_t                        siba_chipid;    /* for CORE 0 */
 537         uint16_t                        siba_chiprev;
 538         uint8_t                         siba_chippkg;
 539
 540         struct siba_cc                  siba_cc;                /* ChipCommon */
 541         struct siba_pci                 siba_pci;       /* PCI-core */
 542         const struct siba_bus_ops       *siba_ops;
 543
 544         struct siba_sprom               siba_sprom;     /* SPROM */
 545         uint16_t                        siba_spromsize; /* in word size */
 546 };
 547
 548 void            siba_powerup(device_t, int);
 549 int             siba_powerdown(device_t);
 550 uint16_t        siba_read_2(device_t, uint16_t);
 551 void            siba_write_2(device_t, uint16_t, uint16_t);
 552 uint32_t        siba_read_4(device_t, uint16_t);
 553 void            siba_write_4(device_t, uint16_t, uint32_t);
 554 void            siba_dev_up(device_t, uint32_t);
 555 void            siba_dev_down(device_t, uint32_t);
 556 int             siba_dev_isup(device_t);
 557 void            siba_pcicore_intr(device_t);
 558 uint32_t        siba_dma_translation(device_t);
 559 void            siba_read_multi_1(device_t, void *, size_t, uint16_t);
 560 void            siba_read_multi_2(device_t, void *, size_t, uint16_t);
 561 void            siba_read_multi_4(device_t, void *, size_t, uint16_t);
 562 void            siba_write_multi_1(device_t, const void *, size_t, uint16_t);
 563 void            siba_write_multi_2(device_t, const void *, size_t, uint16_t);
 564 void            siba_write_multi_4(device_t, const void *, size_t, uint16_t);
 565 void            siba_barrier(device_t, int);
 566 void            siba_cc_pmu_set_ldovolt(device_t, int, uint32_t);
 567 void            siba_cc_pmu_set_ldoparef(device_t, uint8_t);
 568 void            siba_gpio_set(device_t, uint32_t);
 569 uint32_t        siba_gpio_get(device_t);
 570 void            siba_fix_imcfglobug(device_t);
 571
 572 #endif /* _SIBA_SIBAVAR_H_ */