2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
73 #include <sys/systm.h>
74 #include <sys/malloc.h>
75 #include <sys/endian.h>
76 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/module.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
91 #include <dev/ofw/openfirm.h>
92 #include <machine/ofw_machdep.h>
98 #include <cam/cam_ccb.h>
99 #include <cam/cam_sim.h>
100 #include <cam/cam_xpt_sim.h>
101 #include <cam/cam_debug.h>
103 #include <cam/scsi/scsi_all.h>
104 #include <cam/scsi/scsi_message.h>
106 /* Short and quite clear integer types */
111 typedef u_int16_t u16;
112 typedef u_int32_t u32;
115 * Driver definitions.
117 #include <dev/sym/sym_defs.h>
118 #include <dev/sym/sym_fw.h>
121 * IA32 architecture does not reorder STORES and prevents
122 * LOADS from passing STORES. It is called `program order'
123 * by Intel and allows device drivers to deal with memory
124 * ordering by only ensuring that the code is not reordered
125 * by the compiler when ordering is required.
126 * Other architectures implement a weaker ordering that
127 * requires memory barriers (and also IO barriers when they
128 * make sense) to be used.
130 #if defined __i386__ || defined __amd64__
131 #define MEMORY_BARRIER() do { ; } while(0)
132 #elif defined __powerpc__
133 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
134 #elif defined __ia64__
135 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
136 #elif defined __sparc64__
137 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
139 #error "Not supported platform"
143 * A la VMS/CAM-3 queue management.
145 typedef struct sym_quehead {
146 struct sym_quehead *flink; /* Forward pointer */
147 struct sym_quehead *blink; /* Backward pointer */
150 #define sym_que_init(ptr) do { \
151 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
154 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
156 return (head->flink == head) ? NULL : head->flink;
159 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
161 return (head->blink == head) ? NULL : head->blink;
164 static __inline void __sym_que_add(struct sym_quehead * new,
165 struct sym_quehead * blink,
166 struct sym_quehead * flink)
174 static __inline void __sym_que_del(struct sym_quehead * blink,
175 struct sym_quehead * flink)
177 flink->blink = blink;
178 blink->flink = flink;
181 static __inline int sym_que_empty(struct sym_quehead *head)
183 return head->flink == head;
186 static __inline void sym_que_splice(struct sym_quehead *list,
187 struct sym_quehead *head)
189 struct sym_quehead *first = list->flink;
192 struct sym_quehead *last = list->blink;
193 struct sym_quehead *at = head->flink;
203 #define sym_que_entry(ptr, type, member) \
204 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
206 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
208 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
210 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
212 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
214 struct sym_quehead *elem = head->flink;
217 __sym_que_del(head, elem->flink);
223 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
225 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
227 struct sym_quehead *elem = head->blink;
230 __sym_que_del(elem->blink, head);
237 * This one may be useful.
239 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
240 for (qp = (head)->flink; qp != (head); qp = qp->flink)
242 * FreeBSD does not offer our kind of queue in the CAM CCB.
243 * So, we have to cast.
245 #define sym_qptr(p) ((struct sym_quehead *) (p))
248 * Simple bitmap operations.
250 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
251 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
252 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
255 * Number of tasks per device we want to handle.
257 #if SYM_CONF_MAX_TAG_ORDER > 8
258 #error "more than 256 tags per logical unit not allowed."
260 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
263 * Donnot use more tasks that we can handle.
265 #ifndef SYM_CONF_MAX_TAG
266 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
268 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
269 #undef SYM_CONF_MAX_TAG
270 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
274 * This one means 'NO TAG for this job'
279 * Number of SCSI targets.
281 #if SYM_CONF_MAX_TARGET > 16
282 #error "more than 16 targets not allowed."
286 * Number of logical units per target.
288 #if SYM_CONF_MAX_LUN > 64
289 #error "more than 64 logical units per target not allowed."
293 * Asynchronous pre-scaler (ns). Shall be 40 for
294 * the SCSI timings to be compliant.
296 #define SYM_CONF_MIN_ASYNC (40)
299 * Number of entries in the START and DONE queues.
301 * We limit to 1 PAGE in order to succeed allocation of
302 * these queues. Each entry is 8 bytes long (2 DWORDS).
304 #ifdef SYM_CONF_MAX_START
305 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
307 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
308 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
311 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
312 #undef SYM_CONF_MAX_QUEUE
313 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
314 #undef SYM_CONF_MAX_START
315 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
319 * For this one, we want a short name :-)
321 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
324 * Active debugging tags and verbosity.
326 #define DEBUG_ALLOC (0x0001)
327 #define DEBUG_PHASE (0x0002)
328 #define DEBUG_POLL (0x0004)
329 #define DEBUG_QUEUE (0x0008)
330 #define DEBUG_RESULT (0x0010)
331 #define DEBUG_SCATTER (0x0020)
332 #define DEBUG_SCRIPT (0x0040)
333 #define DEBUG_TINY (0x0080)
334 #define DEBUG_TIMING (0x0100)
335 #define DEBUG_NEGO (0x0200)
336 #define DEBUG_TAGS (0x0400)
337 #define DEBUG_POINTER (0x0800)
340 static int sym_debug = 0;
341 #define DEBUG_FLAGS sym_debug
343 /* #define DEBUG_FLAGS (0x0631) */
344 #define DEBUG_FLAGS (0x0000)
347 #define sym_verbose (np->verbose)
350 * Insert a delay in micro-seconds and milli-seconds.
352 static void UDELAY(int us) { DELAY(us); }
353 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
356 * Simple power of two buddy-like allocator.
358 * This simple code is not intended to be fast, but to
359 * provide power of 2 aligned memory allocations.
360 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
361 * this allocator allows simple and fast address calculations
362 * from the SCRIPTS code. In addition, cache line alignment
363 * is guaranteed for power of 2 cache line size.
365 * This allocator has been developed for the Linux sym53c8xx
366 * driver, since this O/S does not provide naturally aligned
368 * It has the advantage of allowing the driver to use private
369 * pages of memory that will be useful if we ever need to deal
370 * with IO MMUs for PCI.
372 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
373 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
375 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
378 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
379 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
380 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
382 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
383 #define free_pages(p) free((p), M_DEVBUF)
385 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
387 typedef struct m_link { /* Link between free memory chunks */
391 typedef struct m_vtob { /* Virtual to Bus address translation */
393 bus_dmamap_t dmamap; /* Map for this chunk */
394 m_addr_t vaddr; /* Virtual address */
395 m_addr_t baddr; /* Bus physical address */
397 /* Hash this stuff a bit to speed up translations */
398 #define VTOB_HASH_SHIFT 5
399 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
400 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
401 #define VTOB_HASH_CODE(m) \
402 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
404 typedef struct m_pool { /* Memory pool of a given kind */
405 bus_dma_tag_t dev_dmat; /* Identifies the pool */
406 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
407 m_addr_t (*getp)(struct m_pool *);
408 #ifdef MEMO_FREE_UNUSED
409 void (*freep)(struct m_pool *, m_addr_t);
411 #define M_GETP() mp->getp(mp)
412 #define M_FREEP(p) mp->freep(mp, p)
414 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
416 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
419 static void *___sym_malloc(m_pool_s *mp, int size)
422 int s = (1 << MEMO_SHIFT);
427 if (size > MEMO_CLUSTER_SIZE)
437 if (s == MEMO_CLUSTER_SIZE) {
438 h[j].next = (m_link_s *) M_GETP();
440 h[j].next->next = NULL;
446 a = (m_addr_t) h[j].next;
448 h[j].next = h[j].next->next;
452 h[j].next = (m_link_s *) (a+s);
453 h[j].next->next = NULL;
457 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
462 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
465 int s = (1 << MEMO_SHIFT);
471 printf("___sym_mfree(%p, %d)\n", ptr, size);
474 if (size > MEMO_CLUSTER_SIZE)
485 #ifdef MEMO_FREE_UNUSED
486 if (s == MEMO_CLUSTER_SIZE) {
493 while (q->next && q->next != (m_link_s *) b) {
497 ((m_link_s *) a)->next = h[i].next;
498 h[i].next = (m_link_s *) a;
501 q->next = q->next->next;
508 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
512 p = ___sym_malloc(mp, size);
514 if (DEBUG_FLAGS & DEBUG_ALLOC)
515 printf ("new %-10s[%4d] @%p.\n", name, size, p);
519 else if (uflags & MEMO_WARN)
520 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
525 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
527 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
529 if (DEBUG_FLAGS & DEBUG_ALLOC)
530 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
532 ___sym_mfree(mp, ptr, size);
537 * Default memory pool we donnot need to involve in DMA.
540 * With the `bus dma abstraction', we use a separate pool for
541 * memory we donnot need to involve in DMA.
543 static m_addr_t ___mp0_getp(m_pool_s *mp)
545 m_addr_t m = (m_addr_t) get_pages();
551 #ifdef MEMO_FREE_UNUSED
552 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
559 #ifdef MEMO_FREE_UNUSED
560 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
562 static m_pool_s mp0 = {0, 0, ___mp0_getp};
566 * Actual memory allocation routine for non-DMAed memory.
568 static void *sym_calloc(int size, char *name)
572 m = __sym_calloc(&mp0, size, name);
578 * Actual memory allocation routine for non-DMAed memory.
580 static void sym_mfree(void *ptr, int size, char *name)
583 __sym_mfree(&mp0, ptr, size, name);
591 * With `bus dma abstraction', we use a separate pool per parent
592 * BUS handle. A reverse table (hashed) is maintained for virtual
593 * to BUS address translation.
595 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg __unused,
600 KASSERT(nseg == 1, ("%s: too many DMA segments (%d)", __func__, nseg));
602 baddr = (bus_addr_t *)arg;
606 *baddr = segs->ds_addr;
609 static m_addr_t ___dma_getp(m_pool_s *mp)
613 bus_addr_t baddr = 0;
615 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
619 if (bus_dmamem_alloc(mp->dmat, &vaddr,
620 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
622 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
623 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
625 int hc = VTOB_HASH_CODE(vaddr);
626 vbp->vaddr = (m_addr_t) vaddr;
627 vbp->baddr = (m_addr_t) baddr;
628 vbp->next = mp->vtob[hc];
631 return (m_addr_t) vaddr;
635 bus_dmamap_unload(mp->dmat, vbp->dmamap);
637 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
640 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
641 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
646 #ifdef MEMO_FREE_UNUSED
647 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
649 m_vtob_s **vbpp, *vbp;
650 int hc = VTOB_HASH_CODE(m);
652 vbpp = &mp->vtob[hc];
653 while (*vbpp && (*vbpp)->vaddr != m)
654 vbpp = &(*vbpp)->next;
657 *vbpp = (*vbpp)->next;
658 bus_dmamap_unload(mp->dmat, vbp->dmamap);
659 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
660 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
661 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
667 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
670 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
674 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
678 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
680 mp->dev_dmat = dev_dmat;
681 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
682 BUS_SPACE_MAXADDR_32BIT,
684 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
685 MEMO_CLUSTER_SIZE, 0,
686 NULL, NULL, &mp->dmat)) {
687 mp->getp = ___dma_getp;
688 #ifdef MEMO_FREE_UNUSED
689 mp->freep = ___dma_freep;
697 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
701 #ifdef MEMO_FREE_UNUSED
702 static void ___del_dma_pool(m_pool_s *p)
704 struct m_pool **pp = &mp0.next;
706 while (*pp && *pp != p)
710 bus_dma_tag_destroy(p->dmat);
711 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
716 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
722 mp = ___get_dma_pool(dev_dmat);
724 mp = ___cre_dma_pool(dev_dmat);
726 m = __sym_calloc(mp, size, name);
727 #ifdef MEMO_FREE_UNUSED
737 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
742 mp = ___get_dma_pool(dev_dmat);
744 __sym_mfree(mp, m, size, name);
745 #ifdef MEMO_FREE_UNUSED
752 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
755 int hc = VTOB_HASH_CODE(m);
757 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
760 mp = ___get_dma_pool(dev_dmat);
763 while (vp && (m_addr_t) vp->vaddr != a)
768 panic("sym: VTOBUS FAILED!\n");
769 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
773 * Verbs for DMAable memory handling.
774 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
777 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
778 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
779 #define _sym_mfree_dma(np, p, s, n) \
780 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
781 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
782 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
783 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
784 #define vtobus(p) _vtobus(np, p)
787 * Print a buffer in hexadecimal format.
789 static void sym_printb_hex (u_char *p, int n)
792 printf (" %x", *p++);
796 * Same with a label at beginning and .\n at end.
798 static void sym_printl_hex (char *label, u_char *p, int n)
800 printf ("%s", label);
801 sym_printb_hex (p, n);
806 * Return a string for SCSI BUS mode.
808 static const char *sym_scsi_bus_mode(int mode)
811 case SMODE_HVD: return "HVD";
812 case SMODE_SE: return "SE";
813 case SMODE_LVD: return "LVD";
819 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
821 #ifdef SYM_CONF_NVRAM_SUPPORT
822 static const u_char Tekram_sync[16] =
823 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
827 * Union of supported NVRAM formats.
831 #define SYM_SYMBIOS_NVRAM (1)
832 #define SYM_TEKRAM_NVRAM (2)
833 #ifdef SYM_CONF_NVRAM_SUPPORT
835 Symbios_nvram Symbios;
842 * This one is hopefully useless, but actually useful. :-)
845 #define assert(expression) { \
846 if (!(expression)) { \
848 "assertion \"%s\" failed: file \"%s\", line %d\n", \
850 __FILE__, __LINE__); \
856 * Some provision for a possible big endian mode supported by
857 * Symbios chips (never seen, by the way).
858 * For now, this stuff does not deserve any comments. :)
860 #define sym_offb(o) (o)
861 #define sym_offw(o) (o)
864 * Some provision for support for BIG ENDIAN CPU.
866 #define cpu_to_scr(dw) htole32(dw)
867 #define scr_to_cpu(dw) le32toh(dw)
870 * Access to the chip IO registers and on-chip RAM.
871 * We use the `bus space' interface under FreeBSD-4 and
872 * later kernel versions.
874 #if defined(SYM_CONF_IOMAPPED)
876 #define INB_OFF(o) bus_read_1(np->io_res, (o))
877 #define INW_OFF(o) bus_read_2(np->io_res, (o))
878 #define INL_OFF(o) bus_read_4(np->io_res, (o))
880 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
881 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
882 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
884 #else /* Memory mapped IO */
886 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
887 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
888 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
890 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
891 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
892 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
894 #endif /* SYM_CONF_IOMAPPED */
896 #define OUTRAM_OFF(o, a, l) \
897 bus_write_region_1(np->ram_res, (o), (a), (l))
900 * Common definitions for both bus space and legacy IO methods.
902 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
903 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
904 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
906 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
907 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
908 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
910 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
911 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
912 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
913 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
914 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
915 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
918 * We normally want the chip to have a consistent view
919 * of driver internal data structures when we restart it.
922 #define OUTL_DSP(v) \
925 OUTL (nc_dsp, (v)); \
928 #define OUTONB_STD() \
931 OUTONB (nc_dcntl, (STD|NOCOM)); \
935 * Command control block states.
939 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
940 #define HS_DISCONNECT (3) /* Disconnected by target */
941 #define HS_WAIT (4) /* waiting for resource */
943 #define HS_DONEMASK (0x80)
944 #define HS_COMPLETE (4|HS_DONEMASK)
945 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
946 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
947 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
950 * Software Interrupt Codes
952 #define SIR_BAD_SCSI_STATUS (1)
953 #define SIR_SEL_ATN_NO_MSG_OUT (2)
954 #define SIR_MSG_RECEIVED (3)
955 #define SIR_MSG_WEIRD (4)
956 #define SIR_NEGO_FAILED (5)
957 #define SIR_NEGO_PROTO (6)
958 #define SIR_SCRIPT_STOPPED (7)
959 #define SIR_REJECT_TO_SEND (8)
960 #define SIR_SWIDE_OVERRUN (9)
961 #define SIR_SODL_UNDERRUN (10)
962 #define SIR_RESEL_NO_MSG_IN (11)
963 #define SIR_RESEL_NO_IDENTIFY (12)
964 #define SIR_RESEL_BAD_LUN (13)
965 #define SIR_TARGET_SELECTED (14)
966 #define SIR_RESEL_BAD_I_T_L (15)
967 #define SIR_RESEL_BAD_I_T_L_Q (16)
968 #define SIR_ABORT_SENT (17)
969 #define SIR_RESEL_ABORTED (18)
970 #define SIR_MSG_OUT_DONE (19)
971 #define SIR_COMPLETE_ERROR (20)
972 #define SIR_DATA_OVERRUN (21)
973 #define SIR_BAD_PHASE (22)
977 * Extended error bit codes.
978 * xerr_status field of struct sym_ccb.
980 #define XE_EXTRA_DATA (1) /* unexpected data phase */
981 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
982 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
983 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
984 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
987 * Negotiation status.
988 * nego_status field of struct sym_ccb.
995 * A CCB hashed table is used to retrieve CCB address
998 #define CCB_HASH_SHIFT 8
999 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1000 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1001 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1006 #define SYM_DISC_ENABLED (1)
1007 #define SYM_TAGS_ENABLED (1<<1)
1008 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1009 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1012 * Host adapter miscellaneous flags.
1014 #define SYM_AVOID_BUS_RESET (1)
1015 #define SYM_SCAN_TARGETS_HILO (1<<1)
1019 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1020 * saving the DATA POINTER then reselects and terminates the IO.
1021 * On reselection, the automatic RESTORE DATA POINTER makes the
1022 * CURRENT DATA POINTER not point at the end of the IO.
1023 * This behaviour just breaks our calculation of the residual.
1024 * For now, we just force an AUTO SAVE on disconnection and will
1025 * fix that in a further driver version.
1027 #define SYM_QUIRK_AUTOSAVE 1
1032 #define SYM_LOCK() mtx_lock(&np->mtx)
1033 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1034 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1035 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1036 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1037 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1039 #define SYM_SNOOP_TIMEOUT (10000000)
1040 #define SYM_PCI_IO PCIR_BAR(0)
1041 #define SYM_PCI_MMIO PCIR_BAR(1)
1042 #define SYM_PCI_RAM PCIR_BAR(2)
1043 #define SYM_PCI_RAM64 PCIR_BAR(3)
1046 * Back-pointer from the CAM CCB to our data structures.
1048 #define sym_hcb_ptr spriv_ptr0
1049 /* #define sym_ccb_ptr spriv_ptr1 */
1052 * We mostly have to deal with pointers.
1053 * Thus these typedef's.
1055 typedef struct sym_tcb *tcb_p;
1056 typedef struct sym_lcb *lcb_p;
1057 typedef struct sym_ccb *ccb_p;
1058 typedef struct sym_hcb *hcb_p;
1061 * Gather negotiable parameters value
1069 u8 options; /* PPR options */
1073 struct sym_trans current;
1074 struct sym_trans goal;
1075 struct sym_trans user;
1078 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1079 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1082 * Global TCB HEADER.
1084 * Due to lack of indirect addressing on earlier NCR chips,
1085 * this substructure is copied from the TCB to a global
1086 * address after selection.
1087 * For SYMBIOS chips that support LOAD/STORE this copy is
1088 * not needed and thus not performed.
1092 * Scripts bus addresses of LUN table accessed from scripts.
1093 * LUN #0 is a special case, since multi-lun devices are rare,
1094 * and we we want to speed-up the general case and not waste
1097 u32 luntbl_sa; /* bus address of this table */
1098 u32 lun0_sa; /* bus address of LCB #0 */
1100 * Actual SYNC/WIDE IO registers value for this target.
1101 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1102 * so have alignment constraints.
1104 /*0*/ u_char uval; /* -> SCNTL4 register */
1105 /*1*/ u_char sval; /* -> SXFER io register */
1106 /*2*/ u_char filler1;
1107 /*3*/ u_char wval; /* -> SCNTL3 io register */
1111 * Target Control Block
1116 * Assumed at offset 0.
1118 /*0*/ struct sym_tcbh head;
1121 * LUN table used by the SCRIPTS processor.
1122 * An array of bus addresses is used on reselection.
1124 u32 *luntbl; /* LCBs bus address table */
1127 * LUN table used by the C code.
1129 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1130 #if SYM_CONF_MAX_LUN > 1
1131 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1135 * Bitmap that tells about LUNs that succeeded at least
1136 * 1 IO and therefore assumed to be a real device.
1137 * Avoid useless allocation of the LCB structure.
1139 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1142 * Bitmap that tells about LUNs that haven't yet an LCB
1143 * allocated (not discovered or LCB allocation failed).
1145 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1148 * Transfer capabilities (SIP)
1150 struct sym_tinfo tinfo;
1153 * Keep track of the CCB used for the negotiation in order
1154 * to ensure that only 1 negotiation is queued at a time.
1156 ccb_p nego_cp; /* CCB used for the nego */
1159 * Set when we want to reset the device.
1164 * Other user settable limits and options.
1165 * These limits are read from the NVRAM if present.
1172 * Assert some alignments required by the chip.
1174 CTASSERT(((offsetof(struct sym_reg, nc_sxfer) ^
1175 offsetof(struct sym_tcb, head.sval)) &3) == 0);
1176 CTASSERT(((offsetof(struct sym_reg, nc_scntl3) ^
1177 offsetof(struct sym_tcb, head.wval)) &3) == 0);
1180 * Global LCB HEADER.
1182 * Due to lack of indirect addressing on earlier NCR chips,
1183 * this substructure is copied from the LCB to a global
1184 * address after selection.
1185 * For SYMBIOS chips that support LOAD/STORE this copy is
1186 * not needed and thus not performed.
1190 * SCRIPTS address jumped by SCRIPTS on reselection.
1191 * For not probed logical units, this address points to
1192 * SCRIPTS that deal with bad LU handling (must be at
1193 * offset zero of the LCB for that reason).
1198 * Task (bus address of a CCB) read from SCRIPTS that points
1199 * to the unique ITL nexus allowed to be disconnected.
1204 * Task table bus address (read from SCRIPTS).
1210 * Logical Unit Control Block
1215 * Assumed at offset 0.
1217 /*0*/ struct sym_lcbh head;
1220 * Task table read from SCRIPTS that contains pointers to
1221 * ITLQ nexuses. The bus address read from SCRIPTS is
1222 * inside the header.
1224 u32 *itlq_tbl; /* Kernel virtual address */
1227 * Busy CCBs management.
1229 u_short busy_itlq; /* Number of busy tagged CCBs */
1230 u_short busy_itl; /* Number of busy untagged CCBs */
1233 * Circular tag allocation buffer.
1235 u_short ia_tag; /* Tag allocation index */
1236 u_short if_tag; /* Tag release index */
1237 u_char *cb_tags; /* Circular tags buffer */
1240 * Set when we want to clear all tasks.
1248 u_char current_flags;
1252 * Action from SCRIPTS on a task.
1253 * Is part of the CCB, but is also used separately to plug
1254 * error handling action to perform from SCRIPTS.
1257 u32 start; /* Jumped by SCRIPTS after selection */
1258 u32 restart; /* Jumped by SCRIPTS on relection */
1262 * Phase mismatch context.
1264 * It is part of the CCB and is used as parameters for the
1265 * DATA pointer. We need two contexts to handle correctly the
1266 * SAVED DATA POINTER.
1269 struct sym_tblmove sg; /* Updated interrupted SG block */
1270 u32 ret; /* SCRIPT return address */
1274 * LUN control block lookup.
1275 * We use a direct pointer for LUN #0, and a table of
1276 * pointers which is only allocated for devices that support
1279 #if SYM_CONF_MAX_LUN <= 1
1280 #define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : 0
1282 #define sym_lp(tp, lun) \
1283 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1287 * Status are used by the host and the script processor.
1289 * The last four bytes (status[4]) are copied to the
1290 * scratchb register (declared as scr0..scr3) just after the
1291 * select/reselect, and copied back just after disconnecting.
1292 * Inside the script the XX_REG are used.
1296 * Last four bytes (script)
1300 #define HS_PRT nc_scr1
1302 #define SS_PRT nc_scr2
1304 #define HF_PRT nc_scr3
1307 * Last four bytes (host)
1309 #define actualquirks phys.head.status[0]
1310 #define host_status phys.head.status[1]
1311 #define ssss_status phys.head.status[2]
1312 #define host_flags phys.head.status[3]
1317 #define HF_IN_PM0 1u
1318 #define HF_IN_PM1 (1u<<1)
1319 #define HF_ACT_PM (1u<<2)
1320 #define HF_DP_SAVED (1u<<3)
1321 #define HF_SENSE (1u<<4)
1322 #define HF_EXT_ERR (1u<<5)
1323 #define HF_DATA_IN (1u<<6)
1324 #ifdef SYM_CONF_IARB_SUPPORT
1325 #define HF_HINT_IARB (1u<<7)
1329 * Global CCB HEADER.
1331 * Due to lack of indirect addressing on earlier NCR chips,
1332 * this substructure is copied from the ccb to a global
1333 * address after selection (or reselection) and copied back
1334 * before disconnect.
1335 * For SYMBIOS chips that support LOAD/STORE this copy is
1336 * not needed and thus not performed.
1340 * Start and restart SCRIPTS addresses (must be at 0).
1342 /*0*/ struct sym_actscr go;
1345 * SCRIPTS jump address that deal with data pointers.
1346 * 'savep' points to the position in the script responsible
1347 * for the actual transfer of data.
1348 * It's written on reception of a SAVE_DATA_POINTER message.
1350 u32 savep; /* Jump address to saved data pointer */
1351 u32 lastp; /* SCRIPTS address at end of data */
1352 u32 goalp; /* Not accessed for now from SCRIPTS */
1361 * Data Structure Block
1363 * During execution of a ccb by the script processor, the
1364 * DSA (data structure address) register points to this
1365 * substructure of the ccb.
1370 * Also assumed at offset 0 of the sym_ccb structure.
1372 /*0*/ struct sym_ccbh head;
1375 * Phase mismatch contexts.
1376 * We need two to handle correctly the SAVED DATA POINTER.
1377 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1378 * for address calculation from SCRIPTS.
1384 * Table data for Script
1386 struct sym_tblsel select;
1387 struct sym_tblmove smsg;
1388 struct sym_tblmove smsg_ext;
1389 struct sym_tblmove cmd;
1390 struct sym_tblmove sense;
1391 struct sym_tblmove wresid;
1392 struct sym_tblmove data [SYM_CONF_MAX_SG];
1396 * Our Command Control Block
1400 * This is the data structure which is pointed by the DSA
1401 * register when it is executed by the script processor.
1402 * It must be the first entry.
1404 struct sym_dsb phys;
1407 * Pointer to CAM ccb and related stuff.
1409 struct callout ch; /* callout handle */
1410 union ccb *cam_ccb; /* CAM scsiio ccb */
1411 u8 cdb_buf[16]; /* Copy of CDB */
1412 u8 *sns_bbuf; /* Bounce buffer for sense data */
1413 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1414 int data_len; /* Total data length */
1415 int segments; /* Number of SG segments */
1418 * Miscellaneous status'.
1420 u_char nego_status; /* Negotiation status */
1421 u_char xerr_status; /* Extended error flags */
1422 u32 extra_bytes; /* Extraneous bytes transferred */
1426 * We prepare a message to be sent after selection.
1427 * We may use a second one if the command is rescheduled
1428 * due to CHECK_CONDITION or COMMAND TERMINATED.
1429 * Contents are IDENTIFY and SIMPLE_TAG.
1430 * While negotiating sync or wide transfer,
1431 * a SDTR or WDTR message is appended.
1433 u_char scsi_smsg [12];
1434 u_char scsi_smsg2[12];
1437 * Auto request sense related fields.
1439 u_char sensecmd[6]; /* Request Sense command */
1440 u_char sv_scsi_status; /* Saved SCSI status */
1441 u_char sv_xerr_status; /* Saved extended status */
1442 int sv_resid; /* Saved residual */
1445 * Map for the DMA of user data.
1447 void *arg; /* Argument for some callback */
1448 bus_dmamap_t dmamap; /* DMA map for user data */
1450 #define SYM_DMA_NONE 0
1451 #define SYM_DMA_READ 1
1452 #define SYM_DMA_WRITE 2
1456 u32 ccb_ba; /* BUS address of this CCB */
1457 u_short tag; /* Tag for this transfer */
1458 /* NO_TAG means no tag */
1461 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1463 link_ccbq; /* Link to free/busy CCB queue */
1464 u32 startp; /* Initial data pointer */
1465 int ext_sg; /* Extreme data pointer, used */
1466 int ext_ofs; /* to calculate the residual. */
1467 u_char to_abort; /* Want this IO to be aborted */
1470 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1473 * Host Control Block
1480 * Due to poorness of addressing capabilities, earlier
1481 * chips (810, 815, 825) copy part of the data structures
1482 * (CCB, TCB and LCB) in fixed areas.
1484 #ifdef SYM_CONF_GENERIC_SUPPORT
1485 struct sym_ccbh ccb_head;
1486 struct sym_tcbh tcb_head;
1487 struct sym_lcbh lcb_head;
1490 * Idle task and invalid task actions and
1491 * their bus addresses.
1493 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1494 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1497 * Dummy lun table to protect us against target
1498 * returning bad lun number on reselection.
1500 u32 *badluntbl; /* Table physical address */
1501 u32 badlun_sa; /* SCRIPT handler BUS address */
1504 * Bus address of this host control block.
1509 * Bit 32-63 of the on-chip RAM bus address in LE format.
1510 * The START_RAM64 script loads the MMRS and MMWS from this
1516 * Chip and controller indentification.
1521 * Initial value of some IO register bits.
1522 * These values are assumed to have been set by BIOS, and may
1523 * be used to probe adapter implementation differences.
1525 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1526 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1530 * Actual initial value of IO register bits used by the
1531 * driver. They are loaded at initialisation according to
1532 * features that are to be enabled/disabled.
1534 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1535 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1541 struct sym_tcb *target;
1543 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1547 * Target control block bus address array used by the SCRIPT
1554 * CAM SIM information for this instance.
1556 struct cam_sim *sim;
1557 struct cam_path *path;
1560 * Allocated hardware resources.
1562 struct resource *irq_res;
1563 struct resource *io_res;
1564 struct resource *mmio_res;
1565 struct resource *ram_res;
1572 * My understanding of PCI is that all agents must share the
1573 * same addressing range and model.
1574 * But some hardware architecture guys provide complex and
1575 * brain-deaded stuff that makes shit.
1576 * This driver only support PCI compliant implementations and
1577 * deals with part of the BUS stuff complexity only to fit O/S
1584 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1585 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1587 * BUS addresses of the chip
1589 vm_offset_t mmio_ba; /* MMIO BUS address */
1590 int mmio_ws; /* MMIO Window size */
1592 vm_offset_t ram_ba; /* RAM BUS address */
1593 int ram_ws; /* RAM window size */
1596 * SCRIPTS virtual and physical bus addresses.
1597 * 'script' is loaded in the on-chip RAM if present.
1598 * 'scripth' stays in main memory for all chips except the
1599 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1601 u_char *scripta0; /* Copies of script and scripth */
1602 u_char *scriptb0; /* Copies of script and scripth */
1603 vm_offset_t scripta_ba; /* Actual script and scripth */
1604 vm_offset_t scriptb_ba; /* bus addresses. */
1605 vm_offset_t scriptb0_ba;
1606 u_short scripta_sz; /* Actual size of script A */
1607 u_short scriptb_sz; /* Actual size of script B */
1610 * Bus addresses, setup and patch methods for
1611 * the selected firmware.
1613 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1614 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1615 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1616 void (*fw_patch)(hcb_p np);
1617 const char *fw_name;
1620 * General controller parameters and configuration.
1622 u_short device_id; /* PCI device id */
1623 u_char revision_id; /* PCI device revision id */
1624 u_int features; /* Chip features map */
1625 u_char myaddr; /* SCSI id of the adapter */
1626 u_char maxburst; /* log base 2 of dwords burst */
1627 u_char maxwide; /* Maximum transfer width */
1628 u_char minsync; /* Min sync period factor (ST) */
1629 u_char maxsync; /* Max sync period factor (ST) */
1630 u_char maxoffs; /* Max scsi offset (ST) */
1631 u_char minsync_dt; /* Min sync period factor (DT) */
1632 u_char maxsync_dt; /* Max sync period factor (DT) */
1633 u_char maxoffs_dt; /* Max scsi offset (DT) */
1634 u_char multiplier; /* Clock multiplier (1,2,4) */
1635 u_char clock_divn; /* Number of clock divisors */
1636 u32 clock_khz; /* SCSI clock frequency in KHz */
1637 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1639 * Start queue management.
1640 * It is filled up by the host processor and accessed by the
1641 * SCRIPTS processor in order to start SCSI commands.
1643 volatile /* Prevent code optimizations */
1644 u32 *squeue; /* Start queue virtual address */
1645 u32 squeue_ba; /* Start queue BUS address */
1646 u_short squeueput; /* Next free slot of the queue */
1647 u_short actccbs; /* Number of allocated CCBs */
1650 * Command completion queue.
1651 * It is the same size as the start queue to avoid overflow.
1653 u_short dqueueget; /* Next position to scan */
1654 volatile /* Prevent code optimizations */
1655 u32 *dqueue; /* Completion (done) queue */
1656 u32 dqueue_ba; /* Done queue BUS address */
1659 * Miscellaneous buffers accessed by the scripts-processor.
1660 * They shall be DWORD aligned, because they may be read or
1661 * written with a script command.
1663 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1664 u_char msgin [8]; /* Buffer for MESSAGE IN */
1665 u32 lastmsg; /* Last SCSI message sent */
1666 u_char scratch; /* Scratch for SCSI receive */
1669 * Miscellaneous configuration and status parameters.
1671 u_char usrflags; /* Miscellaneous user flags */
1672 u_char scsi_mode; /* Current SCSI BUS mode */
1673 u_char verbose; /* Verbosity for this controller*/
1674 u32 cache; /* Used for cache test at init. */
1677 * CCB lists and queue.
1679 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1680 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1681 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1684 * During error handling and/or recovery,
1685 * active CCBs that are to be completed with
1686 * error or requeued are moved from the busy_ccbq
1687 * to the comp_ccbq prior to completion.
1689 SYM_QUEHEAD comp_ccbq;
1692 * CAM CCB pending queue.
1694 SYM_QUEHEAD cam_ccbq;
1697 * IMMEDIATE ARBITRATION (IARB) control.
1699 * We keep track in 'last_cp' of the last CCB that has been
1700 * queued to the SCRIPTS processor and clear 'last_cp' when
1701 * this CCB completes. If last_cp is not zero at the moment
1702 * we queue a new CCB, we set a flag in 'last_cp' that is
1703 * used by the SCRIPTS as a hint for setting IARB.
1704 * We donnot set more than 'iarb_max' consecutive hints for
1705 * IARB in order to leave devices a chance to reselect.
1706 * By the way, any non zero value of 'iarb_max' is unfair. :)
1708 #ifdef SYM_CONF_IARB_SUPPORT
1709 u_short iarb_max; /* Max. # consecutive IARB hints*/
1710 u_short iarb_count; /* Actual # of these hints */
1715 * Command abort handling.
1716 * We need to synchronize tightly with the SCRIPTS
1717 * processor in order to handle things correctly.
1719 u_char abrt_msg[4]; /* Message to send buffer */
1720 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1721 struct sym_tblsel abrt_sel; /* Sync params for selection */
1722 u_char istat_sem; /* Tells the chip to stop (SEM) */
1725 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1728 * Return the name of the controller.
1730 static __inline const char *sym_name(hcb_p np)
1732 return device_get_nameunit(np->device);
1735 /*--------------------------------------------------------------------------*/
1736 /*------------------------------ FIRMWARES ---------------------------------*/
1737 /*--------------------------------------------------------------------------*/
1740 * This stuff will be moved to a separate source file when
1741 * the driver will be broken into several source modules.
1745 * Macros used for all firmwares.
1747 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1748 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1749 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1750 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1752 #ifdef SYM_CONF_GENERIC_SUPPORT
1754 * Allocate firmware #1 script area.
1756 #define SYM_FWA_SCR sym_fw1a_scr
1757 #define SYM_FWB_SCR sym_fw1b_scr
1758 #include <dev/sym/sym_fw1.h>
1759 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1760 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1762 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1763 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1767 #endif /* SYM_CONF_GENERIC_SUPPORT */
1770 * Allocate firmware #2 script area.
1772 #define SYM_FWA_SCR sym_fw2a_scr
1773 #define SYM_FWB_SCR sym_fw2b_scr
1774 #include <dev/sym/sym_fw2.h>
1775 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1776 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1778 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1779 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1780 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1781 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1791 #ifdef SYM_CONF_GENERIC_SUPPORT
1793 * Patch routine for firmware #1.
1796 sym_fw1_patch(hcb_p np)
1798 struct sym_fw1a_scr *scripta0;
1799 struct sym_fw1b_scr *scriptb0;
1801 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1802 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1805 * Remove LED support if not needed.
1807 if (!(np->features & FE_LED0)) {
1808 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1809 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1810 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1813 #ifdef SYM_CONF_IARB_SUPPORT
1815 * If user does not want to use IMMEDIATE ARBITRATION
1816 * when we are reselected while attempting to arbitrate,
1817 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1819 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1820 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1823 * Patch some data in SCRIPTS.
1824 * - start and done queue initial bus address.
1825 * - target bus address table bus address.
1827 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1828 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1829 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1831 #endif /* SYM_CONF_GENERIC_SUPPORT */
1834 * Patch routine for firmware #2.
1837 sym_fw2_patch(hcb_p np)
1839 struct sym_fw2a_scr *scripta0;
1840 struct sym_fw2b_scr *scriptb0;
1842 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1843 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1846 * Remove LED support if not needed.
1848 if (!(np->features & FE_LED0)) {
1849 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1850 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1851 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1854 #ifdef SYM_CONF_IARB_SUPPORT
1856 * If user does not want to use IMMEDIATE ARBITRATION
1857 * when we are reselected while attempting to arbitrate,
1858 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1860 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1861 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1864 * Patch some variable in SCRIPTS.
1865 * - start and done queue initial bus address.
1866 * - target bus address table bus address.
1868 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1869 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1870 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1873 * Remove the load of SCNTL4 on reselection if not a C10.
1875 if (!(np->features & FE_C10)) {
1876 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1877 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1881 * Remove a couple of work-arounds specific to C1010 if
1882 * they are not desirable. See `sym_fw2.h' for more details.
1884 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1885 np->revision_id < 0x1 &&
1886 np->pciclk_khz < 60000)) {
1887 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1888 scripta0->datao_phase[1] = cpu_to_scr(0);
1890 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1891 /* np->revision_id < 0xff */ 1)) {
1892 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1893 scripta0->sel_done[1] = cpu_to_scr(0);
1897 * Patch some other variables in SCRIPTS.
1898 * These ones are loaded by the SCRIPTS processor.
1900 scriptb0->pm0_data_addr[0] =
1901 cpu_to_scr(np->scripta_ba +
1902 offsetof(struct sym_fw2a_scr, pm0_data));
1903 scriptb0->pm1_data_addr[0] =
1904 cpu_to_scr(np->scripta_ba +
1905 offsetof(struct sym_fw2a_scr, pm1_data));
1909 * Fill the data area in scripts.
1910 * To be done for all firmwares.
1913 sym_fw_fill_data (u32 *in, u32 *out)
1917 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1918 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1919 *in++ = offsetof (struct sym_dsb, data[i]);
1920 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1921 *out++ = offsetof (struct sym_dsb, data[i]);
1926 * Setup useful script bus addresses.
1927 * To be done for all firmwares.
1930 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1937 * Build the bus address table for script A
1938 * from the script A offset table.
1940 po = (const u_short *) fw->a_ofs;
1941 pa = (u32 *) &np->fwa_bas;
1942 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1943 pa[i] = np->scripta_ba + po[i];
1946 * Same for script B.
1948 po = (const u_short *) fw->b_ofs;
1949 pa = (u32 *) &np->fwb_bas;
1950 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1951 pa[i] = np->scriptb_ba + po[i];
1954 #ifdef SYM_CONF_GENERIC_SUPPORT
1956 * Setup routine for firmware #1.
1959 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1961 struct sym_fw1a_scr *scripta0;
1963 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1966 * Fill variable parts in scripts.
1968 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1971 * Setup bus addresses used from the C code..
1973 sym_fw_setup_bus_addresses(np, fw);
1975 #endif /* SYM_CONF_GENERIC_SUPPORT */
1978 * Setup routine for firmware #2.
1981 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1983 struct sym_fw2a_scr *scripta0;
1985 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1988 * Fill variable parts in scripts.
1990 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1993 * Setup bus addresses used from the C code..
1995 sym_fw_setup_bus_addresses(np, fw);
1999 * Allocate firmware descriptors.
2001 #ifdef SYM_CONF_GENERIC_SUPPORT
2002 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2003 #endif /* SYM_CONF_GENERIC_SUPPORT */
2004 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2007 * Find the most appropriate firmware for a chip.
2009 static const struct sym_fw *
2010 sym_find_firmware(const struct sym_pci_chip *chip)
2012 if (chip->features & FE_LDSTR)
2014 #ifdef SYM_CONF_GENERIC_SUPPORT
2015 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2023 * Bind a script to physical addresses.
2025 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2027 u32 opcode, new, old, tmp1, tmp2;
2032 end = start + len/4;
2039 * If we forget to change the length
2040 * in scripts, a field will be
2041 * padded with 0. This is an illegal
2045 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2046 sym_name(np), (int) (cur-start));
2053 * We use the bogus value 0xf00ff00f ;-)
2054 * to reserve data area in SCRIPTS.
2056 if (opcode == SCR_DATA_ZERO) {
2061 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2062 printf ("%d: <%x>\n", (int) (cur-start),
2066 * We don't have to decode ALL commands
2068 switch (opcode >> 28) {
2071 * LOAD / STORE DSA relative, don't relocate.
2077 * LOAD / STORE absolute.
2083 * COPY has TWO arguments.
2088 if ((tmp1 ^ tmp2) & 3) {
2089 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2090 sym_name(np), (int) (cur-start));
2094 * If PREFETCH feature not enabled, remove
2095 * the NO FLUSH bit if present.
2097 if ((opcode & SCR_NO_FLUSH) &&
2098 !(np->features & FE_PFEN)) {
2099 opcode = (opcode & ~SCR_NO_FLUSH);
2104 * MOVE/CHMOV (absolute address)
2106 if (!(np->features & FE_WIDE))
2107 opcode = (opcode | OPC_MOVE);
2112 * MOVE/CHMOV (table indirect)
2114 if (!(np->features & FE_WIDE))
2115 opcode = (opcode | OPC_MOVE);
2121 * dont't relocate if relative :-)
2123 if (opcode & 0x00800000)
2125 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2142 * Scriptify:) the opcode.
2144 *cur++ = cpu_to_scr(opcode);
2147 * If no relocation, assume 1 argument
2148 * and just scriptize:) it.
2151 *cur = cpu_to_scr(*cur);
2157 * Otherwise performs all needed relocations.
2162 switch (old & RELOC_MASK) {
2163 case RELOC_REGISTER:
2164 new = (old & ~RELOC_MASK) + np->mmio_ba;
2167 new = (old & ~RELOC_MASK) + np->scripta_ba;
2170 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2173 new = (old & ~RELOC_MASK) + np->hcb_ba;
2177 * Don't relocate a 0 address.
2178 * They are mostly used for patched or
2179 * script self-modified areas.
2188 panic("sym_fw_bind_script: "
2189 "weird relocation %x\n", old);
2193 *cur++ = cpu_to_scr(new);
2198 /*---------------------------------------------------------------------------*/
2199 /*--------------------------- END OF FIRMWARES -----------------------------*/
2200 /*---------------------------------------------------------------------------*/
2203 * Function prototypes.
2205 static void sym_save_initial_setting (hcb_p np);
2206 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2207 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2208 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2209 static void sym_chip_reset (hcb_p np);
2210 static void sym_soft_reset (hcb_p np);
2211 static void sym_start_reset (hcb_p np);
2212 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2213 static int sym_wakeup_done (hcb_p np);
2214 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2215 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2216 static void sym_init (hcb_p np, int reason);
2217 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2219 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2220 u_char div, u_char fak);
2221 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2222 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2223 u_char per, u_char wide, u_char div, u_char fak);
2224 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2225 u_char per, u_char wide, u_char div, u_char fak);
2226 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2227 static void sym_intr (void *arg);
2228 static void sym_poll (struct cam_sim *sim);
2229 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2230 static void sym_int_sto (hcb_p np);
2231 static void sym_int_udc (hcb_p np);
2232 static void sym_int_sbmc (hcb_p np);
2233 static void sym_int_par (hcb_p np, u_short sist);
2234 static void sym_int_ma (hcb_p np);
2235 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2237 static void sym_sir_bad_scsi_status (hcb_p np, ccb_p cp);
2238 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2239 static void sym_sir_task_recovery (hcb_p np, int num);
2240 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2241 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs);
2242 static int sym_compute_residual (hcb_p np, ccb_p cp);
2243 static int sym_show_msg (u_char * msg);
2244 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2245 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2246 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2247 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2248 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2249 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2250 static void sym_int_sir (hcb_p np);
2251 static void sym_free_ccb (hcb_p np, ccb_p cp);
2252 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2253 static ccb_p sym_alloc_ccb (hcb_p np);
2254 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2255 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2256 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2257 static int sym_snooptest (hcb_p np);
2258 static void sym_selectclock(hcb_p np, u_char scntl3);
2259 static void sym_getclock (hcb_p np, int mult);
2260 static int sym_getpciclock (hcb_p np);
2261 static void sym_complete_ok (hcb_p np, ccb_p cp);
2262 static void sym_complete_error (hcb_p np, ccb_p cp);
2263 static void sym_callout (void *arg);
2264 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2265 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2266 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2267 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2268 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2270 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2271 bus_dma_segment_t *psegs, int nsegs);
2272 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2273 bus_dma_segment_t *psegs, int nsegs);
2274 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2275 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
2276 struct ccb_trans_settings *cts);
2277 static void sym_update_dflags(hcb_p np, u_char *flags,
2278 struct ccb_trans_settings *cts);
2280 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2281 static int sym_pci_probe (device_t dev);
2282 static int sym_pci_attach (device_t dev);
2284 static void sym_pci_free (hcb_p np);
2285 static int sym_cam_attach (hcb_p np);
2286 static void sym_cam_free (hcb_p np);
2288 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2289 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2290 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2293 * Print something which allows to retrieve the controller type,
2294 * unit, target, lun concerned by a kernel message.
2296 static void PRINT_TARGET (hcb_p np, int target)
2298 printf ("%s:%d:", sym_name(np), target);
2301 static void PRINT_LUN(hcb_p np, int target, int lun)
2303 printf ("%s:%d:%d:", sym_name(np), target, lun);
2306 static void PRINT_ADDR (ccb_p cp)
2308 if (cp && cp->cam_ccb)
2309 xpt_print_path(cp->cam_ccb->ccb_h.path);
2313 * Take into account this ccb in the freeze count.
2315 static void sym_freeze_cam_ccb(union ccb *ccb)
2317 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2318 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2319 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2320 xpt_freeze_devq(ccb->ccb_h.path, 1);
2326 * Set the status field of a CAM CCB.
2328 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2330 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2331 ccb->ccb_h.status |= status;
2335 * Get the status field of a CAM CCB.
2337 static __inline int sym_get_cam_status(union ccb *ccb)
2339 return ccb->ccb_h.status & CAM_STATUS_MASK;
2343 * Enqueue a CAM CCB.
2345 static void sym_enqueue_cam_ccb(ccb_p cp)
2351 np = (hcb_p) cp->arg;
2353 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2354 ccb->ccb_h.status = CAM_REQ_INPROG;
2356 callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
2358 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2359 ccb->ccb_h.sym_hcb_ptr = np;
2361 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2365 * Complete a pending CAM CCB.
2368 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2371 SYM_LOCK_ASSERT(MA_OWNED);
2373 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2374 callout_stop(&cp->ch);
2375 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2376 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2377 ccb->ccb_h.sym_hcb_ptr = NULL;
2382 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2385 SYM_LOCK_ASSERT(MA_OWNED);
2387 sym_set_cam_status(ccb, cam_status);
2392 * SYMBIOS chip clock divisor table.
2394 * Divisors are multiplied by 10,000,000 in order to make
2395 * calculations more simple.
2398 static const u32 div_10M[] =
2399 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2402 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2403 * 128 transfers. All chips support at least 16 transfers
2404 * bursts. The 825A, 875 and 895 chips support bursts of up
2405 * to 128 transfers and the 895A and 896 support bursts of up
2406 * to 64 transfers. All other chips support up to 16
2409 * For PCI 32 bit data transfers each transfer is a DWORD.
2410 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2412 * We use log base 2 (burst length) as internal code, with
2413 * value 0 meaning "burst disabled".
2417 * Burst length from burst code.
2419 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2422 * Burst code from io register bits.
2424 #define burst_code(dmode, ctest4, ctest5) \
2425 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2428 * Set initial io register bits from burst code.
2430 static __inline void sym_init_burst(hcb_p np, u_char bc)
2432 np->rv_ctest4 &= ~0x80;
2433 np->rv_dmode &= ~(0x3 << 6);
2434 np->rv_ctest5 &= ~0x4;
2437 np->rv_ctest4 |= 0x80;
2441 np->rv_dmode |= ((bc & 0x3) << 6);
2442 np->rv_ctest5 |= (bc & 0x4);
2447 * Print out the list of targets that have some flag disabled by user.
2449 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2454 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2455 if (i == np->myaddr)
2457 if (np->target[i].usrflags & mask) {
2459 printf("%s: %s disabled for targets",
2469 * Save initial settings of some IO registers.
2470 * Assumed to have been set by BIOS.
2471 * We cannot reset the chip prior to reading the
2472 * IO registers, since informations will be lost.
2473 * Since the SCRIPTS processor may be running, this
2474 * is not safe on paper, but it seems to work quite
2477 static void sym_save_initial_setting (hcb_p np)
2479 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2480 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2481 np->sv_dmode = INB(nc_dmode) & 0xce;
2482 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2483 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2484 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2485 np->sv_gpcntl = INB(nc_gpcntl);
2486 np->sv_stest1 = INB(nc_stest1);
2487 np->sv_stest2 = INB(nc_stest2) & 0x20;
2488 np->sv_stest4 = INB(nc_stest4);
2489 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2490 np->sv_scntl4 = INB(nc_scntl4);
2491 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2494 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2498 * Prepare io register values used by sym_init() according
2499 * to selected and supported features.
2501 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2510 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2513 * Get the frequency of the chip's clock.
2515 if (np->features & FE_QUAD)
2517 else if (np->features & FE_DBLR)
2522 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2523 np->clock_khz *= np->multiplier;
2525 if (np->clock_khz != 40000)
2526 sym_getclock(np, np->multiplier);
2529 * Divisor to be used for async (timer pre-scaler).
2531 i = np->clock_divn - 1;
2533 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2538 np->rv_scntl3 = i+1;
2541 * The C1010 uses hardwired divisors for async.
2542 * So, we just throw away, the async. divisor.:-)
2544 if (np->features & FE_C10)
2548 * Minimum synchronous period factor supported by the chip.
2549 * Btw, 'period' is in tenths of nanoseconds.
2551 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2552 if (period <= 250) np->minsync = 10;
2553 else if (period <= 303) np->minsync = 11;
2554 else if (period <= 500) np->minsync = 12;
2555 else np->minsync = (period + 40 - 1) / 40;
2558 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2560 if (np->minsync < 25 &&
2561 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2563 else if (np->minsync < 12 &&
2564 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2568 * Maximum synchronous period factor supported by the chip.
2570 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2571 np->maxsync = period > 2540 ? 254 : period / 10;
2574 * If chip is a C1010, guess the sync limits in DT mode.
2576 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2577 if (np->clock_khz == 160000) {
2579 np->maxsync_dt = 50;
2580 np->maxoffs_dt = 62;
2585 * 64 bit addressing (895A/896/1010) ?
2587 if (np->features & FE_DAC)
2589 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2591 np->rv_ccntl1 |= (DDAC);
2595 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2597 if (np->features & FE_NOPM)
2598 np->rv_ccntl0 |= (ENPMJ);
2602 * In dual channel mode, contention occurs if internal cycles
2603 * are used. Disable internal cycles.
2605 if (np->device_id == PCI_ID_LSI53C1010 &&
2606 np->revision_id < 0x2)
2607 np->rv_ccntl0 |= DILS;
2610 * Select burst length (dwords)
2612 burst_max = SYM_SETUP_BURST_ORDER;
2613 if (burst_max == 255)
2614 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2618 if (burst_max > np->maxburst)
2619 burst_max = np->maxburst;
2622 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2623 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2624 * based transactions on LOAD/STORE instructions. So we have
2625 * to prevent these chips from using such PCI transactions in
2626 * this driver. The generic ncr driver that does not use
2627 * LOAD/STORE instructions does not need this work-around.
2629 if ((np->device_id == PCI_ID_SYM53C810 &&
2630 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2631 (np->device_id == PCI_ID_SYM53C860 &&
2632 np->revision_id <= 0x1))
2633 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2636 * Select all supported special features.
2637 * If we are using on-board RAM for scripts, prefetch (PFEN)
2638 * does not help, but burst op fetch (BOF) does.
2639 * Disabling PFEN makes sure BOF will be used.
2641 if (np->features & FE_ERL)
2642 np->rv_dmode |= ERL; /* Enable Read Line */
2643 if (np->features & FE_BOF)
2644 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2645 if (np->features & FE_ERMP)
2646 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2648 if ((np->features & FE_PFEN) && !np->ram_ba)
2650 if (np->features & FE_PFEN)
2652 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2653 if (np->features & FE_CLSE)
2654 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2655 if (np->features & FE_WRIE)
2656 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2657 if (np->features & FE_DFS)
2658 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2663 if (SYM_SETUP_PCI_PARITY)
2664 np->rv_ctest4 |= MPEE; /* Master parity checking */
2665 if (SYM_SETUP_SCSI_PARITY)
2666 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2669 * Get parity checking, host ID and verbose mode from NVRAM
2672 sym_nvram_setup_host (np, nvram);
2674 np->myaddr = OF_getscsinitid(np->device);
2678 * Get SCSI addr of host adapter (set by bios?).
2680 if (np->myaddr == 255) {
2681 np->myaddr = INB(nc_scid) & 0x07;
2683 np->myaddr = SYM_SETUP_HOST_ID;
2687 * Prepare initial io register bits for burst length
2689 sym_init_burst(np, burst_max);
2692 * Set SCSI BUS mode.
2693 * - LVD capable chips (895/895A/896/1010) report the
2694 * current BUS mode through the STEST4 IO register.
2695 * - For previous generation chips (825/825A/875),
2696 * user has to tell us how to check against HVD,
2697 * since a 100% safe algorithm is not possible.
2699 np->scsi_mode = SMODE_SE;
2700 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2701 np->scsi_mode = (np->sv_stest4 & SMODE);
2702 else if (np->features & FE_DIFF) {
2703 if (SYM_SETUP_SCSI_DIFF == 1) {
2704 if (np->sv_scntl3) {
2705 if (np->sv_stest2 & 0x20)
2706 np->scsi_mode = SMODE_HVD;
2708 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2709 if (!(INB(nc_gpreg) & 0x08))
2710 np->scsi_mode = SMODE_HVD;
2713 else if (SYM_SETUP_SCSI_DIFF == 2)
2714 np->scsi_mode = SMODE_HVD;
2716 if (np->scsi_mode == SMODE_HVD)
2717 np->rv_stest2 |= 0x20;
2720 * Set LED support from SCRIPTS.
2721 * Ignore this feature for boards known to use a
2722 * specific GPIO wiring and for the 895A, 896
2723 * and 1010 that drive the LED directly.
2725 if ((SYM_SETUP_SCSI_LED ||
2726 (nvram->type == SYM_SYMBIOS_NVRAM ||
2727 (nvram->type == SYM_TEKRAM_NVRAM &&
2728 np->device_id == PCI_ID_SYM53C895))) &&
2729 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2730 np->features |= FE_LED0;
2735 switch(SYM_SETUP_IRQ_MODE & 3) {
2737 np->rv_dcntl |= IRQM;
2740 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2747 * Configure targets according to driver setup.
2748 * If NVRAM present get targets setup from NVRAM.
2750 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2751 tcb_p tp = &np->target[i];
2753 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2754 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2755 tp->tinfo.user.period = np->minsync;
2756 if (np->features & FE_ULTRA3)
2757 tp->tinfo.user.period = np->minsync_dt;
2758 tp->tinfo.user.offset = np->maxoffs;
2759 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2760 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2761 tp->usrtags = SYM_SETUP_MAX_TAG;
2763 sym_nvram_setup_target (np, i, nvram);
2766 * For now, guess PPR/DT support from the period
2769 if (np->features & FE_ULTRA3) {
2770 if (tp->tinfo.user.period <= 9 &&
2771 tp->tinfo.user.width == BUS_16_BIT) {
2772 tp->tinfo.user.options |= PPR_OPT_DT;
2773 tp->tinfo.user.offset = np->maxoffs_dt;
2774 tp->tinfo.user.spi_version = 3;
2779 tp->usrflags &= ~SYM_TAGS_ENABLED;
2783 * Let user know about the settings.
2786 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2787 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2788 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2790 (np->features & FE_ULTRA3) ? 80 :
2791 (np->features & FE_ULTRA2) ? 40 :
2792 (np->features & FE_ULTRA) ? 20 : 10,
2793 sym_scsi_bus_mode(np->scsi_mode),
2794 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2796 * Tell him more on demand.
2799 printf("%s: %s IRQ line driver%s\n",
2801 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2802 np->ram_ba ? ", using on-chip SRAM" : "");
2803 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2804 if (np->features & FE_NOPM)
2805 printf("%s: handling phase mismatch from SCRIPTS.\n",
2811 if (sym_verbose > 1) {
2812 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2813 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2814 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2815 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2817 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2818 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2819 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2820 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2823 * Let user be aware of targets that have some disable flags set.
2825 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2827 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2834 * Prepare the next negotiation message if needed.
2836 * Fill in the part of message buffer that contains the
2837 * negotiation and the nego_status field of the CCB.
2838 * Returns the size of the message in bytes.
2840 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2842 tcb_p tp = &np->target[cp->target];
2846 * Early C1010 chips need a work-around for DT
2847 * data transfer to work.
2849 if (!(np->features & FE_U3EN))
2850 tp->tinfo.goal.options = 0;
2852 * negotiate using PPR ?
2854 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2857 * negotiate wide transfers ?
2859 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2862 * negotiate synchronous transfers?
2864 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2865 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2870 msgptr[msglen++] = M_EXTENDED;
2871 msgptr[msglen++] = 3;
2872 msgptr[msglen++] = M_X_SYNC_REQ;
2873 msgptr[msglen++] = tp->tinfo.goal.period;
2874 msgptr[msglen++] = tp->tinfo.goal.offset;
2877 msgptr[msglen++] = M_EXTENDED;
2878 msgptr[msglen++] = 2;
2879 msgptr[msglen++] = M_X_WIDE_REQ;
2880 msgptr[msglen++] = tp->tinfo.goal.width;
2883 msgptr[msglen++] = M_EXTENDED;
2884 msgptr[msglen++] = 6;
2885 msgptr[msglen++] = M_X_PPR_REQ;
2886 msgptr[msglen++] = tp->tinfo.goal.period;
2887 msgptr[msglen++] = 0;
2888 msgptr[msglen++] = tp->tinfo.goal.offset;
2889 msgptr[msglen++] = tp->tinfo.goal.width;
2890 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2894 cp->nego_status = nego;
2897 tp->nego_cp = cp; /* Keep track a nego will be performed */
2898 if (DEBUG_FLAGS & DEBUG_NEGO) {
2899 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2900 nego == NS_WIDE ? "wide msgout" :
2901 "ppr msgout", msgptr);
2909 * Insert a job into the start queue.
2911 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2915 #ifdef SYM_CONF_IARB_SUPPORT
2917 * If the previously queued CCB is not yet done,
2918 * set the IARB hint. The SCRIPTS will go with IARB
2919 * for this job when starting the previous one.
2920 * We leave devices a chance to win arbitration by
2921 * not using more than 'iarb_max' consecutive
2922 * immediate arbitrations.
2924 if (np->last_cp && np->iarb_count < np->iarb_max) {
2925 np->last_cp->host_flags |= HF_HINT_IARB;
2934 * Insert first the idle task and then our job.
2935 * The MB should ensure proper ordering.
2937 qidx = np->squeueput + 2;
2938 if (qidx >= MAX_QUEUE*2) qidx = 0;
2940 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2942 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2944 np->squeueput = qidx;
2946 if (DEBUG_FLAGS & DEBUG_QUEUE)
2947 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2950 * Script processor may be waiting for reselect.
2954 OUTB (nc_istat, SIGP|np->istat_sem);
2958 * Soft reset the chip.
2960 * Raising SRST when the chip is running may cause
2961 * problems on dual function chips (see below).
2962 * On the other hand, LVD devices need some delay
2963 * to settle and report actual BUS mode in STEST4.
2965 static void sym_chip_reset (hcb_p np)
2967 OUTB (nc_istat, SRST);
2970 UDELAY(2000); /* For BUS MODE to settle */
2974 * Soft reset the chip.
2976 * Some 896 and 876 chip revisions may hang-up if we set
2977 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2979 * So, we need to abort the current operation prior to
2980 * soft resetting the chip.
2982 static void sym_soft_reset (hcb_p np)
2987 OUTB (nc_istat, CABRT);
2988 for (i = 1000000 ; i ; --i) {
2989 istat = INB (nc_istat);
3001 printf("%s: unable to abort current chip operation.\n",
3003 sym_chip_reset (np);
3007 * Start reset process.
3009 * The interrupt handler will reinitialize the chip.
3011 static void sym_start_reset(hcb_p np)
3013 (void) sym_reset_scsi_bus(np, 1);
3016 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3021 sym_soft_reset(np); /* Soft reset the chip */
3023 OUTW (nc_sien, RST);
3025 * Enable Tolerant, reset IRQD if present and
3026 * properly set IRQ mode, prior to resetting the bus.
3028 OUTB (nc_stest3, TE);
3029 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3030 OUTB (nc_scntl1, CRST);
3033 if (!SYM_SETUP_SCSI_BUS_CHECK)
3036 * Check for no terminators or SCSI bus shorts to ground.
3037 * Read SCSI data bus, data parity bits and control signals.
3038 * We are expecting RESET to be TRUE and other signals to be
3041 term = INB(nc_sstat0);
3042 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3043 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3044 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3045 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3046 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3048 if (!(np->features & FE_WIDE))
3051 if (term != (2<<7)) {
3052 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3054 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3055 "0x%lx, expecting 0x%lx\n",
3057 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3058 (u_long)term, (u_long)(2<<7));
3059 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3063 OUTB (nc_scntl1, 0);
3069 * The chip may have completed jobs. Look at the DONE QUEUE.
3071 * On architectures that may reorder LOAD/STORE operations,
3072 * a memory barrier may be needed after the reading of the
3073 * so-called `flag' and prior to dealing with the data.
3075 static int sym_wakeup_done (hcb_p np)
3081 SYM_LOCK_ASSERT(MA_OWNED);
3086 dsa = scr_to_cpu(np->dqueue[i]);
3090 if ((i = i+2) >= MAX_QUEUE*2)
3093 cp = sym_ccb_from_dsa(np, dsa);
3096 sym_complete_ok (np, cp);
3100 printf ("%s: bad DSA (%x) in done queue.\n",
3101 sym_name(np), (u_int) dsa);
3109 * Complete all active CCBs with error.
3110 * Used on CHIP/SCSI RESET.
3112 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3115 * Move all active CCBs to the COMP queue
3116 * and flush this queue.
3118 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3119 sym_que_init(&np->busy_ccbq);
3120 sym_flush_comp_queue(np, cam_status);
3127 * 0: initialisation.
3128 * 1: SCSI BUS RESET delivered or received.
3129 * 2: SCSI BUS MODE changed.
3131 static void sym_init (hcb_p np, int reason)
3136 SYM_LOCK_ASSERT(MA_OWNED);
3139 * Reset chip if asked, otherwise just clear fifos.
3144 OUTB (nc_stest3, TE|CSF);
3145 OUTONB (nc_ctest3, CLF);
3151 phys = np->squeue_ba;
3152 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3153 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3154 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3156 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3159 * Start at first entry.
3166 phys = np->dqueue_ba;
3167 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3169 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3171 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3174 * Start at first entry.
3179 * Install patches in scripts.
3180 * This also let point to first position the start
3181 * and done queue pointers used from SCRIPTS.
3186 * Wakeup all pending jobs.
3188 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3193 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3194 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3196 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3197 /* full arb., ena parity, par->ATN */
3198 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3200 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3202 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3203 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3204 OUTB (nc_istat , SIGP ); /* Signal Process */
3205 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3206 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3208 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3209 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3210 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3212 /* Extended Sreq/Sack filtering not supported on the C10 */
3213 if (np->features & FE_C10)
3214 OUTB (nc_stest2, np->rv_stest2);
3216 OUTB (nc_stest2, EXT|np->rv_stest2);
3218 OUTB (nc_stest3, TE); /* TolerANT enable */
3219 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3222 * For now, disable AIP generation on C1010-66.
3224 if (np->device_id == PCI_ID_LSI53C1010_2)
3225 OUTB (nc_aipcntl1, DISAIP);
3229 * Errant SGE's when in narrow. Write bits 4 & 5 of
3230 * STEST1 register to disable SGE. We probably should do
3231 * that from SCRIPTS for each selection/reselection, but
3232 * I just don't want. :)
3234 if (np->device_id == PCI_ID_LSI53C1010 &&
3235 /* np->revision_id < 0xff */ 1)
3236 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3239 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3240 * Disable overlapped arbitration for some dual function devices,
3241 * regardless revision id (kind of post-chip-design feature. ;-))
3243 if (np->device_id == PCI_ID_SYM53C875)
3244 OUTB (nc_ctest0, (1<<5));
3245 else if (np->device_id == PCI_ID_SYM53C896)
3246 np->rv_ccntl0 |= DPR;
3249 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3250 * and/or hardware phase mismatch, since only such chips
3251 * seem to support those IO registers.
3253 if (np->features & (FE_DAC|FE_NOPM)) {
3254 OUTB (nc_ccntl0, np->rv_ccntl0);
3255 OUTB (nc_ccntl1, np->rv_ccntl1);
3259 * If phase mismatch handled by scripts (895A/896/1010),
3260 * set PM jump addresses.
3262 if (np->features & FE_NOPM) {
3263 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3264 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3268 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3269 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3271 if (np->features & FE_LED0)
3272 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3273 else if (np->features & FE_LEDC)
3274 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3279 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3280 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3283 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3284 * Try to eat the spurious SBMC interrupt that may occur when
3285 * we reset the chip but not the SCSI BUS (at initialization).
3287 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3288 OUTONW (nc_sien, SBMC);
3293 np->scsi_mode = INB (nc_stest4) & SMODE;
3297 * Fill in target structure.
3298 * Reinitialize usrsync.
3299 * Reinitialize usrwide.
3300 * Prepare sync negotiation according to actual SCSI bus mode.
3302 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3303 tcb_p tp = &np->target[i];
3307 tp->head.wval = np->rv_scntl3;
3310 tp->tinfo.current.period = 0;
3311 tp->tinfo.current.offset = 0;
3312 tp->tinfo.current.width = BUS_8_BIT;
3313 tp->tinfo.current.options = 0;
3317 * Download SCSI SCRIPTS to on-chip RAM if present,
3318 * and start script processor.
3321 if (sym_verbose > 1)
3322 printf ("%s: Downloading SCSI SCRIPTS.\n",
3324 if (np->ram_ws == 8192) {
3325 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3326 OUTL (nc_mmws, np->scr_ram_seg);
3327 OUTL (nc_mmrs, np->scr_ram_seg);
3328 OUTL (nc_sfs, np->scr_ram_seg);
3329 phys = SCRIPTB_BA (np, start64);
3332 phys = SCRIPTA_BA (np, init);
3333 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3336 phys = SCRIPTA_BA (np, init);
3340 OUTL (nc_dsa, np->hcb_ba);
3344 * Notify the XPT about the RESET condition.
3347 xpt_async(AC_BUS_RESET, np->path, NULL);
3351 * Get clock factor and sync divisor for a given
3352 * synchronous factor period.
3355 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3357 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3358 int div = np->clock_divn; /* Number of divisors supported */
3359 u32 fak; /* Sync factor in sxfer */
3360 u32 per; /* Period in tenths of ns */
3361 u32 kpc; /* (per * clk) */
3365 * Compute the synchronous period in tenths of nano-seconds
3367 if (dt && sfac <= 9) per = 125;
3368 else if (sfac <= 10) per = 250;
3369 else if (sfac == 11) per = 303;
3370 else if (sfac == 12) per = 500;
3371 else per = 40 * sfac;
3379 * For earliest C10 revision 0, we cannot use extra
3380 * clocks for the setting of the SCSI clocking.
3381 * Note that this limits the lowest sync data transfer
3382 * to 5 Mega-transfers per second and may result in
3383 * using higher clock divisors.
3386 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3388 * Look for the lowest clock divisor that allows an
3389 * output speed not faster than the period.
3393 if (kpc > (div_10M[div] << 2)) {
3398 fak = 0; /* No extra clocks */
3399 if (div == np->clock_divn) { /* Are we too fast ? */
3409 * Look for the greatest clock divisor that allows an
3410 * input speed faster than the period.
3413 if (kpc >= (div_10M[div] << 2)) break;
3416 * Calculate the lowest clock factor that allows an output
3417 * speed not faster than the period, and the max output speed.
3418 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3419 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3422 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3423 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3426 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3427 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3431 * Check against our hardware limits, or bugs :).
3433 if (fak > 2) {fak = 2; ret = -1;}
3436 * Compute and return sync parameters.
3445 * Tell the SCSI layer about the new transfer parameters.
3448 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3450 struct ccb_trans_settings cts;
3451 struct cam_path *path;
3453 tcb_p tp = &np->target[target];
3455 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3457 if (sts != CAM_REQ_CMP)
3460 bzero(&cts, sizeof(cts));
3462 #define cts__scsi (cts.proto_specific.scsi)
3463 #define cts__spi (cts.xport_specific.spi)
3465 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3466 cts.protocol = PROTO_SCSI;
3467 cts.transport = XPORT_SPI;
3468 cts.protocol_version = tp->tinfo.current.scsi_version;
3469 cts.transport_version = tp->tinfo.current.spi_version;
3471 cts__spi.valid = spi_valid;
3472 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3473 cts__spi.sync_period = tp->tinfo.current.period;
3474 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3475 cts__spi.sync_offset = tp->tinfo.current.offset;
3476 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3477 cts__spi.bus_width = tp->tinfo.current.width;
3478 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3479 cts__spi.ppr_options = tp->tinfo.current.options;
3482 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3483 xpt_async(AC_TRANSFER_NEG, path, &cts);
3484 xpt_free_path(path);
3487 #define SYM_SPI_VALID_WDTR \
3488 CTS_SPI_VALID_BUS_WIDTH | \
3489 CTS_SPI_VALID_SYNC_RATE | \
3490 CTS_SPI_VALID_SYNC_OFFSET
3491 #define SYM_SPI_VALID_SDTR \
3492 CTS_SPI_VALID_SYNC_RATE | \
3493 CTS_SPI_VALID_SYNC_OFFSET
3494 #define SYM_SPI_VALID_PPR \
3495 CTS_SPI_VALID_PPR_OPTIONS | \
3496 CTS_SPI_VALID_BUS_WIDTH | \
3497 CTS_SPI_VALID_SYNC_RATE | \
3498 CTS_SPI_VALID_SYNC_OFFSET
3501 * We received a WDTR.
3502 * Let everything be aware of the changes.
3504 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3506 tcb_p tp = &np->target[cp->target];
3508 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3511 * Tell the SCSI layer about the new transfer parameters.
3513 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3514 tp->tinfo.current.offset = 0;
3515 tp->tinfo.current.period = 0;
3516 tp->tinfo.current.options = 0;
3518 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3522 * We received a SDTR.
3523 * Let everything be aware of the changes.
3526 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3528 tcb_p tp = &np->target[cp->target];
3529 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3531 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3534 * Tell the SCSI layer about the new transfer parameters.
3536 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3537 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3538 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3540 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3544 * We received a PPR.
3545 * Let everything be aware of the changes.
3547 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3548 u_char per, u_char wide, u_char div, u_char fak)
3550 tcb_p tp = &np->target[cp->target];
3552 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3555 * Tell the SCSI layer about the new transfer parameters.
3557 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3558 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3559 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3560 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3562 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3566 * Switch trans mode for current job and it's target.
3568 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3569 u_char per, u_char wide, u_char div, u_char fak)
3574 u_char target = INB (nc_sdid) & 0x0f;
3575 u_char sval, wval, uval;
3582 assert (target == (cp->target & 0xf));
3583 tp = &np->target[target];
3585 sval = tp->head.sval;
3586 wval = tp->head.wval;
3587 uval = tp->head.uval;
3590 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3591 sval, wval, uval, np->rv_scntl3);
3596 if (!(np->features & FE_C10))
3597 sval = (sval & ~0x1f) | ofs;
3599 sval = (sval & ~0x3f) | ofs;
3602 * Set the sync divisor and extra clock factor.
3605 wval = (wval & ~0x70) | ((div+1) << 4);
3606 if (!(np->features & FE_C10))
3607 sval = (sval & ~0xe0) | (fak << 5);
3609 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3610 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3611 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3616 * Set the bus width.
3623 * Set misc. ultra enable bits.
3625 if (np->features & FE_C10) {
3626 uval = uval & ~(U3EN|AIPCKEN);
3628 assert(np->features & FE_U3EN);
3633 wval = wval & ~ULTRA;
3634 if (per <= 12) wval |= ULTRA;
3638 * Stop there if sync parameters are unchanged.
3640 if (tp->head.sval == sval &&
3641 tp->head.wval == wval &&
3642 tp->head.uval == uval)
3644 tp->head.sval = sval;
3645 tp->head.wval = wval;
3646 tp->head.uval = uval;
3649 * Disable extended Sreq/Sack filtering if per < 50.
3650 * Not supported on the C1010.
3652 if (per < 50 && !(np->features & FE_C10))
3653 OUTOFFB (nc_stest2, EXT);
3656 * set actual value and sync_status
3658 OUTB (nc_sxfer, tp->head.sval);
3659 OUTB (nc_scntl3, tp->head.wval);
3661 if (np->features & FE_C10) {
3662 OUTB (nc_scntl4, tp->head.uval);
3666 * patch ALL busy ccbs of this target.
3668 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3669 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3670 if (cp->target != target)
3672 cp->phys.select.sel_scntl3 = tp->head.wval;
3673 cp->phys.select.sel_sxfer = tp->head.sval;
3674 if (np->features & FE_C10) {
3675 cp->phys.select.sel_scntl4 = tp->head.uval;
3681 * log message for real hard errors
3683 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3684 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3686 * exception register:
3691 * so: control lines as driven by chip.
3692 * si: control lines as seen by chip.
3693 * sd: scsi data lines as seen by chip.
3696 * sxfer: (see the manual)
3697 * scntl3: (see the manual)
3699 * current script command:
3700 * dsp: script address (relative to start of script).
3701 * dbc: first word of script command.
3703 * First 24 register of the chip:
3706 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3712 u_char *script_base;
3717 if (dsp > np->scripta_ba &&
3718 dsp <= np->scripta_ba + np->scripta_sz) {
3719 script_ofs = dsp - np->scripta_ba;
3720 script_size = np->scripta_sz;
3721 script_base = (u_char *) np->scripta0;
3722 script_name = "scripta";
3724 else if (np->scriptb_ba < dsp &&
3725 dsp <= np->scriptb_ba + np->scriptb_sz) {
3726 script_ofs = dsp - np->scriptb_ba;
3727 script_size = np->scriptb_sz;
3728 script_base = (u_char *) np->scriptb0;
3729 script_name = "scriptb";
3734 script_name = "mem";
3737 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3738 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3739 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3740 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3741 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3742 (unsigned)INL (nc_dbc));
3744 if (((script_ofs & 3) == 0) &&
3745 (unsigned)script_ofs < script_size) {
3746 printf ("%s: script cmd = %08x\n", sym_name(np),
3747 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3750 printf ("%s: regdump:", sym_name(np));
3752 printf (" %02x", (unsigned)INB_OFF(i));
3756 * PCI BUS error, read the PCI ststus register.
3758 if (dstat & (MDPE|BF)) {
3760 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3761 if (pci_sts & 0xf900) {
3762 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3763 printf("%s: PCI STATUS = 0x%04x\n",
3764 sym_name(np), pci_sts & 0xf900);
3770 * chip interrupt handler
3772 * In normal situations, interrupt conditions occur one at
3773 * a time. But when something bad happens on the SCSI BUS,
3774 * the chip may raise several interrupt flags before
3775 * stopping and interrupting the CPU. The additionnal
3776 * interrupt flags are stacked in some extra registers
3777 * after the SIP and/or DIP flag has been raised in the
3778 * ISTAT. After the CPU has read the interrupt condition
3779 * flag from SIST or DSTAT, the chip unstacks the other
3780 * interrupt flags and sets the corresponding bits in
3781 * SIST or DSTAT. Since the chip starts stacking once the
3782 * SIP or DIP flag is set, there is a small window of time
3783 * where the stacking does not occur.
3785 * Typically, multiple interrupt conditions may happen in
3786 * the following situations:
3788 * - SCSI parity error + Phase mismatch (PAR|MA)
3789 * When a parity error is detected in input phase
3790 * and the device switches to msg-in phase inside a
3792 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3793 * When a stupid device does not want to handle the
3794 * recovery of an SCSI parity error.
3795 * - Some combinations of STO, PAR, UDC, ...
3796 * When using non compliant SCSI stuff, when user is
3797 * doing non compliant hot tampering on the BUS, when
3798 * something really bad happens to a device, etc ...
3800 * The heuristic suggested by SYMBIOS to handle
3801 * multiple interrupts is to try unstacking all
3802 * interrupts conditions and to handle them on some
3803 * priority based on error severity.
3804 * This will work when the unstacking has been
3805 * successful, but we cannot be 100 % sure of that,
3806 * since the CPU may have been faster to unstack than
3807 * the chip is able to stack. Hmmm ... But it seems that
3808 * such a situation is very unlikely to happen.
3810 * If this happen, for example STO caught by the CPU
3811 * then UDC happenning before the CPU have restarted
3812 * the SCRIPTS, the driver may wrongly complete the
3813 * same command on UDC, since the SCRIPTS didn't restart
3814 * and the DSA still points to the same command.
3815 * We avoid this situation by setting the DSA to an
3816 * invalid value when the CCB is completed and before
3817 * restarting the SCRIPTS.
3819 * Another issue is that we need some section of our
3820 * recovery procedures to be somehow uninterruptible but
3821 * the SCRIPTS processor does not provides such a
3822 * feature. For this reason, we handle recovery preferently
3823 * from the C code and check against some SCRIPTS critical
3824 * sections from the C code.
3826 * Hopefully, the interrupt handling of the driver is now
3827 * able to resist to weird BUS error conditions, but donnot
3828 * ask me for any guarantee that it will never fail. :-)
3829 * Use at your own decision and risk.
3831 static void sym_intr1 (hcb_p np)
3833 u_char istat, istatc;
3837 SYM_LOCK_ASSERT(MA_OWNED);
3840 * interrupt on the fly ?
3842 * A `dummy read' is needed to ensure that the
3843 * clear of the INTF flag reaches the device
3844 * before the scanning of the DONE queue.
3846 istat = INB (nc_istat);
3848 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3849 istat = INB (nc_istat); /* DUMMY READ */
3850 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3851 (void)sym_wakeup_done (np);
3854 if (!(istat & (SIP|DIP)))
3857 #if 0 /* We should never get this one */
3859 OUTB (nc_istat, CABRT);
3863 * PAR and MA interrupts may occur at the same time,
3864 * and we need to know of both in order to handle
3865 * this situation properly. We try to unstack SCSI
3866 * interrupts for that reason. BTW, I dislike a LOT
3867 * such a loop inside the interrupt routine.
3868 * Even if DMA interrupt stacking is very unlikely to
3869 * happen, we also try unstacking these ones, since
3870 * this has no performance impact.
3877 sist |= INW (nc_sist);
3879 dstat |= INB (nc_dstat);
3880 istatc = INB (nc_istat);
3882 } while (istatc & (SIP|DIP));
3884 if (DEBUG_FLAGS & DEBUG_TINY)
3885 printf ("<%d|%x:%x|%x:%x>",
3888 (unsigned)INL(nc_dsp),
3889 (unsigned)INL(nc_dbc));
3891 * On paper, a memory barrier may be needed here.
3892 * And since we are paranoid ... :)
3897 * First, interrupts we want to service cleanly.
3899 * Phase mismatch (MA) is the most frequent interrupt
3900 * for chip earlier than the 896 and so we have to service
3901 * it as quickly as possible.
3902 * A SCSI parity error (PAR) may be combined with a phase
3903 * mismatch condition (MA).
3904 * Programmed interrupts (SIR) are used to call the C code
3906 * The single step interrupt (SSI) is not used in this
3909 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3910 !(dstat & (MDPE|BF|ABRT|IID))) {
3911 if (sist & PAR) sym_int_par (np, sist);
3912 else if (sist & MA) sym_int_ma (np);
3913 else if (dstat & SIR) sym_int_sir (np);
3914 else if (dstat & SSI) OUTONB_STD ();
3915 else goto unknown_int;
3920 * Now, interrupts that donnot happen in normal
3921 * situations and that we may need to recover from.
3923 * On SCSI RESET (RST), we reset everything.
3924 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3925 * active CCBs with RESET status, prepare all devices
3926 * for negotiating again and restart the SCRIPTS.
3927 * On STO and UDC, we complete the CCB with the corres-
3928 * ponding status and restart the SCRIPTS.
3931 xpt_print_path(np->path);
3932 printf("SCSI BUS reset detected.\n");
3937 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3938 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3940 if (!(sist & (GEN|HTH|SGE)) &&
3941 !(dstat & (MDPE|BF|ABRT|IID))) {
3942 if (sist & SBMC) sym_int_sbmc (np);
3943 else if (sist & STO) sym_int_sto (np);
3944 else if (sist & UDC) sym_int_udc (np);
3945 else goto unknown_int;
3950 * Now, interrupts we are not able to recover cleanly.
3952 * Log message for hard errors.
3956 sym_log_hard_error(np, sist, dstat);
3958 if ((sist & (GEN|HTH|SGE)) ||
3959 (dstat & (MDPE|BF|ABRT|IID))) {
3960 sym_start_reset(np);
3966 * We just miss the cause of the interrupt. :(
3967 * Print a message. The timeout will do the real work.
3969 printf( "%s: unknown interrupt(s) ignored, "
3970 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3971 sym_name(np), istat, dstat, sist);
3974 static void sym_intr(void *arg)
3980 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3981 sym_intr1((hcb_p) arg);
3982 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
3987 static void sym_poll(struct cam_sim *sim)
3989 sym_intr1(cam_sim_softc(sim));
3993 * generic recovery from scsi interrupt
3995 * The doc says that when the chip gets an SCSI interrupt,
3996 * it tries to stop in an orderly fashion, by completing
3997 * an instruction fetch that had started or by flushing
3998 * the DMA fifo for a write to memory that was executing.
3999 * Such a fashion is not enough to know if the instruction
4000 * that was just before the current DSP value has been
4003 * There are some small SCRIPTS sections that deal with
4004 * the start queue and the done queue that may break any
4005 * assomption from the C code if we are interrupted
4006 * inside, so we reset if this happens. Btw, since these
4007 * SCRIPTS sections are executed while the SCRIPTS hasn't
4008 * started SCSI operations, it is very unlikely to happen.
4010 * All the driver data structures are supposed to be
4011 * allocated from the same 4 GB memory window, so there
4012 * is a 1 to 1 relationship between DSA and driver data
4013 * structures. Since we are careful :) to invalidate the
4014 * DSA when we complete a command or when the SCRIPTS
4015 * pushes a DSA into a queue, we can trust it when it
4018 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4020 u32 dsp = INL (nc_dsp);
4021 u32 dsa = INL (nc_dsa);
4022 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4025 * If we haven't been interrupted inside the SCRIPTS
4026 * critical pathes, we can safely restart the SCRIPTS
4027 * and trust the DSA value if it matches a CCB.
4029 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4030 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4031 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4032 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4033 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4034 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4035 (!(dsp > SCRIPTA_BA (np, done) &&
4036 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4037 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4038 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4040 * If we have a CCB, let the SCRIPTS call us back for
4041 * the handling of the error with SCRATCHA filled with
4042 * STARTPOS. This way, we will be able to freeze the
4043 * device queue and requeue awaiting IOs.
4046 cp->host_status = hsts;
4047 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4050 * Otherwise just restart the SCRIPTS.
4053 OUTL (nc_dsa, 0xffffff);
4054 OUTL_DSP (SCRIPTA_BA (np, start));
4063 sym_start_reset(np);
4067 * chip exception handler for selection timeout
4069 static void sym_int_sto (hcb_p np)
4071 u32 dsp = INL (nc_dsp);
4073 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4075 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4076 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4078 sym_start_reset(np);
4082 * chip exception handler for unexpected disconnect
4084 static void sym_int_udc (hcb_p np)
4086 printf ("%s: unexpected disconnect\n", sym_name(np));
4087 sym_recover_scsi_int(np, HS_UNEXPECTED);
4091 * chip exception handler for SCSI bus mode change
4093 * spi2-r12 11.2.3 says a transceiver mode change must
4094 * generate a reset event and a device that detects a reset
4095 * event shall initiate a hard reset. It says also that a
4096 * device that detects a mode change shall set data transfer
4097 * mode to eight bit asynchronous, etc...
4098 * So, just reinitializing all except chip should be enough.
4100 static void sym_int_sbmc (hcb_p np)
4102 u_char scsi_mode = INB (nc_stest4) & SMODE;
4107 xpt_print_path(np->path);
4108 printf("SCSI BUS mode change from %s to %s.\n",
4109 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4112 * Should suspend command processing for a few seconds and
4113 * reinitialize all except the chip.
4119 * chip exception handler for SCSI parity error.
4121 * When the chip detects a SCSI parity error and is
4122 * currently executing a (CH)MOV instruction, it does
4123 * not interrupt immediately, but tries to finish the
4124 * transfer of the current scatter entry before
4125 * interrupting. The following situations may occur:
4127 * - The complete scatter entry has been transferred
4128 * without the device having changed phase.
4129 * The chip will then interrupt with the DSP pointing
4130 * to the instruction that follows the MOV.
4132 * - A phase mismatch occurs before the MOV finished
4133 * and phase errors are to be handled by the C code.
4134 * The chip will then interrupt with both PAR and MA
4137 * - A phase mismatch occurs before the MOV finished and
4138 * phase errors are to be handled by SCRIPTS.
4139 * The chip will load the DSP with the phase mismatch
4140 * JUMP address and interrupt the host processor.
4142 static void sym_int_par (hcb_p np, u_short sist)
4144 u_char hsts = INB (HS_PRT);
4145 u32 dsp = INL (nc_dsp);
4146 u32 dbc = INL (nc_dbc);
4147 u32 dsa = INL (nc_dsa);
4148 u_char sbcl = INB (nc_sbcl);
4149 u_char cmd = dbc >> 24;
4150 int phase = cmd & 7;
4151 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4153 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4154 sym_name(np), hsts, dbc, sbcl);
4157 * Check that the chip is connected to the SCSI BUS.
4159 if (!(INB (nc_scntl1) & ISCON)) {
4160 sym_recover_scsi_int(np, HS_UNEXPECTED);
4165 * If the nexus is not clearly identified, reset the bus.
4166 * We will try to do better later.
4172 * Check instruction was a MOV, direction was INPUT and
4175 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4179 * Keep track of the parity error.
4181 OUTONB (HF_PRT, HF_EXT_ERR);
4182 cp->xerr_status |= XE_PARITY_ERR;
4185 * Prepare the message to send to the device.
4187 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4190 * If the old phase was DATA IN phase, we have to deal with
4191 * the 3 situations described above.
4192 * For other input phases (MSG IN and STATUS), the device
4193 * must resend the whole thing that failed parity checking
4194 * or signal error. So, jumping to dispatcher should be OK.
4196 if (phase == 1 || phase == 5) {
4197 /* Phase mismatch handled by SCRIPTS */
4198 if (dsp == SCRIPTB_BA (np, pm_handle))
4200 /* Phase mismatch handled by the C code */
4203 /* No phase mismatch occurred */
4205 OUTL (nc_temp, dsp);
4206 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4210 OUTL_DSP (SCRIPTA_BA (np, clrack));
4214 sym_start_reset(np);
4218 * chip exception handler for phase errors.
4220 * We have to construct a new transfer descriptor,
4221 * to transfer the rest of the current block.
4223 static void sym_int_ma (hcb_p np)
4236 u_char hflags, hflags0;
4245 rest = dbc & 0xffffff;
4249 * locate matching cp if any.
4251 cp = sym_ccb_from_dsa(np, dsa);
4254 * Donnot take into account dma fifo and various buffers in
4255 * INPUT phase since the chip flushes everything before
4256 * raising the MA interrupt for interrupted INPUT phases.
4257 * For DATA IN phase, we will check for the SWIDE later.
4259 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4262 if (np->features & FE_DFBC)
4263 delta = INW (nc_dfbc);
4268 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4270 dfifo = INL(nc_dfifo);
4273 * Calculate remaining bytes in DMA fifo.
4274 * (CTEST5 = dfifo >> 16)
4276 if (dfifo & (DFS << 16))
4277 delta = ((((dfifo >> 8) & 0x300) |
4278 (dfifo & 0xff)) - rest) & 0x3ff;
4280 delta = ((dfifo & 0xff) - rest) & 0x7f;
4284 * The data in the dma fifo has not been transferred to
4285 * the target -> add the amount to the rest
4286 * and clear the data.
4287 * Check the sstat2 register in case of wide transfer.
4290 ss0 = INB (nc_sstat0);
4291 if (ss0 & OLF) rest++;
4292 if (!(np->features & FE_C10))
4293 if (ss0 & ORF) rest++;
4294 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4295 ss2 = INB (nc_sstat2);
4296 if (ss2 & OLF1) rest++;
4297 if (!(np->features & FE_C10))
4298 if (ss2 & ORF1) rest++;
4304 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4305 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4309 * log the information
4311 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4312 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4313 (unsigned) rest, (unsigned) delta);
4316 * try to find the interrupted script command,
4317 * and the address at which to continue.
4321 if (dsp > np->scripta_ba &&
4322 dsp <= np->scripta_ba + np->scripta_sz) {
4323 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4326 else if (dsp > np->scriptb_ba &&
4327 dsp <= np->scriptb_ba + np->scriptb_sz) {
4328 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4333 * log the information
4335 if (DEBUG_FLAGS & DEBUG_PHASE) {
4336 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4337 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4341 printf ("%s: interrupted SCRIPT address not found.\n",
4347 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4353 * get old startaddress and old length.
4355 oadr = scr_to_cpu(vdsp[1]);
4357 if (cmd & 0x10) { /* Table indirect */
4358 tblp = (u32 *) ((char*) &cp->phys + oadr);
4359 olen = scr_to_cpu(tblp[0]);
4360 oadr = scr_to_cpu(tblp[1]);
4363 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4366 if (DEBUG_FLAGS & DEBUG_PHASE) {
4367 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4368 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4375 * check cmd against assumed interrupted script command.
4376 * If dt data phase, the MOVE instruction hasn't bit 4 of
4379 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4381 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4382 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4388 * if old phase not dataphase, leave here.
4392 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4393 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4394 (unsigned)oadr, (unsigned)rest);
4395 goto unexpected_phase;
4399 * Choose the correct PM save area.
4401 * Look at the PM_SAVE SCRIPT if you want to understand
4402 * this stuff. The equivalent code is implemented in
4403 * SCRIPTS for the 895A, 896 and 1010 that are able to
4404 * handle PM from the SCRIPTS processor.
4406 hflags0 = INB (HF_PRT);
4409 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4410 if (hflags & HF_IN_PM0)
4411 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4412 else if (hflags & HF_IN_PM1)
4413 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4415 if (hflags & HF_DP_SAVED)
4416 hflags ^= HF_ACT_PM;
4419 if (!(hflags & HF_ACT_PM)) {
4421 newcmd = SCRIPTA_BA (np, pm0_data);
4425 newcmd = SCRIPTA_BA (np, pm1_data);
4428 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4429 if (hflags != hflags0)
4430 OUTB (HF_PRT, hflags);
4433 * fillin the phase mismatch context
4435 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4436 pm->sg.size = cpu_to_scr(rest);
4437 pm->ret = cpu_to_scr(nxtdsp);
4440 * If we have a SWIDE,
4441 * - prepare the address to write the SWIDE from SCRIPTS,
4442 * - compute the SCRIPTS address to restart from,
4443 * - move current data pointer context by one byte.
4445 nxtdsp = SCRIPTA_BA (np, dispatch);
4446 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4447 (INB (nc_scntl2) & WSR)) {
4451 * Set up the table indirect for the MOVE
4452 * of the residual byte and adjust the data
4455 tmp = scr_to_cpu(pm->sg.addr);
4456 cp->phys.wresid.addr = cpu_to_scr(tmp);
4457 pm->sg.addr = cpu_to_scr(tmp + 1);
4458 tmp = scr_to_cpu(pm->sg.size);
4459 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4460 pm->sg.size = cpu_to_scr(tmp - 1);
4463 * If only the residual byte is to be moved,
4464 * no PM context is needed.
4466 if ((tmp&0xffffff) == 1)
4470 * Prepare the address of SCRIPTS that will
4471 * move the residual byte to memory.
4473 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4476 if (DEBUG_FLAGS & DEBUG_PHASE) {
4478 printf ("PM %x %x %x / %x %x %x.\n",
4479 hflags0, hflags, newcmd,
4480 (unsigned)scr_to_cpu(pm->sg.addr),
4481 (unsigned)scr_to_cpu(pm->sg.size),
4482 (unsigned)scr_to_cpu(pm->ret));
4486 * Restart the SCRIPTS processor.
4488 OUTL (nc_temp, newcmd);
4493 * Unexpected phase changes that occurs when the current phase
4494 * is not a DATA IN or DATA OUT phase are due to error conditions.
4495 * Such event may only happen when the SCRIPTS is using a
4496 * multibyte SCSI MOVE.
4498 * Phase change Some possible cause
4500 * COMMAND --> MSG IN SCSI parity error detected by target.
4501 * COMMAND --> STATUS Bad command or refused by target.
4502 * MSG OUT --> MSG IN Message rejected by target.
4503 * MSG OUT --> COMMAND Bogus target that discards extended
4504 * negotiation messages.
4506 * The code below does not care of the new phase and so
4507 * trusts the target. Why to annoy it ?
4508 * If the interrupted phase is COMMAND phase, we restart at
4510 * If a target does not get all the messages after selection,
4511 * the code assumes blindly that the target discards extended
4512 * messages and clears the negotiation status.
4513 * If the target does not want all our response to negotiation,
4514 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4515 * bloat for such a should_not_happen situation).
4516 * In all other situation, we reset the BUS.
4517 * Are these assumptions reasonnable ? (Wait and see ...)
4524 case 2: /* COMMAND phase */
4525 nxtdsp = SCRIPTA_BA (np, dispatch);
4528 case 3: /* STATUS phase */
4529 nxtdsp = SCRIPTA_BA (np, dispatch);
4532 case 6: /* MSG OUT phase */
4534 * If the device may want to use untagged when we want
4535 * tagged, we prepare an IDENTIFY without disc. granted,
4536 * since we will not be able to handle reselect.
4537 * Otherwise, we just don't care.
4539 if (dsp == SCRIPTA_BA (np, send_ident)) {
4540 if (cp->tag != NO_TAG && olen - rest <= 3) {
4541 cp->host_status = HS_BUSY;
4542 np->msgout[0] = M_IDENTIFY | cp->lun;
4543 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4546 nxtdsp = SCRIPTB_BA (np, ident_break);
4548 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4549 dsp == SCRIPTB_BA (np, send_sdtr) ||
4550 dsp == SCRIPTB_BA (np, send_ppr)) {
4551 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4555 case 7: /* MSG IN phase */
4556 nxtdsp = SCRIPTA_BA (np, clrack);
4567 sym_start_reset(np);
4571 * Dequeue from the START queue all CCBs that match
4572 * a given target/lun/task condition (-1 means all),
4573 * and move them from the BUSY queue to the COMP queue
4574 * with CAM_REQUEUE_REQ status condition.
4575 * This function is used during error handling/recovery.
4576 * It is called with SCRIPTS not running.
4579 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4585 * Make sure the starting index is within range.
4587 assert((i >= 0) && (i < 2*MAX_QUEUE));
4590 * Walk until end of START queue and dequeue every job
4591 * that matches the target/lun/task condition.
4594 while (i != np->squeueput) {
4595 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4597 #ifdef SYM_CONF_IARB_SUPPORT
4598 /* Forget hints for IARB, they may be no longer relevant */
4599 cp->host_flags &= ~HF_HINT_IARB;
4601 if ((target == -1 || cp->target == target) &&
4602 (lun == -1 || cp->lun == lun) &&
4603 (task == -1 || cp->tag == task)) {
4604 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4605 sym_remque(&cp->link_ccbq);
4606 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4610 np->squeue[j] = np->squeue[i];
4611 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4613 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4615 if (i != j) /* Copy back the idle task if needed */
4616 np->squeue[j] = np->squeue[i];
4617 np->squeueput = j; /* Update our current start queue pointer */
4623 * Complete all CCBs queued to the COMP queue.
4625 * These CCBs are assumed:
4626 * - Not to be referenced either by devices or
4627 * SCRIPTS-related queues and datas.
4628 * - To have to be completed with an error condition
4631 * The device queue freeze count is incremented
4632 * for each CCB that does not prevent this.
4633 * This function is called when all CCBs involved
4634 * in error handling/recovery have been reaped.
4637 sym_flush_comp_queue(hcb_p np, int cam_status)
4642 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4644 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4645 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4646 /* Leave quiet CCBs waiting for resources */
4647 if (cp->host_status == HS_WAIT)
4651 sym_set_cam_status(ccb, cam_status);
4652 sym_freeze_cam_ccb(ccb);
4653 sym_xpt_done(np, ccb, cp);
4654 sym_free_ccb(np, cp);
4659 * chip handler for bad SCSI status condition
4661 * In case of bad SCSI status, we unqueue all the tasks
4662 * currently queued to the controller but not yet started
4663 * and then restart the SCRIPTS processor immediately.
4665 * QUEUE FULL and BUSY conditions are handled the same way.
4666 * Basically all the not yet started tasks are requeued in
4667 * device queue and the queue is frozen until a completion.
4669 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4670 * the CCB of the failed command to prepare a REQUEST SENSE
4671 * SCSI command and queue it to the controller queue.
4673 * SCRATCHA is assumed to have been loaded with STARTPOS
4674 * before the SCRIPTS called the C code.
4676 static void sym_sir_bad_scsi_status(hcb_p np, ccb_p cp)
4678 tcb_p tp = &np->target[cp->target];
4680 u_char s_status = cp->ssss_status;
4681 u_char h_flags = cp->host_flags;
4686 SYM_LOCK_ASSERT(MA_OWNED);
4689 * Compute the index of the next job to start from SCRIPTS.
4691 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4694 * The last CCB queued used for IARB hint may be
4695 * no longer relevant. Forget it.
4697 #ifdef SYM_CONF_IARB_SUPPORT
4703 * Now deal with the SCSI status.
4708 if (sym_verbose >= 2) {
4710 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4712 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4713 sym_complete_error (np, cp);
4718 * If we get an SCSI error when requesting sense, give up.
4720 if (h_flags & HF_SENSE) {
4721 sym_complete_error (np, cp);
4726 * Dequeue all queued CCBs for that device not yet started,
4727 * and restart the SCRIPTS processor immediately.
4729 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4730 OUTL_DSP (SCRIPTA_BA (np, start));
4733 * Save some info of the actual IO.
4734 * Compute the data residual.
4736 cp->sv_scsi_status = cp->ssss_status;
4737 cp->sv_xerr_status = cp->xerr_status;
4738 cp->sv_resid = sym_compute_residual(np, cp);
4741 * Prepare all needed data structures for
4742 * requesting sense data.
4748 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4752 * If we are currently using anything different from
4753 * async. 8 bit data transfers with that target,
4754 * start a negotiation, since the device may want
4755 * to report us a UNIT ATTENTION condition due to
4756 * a cause we currently ignore, and we donnot want
4757 * to be stuck with WIDE and/or SYNC data transfer.
4759 * cp->nego_status is filled by sym_prepare_nego().
4761 cp->nego_status = 0;
4763 if (tp->tinfo.current.options & PPR_OPT_MASK)
4765 else if (tp->tinfo.current.width != BUS_8_BIT)
4767 else if (tp->tinfo.current.offset != 0)
4771 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4773 * Message table indirect structure.
4775 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4776 cp->phys.smsg.size = cpu_to_scr(msglen);
4781 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4782 cp->phys.cmd.size = cpu_to_scr(6);
4785 * patch requested size into sense command
4787 cp->sensecmd[0] = 0x03;
4788 cp->sensecmd[1] = cp->lun << 5;
4789 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4790 cp->sensecmd[1] = 0;
4791 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4792 cp->data_len = SYM_SNS_BBUF_LEN;
4797 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4798 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4799 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4802 * requeue the command.
4804 startp = SCRIPTB_BA (np, sdata_in);
4806 cp->phys.head.savep = cpu_to_scr(startp);
4807 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4808 cp->phys.head.lastp = cpu_to_scr(startp);
4809 cp->startp = cpu_to_scr(startp);
4811 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4812 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4813 cp->ssss_status = S_ILLEGAL;
4814 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4815 cp->xerr_status = 0;
4816 cp->extra_bytes = 0;
4818 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4821 * Requeue the command.
4823 sym_put_start_queue(np, cp);
4826 * Give back to upper layer everything we have dequeued.
4828 sym_flush_comp_queue(np, 0);
4834 * After a device has accepted some management message
4835 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4836 * a device signals a UNIT ATTENTION condition, some
4837 * tasks are thrown away by the device. We are required
4838 * to reflect that on our tasks list since the device
4839 * will never complete these tasks.
4841 * This function move from the BUSY queue to the COMP
4842 * queue all disconnected CCBs for a given target that
4843 * match the following criteria:
4844 * - lun=-1 means any logical UNIT otherwise a given one.
4845 * - task=-1 means any task, otherwise a given one.
4848 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4850 SYM_QUEHEAD qtmp, *qp;
4855 * Move the entire BUSY queue to our temporary queue.
4857 sym_que_init(&qtmp);
4858 sym_que_splice(&np->busy_ccbq, &qtmp);
4859 sym_que_init(&np->busy_ccbq);
4862 * Put all CCBs that matches our criteria into
4863 * the COMP queue and put back other ones into
4866 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4868 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4870 if (cp->host_status != HS_DISCONNECT ||
4871 cp->target != target ||
4872 (lun != -1 && cp->lun != lun) ||
4874 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4875 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4878 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4880 /* Preserve the software timeout condition */
4881 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4882 sym_set_cam_status(ccb, cam_status);
4885 printf("XXXX TASK @%p CLEARED\n", cp);
4892 * chip handler for TASKS recovery
4894 * We cannot safely abort a command, while the SCRIPTS
4895 * processor is running, since we just would be in race
4898 * As long as we have tasks to abort, we keep the SEM
4899 * bit set in the ISTAT. When this bit is set, the
4900 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4901 * each time it enters the scheduler.
4903 * If we have to reset a target, clear tasks of a unit,
4904 * or to perform the abort of a disconnected job, we
4905 * restart the SCRIPTS for selecting the target. Once
4906 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4907 * If it loses arbitration, the SCRIPTS will interrupt again
4908 * the next time it will enter its scheduler, and so on ...
4910 * On SIR_TARGET_SELECTED, we scan for the more
4911 * appropriate thing to do:
4913 * - If nothing, we just sent a M_ABORT message to the
4914 * target to get rid of the useless SCSI bus ownership.
4915 * According to the specs, no tasks shall be affected.
4916 * - If the target is to be reset, we send it a M_RESET
4918 * - If a logical UNIT is to be cleared , we send the
4919 * IDENTIFY(lun) + M_ABORT.
4920 * - If an untagged task is to be aborted, we send the
4921 * IDENTIFY(lun) + M_ABORT.
4922 * - If a tagged task is to be aborted, we send the
4923 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4925 * Once our 'kiss of death' :) message has been accepted
4926 * by the target, the SCRIPTS interrupts again
4927 * (SIR_ABORT_SENT). On this interrupt, we complete
4928 * all the CCBs that should have been aborted by the
4929 * target according to our message.
4931 static void sym_sir_task_recovery(hcb_p np, int num)
4936 int target=-1, lun=-1, task;
4941 * The SCRIPTS processor stopped before starting
4942 * the next command in order to allow us to perform
4943 * some task recovery.
4945 case SIR_SCRIPT_STOPPED:
4947 * Do we have any target to reset or unit to clear ?
4949 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4950 tp = &np->target[i];
4952 (tp->lun0p && tp->lun0p->to_clear)) {
4958 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4959 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4969 * If not, walk the busy queue for any
4970 * disconnected CCB to be aborted.
4973 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4974 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4975 if (cp->host_status != HS_DISCONNECT)
4978 target = cp->target;
4985 * If some target is to be selected,
4986 * prepare and start the selection.
4989 tp = &np->target[target];
4990 np->abrt_sel.sel_id = target;
4991 np->abrt_sel.sel_scntl3 = tp->head.wval;
4992 np->abrt_sel.sel_sxfer = tp->head.sval;
4993 OUTL(nc_dsa, np->hcb_ba);
4994 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
4999 * Now look for a CCB to abort that haven't started yet.
5000 * Btw, the SCRIPTS processor is still stopped, so
5001 * we are not in race.
5005 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5006 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5007 if (cp->host_status != HS_BUSY &&
5008 cp->host_status != HS_NEGOTIATE)
5012 #ifdef SYM_CONF_IARB_SUPPORT
5014 * If we are using IMMEDIATE ARBITRATION, we donnot
5015 * want to cancel the last queued CCB, since the
5016 * SCRIPTS may have anticipated the selection.
5018 if (cp == np->last_cp) {
5023 i = 1; /* Means we have found some */
5028 * We are done, so we donnot need
5029 * to synchronize with the SCRIPTS anylonger.
5030 * Remove the SEM flag from the ISTAT.
5033 OUTB (nc_istat, SIGP);
5037 * Compute index of next position in the start
5038 * queue the SCRIPTS intends to start and dequeue
5039 * all CCBs for that device that haven't been started.
5041 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5042 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5045 * Make sure at least our IO to abort has been dequeued.
5047 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5050 * Keep track in cam status of the reason of the abort.
5052 if (cp->to_abort == 2)
5053 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5055 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5058 * Complete with error everything that we have dequeued.
5060 sym_flush_comp_queue(np, 0);
5063 * The SCRIPTS processor has selected a target
5064 * we may have some manual recovery to perform for.
5066 case SIR_TARGET_SELECTED:
5067 target = (INB (nc_sdid) & 0xf);
5068 tp = &np->target[target];
5070 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5073 * If the target is to be reset, prepare a
5074 * M_RESET message and clear the to_reset flag
5075 * since we donnot expect this operation to fail.
5078 np->abrt_msg[0] = M_RESET;
5079 np->abrt_tbl.size = 1;
5085 * Otherwise, look for some logical unit to be cleared.
5087 if (tp->lun0p && tp->lun0p->to_clear)
5089 else if (tp->lunmp) {
5090 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5091 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5099 * If a logical unit is to be cleared, prepare
5100 * an IDENTIFY(lun) + ABORT MESSAGE.
5103 lcb_p lp = sym_lp(tp, lun);
5104 lp->to_clear = 0; /* We donnot expect to fail here */
5105 np->abrt_msg[0] = M_IDENTIFY | lun;
5106 np->abrt_msg[1] = M_ABORT;
5107 np->abrt_tbl.size = 2;
5112 * Otherwise, look for some disconnected job to
5113 * abort for this target.
5117 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5118 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5119 if (cp->host_status != HS_DISCONNECT)
5121 if (cp->target != target)
5125 i = 1; /* Means we have some */
5130 * If we have none, probably since the device has
5131 * completed the command before we won abitration,
5132 * send a M_ABORT message without IDENTIFY.
5133 * According to the specs, the device must just
5134 * disconnect the BUS and not abort any task.
5137 np->abrt_msg[0] = M_ABORT;
5138 np->abrt_tbl.size = 1;
5143 * We have some task to abort.
5144 * Set the IDENTIFY(lun)
5146 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5149 * If we want to abort an untagged command, we
5150 * will send an IDENTIFY + M_ABORT.
5151 * Otherwise (tagged command), we will send
5152 * an IDENTIFY + task attributes + ABORT TAG.
5154 if (cp->tag == NO_TAG) {
5155 np->abrt_msg[1] = M_ABORT;
5156 np->abrt_tbl.size = 2;
5159 np->abrt_msg[1] = cp->scsi_smsg[1];
5160 np->abrt_msg[2] = cp->scsi_smsg[2];
5161 np->abrt_msg[3] = M_ABORT_TAG;
5162 np->abrt_tbl.size = 4;
5165 * Keep track of software timeout condition, since the
5166 * peripheral driver may not count retries on abort
5167 * conditions not due to timeout.
5169 if (cp->to_abort == 2)
5170 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5171 cp->to_abort = 0; /* We donnot expect to fail here */
5175 * The target has accepted our message and switched
5176 * to BUS FREE phase as we expected.
5178 case SIR_ABORT_SENT:
5179 target = (INB (nc_sdid) & 0xf);
5180 tp = &np->target[target];
5183 ** If we didn't abort anything, leave here.
5185 if (np->abrt_msg[0] == M_ABORT)
5189 * If we sent a M_RESET, then a hardware reset has
5190 * been performed by the target.
5191 * - Reset everything to async 8 bit
5192 * - Tell ourself to negotiate next time :-)
5193 * - Prepare to clear all disconnected CCBs for
5194 * this target from our task list (lun=task=-1)
5198 if (np->abrt_msg[0] == M_RESET) {
5200 tp->head.wval = np->rv_scntl3;
5202 tp->tinfo.current.period = 0;
5203 tp->tinfo.current.offset = 0;
5204 tp->tinfo.current.width = BUS_8_BIT;
5205 tp->tinfo.current.options = 0;
5209 * Otherwise, check for the LUN and TASK(s)
5210 * concerned by the cancelation.
5211 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5212 * or an ABORT message :-)
5215 lun = np->abrt_msg[0] & 0x3f;
5216 if (np->abrt_msg[1] == M_ABORT_TAG)
5217 task = np->abrt_msg[2];
5221 * Complete all the CCBs the device should have
5222 * aborted due to our 'kiss of death' message.
5224 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5225 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5226 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5227 sym_flush_comp_queue(np, 0);
5230 * If we sent a BDR, make uper layer aware of that.
5232 if (np->abrt_msg[0] == M_RESET)
5233 xpt_async(AC_SENT_BDR, np->path, NULL);
5238 * Print to the log the message we intend to send.
5240 if (num == SIR_TARGET_SELECTED) {
5241 PRINT_TARGET(np, target);
5242 sym_printl_hex("control msgout:", np->abrt_msg,
5244 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5248 * Let the SCRIPTS processor continue.
5254 * Gerard's alchemy:) that deals with with the data
5255 * pointer for both MDP and the residual calculation.
5257 * I didn't want to bloat the code by more than 200
5258 * lignes for the handling of both MDP and the residual.
5259 * This has been achieved by using a data pointer
5260 * representation consisting in an index in the data
5261 * array (dp_sg) and a negative offset (dp_ofs) that
5262 * have the following meaning:
5264 * - dp_sg = SYM_CONF_MAX_SG
5265 * we are at the end of the data script.
5266 * - dp_sg < SYM_CONF_MAX_SG
5267 * dp_sg points to the next entry of the scatter array
5268 * we want to transfer.
5270 * dp_ofs represents the residual of bytes of the
5271 * previous entry scatter entry we will send first.
5273 * no residual to send first.
5275 * The function sym_evaluate_dp() accepts an arbitray
5276 * offset (basically from the MDP message) and returns
5277 * the corresponding values of dp_sg and dp_ofs.
5279 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5282 int dp_ofs, dp_sg, dp_sgmin;
5287 * Compute the resulted data pointer in term of a script
5288 * address within some DATA script and a signed byte offset.
5292 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5294 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5300 dp_scr = scr_to_cpu(pm->ret);
5301 dp_ofs -= scr_to_cpu(pm->sg.size);
5305 * If we are auto-sensing, then we are done.
5307 if (cp->host_flags & HF_SENSE) {
5313 * Deduce the index of the sg entry.
5314 * Keep track of the index of the first valid entry.
5315 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5318 tmp = scr_to_cpu(cp->phys.head.goalp);
5319 dp_sg = SYM_CONF_MAX_SG;
5321 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5322 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5325 * Move to the sg entry the data pointer belongs to.
5327 * If we are inside the data area, we expect result to be:
5330 * dp_ofs = 0 and dp_sg is the index of the sg entry
5331 * the data pointer belongs to (or the end of the data)
5333 * dp_ofs < 0 and dp_sg is the index of the sg entry
5334 * the data pointer belongs to + 1.
5338 while (dp_sg > dp_sgmin) {
5340 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5341 n = dp_ofs + (tmp & 0xffffff);
5349 else if (dp_ofs > 0) {
5350 while (dp_sg < SYM_CONF_MAX_SG) {
5351 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5352 dp_ofs -= (tmp & 0xffffff);
5360 * Make sure the data pointer is inside the data area.
5361 * If not, return some error.
5363 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5365 else if (dp_sg > SYM_CONF_MAX_SG ||
5366 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5370 * Save the extreme pointer if needed.
5372 if (dp_sg > cp->ext_sg ||
5373 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5375 cp->ext_ofs = dp_ofs;
5389 * chip handler for MODIFY DATA POINTER MESSAGE
5391 * We also call this function on IGNORE WIDE RESIDUE
5392 * messages that do not match a SWIDE full condition.
5393 * Btw, we assume in that situation that such a message
5394 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5396 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs)
5399 u32 dp_scr = INL (nc_temp);
5407 * Not supported for auto-sense.
5409 if (cp->host_flags & HF_SENSE)
5413 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5414 * to the resulted data pointer.
5416 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5421 * And our alchemy:) allows to easily calculate the data
5422 * script address we want to return for the next data phase.
5424 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5425 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5428 * If offset / scatter entry is zero we donnot need
5429 * a context for the new current data pointer.
5437 * Get a context for the new current data pointer.
5439 hflags = INB (HF_PRT);
5441 if (hflags & HF_DP_SAVED)
5442 hflags ^= HF_ACT_PM;
5444 if (!(hflags & HF_ACT_PM)) {
5446 dp_scr = SCRIPTA_BA (np, pm0_data);
5450 dp_scr = SCRIPTA_BA (np, pm1_data);
5453 hflags &= ~(HF_DP_SAVED);
5455 OUTB (HF_PRT, hflags);
5458 * Set up the new current data pointer.
5459 * ofs < 0 there, and for the next data phase, we
5460 * want to transfer part of the data of the sg entry
5461 * corresponding to index dp_sg-1 prior to returning
5462 * to the main data script.
5464 pm->ret = cpu_to_scr(dp_ret);
5465 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5466 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5467 pm->sg.addr = cpu_to_scr(tmp);
5468 pm->sg.size = cpu_to_scr(-dp_ofs);
5471 OUTL (nc_temp, dp_scr);
5472 OUTL_DSP (SCRIPTA_BA (np, clrack));
5476 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5480 * chip calculation of the data residual.
5482 * As I used to say, the requirement of data residual
5483 * in SCSI is broken, useless and cannot be achieved
5484 * without huge complexity.
5485 * But most OSes and even the official CAM require it.
5486 * When stupidity happens to be so widely spread inside
5487 * a community, it gets hard to convince.
5489 * Anyway, I don't care, since I am not going to use
5490 * any software that considers this data residual as
5491 * a relevant information. :)
5493 static int sym_compute_residual(hcb_p np, ccb_p cp)
5495 int dp_sg, dp_sgmin, resid = 0;
5499 * Check for some data lost or just thrown away.
5500 * We are not required to be quite accurate in this
5501 * situation. Btw, if we are odd for output and the
5502 * device claims some more data, it may well happen
5503 * than our residual be zero. :-)
5505 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5506 if (cp->xerr_status & XE_EXTRA_DATA)
5507 resid -= cp->extra_bytes;
5508 if (cp->xerr_status & XE_SODL_UNRUN)
5510 if (cp->xerr_status & XE_SWIDE_OVRUN)
5515 * If all data has been transferred,
5516 * there is no residual.
5518 if (cp->phys.head.lastp == cp->phys.head.goalp)
5522 * If no data transfer occurs, or if the data
5523 * pointer is weird, return full residual.
5525 if (cp->startp == cp->phys.head.lastp ||
5526 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5528 return cp->data_len;
5532 * If we were auto-sensing, then we are done.
5534 if (cp->host_flags & HF_SENSE) {
5539 * We are now full comfortable in the computation
5540 * of the data residual (2's complement).
5542 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5543 resid = -cp->ext_ofs;
5544 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5545 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5546 resid += (tmp & 0xffffff);
5550 * Hopefully, the result is not too wrong.
5556 * Print out the content of a SCSI message.
5558 static int sym_show_msg (u_char * msg)
5562 if (*msg==M_EXTENDED) {
5564 if (i-1>msg[1]) break;
5565 printf ("-%x",msg[i]);
5568 } else if ((*msg & 0xf0) == 0x20) {
5569 printf ("-%x",msg[1]);
5575 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5579 printf ("%s: ", label);
5581 (void) sym_show_msg (msg);
5586 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5588 * When we try to negotiate, we append the negotiation message
5589 * to the identify and (maybe) simple tag message.
5590 * The host status field is set to HS_NEGOTIATE to mark this
5593 * If the target doesn't answer this message immediately
5594 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5595 * will be raised eventually.
5596 * The handler removes the HS_NEGOTIATE status, and sets the
5597 * negotiated value to the default (async / nowide).
5599 * If we receive a matching answer immediately, we check it
5600 * for validity, and set the values.
5602 * If we receive a Reject message immediately, we assume the
5603 * negotiation has failed, and fall back to standard values.
5605 * If we receive a negotiation message while not in HS_NEGOTIATE
5606 * state, it's a target initiated negotiation. We prepare a
5607 * (hopefully) valid answer, set our parameters, and send back
5608 * this answer to the target.
5610 * If the target doesn't fetch the answer (no message out phase),
5611 * we assume the negotiation has failed, and fall back to default
5612 * settings (SIR_NEGO_PROTO interrupt).
5614 * When we set the values, we adjust them in all ccbs belonging
5615 * to this target, in the controller's register, and in the "phys"
5616 * field of the controller's struct sym_hcb.
5620 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5622 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5624 u_char chg, ofs, per, fak, div;
5628 * Synchronous request message received.
5630 if (DEBUG_FLAGS & DEBUG_NEGO) {
5631 sym_print_msg(cp, "sync msgin", np->msgin);
5635 * request or answer ?
5637 if (INB (HS_PRT) == HS_NEGOTIATE) {
5638 OUTB (HS_PRT, HS_BUSY);
5639 if (cp->nego_status && cp->nego_status != NS_SYNC)
5645 * get requested values.
5652 * check values against our limits.
5655 if (ofs > np->maxoffs)
5656 {chg = 1; ofs = np->maxoffs;}
5658 if (ofs > tp->tinfo.user.offset)
5659 {chg = 1; ofs = tp->tinfo.user.offset;}
5664 if (per < np->minsync)
5665 {chg = 1; per = np->minsync;}
5667 if (per < tp->tinfo.user.period)
5668 {chg = 1; per = tp->tinfo.user.period;}
5673 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5676 if (DEBUG_FLAGS & DEBUG_NEGO) {
5678 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5679 ofs, per, div, fak, chg);
5683 * This was an answer message
5686 if (chg) /* Answer wasn't acceptable. */
5688 sym_setsync (np, cp, ofs, per, div, fak);
5689 OUTL_DSP (SCRIPTA_BA (np, clrack));
5694 * It was a request. Set value and
5695 * prepare an answer message
5697 sym_setsync (np, cp, ofs, per, div, fak);
5699 np->msgout[0] = M_EXTENDED;
5701 np->msgout[2] = M_X_SYNC_REQ;
5702 np->msgout[3] = per;
5703 np->msgout[4] = ofs;
5705 cp->nego_status = NS_SYNC;
5707 if (DEBUG_FLAGS & DEBUG_NEGO) {
5708 sym_print_msg(cp, "sync msgout", np->msgout);
5711 np->msgin [0] = M_NOOP;
5713 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5716 sym_setsync (np, cp, 0, 0, 0, 0);
5717 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5721 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5723 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5725 u_char chg, ofs, per, fak, dt, div, wide;
5729 * Synchronous request message received.
5731 if (DEBUG_FLAGS & DEBUG_NEGO) {
5732 sym_print_msg(cp, "ppr msgin", np->msgin);
5736 * get requested values.
5741 wide = np->msgin[6];
5742 dt = np->msgin[7] & PPR_OPT_DT;
5745 * request or answer ?
5747 if (INB (HS_PRT) == HS_NEGOTIATE) {
5748 OUTB (HS_PRT, HS_BUSY);
5749 if (cp->nego_status && cp->nego_status != NS_PPR)
5755 * check values against our limits.
5757 if (wide > np->maxwide)
5758 {chg = 1; wide = np->maxwide;}
5759 if (!wide || !(np->features & FE_ULTRA3))
5762 if (wide > tp->tinfo.user.width)
5763 {chg = 1; wide = tp->tinfo.user.width;}
5766 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5769 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5773 if (ofs > np->maxoffs_dt)
5774 {chg = 1; ofs = np->maxoffs_dt;}
5776 else if (ofs > np->maxoffs)
5777 {chg = 1; ofs = np->maxoffs;}
5779 if (ofs > tp->tinfo.user.offset)
5780 {chg = 1; ofs = tp->tinfo.user.offset;}
5786 if (per < np->minsync_dt)
5787 {chg = 1; per = np->minsync_dt;}
5789 else if (per < np->minsync)
5790 {chg = 1; per = np->minsync;}
5792 if (per < tp->tinfo.user.period)
5793 {chg = 1; per = tp->tinfo.user.period;}
5798 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5801 if (DEBUG_FLAGS & DEBUG_NEGO) {
5804 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5805 dt, ofs, per, wide, div, fak, chg);
5812 if (chg) /* Answer wasn't acceptable */
5814 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5815 OUTL_DSP (SCRIPTA_BA (np, clrack));
5820 * It was a request. Set value and
5821 * prepare an answer message
5823 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5825 np->msgout[0] = M_EXTENDED;
5827 np->msgout[2] = M_X_PPR_REQ;
5828 np->msgout[3] = per;
5830 np->msgout[5] = ofs;
5831 np->msgout[6] = wide;
5834 cp->nego_status = NS_PPR;
5836 if (DEBUG_FLAGS & DEBUG_NEGO) {
5837 sym_print_msg(cp, "ppr msgout", np->msgout);
5840 np->msgin [0] = M_NOOP;
5842 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5845 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5846 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5848 * If it was a device response that should result in
5849 * ST, we may want to try a legacy negotiation later.
5852 tp->tinfo.goal.options = 0;
5853 tp->tinfo.goal.width = wide;
5854 tp->tinfo.goal.period = per;
5855 tp->tinfo.goal.offset = ofs;
5860 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5862 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5868 * Wide request message received.
5870 if (DEBUG_FLAGS & DEBUG_NEGO) {
5871 sym_print_msg(cp, "wide msgin", np->msgin);
5875 * Is it a request from the device?
5877 if (INB (HS_PRT) == HS_NEGOTIATE) {
5878 OUTB (HS_PRT, HS_BUSY);
5879 if (cp->nego_status && cp->nego_status != NS_WIDE)
5885 * get requested values.
5888 wide = np->msgin[3];
5891 * check values against driver limits.
5893 if (wide > np->maxwide)
5894 {chg = 1; wide = np->maxwide;}
5896 if (wide > tp->tinfo.user.width)
5897 {chg = 1; wide = tp->tinfo.user.width;}
5900 if (DEBUG_FLAGS & DEBUG_NEGO) {
5902 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5906 * This was an answer message
5909 if (chg) /* Answer wasn't acceptable. */
5911 sym_setwide (np, cp, wide);
5914 * Negotiate for SYNC immediately after WIDE response.
5915 * This allows to negotiate for both WIDE and SYNC on
5916 * a single SCSI command (Suggested by Justin Gibbs).
5918 if (tp->tinfo.goal.offset) {
5919 np->msgout[0] = M_EXTENDED;
5921 np->msgout[2] = M_X_SYNC_REQ;
5922 np->msgout[3] = tp->tinfo.goal.period;
5923 np->msgout[4] = tp->tinfo.goal.offset;
5925 if (DEBUG_FLAGS & DEBUG_NEGO) {
5926 sym_print_msg(cp, "sync msgout", np->msgout);
5929 cp->nego_status = NS_SYNC;
5930 OUTB (HS_PRT, HS_NEGOTIATE);
5931 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5935 OUTL_DSP (SCRIPTA_BA (np, clrack));
5940 * It was a request, set value and
5941 * prepare an answer message
5943 sym_setwide (np, cp, wide);
5945 np->msgout[0] = M_EXTENDED;
5947 np->msgout[2] = M_X_WIDE_REQ;
5948 np->msgout[3] = wide;
5950 np->msgin [0] = M_NOOP;
5952 cp->nego_status = NS_WIDE;
5954 if (DEBUG_FLAGS & DEBUG_NEGO) {
5955 sym_print_msg(cp, "wide msgout", np->msgout);
5958 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5961 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5965 * Reset SYNC or WIDE to default settings.
5967 * Called when a negotiation does not succeed either
5968 * on rejection or on protocol error.
5970 * If it was a PPR that made problems, we may want to
5971 * try a legacy negotiation later.
5973 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5976 * any error in negotiation:
5977 * fall back to default mode.
5979 switch (cp->nego_status) {
5982 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5984 tp->tinfo.goal.options = 0;
5985 if (tp->tinfo.goal.period < np->minsync)
5986 tp->tinfo.goal.period = np->minsync;
5987 if (tp->tinfo.goal.offset > np->maxoffs)
5988 tp->tinfo.goal.offset = np->maxoffs;
5992 sym_setsync (np, cp, 0, 0, 0, 0);
5995 sym_setwide (np, cp, 0);
5998 np->msgin [0] = M_NOOP;
5999 np->msgout[0] = M_NOOP;
6000 cp->nego_status = 0;
6004 * chip handler for MESSAGE REJECT received in response to
6005 * a WIDE or SYNCHRONOUS negotiation.
6007 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6009 sym_nego_default(np, tp, cp);
6010 OUTB (HS_PRT, HS_BUSY);
6014 * chip exception handler for programmed interrupts.
6016 static void sym_int_sir (hcb_p np)
6018 u_char num = INB (nc_dsps);
6019 u32 dsa = INL (nc_dsa);
6020 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6021 u_char target = INB (nc_sdid) & 0x0f;
6022 tcb_p tp = &np->target[target];
6025 SYM_LOCK_ASSERT(MA_OWNED);
6027 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6031 * Command has been completed with error condition
6032 * or has been auto-sensed.
6034 case SIR_COMPLETE_ERROR:
6035 sym_complete_error(np, cp);
6038 * The C code is currently trying to recover from something.
6039 * Typically, user want to abort some command.
6041 case SIR_SCRIPT_STOPPED:
6042 case SIR_TARGET_SELECTED:
6043 case SIR_ABORT_SENT:
6044 sym_sir_task_recovery(np, num);
6047 * The device didn't go to MSG OUT phase after having
6048 * been selected with ATN. We donnot want to handle
6051 case SIR_SEL_ATN_NO_MSG_OUT:
6052 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6053 sym_name (np), target);
6056 * The device didn't switch to MSG IN phase after
6057 * having reseleted the initiator.
6059 case SIR_RESEL_NO_MSG_IN:
6060 printf ("%s:%d: No MSG IN phase after reselection.\n",
6061 sym_name (np), target);
6064 * After reselection, the device sent a message that wasn't
6067 case SIR_RESEL_NO_IDENTIFY:
6068 printf ("%s:%d: No IDENTIFY after reselection.\n",
6069 sym_name (np), target);
6072 * The device reselected a LUN we donnot know about.
6074 case SIR_RESEL_BAD_LUN:
6075 np->msgout[0] = M_RESET;
6078 * The device reselected for an untagged nexus and we
6081 case SIR_RESEL_BAD_I_T_L:
6082 np->msgout[0] = M_ABORT;
6085 * The device reselected for a tagged nexus that we donnot
6088 case SIR_RESEL_BAD_I_T_L_Q:
6089 np->msgout[0] = M_ABORT_TAG;
6092 * The SCRIPTS let us know that the device has grabbed
6093 * our message and will abort the job.
6095 case SIR_RESEL_ABORTED:
6096 np->lastmsg = np->msgout[0];
6097 np->msgout[0] = M_NOOP;
6098 printf ("%s:%d: message %x sent on bad reselection.\n",
6099 sym_name (np), target, np->lastmsg);
6102 * The SCRIPTS let us know that a message has been
6103 * successfully sent to the device.
6105 case SIR_MSG_OUT_DONE:
6106 np->lastmsg = np->msgout[0];
6107 np->msgout[0] = M_NOOP;
6108 /* Should we really care of that */
6109 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6111 cp->xerr_status &= ~XE_PARITY_ERR;
6112 if (!cp->xerr_status)
6113 OUTOFFB (HF_PRT, HF_EXT_ERR);
6118 * The device didn't send a GOOD SCSI status.
6119 * We may have some work to do prior to allow
6120 * the SCRIPTS processor to continue.
6122 case SIR_BAD_SCSI_STATUS:
6125 sym_sir_bad_scsi_status(np, cp);
6128 * We are asked by the SCRIPTS to prepare a
6131 case SIR_REJECT_TO_SEND:
6132 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6133 np->msgout[0] = M_REJECT;
6136 * We have been ODD at the end of a DATA IN
6137 * transfer and the device didn't send a
6138 * IGNORE WIDE RESIDUE message.
6139 * It is a data overrun condition.
6141 case SIR_SWIDE_OVERRUN:
6143 OUTONB (HF_PRT, HF_EXT_ERR);
6144 cp->xerr_status |= XE_SWIDE_OVRUN;
6148 * We have been ODD at the end of a DATA OUT
6150 * It is a data underrun condition.
6152 case SIR_SODL_UNDERRUN:
6154 OUTONB (HF_PRT, HF_EXT_ERR);
6155 cp->xerr_status |= XE_SODL_UNRUN;
6159 * The device wants us to tranfer more data than
6160 * expected or in the wrong direction.
6161 * The number of extra bytes is in scratcha.
6162 * It is a data overrun condition.
6164 case SIR_DATA_OVERRUN:
6166 OUTONB (HF_PRT, HF_EXT_ERR);
6167 cp->xerr_status |= XE_EXTRA_DATA;
6168 cp->extra_bytes += INL (nc_scratcha);
6172 * The device switched to an illegal phase (4/5).
6176 OUTONB (HF_PRT, HF_EXT_ERR);
6177 cp->xerr_status |= XE_BAD_PHASE;
6181 * We received a message.
6183 case SIR_MSG_RECEIVED:
6186 switch (np->msgin [0]) {
6188 * We received an extended message.
6189 * We handle MODIFY DATA POINTER, SDTR, WDTR
6190 * and reject all other extended messages.
6193 switch (np->msgin [2]) {
6195 if (DEBUG_FLAGS & DEBUG_POINTER)
6196 sym_print_msg(cp,"modify DP",np->msgin);
6197 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6198 (np->msgin[5]<<8) + (np->msgin[6]);
6199 sym_modify_dp(np, cp, tmp);
6202 sym_sync_nego(np, tp, cp);
6205 sym_ppr_nego(np, tp, cp);
6208 sym_wide_nego(np, tp, cp);
6215 * We received a 1/2 byte message not handled from SCRIPTS.
6216 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6217 * RESIDUE messages that haven't been anticipated by
6218 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6219 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6222 if (DEBUG_FLAGS & DEBUG_POINTER)
6223 sym_print_msg(cp,"ign wide residue", np->msgin);
6224 sym_modify_dp(np, cp, -1);
6227 if (INB (HS_PRT) == HS_NEGOTIATE)
6228 sym_nego_rejected(np, tp, cp);
6231 printf ("M_REJECT received (%x:%x).\n",
6232 scr_to_cpu(np->lastmsg), np->msgout[0]);
6241 * We received an unknown message.
6242 * Ignore all MSG IN phases and reject it.
6245 sym_print_msg(cp, "WEIRD message received", np->msgin);
6246 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6249 * Negotiation failed.
6250 * Target does not send us the reply.
6251 * Remove the HS_NEGOTIATE status.
6253 case SIR_NEGO_FAILED:
6254 OUTB (HS_PRT, HS_BUSY);
6256 * Negotiation failed.
6257 * Target does not want answer message.
6259 case SIR_NEGO_PROTO:
6260 sym_nego_default(np, tp, cp);
6268 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6271 OUTL_DSP (SCRIPTA_BA (np, clrack));
6278 * Acquire a control block
6280 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6282 tcb_p tp = &np->target[tn];
6283 lcb_p lp = sym_lp(tp, ln);
6284 u_short tag = NO_TAG;
6286 ccb_p cp = (ccb_p) NULL;
6289 * Look for a free CCB
6291 if (sym_que_empty(&np->free_ccbq))
6293 qp = sym_remque_head(&np->free_ccbq);
6296 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6299 * If the LCB is not yet available and the LUN
6300 * has been probed ok, try to allocate the LCB.
6302 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6303 lp = sym_alloc_lcb(np, tn, ln);
6309 * If the LCB is not available here, then the
6310 * logical unit is not yet discovered. For those
6311 * ones only accept 1 SCSI IO per logical unit,
6312 * since we cannot allow disconnections.
6315 if (!sym_is_bit(tp->busy0_map, ln))
6316 sym_set_bit(tp->busy0_map, ln);
6321 * If we have been asked for a tagged command.
6325 * Debugging purpose.
6327 assert(lp->busy_itl == 0);
6329 * Allocate resources for tags if not yet.
6332 sym_alloc_lcb_tags(np, tn, ln);
6337 * Get a tag for this SCSI IO and set up
6338 * the CCB bus address for reselection,
6339 * and count it for this LUN.
6340 * Toggle reselect path to tagged.
6342 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6343 tag = lp->cb_tags[lp->ia_tag];
6344 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6346 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6349 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6355 * This command will not be tagged.
6356 * If we already have either a tagged or untagged
6357 * one, refuse to overlap this untagged one.
6361 * Debugging purpose.
6363 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6365 * Count this nexus for this LUN.
6366 * Set up the CCB bus address for reselection.
6367 * Toggle reselect path to untagged.
6369 if (++lp->busy_itl == 1) {
6370 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6372 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6379 * Put the CCB into the busy queue.
6381 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6384 * Remember all informations needed to free this CCB.
6391 if (DEBUG_FLAGS & DEBUG_TAGS) {
6392 PRINT_LUN(np, tn, ln);
6393 printf ("ccb @%p using tag %d.\n", cp, tag);
6399 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6404 * Release one control block
6406 static void sym_free_ccb(hcb_p np, ccb_p cp)
6408 tcb_p tp = &np->target[cp->target];
6409 lcb_p lp = sym_lp(tp, cp->lun);
6411 if (DEBUG_FLAGS & DEBUG_TAGS) {
6412 PRINT_LUN(np, cp->target, cp->lun);
6413 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6421 * If tagged, release the tag, set the relect path
6423 if (cp->tag != NO_TAG) {
6425 * Free the tag value.
6427 lp->cb_tags[lp->if_tag] = cp->tag;
6428 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6431 * Make the reselect path invalid,
6432 * and uncount this CCB.
6434 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6436 } else { /* Untagged */
6438 * Make the reselect path invalid,
6439 * and uncount this CCB.
6441 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6445 * If no JOB active, make the LUN reselect path invalid.
6447 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6449 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6452 * Otherwise, we only accept 1 IO per LUN.
6453 * Clear the bit that keeps track of this IO.
6456 sym_clr_bit(tp->busy0_map, cp->lun);
6459 * We donnot queue more than 1 ccb per target
6460 * with negotiation at any time. If this ccb was
6461 * used for negotiation, clear this info in the tcb.
6463 if (cp == tp->nego_cp)
6466 #ifdef SYM_CONF_IARB_SUPPORT
6468 * If we just complete the last queued CCB,
6469 * clear this info that is no longer relevant.
6471 if (cp == np->last_cp)
6476 * Unmap user data from DMA map if needed.
6478 if (cp->dmamapped) {
6479 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6484 * Make this CCB available.
6487 cp->host_status = HS_IDLE;
6488 sym_remque(&cp->link_ccbq);
6489 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6493 * Allocate a CCB from memory and initialize its fixed part.
6495 static ccb_p sym_alloc_ccb(hcb_p np)
6500 SYM_LOCK_ASSERT(MA_NOTOWNED);
6503 * Prevent from allocating more CCBs than we can
6504 * queue to the controller.
6506 if (np->actccbs >= SYM_CONF_MAX_START)
6510 * Allocate memory for this CCB.
6512 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6517 * Allocate a bounce buffer for sense data.
6519 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6524 * Allocate a map for the DMA of user data.
6526 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6534 * Initialize the callout.
6536 callout_init(&cp->ch, 1);
6539 * Compute the bus address of this ccb.
6541 cp->ccb_ba = vtobus(cp);
6544 * Insert this ccb into the hashed list.
6546 hcode = CCB_HASH_CODE(cp->ccb_ba);
6547 cp->link_ccbh = np->ccbh[hcode];
6548 np->ccbh[hcode] = cp;
6551 * Initialize the start and restart actions.
6553 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6554 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6557 * Initilialyze some other fields.
6559 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6562 * Chain into free ccb queue.
6564 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6569 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6570 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6575 * Look up a CCB from a DSA value.
6577 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6582 hcode = CCB_HASH_CODE(dsa);
6583 cp = np->ccbh[hcode];
6585 if (cp->ccb_ba == dsa)
6594 * Lun control block allocation and initialization.
6596 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6598 tcb_p tp = &np->target[tn];
6599 lcb_p lp = sym_lp(tp, ln);
6602 * Already done, just return.
6607 * Check against some race.
6609 assert(!sym_is_bit(tp->busy0_map, ln));
6612 * Allocate the LCB bus address array.
6613 * Compute the bus address of this table.
6615 if (ln && !tp->luntbl) {
6618 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6621 for (i = 0 ; i < 64 ; i++)
6622 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6623 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6627 * Allocate the table of pointers for LUN(s) > 0, if needed.
6629 if (ln && !tp->lunmp) {
6630 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6638 * Make it available to the chip.
6640 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6645 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6649 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6653 * Let the itl task point to error handling.
6655 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6658 * Set the reselect pattern to our default. :)
6660 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6663 * Set user capabilities.
6665 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6672 * Allocate LCB resources for tagged command queuing.
6674 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6676 tcb_p tp = &np->target[tn];
6677 lcb_p lp = sym_lp(tp, ln);
6681 * If LCB not available, try to allocate it.
6683 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6687 * Allocate the task table and and the tag allocation
6688 * circular buffer. We want both or none.
6690 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6693 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6695 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6701 * Initialize the task table with invalid entries.
6703 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6704 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6707 * Fill up the tag buffer with tag numbers.
6709 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6713 * Make the task table available to SCRIPTS,
6714 * And accept tagged commands now.
6716 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6720 * Test the pci bus snoop logic :-(
6722 * Has to be called with interrupts disabled.
6724 #ifndef SYM_CONF_IOMAPPED
6725 static int sym_regtest (hcb_p np)
6727 register volatile u32 data;
6729 * chip registers may NOT be cached.
6730 * write 0xffffffff to a read only register area,
6731 * and try to read it back.
6734 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6735 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6737 if (data == 0xffffffff) {
6739 if ((data & 0xe2f0fffd) != 0x02000080) {
6741 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6749 static int sym_snooptest (hcb_p np)
6751 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6753 #ifndef SYM_CONF_IOMAPPED
6754 err |= sym_regtest (np);
6755 if (err) return (err);
6759 * Enable Master Parity Checking as we intend
6760 * to enable it for normal operations.
6762 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6766 pc = SCRIPTB0_BA (np, snooptest);
6770 * Set memory and register.
6772 np->cache = cpu_to_scr(host_wr);
6773 OUTL (nc_temp, sym_wr);
6775 * Start script (exchange values)
6777 OUTL (nc_dsa, np->hcb_ba);
6780 * Wait 'til done (with timeout)
6782 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6783 if (INB(nc_istat) & (INTF|SIP|DIP))
6785 if (i>=SYM_SNOOP_TIMEOUT) {
6786 printf ("CACHE TEST FAILED: timeout.\n");
6790 * Check for fatal DMA errors.
6792 dstat = INB (nc_dstat);
6793 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6794 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6795 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6796 "DISABLING MASTER DATA PARITY CHECKING.\n",
6798 np->rv_ctest4 &= ~MPEE;
6802 if (dstat & (MDPE|BF|IID)) {
6803 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6807 * Save termination position.
6811 * Read memory and register.
6813 host_rd = scr_to_cpu(np->cache);
6814 sym_rd = INL (nc_scratcha);
6815 sym_bk = INL (nc_temp);
6818 * Check termination position.
6820 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6821 printf ("CACHE TEST FAILED: script execution failed.\n");
6822 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6823 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6824 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6830 if (host_wr != sym_rd) {
6831 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6832 (int) host_wr, (int) sym_rd);
6835 if (host_rd != sym_wr) {
6836 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6837 (int) sym_wr, (int) host_rd);
6840 if (sym_bk != sym_wr) {
6841 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6842 (int) sym_wr, (int) sym_bk);
6850 * Determine the chip's clock frequency.
6852 * This is essential for the negotiation of the synchronous
6855 * Note: we have to return the correct value.
6856 * THERE IS NO SAFE DEFAULT VALUE.
6858 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6859 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6860 * do not have a clock doubler and so are provided with a
6861 * 80 MHz clock. All other fast20 boards incorporate a doubler
6862 * and so should be delivered with a 40 MHz clock.
6863 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6864 * clock and provide a clock quadrupler (160 Mhz).
6868 * Select SCSI clock frequency
6870 static void sym_selectclock(hcb_p np, u_char scntl3)
6873 * If multiplier not present or not selected, leave here.
6875 if (np->multiplier <= 1) {
6876 OUTB(nc_scntl3, scntl3);
6880 if (sym_verbose >= 2)
6881 printf ("%s: enabling clock multiplier\n", sym_name(np));
6883 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6885 * Wait for the LCKFRQ bit to be set if supported by the chip.
6886 * Otherwise wait 20 micro-seconds.
6888 if (np->features & FE_LCKFRQ) {
6890 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6893 printf("%s: the chip cannot lock the frequency\n",
6897 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6898 OUTB(nc_scntl3, scntl3);
6899 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6900 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6904 * calculate SCSI clock frequency (in KHz)
6906 static unsigned getfreq (hcb_p np, int gen)
6908 unsigned int ms = 0;
6912 * Measure GEN timer delay in order
6913 * to calculate SCSI clock frequency
6915 * This code will never execute too
6916 * many loop iterations (if DELAY is
6917 * reasonably correct). It could get
6918 * too low a delay (too high a freq.)
6919 * if the CPU is slow executing the
6920 * loop for some reason (an NMI, for
6921 * example). For this reason we will
6922 * if multiple measurements are to be
6923 * performed trust the higher delay
6924 * (lower frequency returned).
6926 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6927 (void) INW (nc_sist); /* clear pending scsi interrupt */
6928 OUTB (nc_dien , 0); /* mask all dma interrupts */
6929 (void) INW (nc_sist); /* another one, just to be sure :) */
6930 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6931 OUTB (nc_stime1, 0); /* disable general purpose timer */
6932 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6933 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6934 UDELAY (1000); /* count ms */
6935 OUTB (nc_stime1, 0); /* disable general purpose timer */
6937 * set prescaler to divide by whatever 0 means
6938 * 0 ought to choose divide by 2, but appears
6939 * to set divide by 3.5 mode in my 53c810 ...
6941 OUTB (nc_scntl3, 0);
6944 * adjust for prescaler, and convert into KHz
6946 f = ms ? ((1 << gen) * 4340) / ms : 0;
6948 if (sym_verbose >= 2)
6949 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6950 sym_name(np), gen, ms, f);
6955 static unsigned sym_getfreq (hcb_p np)
6960 (void) getfreq (np, gen); /* throw away first result */
6961 f1 = getfreq (np, gen);
6962 f2 = getfreq (np, gen);
6963 if (f1 > f2) f1 = f2; /* trust lower result */
6968 * Get/probe chip SCSI clock frequency
6970 static void sym_getclock (hcb_p np, int mult)
6972 unsigned char scntl3 = np->sv_scntl3;
6973 unsigned char stest1 = np->sv_stest1;
6977 * For the C10 core, assume 40 MHz.
6979 if (np->features & FE_C10) {
6980 np->multiplier = mult;
6981 np->clock_khz = 40000 * mult;
6988 * True with 875/895/896/895A with clock multiplier selected
6990 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
6991 if (sym_verbose >= 2)
6992 printf ("%s: clock multiplier found\n", sym_name(np));
6993 np->multiplier = mult;
6997 * If multiplier not found or scntl3 not 7,5,3,
6998 * reset chip and get frequency from general purpose timer.
6999 * Otherwise trust scntl3 BIOS setting.
7001 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7002 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7003 f1 = sym_getfreq (np);
7006 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7008 if (f1 < 45000) f1 = 40000;
7009 else if (f1 < 55000) f1 = 50000;
7012 if (f1 < 80000 && mult > 1) {
7013 if (sym_verbose >= 2)
7014 printf ("%s: clock multiplier assumed\n",
7016 np->multiplier = mult;
7019 if ((scntl3 & 7) == 3) f1 = 40000;
7020 else if ((scntl3 & 7) == 5) f1 = 80000;
7023 f1 /= np->multiplier;
7027 * Compute controller synchronous parameters.
7029 f1 *= np->multiplier;
7034 * Get/probe PCI clock frequency
7036 static int sym_getpciclock (hcb_p np)
7041 * For the C1010-33, this doesn't work.
7042 * For the C1010-66, this will be tested when I'll have
7043 * such a beast to play with.
7045 if (!(np->features & FE_C10)) {
7046 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7047 f = (int) sym_getfreq (np);
7048 OUTB (nc_stest1, 0);
7055 /*============= DRIVER ACTION/COMPLETION ====================*/
7058 * Print something that tells about extended errors.
7060 static void sym_print_xerr(ccb_p cp, int x_status)
7062 if (x_status & XE_PARITY_ERR) {
7064 printf ("unrecovered SCSI parity error.\n");
7066 if (x_status & XE_EXTRA_DATA) {
7068 printf ("extraneous data discarded.\n");
7070 if (x_status & XE_BAD_PHASE) {
7072 printf ("illegal scsi phase (4/5).\n");
7074 if (x_status & XE_SODL_UNRUN) {
7076 printf ("ODD transfer in DATA OUT phase.\n");
7078 if (x_status & XE_SWIDE_OVRUN) {
7080 printf ("ODD transfer in DATA IN phase.\n");
7085 * Choose the more appropriate CAM status if
7086 * the IO encountered an extended error.
7088 static int sym_xerr_cam_status(int cam_status, int x_status)
7091 if (x_status & XE_PARITY_ERR)
7092 cam_status = CAM_UNCOR_PARITY;
7093 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7094 cam_status = CAM_DATA_RUN_ERR;
7095 else if (x_status & XE_BAD_PHASE)
7096 cam_status = CAM_REQ_CMP_ERR;
7098 cam_status = CAM_REQ_CMP_ERR;
7104 * Complete execution of a SCSI command with extented
7105 * error, SCSI status error, or having been auto-sensed.
7107 * The SCRIPTS processor is not running there, so we
7108 * can safely access IO registers and remove JOBs from
7110 * SCRATCHA is assumed to have been loaded with STARTPOS
7111 * before the SCRIPTS called the C code.
7113 static void sym_complete_error (hcb_p np, ccb_p cp)
7115 struct ccb_scsiio *csio;
7117 int i, sense_returned;
7119 SYM_LOCK_ASSERT(MA_OWNED);
7122 * Paranoid check. :)
7124 if (!cp || !cp->cam_ccb)
7127 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7128 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7129 cp->host_status, cp->ssss_status, cp->host_flags,
7130 cp->target, cp->lun);
7135 * Get CAM command pointer.
7137 csio = &cp->cam_ccb->csio;
7140 * Check for extended errors.
7142 if (cp->xerr_status) {
7144 sym_print_xerr(cp, cp->xerr_status);
7145 if (cp->host_status == HS_COMPLETE)
7146 cp->host_status = HS_COMP_ERR;
7150 * Calculate the residual.
7152 csio->sense_resid = 0;
7153 csio->resid = sym_compute_residual(np, cp);
7155 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7156 csio->resid = 0; /* throw them away. :) */
7160 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7161 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7162 csio->sense_resid = csio->resid; /* Swap residuals */
7163 csio->resid = cp->sv_resid;
7165 if (sym_verbose && cp->sv_xerr_status)
7166 sym_print_xerr(cp, cp->sv_xerr_status);
7167 if (cp->host_status == HS_COMPLETE &&
7168 cp->ssss_status == S_GOOD &&
7169 cp->xerr_status == 0) {
7170 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7171 cp->sv_xerr_status);
7172 cam_status |= CAM_AUTOSNS_VALID;
7174 * Bounce back the sense data to user and
7177 bzero(&csio->sense_data, sizeof(csio->sense_data));
7178 sense_returned = SYM_SNS_BBUF_LEN - csio->sense_resid;
7179 if (sense_returned < csio->sense_len)
7180 csio->sense_resid = csio->sense_len -
7183 csio->sense_resid = 0;
7184 bcopy(cp->sns_bbuf, &csio->sense_data,
7185 MIN(csio->sense_len, sense_returned));
7188 * If the device reports a UNIT ATTENTION condition
7189 * due to a RESET condition, we should consider all
7190 * disconnect CCBs for this unit as aborted.
7194 p = (u_char *) csio->sense_data;
7195 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7196 sym_clear_tasks(np, CAM_REQ_ABORTED,
7197 cp->target,cp->lun, -1);
7202 cam_status = CAM_AUTOSENSE_FAIL;
7204 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7205 csio->scsi_status = cp->ssss_status;
7206 cam_status = CAM_SCSI_STATUS_ERROR;
7208 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7209 cam_status = CAM_SEL_TIMEOUT;
7210 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7211 cam_status = CAM_UNEXP_BUSFREE;
7212 else { /* Extended error */
7215 printf ("COMMAND FAILED (%x %x %x).\n",
7216 cp->host_status, cp->ssss_status,
7219 csio->scsi_status = cp->ssss_status;
7221 * Set the most appropriate value for CAM status.
7223 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7228 * Dequeue all queued CCBs for that device
7229 * not yet started by SCRIPTS.
7231 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7232 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7235 * Restart the SCRIPTS processor.
7237 OUTL_DSP (SCRIPTA_BA (np, start));
7240 * Synchronize DMA map if needed.
7242 if (cp->dmamapped) {
7243 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7244 (cp->dmamapped == SYM_DMA_READ ?
7245 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7248 * Add this one to the COMP queue.
7249 * Complete all those commands with either error
7250 * or requeue condition.
7252 sym_set_cam_status((union ccb *) csio, cam_status);
7253 sym_remque(&cp->link_ccbq);
7254 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7255 sym_flush_comp_queue(np, 0);
7259 * Complete execution of a successful SCSI command.
7261 * Only successful commands go to the DONE queue,
7262 * since we need to have the SCRIPTS processor
7263 * stopped on any error condition.
7264 * The SCRIPTS processor is running while we are
7265 * completing successful commands.
7267 static void sym_complete_ok (hcb_p np, ccb_p cp)
7269 struct ccb_scsiio *csio;
7273 SYM_LOCK_ASSERT(MA_OWNED);
7276 * Paranoid check. :)
7278 if (!cp || !cp->cam_ccb)
7280 assert (cp->host_status == HS_COMPLETE);
7283 * Get command, target and lun pointers.
7285 csio = &cp->cam_ccb->csio;
7286 tp = &np->target[cp->target];
7287 lp = sym_lp(tp, cp->lun);
7290 * Assume device discovered on first success.
7293 sym_set_bit(tp->lun_map, cp->lun);
7296 * If all data have been transferred, given than no
7297 * extended error did occur, there is no residual.
7300 if (cp->phys.head.lastp != cp->phys.head.goalp)
7301 csio->resid = sym_compute_residual(np, cp);
7304 * Wrong transfer residuals may be worse than just always
7305 * returning zero. User can disable this feature from
7306 * sym_conf.h. Residual support is enabled by default.
7308 if (!SYM_CONF_RESIDUAL_SUPPORT)
7312 * Synchronize DMA map if needed.
7314 if (cp->dmamapped) {
7315 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7316 (cp->dmamapped == SYM_DMA_READ ?
7317 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7320 * Set status and complete the command.
7322 csio->scsi_status = cp->ssss_status;
7323 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7324 sym_xpt_done(np, (union ccb *) csio, cp);
7325 sym_free_ccb(np, cp);
7329 * Our callout handler
7331 static void sym_callout(void *arg)
7333 union ccb *ccb = (union ccb *) arg;
7334 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7337 * Check that the CAM CCB is still queued.
7344 switch(ccb->ccb_h.func_code) {
7346 (void) sym_abort_scsiio(np, ccb, 1);
7358 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7363 SYM_LOCK_ASSERT(MA_OWNED);
7366 * Look up our CCB control block.
7369 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7370 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7371 if (cp2->cam_ccb == ccb) {
7376 if (!cp || cp->host_status == HS_WAIT)
7380 * If a previous abort didn't succeed in time,
7381 * perform a BUS reset.
7384 sym_reset_scsi_bus(np, 1);
7389 * Mark the CCB for abort and allow time for.
7391 cp->to_abort = timed_out ? 2 : 1;
7392 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7395 * Tell the SCRIPTS processor to stop and synchronize with us.
7397 np->istat_sem = SEM;
7398 OUTB (nc_istat, SIGP|SEM);
7403 * Reset a SCSI device (all LUNs of a target).
7405 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7408 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7410 SYM_LOCK_ASSERT(MA_OWNED);
7412 if (ccb_h->target_id == np->myaddr ||
7413 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7414 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7415 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7419 tp = &np->target[ccb_h->target_id];
7422 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7424 np->istat_sem = SEM;
7425 OUTB (nc_istat, SIGP|SEM);
7429 * SIM action entry point.
7431 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7438 u_char idmsg, *msgptr;
7440 struct ccb_scsiio *csio;
7441 struct ccb_hdr *ccb_h;
7443 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7446 * Retrieve our controller data structure.
7448 np = (hcb_p) cam_sim_softc(sim);
7450 SYM_LOCK_ASSERT(MA_OWNED);
7453 * The common case is SCSI IO.
7454 * We deal with other ones elsewhere.
7456 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7457 sym_action2(sim, ccb);
7461 ccb_h = &csio->ccb_h;
7464 * Work around races.
7466 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7472 * Minimal checkings, so that we will not
7473 * go outside our tables.
7475 if (ccb_h->target_id == np->myaddr ||
7476 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7477 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7478 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7483 * Retrieve the target and lun descriptors.
7485 tp = &np->target[ccb_h->target_id];
7486 lp = sym_lp(tp, ccb_h->target_lun);
7489 * Complete the 1st INQUIRY command with error
7490 * condition if the device is flagged NOSCAN
7491 * at BOOT in the NVRAM. This may speed up
7492 * the boot and maintain coherency with BIOS
7493 * device numbering. Clearing the flag allows
7494 * user to rescan skipped devices later.
7495 * We also return error for devices not flagged
7496 * for SCAN LUNS in the NVRAM since some mono-lun
7497 * devices behave badly when asked for some non
7498 * zero LUN. Btw, this is an absolute hack.:-)
7500 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7501 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7502 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7503 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7504 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7505 ccb_h->target_lun != 0)) {
7506 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7507 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7513 * Get a control block for this IO.
7515 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7516 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7518 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7523 * Keep track of the IO in our CCB.
7528 * Build the IDENTIFY message.
7530 idmsg = M_IDENTIFY | cp->lun;
7531 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7534 msgptr = cp->scsi_smsg;
7536 msgptr[msglen++] = idmsg;
7539 * Build the tag message if present.
7541 if (cp->tag != NO_TAG) {
7542 u_char order = csio->tag_action;
7550 order = M_SIMPLE_TAG;
7552 msgptr[msglen++] = order;
7555 * For less than 128 tags, actual tags are numbered
7556 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7557 * with devices that have problems with #TAG 0 or too
7558 * great #TAG numbers. For more tags (up to 256),
7559 * we use directly our tag number.
7561 #if SYM_CONF_MAX_TASK > (512/4)
7562 msgptr[msglen++] = cp->tag;
7564 msgptr[msglen++] = (cp->tag << 1) + 1;
7569 * Build a negotiation message if needed.
7570 * (nego_status is filled by sym_prepare_nego())
7572 cp->nego_status = 0;
7573 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7574 tp->tinfo.current.period != tp->tinfo.goal.period ||
7575 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7576 tp->tinfo.current.options != tp->tinfo.goal.options) {
7577 if (!tp->nego_cp && lp)
7578 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7588 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7589 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7594 cp->phys.select.sel_id = cp->target;
7595 cp->phys.select.sel_scntl3 = tp->head.wval;
7596 cp->phys.select.sel_sxfer = tp->head.sval;
7597 cp->phys.select.sel_scntl4 = tp->head.uval;
7602 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7603 cp->phys.smsg.size = cpu_to_scr(msglen);
7608 if (sym_setup_cdb(np, csio, cp) < 0) {
7609 sym_xpt_done(np, ccb, cp);
7610 sym_free_ccb(np, cp);
7617 #if 0 /* Provision */
7618 cp->actualquirks = tp->quirks;
7620 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7621 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7622 cp->ssss_status = S_ILLEGAL;
7623 cp->xerr_status = 0;
7625 cp->extra_bytes = 0;
7628 * extreme data pointer.
7629 * shall be positive, so -1 is lower than lowest.:)
7635 * Build the data descriptor block
7638 sym_setup_data_and_start(np, csio, cp);
7642 * Setup buffers and pointers that address the CDB.
7643 * I bet, physical CDBs will never be used on the planet,
7644 * since they can be bounced without significant overhead.
7646 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7648 struct ccb_hdr *ccb_h;
7652 SYM_LOCK_ASSERT(MA_OWNED);
7654 ccb_h = &csio->ccb_h;
7657 * CDB is 16 bytes max.
7659 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7660 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7663 cmd_len = csio->cdb_len;
7665 if (ccb_h->flags & CAM_CDB_POINTER) {
7666 /* CDB is a pointer */
7667 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7668 /* CDB pointer is virtual */
7669 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7670 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7672 /* CDB pointer is physical */
7674 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7676 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7681 /* CDB is in the CAM ccb (buffer) */
7682 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7683 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7686 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7687 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7693 * Set up data pointers used by SCRIPTS.
7695 static void __inline
7696 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7700 SYM_LOCK_ASSERT(MA_OWNED);
7703 * No segments means no data.
7709 * Set the data pointer.
7713 goalp = SCRIPTA_BA (np, data_out2) + 8;
7714 lastp = goalp - 8 - (cp->segments * (2*4));
7717 cp->host_flags |= HF_DATA_IN;
7718 goalp = SCRIPTA_BA (np, data_in2) + 8;
7719 lastp = goalp - 8 - (cp->segments * (2*4));
7723 lastp = goalp = SCRIPTB_BA (np, no_data);
7727 cp->phys.head.lastp = cpu_to_scr(lastp);
7728 cp->phys.head.goalp = cpu_to_scr(goalp);
7729 cp->phys.head.savep = cpu_to_scr(lastp);
7730 cp->startp = cp->phys.head.savep;
7734 * Call back routine for the DMA map service.
7735 * If bounce buffers are used (why ?), we may sleep and then
7736 * be called there in another context.
7739 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7747 np = (hcb_p) cp->arg;
7749 SYM_LOCK_ASSERT(MA_OWNED);
7752 * Deal with weird races.
7754 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7758 * Deal with weird errors.
7762 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7767 * Build the data descriptor for the chip.
7771 /* 896 rev 1 requires to be careful about boundaries */
7772 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7773 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7775 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7777 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7783 * Synchronize the DMA map only if we have
7784 * actually mapped the data.
7786 if (cp->dmamapped) {
7787 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7788 (cp->dmamapped == SYM_DMA_READ ?
7789 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7793 * Set host status to busy state.
7794 * May have been set back to HS_WAIT to avoid a race.
7796 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7799 * Set data pointers.
7801 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7804 * Enqueue this IO in our pending queue.
7806 sym_enqueue_cam_ccb(cp);
7809 * When `#ifed 1', the code below makes the driver
7810 * panic on the first attempt to write to a SCSI device.
7811 * It is the first test we want to do after a driver
7812 * change that does not seem obviously safe. :)
7815 switch (cp->cdb_buf[0]) {
7816 case 0x0A: case 0x2A: case 0xAA:
7817 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7825 * Activate this job.
7827 sym_put_start_queue(np, cp);
7830 sym_xpt_done(np, ccb, cp);
7831 sym_free_ccb(np, cp);
7835 * How complex it gets to deal with the data in CAM.
7836 * The Bus Dma stuff makes things still more complex.
7839 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7841 struct ccb_hdr *ccb_h;
7844 SYM_LOCK_ASSERT(MA_OWNED);
7846 ccb_h = &csio->ccb_h;
7849 * Now deal with the data.
7851 cp->data_len = csio->dxfer_len;
7855 * No direction means no data.
7857 dir = (ccb_h->flags & CAM_DIR_MASK);
7858 if (dir == CAM_DIR_NONE) {
7859 sym_execute_ccb(cp, NULL, 0, 0);
7863 cp->dmamapped = (dir == CAM_DIR_IN) ? SYM_DMA_READ : SYM_DMA_WRITE;
7864 retv = bus_dmamap_load_ccb(np->data_dmat, cp->dmamap,
7865 (union ccb *)csio, sym_execute_ccb, cp, 0);
7866 if (retv == EINPROGRESS) {
7867 cp->host_status = HS_WAIT;
7868 xpt_freeze_simq(np->sim, 1);
7869 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7874 * Move the scatter list to our data block.
7877 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7878 bus_dma_segment_t *psegs, int nsegs)
7880 struct sym_tblmove *data;
7881 bus_dma_segment_t *psegs2;
7883 SYM_LOCK_ASSERT(MA_OWNED);
7885 if (nsegs > SYM_CONF_MAX_SG)
7888 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7889 psegs2 = &psegs[nsegs-1];
7890 cp->segments = nsegs;
7893 data->addr = cpu_to_scr(psegs2->ds_addr);
7894 data->size = cpu_to_scr(psegs2->ds_len);
7895 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7896 printf ("%s scatter: paddr=%lx len=%ld\n",
7897 sym_name(np), (long) psegs2->ds_addr,
7898 (long) psegs2->ds_len);
7900 if (psegs2 != psegs) {
7911 * Scatter a SG list with physical addresses into bus addressable chunks.
7914 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7920 SYM_LOCK_ASSERT(MA_OWNED);
7922 s = SYM_CONF_MAX_SG - 1;
7924 ps = psegs[t].ds_addr;
7925 pe = ps + psegs[t].ds_len;
7928 pn = (pe - 1) & ~(SYM_CONF_DMA_BOUNDARY - 1);
7932 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7933 printf ("%s scatter: paddr=%lx len=%ld\n",
7934 sym_name(np), pn, k);
7936 cp->phys.data[s].addr = cpu_to_scr(pn);
7937 cp->phys.data[s].size = cpu_to_scr(k);
7942 ps = psegs[t].ds_addr;
7943 pe = ps + psegs[t].ds_len;
7949 cp->segments = SYM_CONF_MAX_SG - 1 - s;
7951 return t >= 0 ? -1 : 0;
7955 * SIM action for non performance critical stuff.
7957 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
7959 union ccb *abort_ccb;
7960 struct ccb_hdr *ccb_h;
7961 struct ccb_pathinq *cpi;
7962 struct ccb_trans_settings *cts;
7963 struct sym_trans *tip;
7970 * Retrieve our controller data structure.
7972 np = (hcb_p) cam_sim_softc(sim);
7974 SYM_LOCK_ASSERT(MA_OWNED);
7976 ccb_h = &ccb->ccb_h;
7978 switch (ccb_h->func_code) {
7979 case XPT_SET_TRAN_SETTINGS:
7981 tp = &np->target[ccb_h->target_id];
7984 * Update SPI transport settings in TARGET control block.
7985 * Update SCSI device settings in LUN control block.
7987 lp = sym_lp(tp, ccb_h->target_lun);
7988 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7989 sym_update_trans(np, &tp->tinfo.goal, cts);
7991 sym_update_dflags(np, &lp->current_flags, cts);
7993 if (cts->type == CTS_TYPE_USER_SETTINGS) {
7994 sym_update_trans(np, &tp->tinfo.user, cts);
7996 sym_update_dflags(np, &lp->user_flags, cts);
7999 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8001 case XPT_GET_TRAN_SETTINGS:
8003 tp = &np->target[ccb_h->target_id];
8004 lp = sym_lp(tp, ccb_h->target_lun);
8006 #define cts__scsi (&cts->proto_specific.scsi)
8007 #define cts__spi (&cts->xport_specific.spi)
8008 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8009 tip = &tp->tinfo.current;
8010 dflags = lp ? lp->current_flags : 0;
8013 tip = &tp->tinfo.user;
8014 dflags = lp ? lp->user_flags : tp->usrflags;
8017 cts->protocol = PROTO_SCSI;
8018 cts->transport = XPORT_SPI;
8019 cts->protocol_version = tip->scsi_version;
8020 cts->transport_version = tip->spi_version;
8022 cts__spi->sync_period = tip->period;
8023 cts__spi->sync_offset = tip->offset;
8024 cts__spi->bus_width = tip->width;
8025 cts__spi->ppr_options = tip->options;
8027 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8028 | CTS_SPI_VALID_SYNC_OFFSET
8029 | CTS_SPI_VALID_BUS_WIDTH
8030 | CTS_SPI_VALID_PPR_OPTIONS;
8032 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8033 if (dflags & SYM_DISC_ENABLED)
8034 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8035 cts__spi->valid |= CTS_SPI_VALID_DISC;
8037 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8038 if (dflags & SYM_TAGS_ENABLED)
8039 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8040 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8043 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8045 case XPT_CALC_GEOMETRY:
8046 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8047 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8051 cpi->version_num = 1;
8052 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8053 if ((np->features & FE_WIDE) != 0)
8054 cpi->hba_inquiry |= PI_WIDE_16;
8055 cpi->target_sprt = 0;
8056 cpi->hba_misc = PIM_UNMAPPED;
8057 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8058 cpi->hba_misc |= PIM_SCANHILO;
8059 if (np->usrflags & SYM_AVOID_BUS_RESET)
8060 cpi->hba_misc |= PIM_NOBUSRESET;
8061 cpi->hba_eng_cnt = 0;
8062 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8063 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8064 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8065 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8066 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8067 cpi->bus_id = cam_sim_bus(sim);
8068 cpi->initiator_id = np->myaddr;
8069 cpi->base_transfer_speed = 3300;
8070 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8071 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8072 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8073 cpi->unit_number = cam_sim_unit(sim);
8075 cpi->protocol = PROTO_SCSI;
8076 cpi->protocol_version = SCSI_REV_2;
8077 cpi->transport = XPORT_SPI;
8078 cpi->transport_version = 2;
8079 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8080 if (np->features & FE_ULTRA3) {
8081 cpi->transport_version = 3;
8082 cpi->xport_specific.spi.ppr_options =
8083 SID_SPI_CLOCK_DT_ST;
8085 cpi->maxio = SYM_CONF_MAX_SG * PAGE_SIZE;
8086 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8089 abort_ccb = ccb->cab.abort_ccb;
8090 switch(abort_ccb->ccb_h.func_code) {
8092 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8093 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8097 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8102 sym_reset_dev(np, ccb);
8105 sym_reset_scsi_bus(np, 0);
8107 xpt_print_path(np->path);
8108 printf("SCSI BUS reset delivered.\n");
8111 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8113 case XPT_ACCEPT_TARGET_IO:
8114 case XPT_CONT_TARGET_IO:
8116 case XPT_NOTIFY_ACK:
8117 case XPT_IMMED_NOTIFY:
8120 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8126 * Asynchronous notification handler.
8129 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *args __unused)
8132 struct cam_sim *sim;
8136 sim = (struct cam_sim *) cb_arg;
8137 np = (hcb_p) cam_sim_softc(sim);
8139 SYM_LOCK_ASSERT(MA_OWNED);
8142 case AC_LOST_DEVICE:
8143 tn = xpt_path_target_id(path);
8144 if (tn >= SYM_CONF_MAX_TARGET)
8147 tp = &np->target[tn];
8151 tp->head.wval = np->rv_scntl3;
8154 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8155 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8156 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8157 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8166 * Update transfer settings of a target.
8168 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
8169 struct ccb_trans_settings *cts)
8172 SYM_LOCK_ASSERT(MA_OWNED);
8177 #define cts__spi (&cts->xport_specific.spi)
8178 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8179 tip->width = cts__spi->bus_width;
8180 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8181 tip->offset = cts__spi->sync_offset;
8182 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8183 tip->period = cts__spi->sync_period;
8184 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8185 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8186 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8187 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8188 tip->scsi_version = cts->protocol_version;
8189 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8190 cts->transport_version != XPORT_VERSION_UNKNOWN)
8191 tip->spi_version = cts->transport_version;
8194 * Scale against driver configuration limits.
8196 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8197 if (tip->period && tip->offset) {
8198 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8199 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8206 * Scale against actual controller BUS width.
8208 if (tip->width > np->maxwide)
8209 tip->width = np->maxwide;
8212 * Only accept DT if controller supports and SYNC/WIDE asked.
8214 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8215 !(tip->width == BUS_16_BIT && tip->offset)) {
8216 tip->options &= ~PPR_OPT_DT;
8220 * Scale period factor and offset against controller limits.
8222 if (tip->offset && tip->period) {
8223 if (tip->options & PPR_OPT_DT) {
8224 if (tip->period < np->minsync_dt)
8225 tip->period = np->minsync_dt;
8226 if (tip->period > np->maxsync_dt)
8227 tip->period = np->maxsync_dt;
8228 if (tip->offset > np->maxoffs_dt)
8229 tip->offset = np->maxoffs_dt;
8232 if (tip->period < np->minsync)
8233 tip->period = np->minsync;
8234 if (tip->period > np->maxsync)
8235 tip->period = np->maxsync;
8236 if (tip->offset > np->maxoffs)
8237 tip->offset = np->maxoffs;
8243 * Update flags for a device (logical unit).
8246 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8249 SYM_LOCK_ASSERT(MA_OWNED);
8251 #define cts__scsi (&cts->proto_specific.scsi)
8252 #define cts__spi (&cts->xport_specific.spi)
8253 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8254 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8255 *flags |= SYM_DISC_ENABLED;
8257 *flags &= ~SYM_DISC_ENABLED;
8260 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8261 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8262 *flags |= SYM_TAGS_ENABLED;
8264 *flags &= ~SYM_TAGS_ENABLED;
8270 /*============= DRIVER INITIALISATION ==================*/
8272 static device_method_t sym_pci_methods[] = {
8273 DEVMETHOD(device_probe, sym_pci_probe),
8274 DEVMETHOD(device_attach, sym_pci_attach),
8278 static driver_t sym_pci_driver = {
8284 static devclass_t sym_devclass;
8286 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, NULL, NULL);
8287 MODULE_DEPEND(sym, cam, 1, 1, 1);
8288 MODULE_DEPEND(sym, pci, 1, 1, 1);
8290 static const struct sym_pci_chip sym_pci_dev_table[] = {
8291 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8294 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8295 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8299 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8300 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8303 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8306 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8307 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8309 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8310 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8312 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8313 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8315 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8316 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8319 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8320 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8323 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8324 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8327 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8328 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8331 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8332 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8333 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8337 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8338 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8342 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8343 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8344 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8346 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8347 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8348 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8350 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8351 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8352 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8355 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8356 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8357 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8360 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8361 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8362 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8365 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8366 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8367 FE_RAM|FE_IO256|FE_LEDC}
8371 * Look up the chip table.
8373 * Return a pointer to the chip entry if found,
8376 static const struct sym_pci_chip *
8377 sym_find_pci_chip(device_t dev)
8379 const struct sym_pci_chip *chip;
8384 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8387 device_id = pci_get_device(dev);
8388 revision = pci_get_revid(dev);
8390 for (i = 0; i < nitems(sym_pci_dev_table); i++) {
8391 chip = &sym_pci_dev_table[i];
8392 if (device_id != chip->device_id)
8394 if (revision > chip->revision_id)
8403 * Tell upper layer if the chip is supported.
8406 sym_pci_probe(device_t dev)
8408 const struct sym_pci_chip *chip;
8410 chip = sym_find_pci_chip(dev);
8411 if (chip && sym_find_firmware(chip)) {
8412 device_set_desc(dev, chip->name);
8413 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8414 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8420 * Attach a sym53c8xx device.
8423 sym_pci_attach(device_t dev)
8425 const struct sym_pci_chip *chip;
8428 struct sym_hcb *np = NULL;
8429 struct sym_nvram nvram;
8430 const struct sym_fw *fw = NULL;
8432 bus_dma_tag_t bus_dmat;
8434 bus_dmat = bus_get_dma_tag(dev);
8437 * Only probed devices should be attached.
8438 * We just enjoy being paranoid. :)
8440 chip = sym_find_pci_chip(dev);
8441 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8445 * Allocate immediately the host control block,
8446 * since we are only expecting to succeed. :)
8447 * We keep track in the HCB of all the resources that
8448 * are to be released on error.
8450 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8452 np->bus_dmat = bus_dmat;
8455 device_set_softc(dev, np);
8460 * Copy some useful infos to the HCB.
8462 np->hcb_ba = vtobus(np);
8463 np->verbose = bootverbose;
8465 np->device_id = pci_get_device(dev);
8466 np->revision_id = pci_get_revid(dev);
8467 np->features = chip->features;
8468 np->clock_divn = chip->nr_divisor;
8469 np->maxoffs = chip->offset_max;
8470 np->maxburst = chip->burst_max;
8471 np->scripta_sz = fw->a_size;
8472 np->scriptb_sz = fw->b_size;
8473 np->fw_setup = fw->setup;
8474 np->fw_patch = fw->patch;
8475 np->fw_name = fw->name;
8478 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8485 * Initialize the CCB free and busy queues.
8487 sym_que_init(&np->free_ccbq);
8488 sym_que_init(&np->busy_ccbq);
8489 sym_que_init(&np->comp_ccbq);
8490 sym_que_init(&np->cam_ccbq);
8493 * Allocate a tag for the DMA of user data.
8495 if (bus_dma_tag_create(np->bus_dmat, 1, SYM_CONF_DMA_BOUNDARY,
8496 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
8497 BUS_SPACE_MAXSIZE_32BIT, SYM_CONF_MAX_SG, SYM_CONF_DMA_BOUNDARY,
8498 0, busdma_lock_mutex, &np->mtx, &np->data_dmat)) {
8499 device_printf(dev, "failed to create DMA tag.\n");
8504 * Read and apply some fix-ups to the PCI COMMAND
8505 * register. We want the chip to be enabled for:
8507 * - PCI parity checking (reporting would also be fine)
8508 * - Write And Invalidate.
8510 command = pci_read_config(dev, PCIR_COMMAND, 2);
8511 command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
8513 pci_write_config(dev, PCIR_COMMAND, command, 2);
8516 * Let the device know about the cache line size,
8517 * if it doesn't yet.
8519 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8522 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8526 * Alloc/get/map/retrieve everything that deals with MMIO.
8528 if ((command & PCIM_CMD_MEMEN) != 0) {
8529 int regs_id = SYM_PCI_MMIO;
8530 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8531 ®s_id, RF_ACTIVE);
8533 if (!np->mmio_res) {
8534 device_printf(dev, "failed to allocate MMIO resources\n");
8537 np->mmio_ba = rman_get_start(np->mmio_res);
8543 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8544 RF_ACTIVE | RF_SHAREABLE);
8546 device_printf(dev, "failed to allocate IRQ resource\n");
8550 #ifdef SYM_CONF_IOMAPPED
8552 * User want us to use normal IO with PCI.
8553 * Alloc/get/map/retrieve everything that deals with IO.
8555 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
8556 int regs_id = SYM_PCI_IO;
8557 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
8558 ®s_id, RF_ACTIVE);
8561 device_printf(dev, "failed to allocate IO resources\n");
8565 #endif /* SYM_CONF_IOMAPPED */
8568 * If the chip has RAM.
8569 * Alloc/get/map/retrieve the corresponding resources.
8571 if ((np->features & (FE_RAM|FE_RAM8K)) &&
8572 (command & PCIM_CMD_MEMEN) != 0) {
8573 int regs_id = SYM_PCI_RAM;
8574 if (np->features & FE_64BIT)
8575 regs_id = SYM_PCI_RAM64;
8576 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8577 ®s_id, RF_ACTIVE);
8579 device_printf(dev,"failed to allocate RAM resources\n");
8582 np->ram_id = regs_id;
8583 np->ram_ba = rman_get_start(np->ram_res);
8587 * Save setting of some IO registers, so we will
8588 * be able to probe specific implementations.
8590 sym_save_initial_setting (np);
8593 * Reset the chip now, since it has been reported
8594 * that SCSI clock calibration may not work properly
8595 * if the chip is currently active.
8597 sym_chip_reset (np);
8600 * Try to read the user set-up.
8602 (void) sym_read_nvram(np, &nvram);
8605 * Prepare controller and devices settings, according
8606 * to chip features, user set-up and driver set-up.
8608 (void) sym_prepare_setting(np, &nvram);
8611 * Check the PCI clock frequency.
8612 * Must be performed after prepare_setting since it destroys
8613 * STEST1 that is used to probe for the clock doubler.
8615 i = sym_getpciclock(np);
8617 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8620 * Allocate the start queue.
8622 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8625 np->squeue_ba = vtobus(np->squeue);
8628 * Allocate the done queue.
8630 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8633 np->dqueue_ba = vtobus(np->dqueue);
8636 * Allocate the target bus address array.
8638 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8641 np->targtbl_ba = vtobus(np->targtbl);
8644 * Allocate SCRIPTS areas.
8646 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8647 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8648 if (!np->scripta0 || !np->scriptb0)
8652 * Allocate the CCBs. We need at least ONE.
8654 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8660 * Calculate BUS addresses where we are going
8661 * to load the SCRIPTS.
8663 np->scripta_ba = vtobus(np->scripta0);
8664 np->scriptb_ba = vtobus(np->scriptb0);
8665 np->scriptb0_ba = np->scriptb_ba;
8668 np->scripta_ba = np->ram_ba;
8669 if (np->features & FE_RAM8K) {
8671 np->scriptb_ba = np->scripta_ba + 4096;
8673 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8681 * Copy scripts to controller instance.
8683 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8684 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8687 * Setup variable parts in scripts and compute
8688 * scripts bus addresses used from the C code.
8690 np->fw_setup(np, fw);
8693 * Bind SCRIPTS with physical addresses usable by the
8694 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8696 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8697 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8699 #ifdef SYM_CONF_IARB_SUPPORT
8701 * If user wants IARB to be set when we win arbitration
8702 * and have other jobs, compute the max number of consecutive
8703 * settings of IARB hints before we leave devices a chance to
8704 * arbitrate for reselection.
8706 #ifdef SYM_SETUP_IARB_MAX
8707 np->iarb_max = SYM_SETUP_IARB_MAX;
8714 * Prepare the idle and invalid task actions.
8716 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8717 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8718 np->idletask_ba = vtobus(&np->idletask);
8720 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8721 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8722 np->notask_ba = vtobus(&np->notask);
8724 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8725 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8726 np->bad_itl_ba = vtobus(&np->bad_itl);
8728 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8729 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8730 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8733 * Allocate and prepare the lun JUMP table that is used
8734 * for a target prior the probing of devices (bad lun table).
8735 * A private table will be allocated for the target on the
8736 * first INQUIRY response received.
8738 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8742 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8743 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8744 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8747 * Prepare the bus address array that contains the bus
8748 * address of each target control block.
8749 * For now, assume all logical units are wrong. :)
8751 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8752 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8753 np->target[i].head.luntbl_sa =
8754 cpu_to_scr(vtobus(np->badluntbl));
8755 np->target[i].head.lun0_sa =
8756 cpu_to_scr(vtobus(&np->badlun_sa));
8760 * Now check the cache handling of the pci chipset.
8762 if (sym_snooptest (np)) {
8763 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8768 * Now deal with CAM.
8769 * Hopefully, we will succeed with that one.:)
8771 if (!sym_cam_attach(np))
8775 * Sigh! we are done.
8781 * We will try to free all the resources we have
8782 * allocated, but if we are a boot device, this
8783 * will not help that much.;)
8792 * Free everything that have been allocated for this device.
8794 static void sym_pci_free(hcb_p np)
8803 * First free CAM resources.
8808 * Now every should be quiet for us to
8809 * free other resources.
8812 bus_release_resource(np->device, SYS_RES_MEMORY,
8813 np->ram_id, np->ram_res);
8815 bus_release_resource(np->device, SYS_RES_MEMORY,
8816 SYM_PCI_MMIO, np->mmio_res);
8818 bus_release_resource(np->device, SYS_RES_IOPORT,
8819 SYM_PCI_IO, np->io_res);
8821 bus_release_resource(np->device, SYS_RES_IRQ,
8825 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8827 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8829 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8831 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8833 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8834 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8835 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8836 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8837 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8841 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8843 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8844 tp = &np->target[target];
8845 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8846 lp = sym_lp(tp, lun);
8850 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8853 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8855 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8857 #if SYM_CONF_MAX_LUN > 1
8859 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8865 sym_mfree_dma(np->target,
8866 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8869 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8871 bus_dma_tag_destroy(np->data_dmat);
8872 if (SYM_LOCK_INITIALIZED() != 0)
8874 device_set_softc(np->device, NULL);
8875 sym_mfree_dma(np, sizeof(*np), "HCB");
8879 * Allocate CAM resources and register a bus to CAM.
8881 static int sym_cam_attach(hcb_p np)
8883 struct cam_devq *devq = NULL;
8884 struct cam_sim *sim = NULL;
8885 struct cam_path *path = NULL;
8889 * Establish our interrupt handler.
8891 err = bus_setup_intr(np->device, np->irq_res,
8892 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8893 NULL, sym_intr, np, &np->intr);
8895 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8901 * Create the device queue for our sym SIM.
8903 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8908 * Construct our SIM entry.
8910 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
8911 device_get_unit(np->device),
8912 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
8918 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
8922 if (xpt_create_path(&path, NULL,
8923 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
8924 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
8930 * Establish our async notification handler.
8932 if (xpt_register_async(AC_LOST_DEVICE, sym_async, sim, path) !=
8937 * Start the chip now, without resetting the BUS, since
8938 * it seems that this must stay under control of CAM.
8939 * With LVD/SE capable chips and BUS in SE mode, we may
8940 * get a spurious SMBC interrupt.
8949 cam_sim_free(sim, FALSE);
8951 cam_simq_free(devq);
8961 * Free everything that deals with CAM.
8963 static void sym_cam_free(hcb_p np)
8966 SYM_LOCK_ASSERT(MA_NOTOWNED);
8969 bus_teardown_intr(np->device, np->irq_res, np->intr);
8976 xpt_bus_deregister(cam_sim_path(np->sim));
8977 cam_sim_free(np->sim, /*free_devq*/ TRUE);
8981 xpt_free_path(np->path);
8988 /*============ OPTIONNAL NVRAM SUPPORT =================*/
8991 * Get host setup from NVRAM.
8993 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
8995 #ifdef SYM_CONF_NVRAM_SUPPORT
8997 * Get parity checking, host ID, verbose mode
8998 * and miscellaneous host flags from NVRAM.
9000 switch(nvram->type) {
9001 case SYM_SYMBIOS_NVRAM:
9002 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9003 np->rv_scntl0 &= ~0x0a;
9004 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9005 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9007 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9008 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9009 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9010 np->usrflags |= SYM_AVOID_BUS_RESET;
9012 case SYM_TEKRAM_NVRAM:
9013 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9022 * Get target setup from NVRAM.
9024 #ifdef SYM_CONF_NVRAM_SUPPORT
9025 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9026 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9030 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9032 #ifdef SYM_CONF_NVRAM_SUPPORT
9034 case SYM_SYMBIOS_NVRAM:
9035 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9037 case SYM_TEKRAM_NVRAM:
9038 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9046 #ifdef SYM_CONF_NVRAM_SUPPORT
9048 * Get target set-up from Symbios format NVRAM.
9051 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9053 tcb_p tp = &np->target[target];
9054 Symbios_target *tn = &nvram->target[target];
9056 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9057 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9059 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9061 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9062 tp->usrflags &= ~SYM_DISC_ENABLED;
9063 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9064 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9065 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9066 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9070 * Get target set-up from Tekram format NVRAM.
9073 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9075 tcb_p tp = &np->target[target];
9076 struct Tekram_target *tn = &nvram->target[target];
9079 if (tn->flags & TEKRAM_SYNC_NEGO) {
9080 i = tn->sync_index & 0xf;
9081 tp->tinfo.user.period = Tekram_sync[i];
9084 tp->tinfo.user.width =
9085 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9087 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9088 tp->usrtags = 2 << nvram->max_tags_index;
9091 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9092 tp->usrflags |= SYM_DISC_ENABLED;
9094 /* If any device does not support parity, we will not use this option */
9095 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9096 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9099 #ifdef SYM_CONF_DEBUG_NVRAM
9101 * Dump Symbios format NVRAM for debugging purpose.
9103 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9107 /* display Symbios nvram host data */
9108 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9109 sym_name(np), nvram->host_id & 0x0f,
9110 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9111 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9112 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9113 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9114 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9115 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9117 /* display Symbios nvram drive data */
9118 for (i = 0 ; i < 15 ; i++) {
9119 struct Symbios_target *tn = &nvram->target[i];
9120 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9122 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9123 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9124 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9125 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9127 tn->sync_period / 4,
9133 * Dump TEKRAM format NVRAM for debugging purpose.
9135 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9136 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9138 int i, tags, boot_delay;
9141 /* display Tekram nvram host data */
9142 tags = 2 << nvram->max_tags_index;
9144 if (nvram->boot_delay_index < 6)
9145 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9146 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9148 case 0: rem = ""; break;
9149 case 1: rem = " REMOVABLE=boot device"; break;
9150 case 2: rem = " REMOVABLE=all"; break;
9153 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9154 sym_name(np), nvram->host_id & 0x0f,
9155 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9156 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9157 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9158 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9159 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9160 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9161 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9162 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9163 rem, boot_delay, tags);
9165 /* display Tekram nvram drive data */
9166 for (i = 0; i <= 15; i++) {
9168 struct Tekram_target *tn = &nvram->target[i];
9169 j = tn->sync_index & 0xf;
9170 sync = Tekram_sync[j];
9171 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9173 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9174 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9175 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9176 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9177 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9178 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9182 #endif /* SYM_CONF_DEBUG_NVRAM */
9183 #endif /* SYM_CONF_NVRAM_SUPPORT */
9186 * Try reading Symbios or Tekram NVRAM
9188 #ifdef SYM_CONF_NVRAM_SUPPORT
9189 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9190 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9193 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9195 #ifdef SYM_CONF_NVRAM_SUPPORT
9197 * Try to read SYMBIOS nvram.
9198 * Try to read TEKRAM nvram if Symbios nvram not found.
9200 if (SYM_SETUP_SYMBIOS_NVRAM &&
9201 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9202 nvp->type = SYM_SYMBIOS_NVRAM;
9203 #ifdef SYM_CONF_DEBUG_NVRAM
9204 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9207 else if (SYM_SETUP_TEKRAM_NVRAM &&
9208 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9209 nvp->type = SYM_TEKRAM_NVRAM;
9210 #ifdef SYM_CONF_DEBUG_NVRAM
9211 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9222 #ifdef SYM_CONF_NVRAM_SUPPORT
9224 * 24C16 EEPROM reading.
9226 * GPOI0 - data in/data out
9228 * Symbios NVRAM wiring now also used by Tekram.
9237 * Set/clear data/clock bit in GPIO0
9239 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9245 *gpreg |= write_bit;
9258 OUTB (nc_gpreg, *gpreg);
9263 * Send START condition to NVRAM to wake it up.
9265 static void S24C16_start(hcb_p np, u_char *gpreg)
9267 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9268 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9269 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9270 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9274 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9276 static void S24C16_stop(hcb_p np, u_char *gpreg)
9278 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9279 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9283 * Read or write a bit to the NVRAM,
9284 * read if GPIO0 input else write if GPIO0 output
9286 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9289 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9290 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9292 *read_bit = INB (nc_gpreg);
9293 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9294 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9298 * Output an ACK to the NVRAM after reading,
9299 * change GPIO0 to output and when done back to an input
9301 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9304 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9305 S24C16_do_bit(np, 0, write_bit, gpreg);
9306 OUTB (nc_gpcntl, *gpcntl);
9310 * Input an ACK from NVRAM after writing,
9311 * change GPIO0 to input and when done back to an output
9313 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9316 OUTB (nc_gpcntl, *gpcntl | 0x01);
9317 S24C16_do_bit(np, read_bit, 1, gpreg);
9318 OUTB (nc_gpcntl, *gpcntl);
9322 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9323 * GPIO0 must already be set as an output
9325 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9326 u_char *gpreg, u_char *gpcntl)
9330 for (x = 0; x < 8; x++)
9331 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9333 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9337 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9338 * GPIO0 must already be set as an input
9340 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9341 u_char *gpreg, u_char *gpcntl)
9347 for (x = 0; x < 8; x++) {
9348 S24C16_do_bit(np, &read_bit, 1, gpreg);
9349 *read_data |= ((read_bit & 0x01) << (7 - x));
9352 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9356 * Read 'len' bytes starting at 'offset'.
9358 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9360 u_char gpcntl, gpreg;
9361 u_char old_gpcntl, old_gpreg;
9366 /* save current state of GPCNTL and GPREG */
9367 old_gpreg = INB (nc_gpreg);
9368 old_gpcntl = INB (nc_gpcntl);
9369 gpcntl = old_gpcntl & 0x1c;
9371 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9372 OUTB (nc_gpreg, old_gpreg);
9373 OUTB (nc_gpcntl, gpcntl);
9375 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9377 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9378 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9380 /* now set NVRAM inactive with GPIO0/1 both high */
9381 S24C16_stop(np, &gpreg);
9383 /* activate NVRAM */
9384 S24C16_start(np, &gpreg);
9386 /* write device code and random address MSB */
9387 S24C16_write_byte(np, &ack_data,
9388 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9389 if (ack_data & 0x01)
9392 /* write random address LSB */
9393 S24C16_write_byte(np, &ack_data,
9394 offset & 0xff, &gpreg, &gpcntl);
9395 if (ack_data & 0x01)
9398 /* regenerate START state to set up for reading */
9399 S24C16_start(np, &gpreg);
9401 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9402 S24C16_write_byte(np, &ack_data,
9403 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9404 if (ack_data & 0x01)
9407 /* now set up GPIO0 for inputting data */
9409 OUTB (nc_gpcntl, gpcntl);
9411 /* input all requested data - only part of total NVRAM */
9412 for (x = 0; x < len; x++)
9413 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9415 /* finally put NVRAM back in inactive mode */
9417 OUTB (nc_gpcntl, gpcntl);
9418 S24C16_stop(np, &gpreg);
9421 /* return GPIO0/1 to original states after having accessed NVRAM */
9422 OUTB (nc_gpcntl, old_gpcntl);
9423 OUTB (nc_gpreg, old_gpreg);
9428 #undef SET_BIT /* 0 */
9429 #undef CLR_BIT /* 1 */
9430 #undef SET_CLK /* 2 */
9431 #undef CLR_CLK /* 3 */
9434 * Try reading Symbios NVRAM.
9437 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9439 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9440 u_char *data = (u_char *) nvram;
9441 int len = sizeof(*nvram);
9445 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9446 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9449 /* check valid NVRAM signature, verify byte count and checksum */
9450 if (nvram->type != 0 ||
9451 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9452 nvram->byte_count != len - 12)
9455 /* verify checksum */
9456 for (x = 6, csum = 0; x < len - 6; x++)
9458 if (csum != nvram->checksum)
9465 * 93C46 EEPROM reading.
9470 * GPIO4 - chip select
9476 * Pulse clock bit in GPIO0
9478 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9480 OUTB (nc_gpreg, *gpreg | 0x04);
9482 OUTB (nc_gpreg, *gpreg);
9486 * Read bit from NVRAM
9488 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9491 T93C46_Clk(np, gpreg);
9492 *read_bit = INB (nc_gpreg);
9496 * Write bit to GPIO0
9498 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9500 if (write_bit & 0x01)
9507 OUTB (nc_gpreg, *gpreg);
9510 T93C46_Clk(np, gpreg);
9514 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9516 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9519 OUTB (nc_gpreg, *gpreg);
9522 T93C46_Clk(np, gpreg);
9526 * Send read command and address to NVRAM
9528 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9529 u_char *read_bit, u_char *gpreg)
9533 /* send 9 bits, start bit (1), command (2), address (6) */
9534 for (x = 0; x < 9; x++)
9535 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9537 *read_bit = INB (nc_gpreg);
9541 * READ 2 bytes from the NVRAM
9543 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9549 for (x = 0; x < 16; x++) {
9550 T93C46_Read_Bit(np, &read_bit, gpreg);
9552 if (read_bit & 0x01)
9553 *nvram_data |= (0x01 << (15 - x));
9555 *nvram_data &= ~(0x01 << (15 - x));
9560 * Read Tekram NvRAM data.
9562 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9567 for (x = 0; x < len; x++) {
9569 /* output read command and address */
9570 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9571 if (read_bit & 0x01)
9573 T93C46_Read_Word(np, &data[x], gpreg);
9574 T93C46_Stop(np, gpreg);
9581 * Try reading 93C46 Tekram NVRAM.
9583 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9585 u_char gpcntl, gpreg;
9586 u_char old_gpcntl, old_gpreg;
9589 /* save current state of GPCNTL and GPREG */
9590 old_gpreg = INB (nc_gpreg);
9591 old_gpcntl = INB (nc_gpcntl);
9593 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9595 gpreg = old_gpreg & 0xe9;
9596 OUTB (nc_gpreg, gpreg);
9597 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9598 OUTB (nc_gpcntl, gpcntl);
9600 /* input all of NVRAM, 64 words */
9601 retv = T93C46_Read_Data(np, (u_short *) nvram,
9602 sizeof(*nvram) / sizeof(short), &gpreg);
9604 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9605 OUTB (nc_gpcntl, old_gpcntl);
9606 OUTB (nc_gpreg, old_gpreg);
9612 * Try reading Tekram NVRAM.
9615 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9617 u_char *data = (u_char *) nvram;
9618 int len = sizeof(*nvram);
9622 switch (np->device_id) {
9623 case PCI_ID_SYM53C885:
9624 case PCI_ID_SYM53C895:
9625 case PCI_ID_SYM53C896:
9626 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9629 case PCI_ID_SYM53C875:
9630 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9635 x = sym_read_T93C46_nvram(np, nvram);
9641 /* verify checksum */
9642 for (x = 0, csum = 0; x < len - 1; x += 2)
9643 csum += data[x] + (data[x+1] << 8);
9650 #endif /* SYM_CONF_NVRAM_SUPPORT */