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1 /*-
2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 /*
32  * USB Open Host Controller driver.
33  *
34  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
36  */
37
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/bus.h>
46 #include <sys/module.h>
47 #include <sys/lock.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/sysctl.h>
51 #include <sys/sx.h>
52 #include <sys/unistd.h>
53 #include <sys/callout.h>
54 #include <sys/malloc.h>
55 #include <sys/priv.h>
56
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
59
60 #define USB_DEBUG_VAR ohcidebug
61
62 #include <dev/usb/usb_core.h>
63 #include <dev/usb/usb_debug.h>
64 #include <dev/usb/usb_busdma.h>
65 #include <dev/usb/usb_process.h>
66 #include <dev/usb/usb_transfer.h>
67 #include <dev/usb/usb_device.h>
68 #include <dev/usb/usb_hub.h>
69 #include <dev/usb/usb_util.h>
70
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ohci.h>
74 #include <dev/usb/controller/ohcireg.h>
75
76 #define OHCI_BUS2SC(bus) \
77    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
78     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
79
80 #ifdef USB_DEBUG
81 static int ohcidebug = 0;
82
83 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
84 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN,
85     &ohcidebug, 0, "ohci debug level");
86 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
87
88 static void ohci_dumpregs(ohci_softc_t *);
89 static void ohci_dump_tds(ohci_td_t *);
90 static uint8_t ohci_dump_td(ohci_td_t *);
91 static void ohci_dump_ed(ohci_ed_t *);
92 static uint8_t ohci_dump_itd(ohci_itd_t *);
93 static void ohci_dump_itds(ohci_itd_t *);
94
95 #endif
96
97 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
98                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
99 #define OWRITE1(sc, r, x) \
100  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
101 #define OWRITE2(sc, r, x) \
102  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
103 #define OWRITE4(sc, r, x) \
104  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
105 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
106 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
107 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108
109 #define OHCI_INTR_ENDPT 1
110
111 extern struct usb_bus_methods ohci_bus_methods;
112 extern struct usb_pipe_methods ohci_device_bulk_methods;
113 extern struct usb_pipe_methods ohci_device_ctrl_methods;
114 extern struct usb_pipe_methods ohci_device_intr_methods;
115 extern struct usb_pipe_methods ohci_device_isoc_methods;
116
117 static void ohci_do_poll(struct usb_bus *bus);
118 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
119 static void ohci_timeout(void *arg);
120 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
121 static void ohci_root_intr(ohci_softc_t *sc);
122
123 struct ohci_std_temp {
124         struct usb_page_cache *pc;
125         ohci_td_t *td;
126         ohci_td_t *td_next;
127         uint32_t average;
128         uint32_t td_flags;
129         uint32_t len;
130         uint16_t max_frame_size;
131         uint8_t shortpkt;
132         uint8_t setup_alt_next;
133         uint8_t last_frame;
134 };
135
136 static struct ohci_hcca *
137 ohci_get_hcca(ohci_softc_t *sc)
138 {
139         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
140         return (sc->sc_hcca_p);
141 }
142
143 void
144 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
145 {
146         struct ohci_softc *sc = OHCI_BUS2SC(bus);
147         uint32_t i;
148
149         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
150             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
151
152         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
153             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
154
155         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
156             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
157
158         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
159             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
160
161         for (i = 0; i != OHCI_NO_EDS; i++) {
162                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
163                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
164         }
165 }
166
167 static usb_error_t
168 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
169 {
170         struct usb_page_search buf_res;
171         uint32_t i;
172         uint32_t ctl;
173         uint32_t ival;
174         uint32_t hcr;
175         uint32_t fm;
176         uint32_t per;
177         uint32_t desca;
178
179         /* Determine in what context we are running. */
180         ctl = OREAD4(sc, OHCI_CONTROL);
181         if (ctl & OHCI_IR) {
182                 /* SMM active, request change */
183                 DPRINTF("SMM active, request owner change\n");
184                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
185                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
186                         usb_pause_mtx(NULL, hz / 1000);
187                         ctl = OREAD4(sc, OHCI_CONTROL);
188                 }
189                 if (ctl & OHCI_IR) {
190                         device_printf(sc->sc_bus.bdev,
191                             "SMM does not respond, resetting\n");
192                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
193                         goto reset;
194                 }
195         } else {
196                 DPRINTF("cold started\n");
197 reset:
198                 /* controller was cold started */
199                 usb_pause_mtx(NULL,
200                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
201         }
202
203         /*
204          * This reset should not be necessary according to the OHCI spec, but
205          * without it some controllers do not start.
206          */
207         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
208         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
209
210         usb_pause_mtx(NULL,
211             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
212
213         /* we now own the host controller and the bus has been reset */
214         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
215
216         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
217         /* nominal time for a reset is 10 us */
218         for (i = 0; i < 10; i++) {
219                 DELAY(10);
220                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
221                 if (!hcr) {
222                         break;
223                 }
224         }
225         if (hcr) {
226                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
227                 return (USB_ERR_IOERROR);
228         }
229 #ifdef USB_DEBUG
230         if (ohcidebug > 15) {
231                 ohci_dumpregs(sc);
232         }
233 #endif
234
235         if (do_suspend) {
236                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
237                 return (USB_ERR_NORMAL_COMPLETION);
238         }
239
240         /* The controller is now in SUSPEND state, we have 2ms to finish. */
241
242         /* set up HC registers */
243         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
244         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
245
246         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
247         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
248
249         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
250         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
251
252         /* disable all interrupts and then switch on all desired interrupts */
253         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
254         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
255         /* switch on desired functional features */
256         ctl = OREAD4(sc, OHCI_CONTROL);
257         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
258         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
259             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
260         /* And finally start it! */
261         OWRITE4(sc, OHCI_CONTROL, ctl);
262
263         /*
264          * The controller is now OPERATIONAL.  Set a some final
265          * registers that should be set earlier, but that the
266          * controller ignores when in the SUSPEND state.
267          */
268         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
269         fm |= OHCI_FSMPS(ival) | ival;
270         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
271         per = OHCI_PERIODIC(ival);      /* 90% periodic */
272         OWRITE4(sc, OHCI_PERIODIC_START, per);
273
274         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
275         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
276         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
277         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
278         usb_pause_mtx(NULL,
279             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
280         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
281
282         /*
283          * The AMD756 requires a delay before re-reading the register,
284          * otherwise it will occasionally report 0 ports.
285          */
286         sc->sc_noport = 0;
287         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
288                 usb_pause_mtx(NULL,
289                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
290                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
291         }
292
293 #ifdef USB_DEBUG
294         if (ohcidebug > 5) {
295                 ohci_dumpregs(sc);
296         }
297 #endif
298         return (USB_ERR_NORMAL_COMPLETION);
299 }
300
301 static struct ohci_ed *
302 ohci_init_ed(struct usb_page_cache *pc)
303 {
304         struct usb_page_search buf_res;
305         struct ohci_ed *ed;
306
307         usbd_get_page(pc, 0, &buf_res);
308
309         ed = buf_res.buffer;
310
311         ed->ed_self = htole32(buf_res.physaddr);
312         ed->ed_flags = htole32(OHCI_ED_SKIP);
313         ed->page_cache = pc;
314
315         return (ed);
316 }
317
318 usb_error_t
319 ohci_init(ohci_softc_t *sc)
320 {
321         struct usb_page_search buf_res;
322         uint16_t i;
323         uint16_t bit;
324         uint16_t x;
325         uint16_t y;
326
327         DPRINTF("start\n");
328
329         sc->sc_eintrs = OHCI_NORMAL_INTRS;
330
331         /*
332          * Setup all ED's
333          */
334
335         sc->sc_ctrl_p_last =
336             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
337
338         sc->sc_bulk_p_last =
339             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
340
341         sc->sc_isoc_p_last =
342             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
343
344         for (i = 0; i != OHCI_NO_EDS; i++) {
345                 sc->sc_intr_p_last[i] =
346                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
347         }
348
349         /*
350          * the QHs are arranged to give poll intervals that are
351          * powers of 2 times 1ms
352          */
353         bit = OHCI_NO_EDS / 2;
354         while (bit) {
355                 x = bit;
356                 while (x & bit) {
357                         ohci_ed_t *ed_x;
358                         ohci_ed_t *ed_y;
359
360                         y = (x ^ bit) | (bit / 2);
361
362                         /*
363                          * the next QH has half the poll interval
364                          */
365                         ed_x = sc->sc_intr_p_last[x];
366                         ed_y = sc->sc_intr_p_last[y];
367
368                         ed_x->next = NULL;
369                         ed_x->ed_next = ed_y->ed_self;
370
371                         x++;
372                 }
373                 bit >>= 1;
374         }
375
376         if (1) {
377
378                 ohci_ed_t *ed_int;
379                 ohci_ed_t *ed_isc;
380
381                 ed_int = sc->sc_intr_p_last[0];
382                 ed_isc = sc->sc_isoc_p_last;
383
384                 /* the last (1ms) QH */
385                 ed_int->next = ed_isc;
386                 ed_int->ed_next = ed_isc->ed_self;
387         }
388         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
389
390         sc->sc_hcca_p = buf_res.buffer;
391
392         /*
393          * Fill HCCA interrupt table.  The bit reversal is to get
394          * the tree set up properly to spread the interrupts.
395          */
396         for (i = 0; i != OHCI_NO_INTRS; i++) {
397                 sc->sc_hcca_p->hcca_interrupt_table[i] =
398                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
399         }
400         /* flush all cache into memory */
401
402         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
403
404         /* set up the bus struct */
405         sc->sc_bus.methods = &ohci_bus_methods;
406
407         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
408
409 #ifdef USB_DEBUG
410         if (ohcidebug > 15) {
411                 for (i = 0; i != OHCI_NO_EDS; i++) {
412                         printf("ed#%d ", i);
413                         ohci_dump_ed(sc->sc_intr_p_last[i]);
414                 }
415                 printf("iso ");
416                 ohci_dump_ed(sc->sc_isoc_p_last);
417         }
418 #endif
419
420         sc->sc_bus.usbrev = USB_REV_1_0;
421
422         if (ohci_controller_init(sc, 0) != 0)
423                 return (USB_ERR_INVAL);
424
425         /* catch any lost interrupts */
426         ohci_do_poll(&sc->sc_bus);
427         return (USB_ERR_NORMAL_COMPLETION);
428 }
429
430 /*
431  * shut down the controller when the system is going down
432  */
433 void
434 ohci_detach(struct ohci_softc *sc)
435 {
436         USB_BUS_LOCK(&sc->sc_bus);
437
438         usb_callout_stop(&sc->sc_tmo_rhsc);
439
440         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
441         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
442
443         USB_BUS_UNLOCK(&sc->sc_bus);
444
445         /* XXX let stray task complete */
446         usb_pause_mtx(NULL, hz / 20);
447
448         usb_callout_drain(&sc->sc_tmo_rhsc);
449 }
450
451 static void
452 ohci_suspend(ohci_softc_t *sc)
453 {
454         DPRINTF("\n");
455
456 #ifdef USB_DEBUG
457         if (ohcidebug > 2)
458                 ohci_dumpregs(sc);
459 #endif
460
461         /* reset HC and leave it suspended */
462         ohci_controller_init(sc, 1);
463 }
464
465 static void
466 ohci_resume(ohci_softc_t *sc)
467 {
468         DPRINTF("\n");
469
470 #ifdef USB_DEBUG
471         if (ohcidebug > 2)
472                 ohci_dumpregs(sc);
473 #endif
474
475         /* some broken BIOSes never initialize the Controller chip */
476         ohci_controller_init(sc, 0);
477
478         /* catch any lost interrupts */
479         ohci_do_poll(&sc->sc_bus);
480 }
481
482 #ifdef USB_DEBUG
483 static void
484 ohci_dumpregs(ohci_softc_t *sc)
485 {
486         struct ohci_hcca *hcca;
487
488         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
489             OREAD4(sc, OHCI_REVISION),
490             OREAD4(sc, OHCI_CONTROL),
491             OREAD4(sc, OHCI_COMMAND_STATUS));
492         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
493             OREAD4(sc, OHCI_INTERRUPT_STATUS),
494             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
495             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
496         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
497             OREAD4(sc, OHCI_HCCA),
498             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
499             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
500         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
501             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
502             OREAD4(sc, OHCI_BULK_HEAD_ED),
503             OREAD4(sc, OHCI_BULK_CURRENT_ED));
504         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
505             OREAD4(sc, OHCI_DONE_HEAD),
506             OREAD4(sc, OHCI_FM_INTERVAL),
507             OREAD4(sc, OHCI_FM_REMAINING));
508         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
509             OREAD4(sc, OHCI_FM_NUMBER),
510             OREAD4(sc, OHCI_PERIODIC_START),
511             OREAD4(sc, OHCI_LS_THRESHOLD));
512         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
513             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
514             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
515             OREAD4(sc, OHCI_RH_STATUS));
516         DPRINTF("               port1=0x%08x port2=0x%08x\n",
517             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
518             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
519
520         hcca = ohci_get_hcca(sc);
521
522         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
523             le32toh(hcca->hcca_frame_number),
524             le32toh(hcca->hcca_done_head));
525 }
526 static void
527 ohci_dump_tds(ohci_td_t *std)
528 {
529         for (; std; std = std->obj_next) {
530                 if (ohci_dump_td(std)) {
531                         break;
532                 }
533         }
534 }
535
536 static uint8_t
537 ohci_dump_td(ohci_td_t *std)
538 {
539         uint32_t td_flags;
540         uint8_t temp;
541
542         usb_pc_cpu_invalidate(std->page_cache);
543
544         td_flags = le32toh(std->td_flags);
545         temp = (std->td_next == 0);
546
547         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
548             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
549             std, le32toh(std->td_self),
550             (td_flags & OHCI_TD_R) ? "-R" : "",
551             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
552             (td_flags & OHCI_TD_IN) ? "-IN" : "",
553             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
554             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
555             OHCI_TD_GET_DI(td_flags),
556             OHCI_TD_GET_EC(td_flags),
557             OHCI_TD_GET_CC(td_flags),
558             le32toh(std->td_cbp),
559             le32toh(std->td_next),
560             le32toh(std->td_be));
561
562         return (temp);
563 }
564
565 static uint8_t
566 ohci_dump_itd(ohci_itd_t *sitd)
567 {
568         uint32_t itd_flags;
569         uint16_t i;
570         uint8_t temp;
571
572         usb_pc_cpu_invalidate(sitd->page_cache);
573
574         itd_flags = le32toh(sitd->itd_flags);
575         temp = (sitd->itd_next == 0);
576
577         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
578             "bp0=0x%08x next=0x%08x be=0x%08x\n",
579             sitd, le32toh(sitd->itd_self),
580             OHCI_ITD_GET_SF(itd_flags),
581             OHCI_ITD_GET_DI(itd_flags),
582             OHCI_ITD_GET_FC(itd_flags),
583             OHCI_ITD_GET_CC(itd_flags),
584             le32toh(sitd->itd_bp0),
585             le32toh(sitd->itd_next),
586             le32toh(sitd->itd_be));
587         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
588                 printf("offs[%d]=0x%04x ", i,
589                     (uint32_t)le16toh(sitd->itd_offset[i]));
590         }
591         printf("\n");
592
593         return (temp);
594 }
595
596 static void
597 ohci_dump_itds(ohci_itd_t *sitd)
598 {
599         for (; sitd; sitd = sitd->obj_next) {
600                 if (ohci_dump_itd(sitd)) {
601                         break;
602                 }
603         }
604 }
605
606 static void
607 ohci_dump_ed(ohci_ed_t *sed)
608 {
609         uint32_t ed_flags;
610         uint32_t ed_headp;
611
612         usb_pc_cpu_invalidate(sed->page_cache);
613
614         ed_flags = le32toh(sed->ed_flags);
615         ed_headp = le32toh(sed->ed_headp);
616
617         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
618             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
619             sed, le32toh(sed->ed_self),
620             OHCI_ED_GET_FA(ed_flags),
621             OHCI_ED_GET_EN(ed_flags),
622             OHCI_ED_GET_MAXP(ed_flags),
623             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
624             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
625             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
626             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
627             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
628             le32toh(sed->ed_tailp),
629             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
630             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
631             le32toh(sed->ed_headp),
632             le32toh(sed->ed_next));
633 }
634
635 #endif
636
637 static void
638 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
639 {
640         /* check for early completion */
641         if (ohci_check_transfer(xfer)) {
642                 return;
643         }
644         /* put transfer on interrupt queue */
645         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
646
647         /* start timeout, if any */
648         if (xfer->timeout != 0) {
649                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
650         }
651 }
652
653 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
654 static ohci_ed_t *
655 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
656 {
657         DPRINTFN(11, "%p to %p\n", sed, last);
658
659         if (sed->prev != NULL) {
660                 /* should not happen */
661                 DPRINTFN(0, "ED already linked!\n");
662                 return (last);
663         }
664         /* (sc->sc_bus.bus_mtx) must be locked */
665
666         sed->next = last->next;
667         sed->ed_next = last->ed_next;
668         sed->ed_tailp = 0;
669
670         sed->prev = last;
671
672         usb_pc_cpu_flush(sed->page_cache);
673
674         /*
675          * the last->next->prev is never followed: sed->next->prev = sed;
676          */
677
678         last->next = sed;
679         last->ed_next = sed->ed_self;
680
681         usb_pc_cpu_flush(last->page_cache);
682
683         return (sed);
684 }
685
686 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
687 static ohci_ed_t *
688 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
689 {
690         DPRINTFN(11, "%p from %p\n", sed, last);
691
692         /* (sc->sc_bus.bus_mtx) must be locked */
693
694         /* only remove if not removed from a queue */
695         if (sed->prev) {
696
697                 sed->prev->next = sed->next;
698                 sed->prev->ed_next = sed->ed_next;
699
700                 usb_pc_cpu_flush(sed->prev->page_cache);
701
702                 if (sed->next) {
703                         sed->next->prev = sed->prev;
704                         usb_pc_cpu_flush(sed->next->page_cache);
705                 }
706                 last = ((last == sed) ? sed->prev : last);
707
708                 sed->prev = 0;
709
710                 usb_pc_cpu_flush(sed->page_cache);
711         }
712         return (last);
713 }
714
715 static void
716 ohci_isoc_done(struct usb_xfer *xfer)
717 {
718         uint8_t nframes;
719         uint32_t *plen = xfer->frlengths;
720         volatile uint16_t *olen;
721         uint16_t len = 0;
722         ohci_itd_t *td = xfer->td_transfer_first;
723
724         while (1) {
725                 if (td == NULL) {
726                         panic("%s:%d: out of TD's\n",
727                             __FUNCTION__, __LINE__);
728                 }
729 #ifdef USB_DEBUG
730                 if (ohcidebug > 5) {
731                         DPRINTF("isoc TD\n");
732                         ohci_dump_itd(td);
733                 }
734 #endif
735                 usb_pc_cpu_invalidate(td->page_cache);
736
737                 nframes = td->frames;
738                 olen = &td->itd_offset[0];
739
740                 if (nframes > 8) {
741                         nframes = 8;
742                 }
743                 while (nframes--) {
744                         len = le16toh(*olen);
745
746                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
747                                 len = 0;
748                         } else {
749                                 len &= ((1 << 12) - 1);
750                         }
751
752                         if (len > *plen) {
753                                 len = 0;/* invalid length */
754                         }
755                         *plen = len;
756                         plen++;
757                         olen++;
758                 }
759
760                 if (((void *)td) == xfer->td_transfer_last) {
761                         break;
762                 }
763                 td = td->obj_next;
764         }
765
766         xfer->aframes = xfer->nframes;
767         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
768 }
769
770 #ifdef USB_DEBUG
771 static const char *const
772         ohci_cc_strs[] =
773 {
774         "NO_ERROR",
775         "CRC",
776         "BIT_STUFFING",
777         "DATA_TOGGLE_MISMATCH",
778
779         "STALL",
780         "DEVICE_NOT_RESPONDING",
781         "PID_CHECK_FAILURE",
782         "UNEXPECTED_PID",
783
784         "DATA_OVERRUN",
785         "DATA_UNDERRUN",
786         "BUFFER_OVERRUN",
787         "BUFFER_UNDERRUN",
788
789         "reserved",
790         "reserved",
791         "NOT_ACCESSED",
792         "NOT_ACCESSED"
793 };
794
795 #endif
796
797 static usb_error_t
798 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
799 {
800         ohci_td_t *td;
801         ohci_td_t *td_alt_next;
802         uint32_t temp;
803         uint32_t phy_start;
804         uint32_t phy_end;
805         uint32_t td_flags;
806         uint16_t cc;
807
808         td = xfer->td_transfer_cache;
809         td_alt_next = td->alt_next;
810         td_flags = 0;
811
812         if (xfer->aframes != xfer->nframes) {
813                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
814         }
815         while (1) {
816
817                 usb_pc_cpu_invalidate(td->page_cache);
818                 phy_start = le32toh(td->td_cbp);
819                 td_flags = le32toh(td->td_flags);
820                 cc = OHCI_TD_GET_CC(td_flags);
821
822                 if (phy_start) {
823                         /*
824                          * short transfer - compute the number of remaining
825                          * bytes in the hardware buffer:
826                          */
827                         phy_end = le32toh(td->td_be);
828                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
829                             (OHCI_PAGE_SIZE + 1) : 0x0001);
830                         temp += OHCI_PAGE_OFFSET(phy_end);
831                         temp -= OHCI_PAGE_OFFSET(phy_start);
832
833                         if (temp > td->len) {
834                                 /* guard against corruption */
835                                 cc = OHCI_CC_STALL;
836                         } else if (xfer->aframes != xfer->nframes) {
837                                 /*
838                                  * Sum up total transfer length
839                                  * in "frlengths[]":
840                                  */
841                                 xfer->frlengths[xfer->aframes] += td->len - temp;
842                         }
843                 } else {
844                         if (xfer->aframes != xfer->nframes) {
845                                 /* transfer was complete */
846                                 xfer->frlengths[xfer->aframes] += td->len;
847                         }
848                 }
849                 /* Check for last transfer */
850                 if (((void *)td) == xfer->td_transfer_last) {
851                         td = NULL;
852                         break;
853                 }
854                 /* Check transfer status */
855                 if (cc) {
856                         /* the transfer is finished */
857                         td = NULL;
858                         break;
859                 }
860                 /* Check for short transfer */
861                 if (phy_start) {
862                         if (xfer->flags_int.short_frames_ok) {
863                                 /* follow alt next */
864                                 td = td->alt_next;
865                         } else {
866                                 /* the transfer is finished */
867                                 td = NULL;
868                         }
869                         break;
870                 }
871                 td = td->obj_next;
872
873                 if (td->alt_next != td_alt_next) {
874                         /* this USB frame is complete */
875                         break;
876                 }
877         }
878
879         /* update transfer cache */
880
881         xfer->td_transfer_cache = td;
882
883         DPRINTFN(16, "error cc=%d (%s)\n",
884             cc, ohci_cc_strs[cc]);
885
886         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
887             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
888 }
889
890 static void
891 ohci_non_isoc_done(struct usb_xfer *xfer)
892 {
893         usb_error_t err = 0;
894
895         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
896             xfer, xfer->endpoint);
897
898 #ifdef USB_DEBUG
899         if (ohcidebug > 10) {
900                 ohci_dump_tds(xfer->td_transfer_first);
901         }
902 #endif
903
904         /* reset scanner */
905
906         xfer->td_transfer_cache = xfer->td_transfer_first;
907
908         if (xfer->flags_int.control_xfr) {
909
910                 if (xfer->flags_int.control_hdr) {
911
912                         err = ohci_non_isoc_done_sub(xfer);
913                 }
914                 xfer->aframes = 1;
915
916                 if (xfer->td_transfer_cache == NULL) {
917                         goto done;
918                 }
919         }
920         while (xfer->aframes != xfer->nframes) {
921
922                 err = ohci_non_isoc_done_sub(xfer);
923                 xfer->aframes++;
924
925                 if (xfer->td_transfer_cache == NULL) {
926                         goto done;
927                 }
928         }
929
930         if (xfer->flags_int.control_xfr &&
931             !xfer->flags_int.control_act) {
932
933                 err = ohci_non_isoc_done_sub(xfer);
934         }
935 done:
936         ohci_device_done(xfer, err);
937 }
938
939 /*------------------------------------------------------------------------*
940  *      ohci_check_transfer_sub
941  *------------------------------------------------------------------------*/
942 static void
943 ohci_check_transfer_sub(struct usb_xfer *xfer)
944 {
945         ohci_td_t *td;
946         ohci_ed_t *ed;
947         uint32_t phy_start;
948         uint32_t td_flags;
949         uint32_t td_next;
950         uint16_t cc;
951
952         td = xfer->td_transfer_cache;
953
954         while (1) {
955
956                 usb_pc_cpu_invalidate(td->page_cache);
957                 phy_start = le32toh(td->td_cbp);
958                 td_flags = le32toh(td->td_flags);
959                 td_next = le32toh(td->td_next);
960
961                 /* Check for last transfer */
962                 if (((void *)td) == xfer->td_transfer_last) {
963                         /* the transfer is finished */
964                         td = NULL;
965                         break;
966                 }
967                 /* Check transfer status */
968                 cc = OHCI_TD_GET_CC(td_flags);
969                 if (cc) {
970                         /* the transfer is finished */
971                         td = NULL;
972                         break;
973                 }
974                 /*
975                  * Check if we reached the last packet
976                  * or if there is a short packet:
977                  */
978
979                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
980                         /* follow alt next */
981                         td = td->alt_next;
982                         break;
983                 }
984                 td = td->obj_next;
985         }
986
987         /* update transfer cache */
988
989         xfer->td_transfer_cache = td;
990
991         if (td) {
992
993                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
994
995                 ed->ed_headp = td->td_self;
996                 usb_pc_cpu_flush(ed->page_cache);
997
998                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
999
1000                 /*
1001                  * Make sure that the OHCI re-scans the schedule by
1002                  * writing the BLF and CLF bits:
1003                  */
1004
1005                 if (xfer->xroot->udev->flags.self_suspended) {
1006                         /* nothing to do */
1007                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1008                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1009
1010                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1011                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1012                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1013
1014                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1015                 }
1016         }
1017 }
1018
1019 /*------------------------------------------------------------------------*
1020  *      ohci_check_transfer
1021  *
1022  * Return values:
1023  *    0: USB transfer is not finished
1024  * Else: USB transfer is finished
1025  *------------------------------------------------------------------------*/
1026 static uint8_t
1027 ohci_check_transfer(struct usb_xfer *xfer)
1028 {
1029         ohci_ed_t *ed;
1030         uint32_t ed_headp;
1031         uint32_t ed_tailp;
1032
1033         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1034
1035         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1036
1037         usb_pc_cpu_invalidate(ed->page_cache);
1038         ed_headp = le32toh(ed->ed_headp);
1039         ed_tailp = le32toh(ed->ed_tailp);
1040
1041         if ((ed_headp & OHCI_HALTED) ||
1042             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1043                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1044                         /* isochronous transfer */
1045                         ohci_isoc_done(xfer);
1046                 } else {
1047                         if (xfer->flags_int.short_frames_ok) {
1048                                 ohci_check_transfer_sub(xfer);
1049                                 if (xfer->td_transfer_cache) {
1050                                         /* not finished yet */
1051                                         return (0);
1052                                 }
1053                         }
1054                         /* store data-toggle */
1055                         if (ed_headp & OHCI_TOGGLECARRY) {
1056                                 xfer->endpoint->toggle_next = 1;
1057                         } else {
1058                                 xfer->endpoint->toggle_next = 0;
1059                         }
1060
1061                         /* non-isochronous transfer */
1062                         ohci_non_isoc_done(xfer);
1063                 }
1064                 return (1);
1065         }
1066         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1067         return (0);
1068 }
1069
1070 static void
1071 ohci_rhsc_enable(ohci_softc_t *sc)
1072 {
1073         DPRINTFN(5, "\n");
1074
1075         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1076
1077         sc->sc_eintrs |= OHCI_RHSC;
1078         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1079
1080         /* acknowledge any RHSC interrupt */
1081         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1082
1083         ohci_root_intr(sc);
1084 }
1085
1086 static void
1087 ohci_interrupt_poll(ohci_softc_t *sc)
1088 {
1089         struct usb_xfer *xfer;
1090
1091 repeat:
1092         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1093                 /*
1094                  * check if transfer is transferred
1095                  */
1096                 if (ohci_check_transfer(xfer)) {
1097                         /* queue has been modified */
1098                         goto repeat;
1099                 }
1100         }
1101 }
1102
1103 /*------------------------------------------------------------------------*
1104  *      ohci_interrupt - OHCI interrupt handler
1105  *
1106  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1107  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1108  * is present !
1109  *------------------------------------------------------------------------*/
1110 void
1111 ohci_interrupt(ohci_softc_t *sc)
1112 {
1113         struct ohci_hcca *hcca;
1114         uint32_t status;
1115         uint32_t done;
1116
1117         USB_BUS_LOCK(&sc->sc_bus);
1118
1119         hcca = ohci_get_hcca(sc);
1120
1121         DPRINTFN(16, "real interrupt\n");
1122
1123 #ifdef USB_DEBUG
1124         if (ohcidebug > 15) {
1125                 ohci_dumpregs(sc);
1126         }
1127 #endif
1128
1129         done = le32toh(hcca->hcca_done_head);
1130
1131         /*
1132          * The LSb of done is used to inform the HC Driver that an interrupt
1133          * condition exists for both the Done list and for another event
1134          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1135          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1136          * the interrupt was caused by other than the HccaDoneHead update
1137          * and the HcInterruptStatus register needs to be accessed to
1138          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1139          * then a Done list update interrupt is indicated and if the LSb of
1140          * done is nonzero, then an additional interrupt event is indicated
1141          * and HcInterruptStatus should be checked to determine its cause.
1142          */
1143         if (done != 0) {
1144                 status = 0;
1145
1146                 if (done & ~OHCI_DONE_INTRS) {
1147                         status |= OHCI_WDH;
1148                 }
1149                 if (done & OHCI_DONE_INTRS) {
1150                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1151                 }
1152                 hcca->hcca_done_head = 0;
1153
1154                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1155         } else {
1156                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1157         }
1158
1159         status &= ~OHCI_MIE;
1160         if (status == 0) {
1161                 /*
1162                  * nothing to be done (PCI shared
1163                  * interrupt)
1164                  */
1165                 goto done;
1166         }
1167         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1168
1169         status &= sc->sc_eintrs;
1170         if (status == 0) {
1171                 goto done;
1172         }
1173         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1174 #if 0
1175                 if (status & OHCI_SO) {
1176                         /* XXX do what */
1177                 }
1178 #endif
1179                 if (status & OHCI_RD) {
1180                         printf("%s: resume detect\n", __FUNCTION__);
1181                         /* XXX process resume detect */
1182                 }
1183                 if (status & OHCI_UE) {
1184                         printf("%s: unrecoverable error, "
1185                             "controller halted\n", __FUNCTION__);
1186                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1187                         /* XXX what else */
1188                 }
1189                 if (status & OHCI_RHSC) {
1190                         /*
1191                          * Disable RHSC interrupt for now, because it will be
1192                          * on until the port has been reset.
1193                          */
1194                         sc->sc_eintrs &= ~OHCI_RHSC;
1195                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1196
1197                         ohci_root_intr(sc);
1198
1199                         /* do not allow RHSC interrupts > 1 per second */
1200                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1201                             (void *)&ohci_rhsc_enable, sc);
1202                 }
1203         }
1204         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1205         if (status != 0) {
1206                 /* Block unprocessed interrupts. XXX */
1207                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1208                 sc->sc_eintrs &= ~status;
1209                 printf("%s: blocking intrs 0x%x\n",
1210                     __FUNCTION__, status);
1211         }
1212         /* poll all the USB transfers */
1213         ohci_interrupt_poll(sc);
1214
1215 done:
1216         USB_BUS_UNLOCK(&sc->sc_bus);
1217 }
1218
1219 /*
1220  * called when a request does not complete
1221  */
1222 static void
1223 ohci_timeout(void *arg)
1224 {
1225         struct usb_xfer *xfer = arg;
1226
1227         DPRINTF("xfer=%p\n", xfer);
1228
1229         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1230
1231         /* transfer is transferred */
1232         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1233 }
1234
1235 static void
1236 ohci_do_poll(struct usb_bus *bus)
1237 {
1238         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1239
1240         USB_BUS_LOCK(&sc->sc_bus);
1241         ohci_interrupt_poll(sc);
1242         USB_BUS_UNLOCK(&sc->sc_bus);
1243 }
1244
1245 static void
1246 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1247 {
1248         struct usb_page_search buf_res;
1249         ohci_td_t *td;
1250         ohci_td_t *td_next;
1251         ohci_td_t *td_alt_next;
1252         uint32_t buf_offset;
1253         uint32_t average;
1254         uint32_t len_old;
1255         uint8_t shortpkt_old;
1256         uint8_t precompute;
1257
1258         td_alt_next = NULL;
1259         buf_offset = 0;
1260         shortpkt_old = temp->shortpkt;
1261         len_old = temp->len;
1262         precompute = 1;
1263
1264         /* software is used to detect short incoming transfers */
1265
1266         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1267                 temp->td_flags |= htole32(OHCI_TD_R);
1268         } else {
1269                 temp->td_flags &= ~htole32(OHCI_TD_R);
1270         }
1271
1272 restart:
1273
1274         td = temp->td;
1275         td_next = temp->td_next;
1276
1277         while (1) {
1278
1279                 if (temp->len == 0) {
1280
1281                         if (temp->shortpkt) {
1282                                 break;
1283                         }
1284                         /* send a Zero Length Packet, ZLP, last */
1285
1286                         temp->shortpkt = 1;
1287                         average = 0;
1288
1289                 } else {
1290
1291                         average = temp->average;
1292
1293                         if (temp->len < average) {
1294                                 if (temp->len % temp->max_frame_size) {
1295                                         temp->shortpkt = 1;
1296                                 }
1297                                 average = temp->len;
1298                         }
1299                 }
1300
1301                 if (td_next == NULL) {
1302                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1303                 }
1304                 /* get next TD */
1305
1306                 td = td_next;
1307                 td_next = td->obj_next;
1308
1309                 /* check if we are pre-computing */
1310
1311                 if (precompute) {
1312
1313                         /* update remaining length */
1314
1315                         temp->len -= average;
1316
1317                         continue;
1318                 }
1319                 /* fill out current TD */
1320                 td->td_flags = temp->td_flags;
1321
1322                 /* the next TD uses TOGGLE_CARRY */
1323                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1324
1325                 if (average == 0) {
1326                         /*
1327                          * The buffer start and end phys addresses should be
1328                          * 0x0 for a zero length packet.
1329                          */
1330                         td->td_cbp = 0;
1331                         td->td_be = 0;
1332                         td->len = 0;
1333
1334                 } else {
1335
1336                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1337                         td->td_cbp = htole32(buf_res.physaddr);
1338                         buf_offset += (average - 1);
1339
1340                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1341                         td->td_be = htole32(buf_res.physaddr);
1342                         buf_offset++;
1343
1344                         td->len = average;
1345
1346                         /* update remaining length */
1347
1348                         temp->len -= average;
1349                 }
1350
1351                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1352                         /* we need to receive these frames one by one ! */
1353                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1354                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1355                         td->td_next = htole32(OHCI_TD_NEXT_END);
1356                 } else {
1357                         if (td_next) {
1358                                 /* link the current TD with the next one */
1359                                 td->td_next = td_next->td_self;
1360                         }
1361                 }
1362
1363                 td->alt_next = td_alt_next;
1364
1365                 usb_pc_cpu_flush(td->page_cache);
1366         }
1367
1368         if (precompute) {
1369                 precompute = 0;
1370
1371                 /* setup alt next pointer, if any */
1372                 if (temp->last_frame) {
1373                         /* no alternate next */
1374                         td_alt_next = NULL;
1375                 } else {
1376                         /* we use this field internally */
1377                         td_alt_next = td_next;
1378                 }
1379
1380                 /* restore */
1381                 temp->shortpkt = shortpkt_old;
1382                 temp->len = len_old;
1383                 goto restart;
1384         }
1385         temp->td = td;
1386         temp->td_next = td_next;
1387 }
1388
1389 static void
1390 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1391 {
1392         struct ohci_std_temp temp;
1393         struct usb_pipe_methods *methods;
1394         ohci_ed_t *ed;
1395         ohci_td_t *td;
1396         uint32_t ed_flags;
1397         uint32_t x;
1398
1399         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1400             xfer->address, UE_GET_ADDR(xfer->endpointno),
1401             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1402
1403         temp.average = xfer->max_hc_frame_size;
1404         temp.max_frame_size = xfer->max_frame_size;
1405
1406         /* toggle the DMA set we are using */
1407         xfer->flags_int.curr_dma_set ^= 1;
1408
1409         /* get next DMA set */
1410         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1411
1412         xfer->td_transfer_first = td;
1413         xfer->td_transfer_cache = td;
1414
1415         temp.td = NULL;
1416         temp.td_next = td;
1417         temp.last_frame = 0;
1418         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1419
1420         methods = xfer->endpoint->methods;
1421
1422         /* check if we should prepend a setup message */
1423
1424         if (xfer->flags_int.control_xfr) {
1425                 if (xfer->flags_int.control_hdr) {
1426
1427                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1428                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1429
1430                         temp.len = xfer->frlengths[0];
1431                         temp.pc = xfer->frbuffers + 0;
1432                         temp.shortpkt = temp.len ? 1 : 0;
1433                         /* check for last frame */
1434                         if (xfer->nframes == 1) {
1435                                 /* no STATUS stage yet, SETUP is last */
1436                                 if (xfer->flags_int.control_act) {
1437                                         temp.last_frame = 1;
1438                                         temp.setup_alt_next = 0;
1439                                 }
1440                         }
1441                         ohci_setup_standard_chain_sub(&temp);
1442
1443                         /*
1444                          * XXX assume that the setup message is
1445                          * contained within one USB packet:
1446                          */
1447                         xfer->endpoint->toggle_next = 1;
1448                 }
1449                 x = 1;
1450         } else {
1451                 x = 0;
1452         }
1453         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1454
1455         /* set data toggle */
1456
1457         if (xfer->endpoint->toggle_next) {
1458                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1459         } else {
1460                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1461         }
1462
1463         /* set endpoint direction */
1464
1465         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1466                 temp.td_flags |= htole32(OHCI_TD_IN);
1467         } else {
1468                 temp.td_flags |= htole32(OHCI_TD_OUT);
1469         }
1470
1471         while (x != xfer->nframes) {
1472
1473                 /* DATA0 / DATA1 message */
1474
1475                 temp.len = xfer->frlengths[x];
1476                 temp.pc = xfer->frbuffers + x;
1477
1478                 x++;
1479
1480                 if (x == xfer->nframes) {
1481                         if (xfer->flags_int.control_xfr) {
1482                                 /* no STATUS stage yet, DATA is last */
1483                                 if (xfer->flags_int.control_act) {
1484                                         temp.last_frame = 1;
1485                                         temp.setup_alt_next = 0;
1486                                 }
1487                         } else {
1488                                 temp.last_frame = 1;
1489                                 temp.setup_alt_next = 0;
1490                         }
1491                 }
1492                 if (temp.len == 0) {
1493
1494                         /* make sure that we send an USB packet */
1495
1496                         temp.shortpkt = 0;
1497
1498                 } else {
1499
1500                         /* regular data transfer */
1501
1502                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1503                 }
1504
1505                 ohci_setup_standard_chain_sub(&temp);
1506         }
1507
1508         /* check if we should append a status stage */
1509
1510         if (xfer->flags_int.control_xfr &&
1511             !xfer->flags_int.control_act) {
1512
1513                 /*
1514                  * Send a DATA1 message and invert the current endpoint
1515                  * direction.
1516                  */
1517
1518                 /* set endpoint direction and data toggle */
1519
1520                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1521                         temp.td_flags = htole32(OHCI_TD_OUT |
1522                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1523                 } else {
1524                         temp.td_flags = htole32(OHCI_TD_IN |
1525                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1526                 }
1527
1528                 temp.len = 0;
1529                 temp.pc = NULL;
1530                 temp.shortpkt = 0;
1531                 temp.last_frame = 1;
1532                 temp.setup_alt_next = 0;
1533
1534                 ohci_setup_standard_chain_sub(&temp);
1535         }
1536         td = temp.td;
1537
1538         /* Ensure that last TD is terminating: */
1539         td->td_next = htole32(OHCI_TD_NEXT_END);
1540         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1541         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1542
1543         usb_pc_cpu_flush(td->page_cache);
1544
1545         /* must have at least one frame! */
1546
1547         xfer->td_transfer_last = td;
1548
1549 #ifdef USB_DEBUG
1550         if (ohcidebug > 8) {
1551                 DPRINTF("nexttog=%d; data before transfer:\n",
1552                     xfer->endpoint->toggle_next);
1553                 ohci_dump_tds(xfer->td_transfer_first);
1554         }
1555 #endif
1556
1557         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1558
1559         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1560             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1561             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1562
1563         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1564
1565         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1566                 ed_flags |= OHCI_ED_SPEED;
1567         }
1568         ed->ed_flags = htole32(ed_flags);
1569
1570         td = xfer->td_transfer_first;
1571
1572         ed->ed_headp = td->td_self;
1573
1574         if (xfer->xroot->udev->flags.self_suspended == 0) {
1575                 /* the append function will flush the endpoint descriptor */
1576                 OHCI_APPEND_QH(ed, *ed_last);
1577
1578                 if (methods == &ohci_device_bulk_methods) {
1579                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1580
1581                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1582                 }
1583                 if (methods == &ohci_device_ctrl_methods) {
1584                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1585
1586                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1587                 }
1588         } else {
1589                 usb_pc_cpu_flush(ed->page_cache);
1590         }
1591 }
1592
1593 static void
1594 ohci_root_intr(ohci_softc_t *sc)
1595 {
1596         uint32_t hstatus;
1597         uint16_t i;
1598         uint16_t m;
1599
1600         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1601
1602         /* clear any old interrupt data */
1603         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1604
1605         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1606         DPRINTF("sc=%p hstatus=0x%08x\n",
1607             sc, hstatus);
1608
1609         /* set bits */
1610         m = (sc->sc_noport + 1);
1611         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1612                 m = (8 * sizeof(sc->sc_hub_idata));
1613         }
1614         for (i = 1; i < m; i++) {
1615                 /* pick out CHANGE bits from the status register */
1616                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1617                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1618                         DPRINTF("port %d changed\n", i);
1619                 }
1620         }
1621
1622         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1623             sizeof(sc->sc_hub_idata));
1624 }
1625
1626 /* NOTE: "done" can be run two times in a row,
1627  * from close and from interrupt
1628  */
1629 static void
1630 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1631 {
1632         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1633         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1634         ohci_ed_t *ed;
1635
1636         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1637
1638
1639         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1640             xfer, xfer->endpoint, error);
1641
1642         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1643         if (ed) {
1644                 usb_pc_cpu_invalidate(ed->page_cache);
1645         }
1646         if (methods == &ohci_device_bulk_methods) {
1647                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1648         }
1649         if (methods == &ohci_device_ctrl_methods) {
1650                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1651         }
1652         if (methods == &ohci_device_intr_methods) {
1653                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1654         }
1655         if (methods == &ohci_device_isoc_methods) {
1656                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1657         }
1658         xfer->td_transfer_first = NULL;
1659         xfer->td_transfer_last = NULL;
1660
1661         /* dequeue transfer and start next transfer */
1662         usbd_transfer_done(xfer, error);
1663 }
1664
1665 /*------------------------------------------------------------------------*
1666  * ohci bulk support
1667  *------------------------------------------------------------------------*/
1668 static void
1669 ohci_device_bulk_open(struct usb_xfer *xfer)
1670 {
1671         return;
1672 }
1673
1674 static void
1675 ohci_device_bulk_close(struct usb_xfer *xfer)
1676 {
1677         ohci_device_done(xfer, USB_ERR_CANCELLED);
1678 }
1679
1680 static void
1681 ohci_device_bulk_enter(struct usb_xfer *xfer)
1682 {
1683         return;
1684 }
1685
1686 static void
1687 ohci_device_bulk_start(struct usb_xfer *xfer)
1688 {
1689         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1690
1691         /* setup TD's and QH */
1692         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1693
1694         /* put transfer on interrupt queue */
1695         ohci_transfer_intr_enqueue(xfer);
1696 }
1697
1698 struct usb_pipe_methods ohci_device_bulk_methods =
1699 {
1700         .open = ohci_device_bulk_open,
1701         .close = ohci_device_bulk_close,
1702         .enter = ohci_device_bulk_enter,
1703         .start = ohci_device_bulk_start,
1704 };
1705
1706 /*------------------------------------------------------------------------*
1707  * ohci control support
1708  *------------------------------------------------------------------------*/
1709 static void
1710 ohci_device_ctrl_open(struct usb_xfer *xfer)
1711 {
1712         return;
1713 }
1714
1715 static void
1716 ohci_device_ctrl_close(struct usb_xfer *xfer)
1717 {
1718         ohci_device_done(xfer, USB_ERR_CANCELLED);
1719 }
1720
1721 static void
1722 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1723 {
1724         return;
1725 }
1726
1727 static void
1728 ohci_device_ctrl_start(struct usb_xfer *xfer)
1729 {
1730         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1731
1732         /* setup TD's and QH */
1733         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1734
1735         /* put transfer on interrupt queue */
1736         ohci_transfer_intr_enqueue(xfer);
1737 }
1738
1739 struct usb_pipe_methods ohci_device_ctrl_methods =
1740 {
1741         .open = ohci_device_ctrl_open,
1742         .close = ohci_device_ctrl_close,
1743         .enter = ohci_device_ctrl_enter,
1744         .start = ohci_device_ctrl_start,
1745 };
1746
1747 /*------------------------------------------------------------------------*
1748  * ohci interrupt support
1749  *------------------------------------------------------------------------*/
1750 static void
1751 ohci_device_intr_open(struct usb_xfer *xfer)
1752 {
1753         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1754         uint16_t best;
1755         uint16_t bit;
1756         uint16_t x;
1757
1758         best = 0;
1759         bit = OHCI_NO_EDS / 2;
1760         while (bit) {
1761                 if (xfer->interval >= bit) {
1762                         x = bit;
1763                         best = bit;
1764                         while (x & bit) {
1765                                 if (sc->sc_intr_stat[x] <
1766                                     sc->sc_intr_stat[best]) {
1767                                         best = x;
1768                                 }
1769                                 x++;
1770                         }
1771                         break;
1772                 }
1773                 bit >>= 1;
1774         }
1775
1776         sc->sc_intr_stat[best]++;
1777         xfer->qh_pos = best;
1778
1779         DPRINTFN(3, "best=%d interval=%d\n",
1780             best, xfer->interval);
1781 }
1782
1783 static void
1784 ohci_device_intr_close(struct usb_xfer *xfer)
1785 {
1786         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1787
1788         sc->sc_intr_stat[xfer->qh_pos]--;
1789
1790         ohci_device_done(xfer, USB_ERR_CANCELLED);
1791 }
1792
1793 static void
1794 ohci_device_intr_enter(struct usb_xfer *xfer)
1795 {
1796         return;
1797 }
1798
1799 static void
1800 ohci_device_intr_start(struct usb_xfer *xfer)
1801 {
1802         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1803
1804         /* setup TD's and QH */
1805         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1806
1807         /* put transfer on interrupt queue */
1808         ohci_transfer_intr_enqueue(xfer);
1809 }
1810
1811 struct usb_pipe_methods ohci_device_intr_methods =
1812 {
1813         .open = ohci_device_intr_open,
1814         .close = ohci_device_intr_close,
1815         .enter = ohci_device_intr_enter,
1816         .start = ohci_device_intr_start,
1817 };
1818
1819 /*------------------------------------------------------------------------*
1820  * ohci isochronous support
1821  *------------------------------------------------------------------------*/
1822 static void
1823 ohci_device_isoc_open(struct usb_xfer *xfer)
1824 {
1825         return;
1826 }
1827
1828 static void
1829 ohci_device_isoc_close(struct usb_xfer *xfer)
1830 {
1831         /**/
1832         ohci_device_done(xfer, USB_ERR_CANCELLED);
1833 }
1834
1835 static void
1836 ohci_device_isoc_enter(struct usb_xfer *xfer)
1837 {
1838         struct usb_page_search buf_res;
1839         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1840         struct ohci_hcca *hcca;
1841         uint32_t buf_offset;
1842         uint32_t nframes;
1843         uint32_t ed_flags;
1844         uint32_t *plen;
1845         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1846         uint16_t length;
1847         uint8_t ncur;
1848         ohci_itd_t *td;
1849         ohci_itd_t *td_last = NULL;
1850         ohci_ed_t *ed;
1851
1852         hcca = ohci_get_hcca(sc);
1853
1854         nframes = le32toh(hcca->hcca_frame_number);
1855
1856         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1857             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1858
1859         if ((xfer->endpoint->is_synced == 0) ||
1860             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1861             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1862                 /*
1863                  * If there is data underflow or the pipe queue is empty we
1864                  * schedule the transfer a few frames ahead of the current
1865                  * frame position. Else two isochronous transfers might
1866                  * overlap.
1867                  */
1868                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1869                 xfer->endpoint->is_synced = 1;
1870                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1871         }
1872         /*
1873          * compute how many milliseconds the insertion is ahead of the
1874          * current frame position:
1875          */
1876         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1877
1878         /*
1879          * pre-compute when the isochronous transfer will be finished:
1880          */
1881         xfer->isoc_time_complete =
1882             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1883             xfer->nframes);
1884
1885         /* get the real number of frames */
1886
1887         nframes = xfer->nframes;
1888
1889         buf_offset = 0;
1890
1891         plen = xfer->frlengths;
1892
1893         /* toggle the DMA set we are using */
1894         xfer->flags_int.curr_dma_set ^= 1;
1895
1896         /* get next DMA set */
1897         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1898
1899         xfer->td_transfer_first = td;
1900
1901         ncur = 0;
1902         length = 0;
1903
1904         while (nframes--) {
1905                 if (td == NULL) {
1906                         panic("%s:%d: out of TD's\n",
1907                             __FUNCTION__, __LINE__);
1908                 }
1909                 itd_offset[ncur] = length;
1910                 buf_offset += *plen;
1911                 length += *plen;
1912                 plen++;
1913                 ncur++;
1914
1915                 if (                    /* check if the ITD is full */
1916                     (ncur == OHCI_ITD_NOFFSET) ||
1917                 /* check if we have put more than 4K into the ITD */
1918                     (length & 0xF000) ||
1919                 /* check if it is the last frame */
1920                     (nframes == 0)) {
1921
1922                         /* fill current ITD */
1923                         td->itd_flags = htole32(
1924                             OHCI_ITD_NOCC |
1925                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1926                             OHCI_ITD_NOINTR |
1927                             OHCI_ITD_SET_FC(ncur));
1928
1929                         td->frames = ncur;
1930                         xfer->endpoint->isoc_next += ncur;
1931
1932                         if (length == 0) {
1933                                 /* all zero */
1934                                 td->itd_bp0 = 0;
1935                                 td->itd_be = ~0;
1936
1937                                 while (ncur--) {
1938                                         td->itd_offset[ncur] =
1939                                             htole16(OHCI_ITD_MK_OFFS(0));
1940                                 }
1941                         } else {
1942                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1943                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1944                                 buf_res.physaddr =
1945                                     OHCI_PAGE(buf_res.physaddr);
1946                                 td->itd_bp0 = htole32(buf_res.physaddr);
1947                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1948                                 td->itd_be = htole32(buf_res.physaddr);
1949
1950                                 while (ncur--) {
1951                                         itd_offset[ncur] += length;
1952                                         itd_offset[ncur] =
1953                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1954                                         td->itd_offset[ncur] =
1955                                             htole16(itd_offset[ncur]);
1956                                 }
1957                         }
1958                         ncur = 0;
1959                         length = 0;
1960                         td_last = td;
1961                         td = td->obj_next;
1962
1963                         if (td) {
1964                                 /* link the last TD with the next one */
1965                                 td_last->itd_next = td->itd_self;
1966                         }
1967                         usb_pc_cpu_flush(td_last->page_cache);
1968                 }
1969         }
1970
1971         /* update the last TD */
1972         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1973         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1974         td_last->itd_next = 0;
1975
1976         usb_pc_cpu_flush(td_last->page_cache);
1977
1978         xfer->td_transfer_last = td_last;
1979
1980 #ifdef USB_DEBUG
1981         if (ohcidebug > 8) {
1982                 DPRINTF("data before transfer:\n");
1983                 ohci_dump_itds(xfer->td_transfer_first);
1984         }
1985 #endif
1986         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1987
1988         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1989                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1990         else
1991                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1992
1993         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1994             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1995             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1996
1997         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1998                 ed_flags |= OHCI_ED_SPEED;
1999         }
2000         ed->ed_flags = htole32(ed_flags);
2001
2002         td = xfer->td_transfer_first;
2003
2004         ed->ed_headp = td->itd_self;
2005
2006         /* isochronous transfers are not affected by suspend / resume */
2007         /* the append function will flush the endpoint descriptor */
2008
2009         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2010 }
2011
2012 static void
2013 ohci_device_isoc_start(struct usb_xfer *xfer)
2014 {
2015         /* put transfer on interrupt queue */
2016         ohci_transfer_intr_enqueue(xfer);
2017 }
2018
2019 struct usb_pipe_methods ohci_device_isoc_methods =
2020 {
2021         .open = ohci_device_isoc_open,
2022         .close = ohci_device_isoc_close,
2023         .enter = ohci_device_isoc_enter,
2024         .start = ohci_device_isoc_start,
2025 };
2026
2027 /*------------------------------------------------------------------------*
2028  * ohci root control support
2029  *------------------------------------------------------------------------*
2030  * Simulate a hardware hub by handling all the necessary requests.
2031  *------------------------------------------------------------------------*/
2032
2033 static const
2034 struct usb_device_descriptor ohci_devd =
2035 {
2036         sizeof(struct usb_device_descriptor),
2037         UDESC_DEVICE,                   /* type */
2038         {0x00, 0x01},                   /* USB version */
2039         UDCLASS_HUB,                    /* class */
2040         UDSUBCLASS_HUB,                 /* subclass */
2041         UDPROTO_FSHUB,                  /* protocol */
2042         64,                             /* max packet */
2043         {0}, {0}, {0x00, 0x01},         /* device id */
2044         1, 2, 0,                        /* string indicies */
2045         1                               /* # of configurations */
2046 };
2047
2048 static const
2049 struct ohci_config_desc ohci_confd =
2050 {
2051         .confd = {
2052                 .bLength = sizeof(struct usb_config_descriptor),
2053                 .bDescriptorType = UDESC_CONFIG,
2054                 .wTotalLength[0] = sizeof(ohci_confd),
2055                 .bNumInterface = 1,
2056                 .bConfigurationValue = 1,
2057                 .iConfiguration = 0,
2058                 .bmAttributes = UC_SELF_POWERED,
2059                 .bMaxPower = 0,         /* max power */
2060         },
2061         .ifcd = {
2062                 .bLength = sizeof(struct usb_interface_descriptor),
2063                 .bDescriptorType = UDESC_INTERFACE,
2064                 .bNumEndpoints = 1,
2065                 .bInterfaceClass = UICLASS_HUB,
2066                 .bInterfaceSubClass = UISUBCLASS_HUB,
2067                 .bInterfaceProtocol = 0,
2068         },
2069         .endpd = {
2070                 .bLength = sizeof(struct usb_endpoint_descriptor),
2071                 .bDescriptorType = UDESC_ENDPOINT,
2072                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2073                 .bmAttributes = UE_INTERRUPT,
2074                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2075                 .bInterval = 255,
2076         },
2077 };
2078
2079 static const
2080 struct usb_hub_descriptor ohci_hubd =
2081 {
2082         .bDescLength = 0,       /* dynamic length */
2083         .bDescriptorType = UDESC_HUB,
2084 };
2085
2086 static usb_error_t
2087 ohci_roothub_exec(struct usb_device *udev,
2088     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2089 {
2090         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2091         const void *ptr;
2092         const char *str_ptr;
2093         uint32_t port;
2094         uint32_t v;
2095         uint16_t len;
2096         uint16_t value;
2097         uint16_t index;
2098         uint8_t l;
2099         usb_error_t err;
2100
2101         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2102
2103         /* buffer reset */
2104         ptr = (const void *)&sc->sc_hub_desc.temp;
2105         len = 0;
2106         err = 0;
2107
2108         value = UGETW(req->wValue);
2109         index = UGETW(req->wIndex);
2110
2111         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2112             "wValue=0x%04x wIndex=0x%04x\n",
2113             req->bmRequestType, req->bRequest,
2114             UGETW(req->wLength), value, index);
2115
2116 #define C(x,y) ((x) | ((y) << 8))
2117         switch (C(req->bRequest, req->bmRequestType)) {
2118         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2119         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2120         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2121                 /*
2122                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2123                  * for the integrated root hub.
2124                  */
2125                 break;
2126         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2127                 len = 1;
2128                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2129                 break;
2130         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2131                 switch (value >> 8) {
2132                 case UDESC_DEVICE:
2133                         if ((value & 0xff) != 0) {
2134                                 err = USB_ERR_IOERROR;
2135                                 goto done;
2136                         }
2137                         len = sizeof(ohci_devd);
2138                         ptr = (const void *)&ohci_devd;
2139                         break;
2140
2141                 case UDESC_CONFIG:
2142                         if ((value & 0xff) != 0) {
2143                                 err = USB_ERR_IOERROR;
2144                                 goto done;
2145                         }
2146                         len = sizeof(ohci_confd);
2147                         ptr = (const void *)&ohci_confd;
2148                         break;
2149
2150                 case UDESC_STRING:
2151                         switch (value & 0xff) {
2152                         case 0: /* Language table */
2153                                 str_ptr = "\001";
2154                                 break;
2155
2156                         case 1: /* Vendor */
2157                                 str_ptr = sc->sc_vendor;
2158                                 break;
2159
2160                         case 2: /* Product */
2161                                 str_ptr = "OHCI root HUB";
2162                                 break;
2163
2164                         default:
2165                                 str_ptr = "";
2166                                 break;
2167                         }
2168
2169                         len = usb_make_str_desc(
2170                             sc->sc_hub_desc.temp,
2171                             sizeof(sc->sc_hub_desc.temp),
2172                             str_ptr);
2173                         break;
2174
2175                 default:
2176                         err = USB_ERR_IOERROR;
2177                         goto done;
2178                 }
2179                 break;
2180         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2181                 len = 1;
2182                 sc->sc_hub_desc.temp[0] = 0;
2183                 break;
2184         case C(UR_GET_STATUS, UT_READ_DEVICE):
2185                 len = 2;
2186                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2187                 break;
2188         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2189         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2190                 len = 2;
2191                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2192                 break;
2193         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2194                 if (value >= OHCI_MAX_DEVICES) {
2195                         err = USB_ERR_IOERROR;
2196                         goto done;
2197                 }
2198                 sc->sc_addr = value;
2199                 break;
2200         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2201                 if ((value != 0) && (value != 1)) {
2202                         err = USB_ERR_IOERROR;
2203                         goto done;
2204                 }
2205                 sc->sc_conf = value;
2206                 break;
2207         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2208                 break;
2209         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2210         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2211         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2212                 err = USB_ERR_IOERROR;
2213                 goto done;
2214         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2215                 break;
2216         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2217                 break;
2218                 /* Hub requests */
2219         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2220                 break;
2221         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2222                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2223                     "port=%d feature=%d\n",
2224                     index, value);
2225                 if ((index < 1) ||
2226                     (index > sc->sc_noport)) {
2227                         err = USB_ERR_IOERROR;
2228                         goto done;
2229                 }
2230                 port = OHCI_RH_PORT_STATUS(index);
2231                 switch (value) {
2232                 case UHF_PORT_ENABLE:
2233                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2234                         break;
2235                 case UHF_PORT_SUSPEND:
2236                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2237                         break;
2238                 case UHF_PORT_POWER:
2239                         /* Yes, writing to the LOW_SPEED bit clears power. */
2240                         OWRITE4(sc, port, UPS_LOW_SPEED);
2241                         break;
2242                 case UHF_C_PORT_CONNECTION:
2243                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2244                         break;
2245                 case UHF_C_PORT_ENABLE:
2246                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2247                         break;
2248                 case UHF_C_PORT_SUSPEND:
2249                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2250                         break;
2251                 case UHF_C_PORT_OVER_CURRENT:
2252                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2253                         break;
2254                 case UHF_C_PORT_RESET:
2255                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2256                         break;
2257                 default:
2258                         err = USB_ERR_IOERROR;
2259                         goto done;
2260                 }
2261                 switch (value) {
2262                 case UHF_C_PORT_CONNECTION:
2263                 case UHF_C_PORT_ENABLE:
2264                 case UHF_C_PORT_SUSPEND:
2265                 case UHF_C_PORT_OVER_CURRENT:
2266                 case UHF_C_PORT_RESET:
2267                         /* enable RHSC interrupt if condition is cleared. */
2268                         if ((OREAD4(sc, port) >> 16) == 0)
2269                                 ohci_rhsc_enable(sc);
2270                         break;
2271                 default:
2272                         break;
2273                 }
2274                 break;
2275         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2276                 if ((value & 0xff) != 0) {
2277                         err = USB_ERR_IOERROR;
2278                         goto done;
2279                 }
2280                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2281
2282                 sc->sc_hub_desc.hubd = ohci_hubd;
2283                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2284                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2285                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2286                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2287                 /* XXX overcurrent */
2288                     );
2289                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2290                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2291
2292                 for (l = 0; l < sc->sc_noport; l++) {
2293                         if (v & 1) {
2294                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2295                         }
2296                         v >>= 1;
2297                 }
2298                 sc->sc_hub_desc.hubd.bDescLength =
2299                     8 + ((sc->sc_noport + 7) / 8);
2300                 len = sc->sc_hub_desc.hubd.bDescLength;
2301                 break;
2302
2303         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2304                 len = 16;
2305                 memset(sc->sc_hub_desc.temp, 0, 16);
2306                 break;
2307         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2308                 DPRINTFN(9, "get port status i=%d\n",
2309                     index);
2310                 if ((index < 1) ||
2311                     (index > sc->sc_noport)) {
2312                         err = USB_ERR_IOERROR;
2313                         goto done;
2314                 }
2315                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2316                 DPRINTFN(9, "port status=0x%04x\n", v);
2317                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2318                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2319                 len = sizeof(sc->sc_hub_desc.ps);
2320                 break;
2321         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2322                 err = USB_ERR_IOERROR;
2323                 goto done;
2324         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2325                 break;
2326         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2327                 if ((index < 1) ||
2328                     (index > sc->sc_noport)) {
2329                         err = USB_ERR_IOERROR;
2330                         goto done;
2331                 }
2332                 port = OHCI_RH_PORT_STATUS(index);
2333                 switch (value) {
2334                 case UHF_PORT_ENABLE:
2335                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2336                         break;
2337                 case UHF_PORT_SUSPEND:
2338                         OWRITE4(sc, port, UPS_SUSPEND);
2339                         break;
2340                 case UHF_PORT_RESET:
2341                         DPRINTFN(6, "reset port %d\n", index);
2342                         OWRITE4(sc, port, UPS_RESET);
2343                         for (v = 0;; v++) {
2344                                 if (v < 12) {
2345                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2346                                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
2347
2348                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2349                                                 break;
2350                                         }
2351                                 } else {
2352                                         err = USB_ERR_TIMEOUT;
2353                                         goto done;
2354                                 }
2355                         }
2356                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2357                             index, OREAD4(sc, port));
2358                         break;
2359                 case UHF_PORT_POWER:
2360                         DPRINTFN(3, "set port power %d\n", index);
2361                         OWRITE4(sc, port, UPS_PORT_POWER);
2362                         break;
2363                 default:
2364                         err = USB_ERR_IOERROR;
2365                         goto done;
2366                 }
2367                 break;
2368         default:
2369                 err = USB_ERR_IOERROR;
2370                 goto done;
2371         }
2372 done:
2373         *plength = len;
2374         *pptr = ptr;
2375         return (err);
2376 }
2377
2378 static void
2379 ohci_xfer_setup(struct usb_setup_params *parm)
2380 {
2381         struct usb_page_search page_info;
2382         struct usb_page_cache *pc;
2383         ohci_softc_t *sc;
2384         struct usb_xfer *xfer;
2385         void *last_obj;
2386         uint32_t ntd;
2387         uint32_t nitd;
2388         uint32_t nqh;
2389         uint32_t n;
2390
2391         sc = OHCI_BUS2SC(parm->udev->bus);
2392         xfer = parm->curr_xfer;
2393
2394         parm->hc_max_packet_size = 0x500;
2395         parm->hc_max_packet_count = 1;
2396         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2397
2398         /*
2399          * calculate ntd and nqh
2400          */
2401         if (parm->methods == &ohci_device_ctrl_methods) {
2402                 xfer->flags_int.bdma_enable = 1;
2403
2404                 usbd_transfer_setup_sub(parm);
2405
2406                 nitd = 0;
2407                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2408                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2409                 nqh = 1;
2410
2411         } else if (parm->methods == &ohci_device_bulk_methods) {
2412                 xfer->flags_int.bdma_enable = 1;
2413
2414                 usbd_transfer_setup_sub(parm);
2415
2416                 nitd = 0;
2417                 ntd = ((2 * xfer->nframes)
2418                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2419                 nqh = 1;
2420
2421         } else if (parm->methods == &ohci_device_intr_methods) {
2422                 xfer->flags_int.bdma_enable = 1;
2423
2424                 usbd_transfer_setup_sub(parm);
2425
2426                 nitd = 0;
2427                 ntd = ((2 * xfer->nframes)
2428                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2429                 nqh = 1;
2430
2431         } else if (parm->methods == &ohci_device_isoc_methods) {
2432                 xfer->flags_int.bdma_enable = 1;
2433
2434                 usbd_transfer_setup_sub(parm);
2435
2436                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2437                     ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2438                     1 /* EXTRA */ );
2439                 ntd = 0;
2440                 nqh = 1;
2441
2442         } else {
2443
2444                 usbd_transfer_setup_sub(parm);
2445
2446                 nitd = 0;
2447                 ntd = 0;
2448                 nqh = 0;
2449         }
2450
2451 alloc_dma_set:
2452
2453         if (parm->err) {
2454                 return;
2455         }
2456         last_obj = NULL;
2457
2458         if (usbd_transfer_setup_sub_malloc(
2459             parm, &pc, sizeof(ohci_td_t),
2460             OHCI_TD_ALIGN, ntd)) {
2461                 parm->err = USB_ERR_NOMEM;
2462                 return;
2463         }
2464         if (parm->buf) {
2465                 for (n = 0; n != ntd; n++) {
2466                         ohci_td_t *td;
2467
2468                         usbd_get_page(pc + n, 0, &page_info);
2469
2470                         td = page_info.buffer;
2471
2472                         /* init TD */
2473                         td->td_self = htole32(page_info.physaddr);
2474                         td->obj_next = last_obj;
2475                         td->page_cache = pc + n;
2476
2477                         last_obj = td;
2478
2479                         usb_pc_cpu_flush(pc + n);
2480                 }
2481         }
2482         if (usbd_transfer_setup_sub_malloc(
2483             parm, &pc, sizeof(ohci_itd_t),
2484             OHCI_ITD_ALIGN, nitd)) {
2485                 parm->err = USB_ERR_NOMEM;
2486                 return;
2487         }
2488         if (parm->buf) {
2489                 for (n = 0; n != nitd; n++) {
2490                         ohci_itd_t *itd;
2491
2492                         usbd_get_page(pc + n, 0, &page_info);
2493
2494                         itd = page_info.buffer;
2495
2496                         /* init TD */
2497                         itd->itd_self = htole32(page_info.physaddr);
2498                         itd->obj_next = last_obj;
2499                         itd->page_cache = pc + n;
2500
2501                         last_obj = itd;
2502
2503                         usb_pc_cpu_flush(pc + n);
2504                 }
2505         }
2506         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2507
2508         last_obj = NULL;
2509
2510         if (usbd_transfer_setup_sub_malloc(
2511             parm, &pc, sizeof(ohci_ed_t),
2512             OHCI_ED_ALIGN, nqh)) {
2513                 parm->err = USB_ERR_NOMEM;
2514                 return;
2515         }
2516         if (parm->buf) {
2517                 for (n = 0; n != nqh; n++) {
2518                         ohci_ed_t *ed;
2519
2520                         usbd_get_page(pc + n, 0, &page_info);
2521
2522                         ed = page_info.buffer;
2523
2524                         /* init QH */
2525                         ed->ed_self = htole32(page_info.physaddr);
2526                         ed->obj_next = last_obj;
2527                         ed->page_cache = pc + n;
2528
2529                         last_obj = ed;
2530
2531                         usb_pc_cpu_flush(pc + n);
2532                 }
2533         }
2534         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2535
2536         if (!xfer->flags_int.curr_dma_set) {
2537                 xfer->flags_int.curr_dma_set = 1;
2538                 goto alloc_dma_set;
2539         }
2540 }
2541
2542 static void
2543 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2544     struct usb_endpoint *ep)
2545 {
2546         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2547
2548         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2549             ep, udev->address,
2550             edesc->bEndpointAddress, udev->flags.usb_mode,
2551             sc->sc_addr);
2552
2553         if (udev->flags.usb_mode != USB_MODE_HOST) {
2554                 /* not supported */
2555                 return;
2556         }
2557         if (udev->device_index != sc->sc_addr) {
2558                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2559                 case UE_CONTROL:
2560                         ep->methods = &ohci_device_ctrl_methods;
2561                         break;
2562                 case UE_INTERRUPT:
2563                         ep->methods = &ohci_device_intr_methods;
2564                         break;
2565                 case UE_ISOCHRONOUS:
2566                         if (udev->speed == USB_SPEED_FULL) {
2567                                 ep->methods = &ohci_device_isoc_methods;
2568                         }
2569                         break;
2570                 case UE_BULK:
2571                         ep->methods = &ohci_device_bulk_methods;
2572                         break;
2573                 default:
2574                         /* do nothing */
2575                         break;
2576                 }
2577         }
2578 }
2579
2580 static void
2581 ohci_xfer_unsetup(struct usb_xfer *xfer)
2582 {
2583         return;
2584 }
2585
2586 static void
2587 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2588 {
2589         /*
2590          * Wait until hardware has finished any possible use of the
2591          * transfer descriptor(s) and QH
2592          */
2593         *pus = (1125);                  /* microseconds */
2594 }
2595
2596 static void
2597 ohci_device_resume(struct usb_device *udev)
2598 {
2599         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2600         struct usb_xfer *xfer;
2601         struct usb_pipe_methods *methods;
2602         ohci_ed_t *ed;
2603
2604         DPRINTF("\n");
2605
2606         USB_BUS_LOCK(udev->bus);
2607
2608         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2609
2610                 if (xfer->xroot->udev == udev) {
2611
2612                         methods = xfer->endpoint->methods;
2613                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2614
2615                         if (methods == &ohci_device_bulk_methods) {
2616                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2617                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2618                         }
2619                         if (methods == &ohci_device_ctrl_methods) {
2620                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2621                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2622                         }
2623                         if (methods == &ohci_device_intr_methods) {
2624                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2625                         }
2626                 }
2627         }
2628
2629         USB_BUS_UNLOCK(udev->bus);
2630
2631         return;
2632 }
2633
2634 static void
2635 ohci_device_suspend(struct usb_device *udev)
2636 {
2637         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2638         struct usb_xfer *xfer;
2639         struct usb_pipe_methods *methods;
2640         ohci_ed_t *ed;
2641
2642         DPRINTF("\n");
2643
2644         USB_BUS_LOCK(udev->bus);
2645
2646         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2647
2648                 if (xfer->xroot->udev == udev) {
2649
2650                         methods = xfer->endpoint->methods;
2651                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2652
2653                         if (methods == &ohci_device_bulk_methods) {
2654                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2655                         }
2656                         if (methods == &ohci_device_ctrl_methods) {
2657                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2658                         }
2659                         if (methods == &ohci_device_intr_methods) {
2660                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2661                         }
2662                 }
2663         }
2664
2665         USB_BUS_UNLOCK(udev->bus);
2666
2667         return;
2668 }
2669
2670 static void
2671 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2672 {
2673         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2674
2675         switch (state) {
2676         case USB_HW_POWER_SUSPEND:
2677         case USB_HW_POWER_SHUTDOWN:
2678                 ohci_suspend(sc);
2679                 break;
2680         case USB_HW_POWER_RESUME:
2681                 ohci_resume(sc);
2682                 break;
2683         default:
2684                 break;
2685         }
2686 }
2687
2688 static void
2689 ohci_set_hw_power(struct usb_bus *bus)
2690 {
2691         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2692         uint32_t temp;
2693         uint32_t flags;
2694
2695         DPRINTF("\n");
2696
2697         USB_BUS_LOCK(bus);
2698
2699         flags = bus->hw_power_state;
2700
2701         temp = OREAD4(sc, OHCI_CONTROL);
2702         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2703
2704         if (flags & USB_HW_POWER_CONTROL)
2705                 temp |= OHCI_CLE;
2706
2707         if (flags & USB_HW_POWER_BULK)
2708                 temp |= OHCI_BLE;
2709
2710         if (flags & USB_HW_POWER_INTERRUPT)
2711                 temp |= OHCI_PLE;
2712
2713         if (flags & USB_HW_POWER_ISOC)
2714                 temp |= OHCI_IE | OHCI_PLE;
2715
2716         OWRITE4(sc, OHCI_CONTROL, temp);
2717
2718         USB_BUS_UNLOCK(bus);
2719
2720         return;
2721 }
2722
2723 struct usb_bus_methods ohci_bus_methods =
2724 {
2725         .endpoint_init = ohci_ep_init,
2726         .xfer_setup = ohci_xfer_setup,
2727         .xfer_unsetup = ohci_xfer_unsetup,
2728         .get_dma_delay = ohci_get_dma_delay,
2729         .device_resume = ohci_device_resume,
2730         .device_suspend = ohci_device_suspend,
2731         .set_hw_power = ohci_set_hw_power,
2732         .set_hw_power_sleep = ohci_set_hw_power_sleep,
2733         .roothub_exec = ohci_roothub_exec,
2734         .xfer_poll = ohci_do_poll,
2735 };