sys/dev/usb/wlan/if_ural.c

   1 /*      $FreeBSD$       */
   2
   3 /*-
   4  * Copyright (c) 2005, 2006
   5  *      Damien Bergamini <damien.bergamini@free.fr>
   6  *
   7  * Copyright (c) 2006, 2008
   8  *      Hans Petter Selasky <hselasky@FreeBSD.org>
   9  *
  10  * Permission to use, copy, modify, and distribute this software for any
  11  * purpose with or without fee is hereby granted, provided that the above
  12  * copyright notice and this permission notice appear in all copies.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  15  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  16  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  17  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  18  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  19  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  20  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  21  */
  22
  23 #include <sys/cdefs.h>
  24 __FBSDID("$FreeBSD$");
  25
  26 /*-
  27  * Ralink Technology RT2500USB chipset driver
  28  * http://www.ralinktech.com/
  29  */
  30
  31 #include <sys/param.h>
  32 #include <sys/sockio.h>
  33 #include <sys/sysctl.h>
  34 #include <sys/lock.h>
  35 #include <sys/mutex.h>
  36 #include <sys/mbuf.h>
  37 #include <sys/kernel.h>
  38 #include <sys/socket.h>
  39 #include <sys/systm.h>
  40 #include <sys/malloc.h>
  41 #include <sys/module.h>
  42 #include <sys/bus.h>
  43 #include <sys/endian.h>
  44 #include <sys/kdb.h>
  45
  46 #include <machine/bus.h>
  47 #include <machine/resource.h>
  48 #include <sys/rman.h>
  49
  50 #include <net/bpf.h>
  51 #include <net/if.h>
  52 #include <net/if_arp.h>
  53 #include <net/ethernet.h>
  54 #include <net/if_dl.h>
  55 #include <net/if_media.h>
  56 #include <net/if_types.h>
  57
  58 #ifdef INET
  59 #include <netinet/in.h>
  60 #include <netinet/in_systm.h>
  61 #include <netinet/in_var.h>
  62 #include <netinet/if_ether.h>
  63 #include <netinet/ip.h>
  64 #endif
  65
  66 #include <net80211/ieee80211_var.h>
  67 #include <net80211/ieee80211_regdomain.h>
  68 #include <net80211/ieee80211_radiotap.h>
  69 #include <net80211/ieee80211_ratectl.h>
  70
  71 #include <dev/usb/usb.h>
  72 #include <dev/usb/usbdi.h>
  73 #include "usbdevs.h"
  74
  75 #define USB_DEBUG_VAR ural_debug
  76 #include <dev/usb/usb_debug.h>
  77
  78 #include <dev/usb/wlan/if_uralreg.h>
  79 #include <dev/usb/wlan/if_uralvar.h>
  80
  81 #ifdef USB_DEBUG
  82 static int ural_debug = 0;
  83
  84 static SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
  85 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
  86     "Debug level");
  87 #endif
  88
  89 #define URAL_RSSI(rssi)                                 \
  90         ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?   \
  91          ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
  92
  93 /* various supported device vendors/products */
  94 static const STRUCT_USB_HOST_ID ural_devs[] = {
  95 #define URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
  96         URAL_DEV(ASUS, WL167G),
  97         URAL_DEV(ASUS, RT2570),
  98         URAL_DEV(BELKIN, F5D7050),
  99         URAL_DEV(BELKIN, F5D7051),
 100         URAL_DEV(CISCOLINKSYS, HU200TS),
 101         URAL_DEV(CISCOLINKSYS, WUSB54G),
 102         URAL_DEV(CISCOLINKSYS, WUSB54GP),
 103         URAL_DEV(CONCEPTRONIC2, C54RU),
 104         URAL_DEV(DLINK, DWLG122),
 105         URAL_DEV(GIGABYTE, GN54G),
 106         URAL_DEV(GIGABYTE, GNWBKG),
 107         URAL_DEV(GUILLEMOT, HWGUSB254),
 108         URAL_DEV(MELCO, KG54),
 109         URAL_DEV(MELCO, KG54AI),
 110         URAL_DEV(MELCO, KG54YB),
 111         URAL_DEV(MELCO, NINWIFI),
 112         URAL_DEV(MSI, RT2570),
 113         URAL_DEV(MSI, RT2570_2),
 114         URAL_DEV(MSI, RT2570_3),
 115         URAL_DEV(NOVATECH, NV902),
 116         URAL_DEV(RALINK, RT2570),
 117         URAL_DEV(RALINK, RT2570_2),
 118         URAL_DEV(RALINK, RT2570_3),
 119         URAL_DEV(SIEMENS2, WL54G),
 120         URAL_DEV(SMC, 2862WG),
 121         URAL_DEV(SPHAIRON, UB801R),
 122         URAL_DEV(SURECOM, RT2570),
 123         URAL_DEV(VTECH, RT2570),
 124         URAL_DEV(ZINWELL, RT2570),
 125 #undef URAL_DEV
 126 };
 127
 128 static usb_callback_t ural_bulk_read_callback;
 129 static usb_callback_t ural_bulk_write_callback;
 130
 131 static usb_error_t      ural_do_request(struct ural_softc *sc,
 132                             struct usb_device_request *req, void *data);
 133 static struct ieee80211vap *ural_vap_create(struct ieee80211com *,
 134                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
 135                             int, const uint8_t [IEEE80211_ADDR_LEN],
 136                             const uint8_t [IEEE80211_ADDR_LEN]);
 137 static void             ural_vap_delete(struct ieee80211vap *);
 138 static void             ural_tx_free(struct ural_tx_data *, int);
 139 static void             ural_setup_tx_list(struct ural_softc *);
 140 static void             ural_unsetup_tx_list(struct ural_softc *);
 141 static int              ural_newstate(struct ieee80211vap *,
 142                             enum ieee80211_state, int);
 143 static void             ural_setup_tx_desc(struct ural_softc *,
 144                             struct ural_tx_desc *, uint32_t, int, int);
 145 static int              ural_tx_bcn(struct ural_softc *, struct mbuf *,
 146                             struct ieee80211_node *);
 147 static int              ural_tx_mgt(struct ural_softc *, struct mbuf *,
 148                             struct ieee80211_node *);
 149 static int              ural_tx_data(struct ural_softc *, struct mbuf *,
 150                             struct ieee80211_node *);
 151 static void             ural_start(struct ifnet *);
 152 static int              ural_ioctl(struct ifnet *, u_long, caddr_t);
 153 static void             ural_set_testmode(struct ural_softc *);
 154 static void             ural_eeprom_read(struct ural_softc *, uint16_t, void *,
 155                             int);
 156 static uint16_t         ural_read(struct ural_softc *, uint16_t);
 157 static void             ural_read_multi(struct ural_softc *, uint16_t, void *,
 158                             int);
 159 static void             ural_write(struct ural_softc *, uint16_t, uint16_t);
 160 static void             ural_write_multi(struct ural_softc *, uint16_t, void *,
 161                             int) __unused;
 162 static void             ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
 163 static uint8_t          ural_bbp_read(struct ural_softc *, uint8_t);
 164 static void             ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
 165 static void             ural_scan_start(struct ieee80211com *);
 166 static void             ural_scan_end(struct ieee80211com *);
 167 static void             ural_set_channel(struct ieee80211com *);
 168 static void             ural_set_chan(struct ural_softc *,
 169                             struct ieee80211_channel *);
 170 static void             ural_disable_rf_tune(struct ural_softc *);
 171 static void             ural_enable_tsf_sync(struct ural_softc *);
 172 static void             ural_enable_tsf(struct ural_softc *);
 173 static void             ural_update_slot(struct ifnet *);
 174 static void             ural_set_txpreamble(struct ural_softc *);
 175 static void             ural_set_basicrates(struct ural_softc *,
 176                             const struct ieee80211_channel *);
 177 static void             ural_set_bssid(struct ural_softc *, const uint8_t *);
 178 static void             ural_set_macaddr(struct ural_softc *, uint8_t *);
 179 static void             ural_update_promisc(struct ifnet *);
 180 static void             ural_setpromisc(struct ural_softc *);
 181 static const char       *ural_get_rf(int);
 182 static void             ural_read_eeprom(struct ural_softc *);
 183 static int              ural_bbp_init(struct ural_softc *);
 184 static void             ural_set_txantenna(struct ural_softc *, int);
 185 static void             ural_set_rxantenna(struct ural_softc *, int);
 186 static void             ural_init_locked(struct ural_softc *);
 187 static void             ural_init(void *);
 188 static void             ural_stop(struct ural_softc *);
 189 static int              ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
 190                             const struct ieee80211_bpf_params *);
 191 static void             ural_ratectl_start(struct ural_softc *,
 192                             struct ieee80211_node *);
 193 static void             ural_ratectl_timeout(void *);
 194 static void             ural_ratectl_task(void *, int);
 195 static int              ural_pause(struct ural_softc *sc, int timeout);
 196
 197 /*
 198  * Default values for MAC registers; values taken from the reference driver.
 199  */
 200 static const struct {
 201         uint16_t        reg;
 202         uint16_t        val;
 203 } ural_def_mac[] = {
 204         { RAL_TXRX_CSR5,  0x8c8d },
 205         { RAL_TXRX_CSR6,  0x8b8a },
 206         { RAL_TXRX_CSR7,  0x8687 },
 207         { RAL_TXRX_CSR8,  0x0085 },
 208         { RAL_MAC_CSR13,  0x1111 },
 209         { RAL_MAC_CSR14,  0x1e11 },
 210         { RAL_TXRX_CSR21, 0xe78f },
 211         { RAL_MAC_CSR9,   0xff1d },
 212         { RAL_MAC_CSR11,  0x0002 },
 213         { RAL_MAC_CSR22,  0x0053 },
 214         { RAL_MAC_CSR15,  0x0000 },
 215         { RAL_MAC_CSR8,   RAL_FRAME_SIZE },
 216         { RAL_TXRX_CSR19, 0x0000 },
 217         { RAL_TXRX_CSR18, 0x005a },
 218         { RAL_PHY_CSR2,   0x0000 },
 219         { RAL_TXRX_CSR0,  0x1ec0 },
 220         { RAL_PHY_CSR4,   0x000f }
 221 };
 222
 223 /*
 224  * Default values for BBP registers; values taken from the reference driver.
 225  */
 226 static const struct {
 227         uint8_t reg;
 228         uint8_t val;
 229 } ural_def_bbp[] = {
 230         {  3, 0x02 },
 231         {  4, 0x19 },
 232         { 14, 0x1c },
 233         { 15, 0x30 },
 234         { 16, 0xac },
 235         { 17, 0x48 },
 236         { 18, 0x18 },
 237         { 19, 0xff },
 238         { 20, 0x1e },
 239         { 21, 0x08 },
 240         { 22, 0x08 },
 241         { 23, 0x08 },
 242         { 24, 0x80 },
 243         { 25, 0x50 },
 244         { 26, 0x08 },
 245         { 27, 0x23 },
 246         { 30, 0x10 },
 247         { 31, 0x2b },
 248         { 32, 0xb9 },
 249         { 34, 0x12 },
 250         { 35, 0x50 },
 251         { 39, 0xc4 },
 252         { 40, 0x02 },
 253         { 41, 0x60 },
 254         { 53, 0x10 },
 255         { 54, 0x18 },
 256         { 56, 0x08 },
 257         { 57, 0x10 },
 258         { 58, 0x08 },
 259         { 61, 0x60 },
 260         { 62, 0x10 },
 261         { 75, 0xff }
 262 };
 263
 264 /*
 265  * Default values for RF register R2 indexed by channel numbers.
 266  */
 267 static const uint32_t ural_rf2522_r2[] = {
 268         0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
 269         0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
 270 };
 271
 272 static const uint32_t ural_rf2523_r2[] = {
 273         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 274         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 275 };
 276
 277 static const uint32_t ural_rf2524_r2[] = {
 278         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 279         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 280 };
 281
 282 static const uint32_t ural_rf2525_r2[] = {
 283         0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
 284         0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
 285 };
 286
 287 static const uint32_t ural_rf2525_hi_r2[] = {
 288         0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
 289         0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
 290 };
 291
 292 static const uint32_t ural_rf2525e_r2[] = {
 293         0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
 294         0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
 295 };
 296
 297 static const uint32_t ural_rf2526_hi_r2[] = {
 298         0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
 299         0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
 300 };
 301
 302 static const uint32_t ural_rf2526_r2[] = {
 303         0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
 304         0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
 305 };
 306
 307 /*
 308  * For dual-band RF, RF registers R1 and R4 also depend on channel number;
 309  * values taken from the reference driver.
 310  */
 311 static const struct {
 312         uint8_t         chan;
 313         uint32_t        r1;
 314         uint32_t        r2;
 315         uint32_t        r4;
 316 } ural_rf5222[] = {
 317         {   1, 0x08808, 0x0044d, 0x00282 },
 318         {   2, 0x08808, 0x0044e, 0x00282 },
 319         {   3, 0x08808, 0x0044f, 0x00282 },
 320         {   4, 0x08808, 0x00460, 0x00282 },
 321         {   5, 0x08808, 0x00461, 0x00282 },
 322         {   6, 0x08808, 0x00462, 0x00282 },
 323         {   7, 0x08808, 0x00463, 0x00282 },
 324         {   8, 0x08808, 0x00464, 0x00282 },
 325         {   9, 0x08808, 0x00465, 0x00282 },
 326         {  10, 0x08808, 0x00466, 0x00282 },
 327         {  11, 0x08808, 0x00467, 0x00282 },
 328         {  12, 0x08808, 0x00468, 0x00282 },
 329         {  13, 0x08808, 0x00469, 0x00282 },
 330         {  14, 0x08808, 0x0046b, 0x00286 },
 331
 332         {  36, 0x08804, 0x06225, 0x00287 },
 333         {  40, 0x08804, 0x06226, 0x00287 },
 334         {  44, 0x08804, 0x06227, 0x00287 },
 335         {  48, 0x08804, 0x06228, 0x00287 },
 336         {  52, 0x08804, 0x06229, 0x00287 },
 337         {  56, 0x08804, 0x0622a, 0x00287 },
 338         {  60, 0x08804, 0x0622b, 0x00287 },
 339         {  64, 0x08804, 0x0622c, 0x00287 },
 340
 341         { 100, 0x08804, 0x02200, 0x00283 },
 342         { 104, 0x08804, 0x02201, 0x00283 },
 343         { 108, 0x08804, 0x02202, 0x00283 },
 344         { 112, 0x08804, 0x02203, 0x00283 },
 345         { 116, 0x08804, 0x02204, 0x00283 },
 346         { 120, 0x08804, 0x02205, 0x00283 },
 347         { 124, 0x08804, 0x02206, 0x00283 },
 348         { 128, 0x08804, 0x02207, 0x00283 },
 349         { 132, 0x08804, 0x02208, 0x00283 },
 350         { 136, 0x08804, 0x02209, 0x00283 },
 351         { 140, 0x08804, 0x0220a, 0x00283 },
 352
 353         { 149, 0x08808, 0x02429, 0x00281 },
 354         { 153, 0x08808, 0x0242b, 0x00281 },
 355         { 157, 0x08808, 0x0242d, 0x00281 },
 356         { 161, 0x08808, 0x0242f, 0x00281 }
 357 };
 358
 359 static const struct usb_config ural_config[URAL_N_TRANSFER] = {
 360         [URAL_BULK_WR] = {
 361                 .type = UE_BULK,
 362                 .endpoint = UE_ADDR_ANY,
 363                 .direction = UE_DIR_OUT,
 364                 .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
 365                 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
 366                 .callback = ural_bulk_write_callback,
 367                 .timeout = 5000,        /* ms */
 368         },
 369         [URAL_BULK_RD] = {
 370                 .type = UE_BULK,
 371                 .endpoint = UE_ADDR_ANY,
 372                 .direction = UE_DIR_IN,
 373                 .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
 374                 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
 375                 .callback = ural_bulk_read_callback,
 376         },
 377 };
 378
 379 static device_probe_t ural_match;
 380 static device_attach_t ural_attach;
 381 static device_detach_t ural_detach;
 382
 383 static device_method_t ural_methods[] = {
 384         /* Device interface */
 385         DEVMETHOD(device_probe,         ural_match),
 386         DEVMETHOD(device_attach,        ural_attach),
 387         DEVMETHOD(device_detach,        ural_detach),
 388
 389         { 0, 0 }
 390 };
 391
 392 static driver_t ural_driver = {
 393         .name = "ural",
 394         .methods = ural_methods,
 395         .size = sizeof(struct ural_softc),
 396 };
 397
 398 static devclass_t ural_devclass;
 399
 400 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
 401 MODULE_DEPEND(ural, usb, 1, 1, 1);
 402 MODULE_DEPEND(ural, wlan, 1, 1, 1);
 403 MODULE_VERSION(ural, 1);
 404
 405 static int
 406 ural_match(device_t self)
 407 {
 408         struct usb_attach_arg *uaa = device_get_ivars(self);
 409
 410         if (uaa->usb_mode != USB_MODE_HOST)
 411                 return (ENXIO);
 412         if (uaa->info.bConfigIndex != 0)
 413                 return (ENXIO);
 414         if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
 415                 return (ENXIO);
 416
 417         return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
 418 }
 419
 420 static int
 421 ural_attach(device_t self)
 422 {
 423         struct usb_attach_arg *uaa = device_get_ivars(self);
 424         struct ural_softc *sc = device_get_softc(self);
 425         struct ifnet *ifp;
 426         struct ieee80211com *ic;
 427         uint8_t iface_index, bands;
 428         int error;
 429
 430         device_set_usb_desc(self);
 431         sc->sc_udev = uaa->device;
 432         sc->sc_dev = self;
 433
 434         mtx_init(&sc->sc_mtx, device_get_nameunit(self),
 435             MTX_NETWORK_LOCK, MTX_DEF);
 436
 437         iface_index = RAL_IFACE_INDEX;
 438         error = usbd_transfer_setup(uaa->device,
 439             &iface_index, sc->sc_xfer, ural_config,
 440             URAL_N_TRANSFER, sc, &sc->sc_mtx);
 441         if (error) {
 442                 device_printf(self, "could not allocate USB transfers, "
 443                     "err=%s\n", usbd_errstr(error));
 444                 goto detach;
 445         }
 446
 447         RAL_LOCK(sc);
 448         /* retrieve RT2570 rev. no */
 449         sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
 450
 451         /* retrieve MAC address and various other things from EEPROM */
 452         ural_read_eeprom(sc);
 453         RAL_UNLOCK(sc);
 454
 455         device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
 456             sc->asic_rev, ural_get_rf(sc->rf_rev));
 457
 458         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
 459         if (ifp == NULL) {
 460                 device_printf(sc->sc_dev, "can not if_alloc()\n");
 461                 goto detach;
 462         }
 463         ic = ifp->if_l2com;
 464
 465         ifp->if_softc = sc;
 466         if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
 467         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 468         ifp->if_init = ural_init;
 469         ifp->if_ioctl = ural_ioctl;
 470         ifp->if_start = ural_start;
 471         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 472         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
 473         IFQ_SET_READY(&ifp->if_snd);
 474
 475         ic->ic_ifp = ifp;
 476         ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
 477
 478         /* set device capabilities */
 479         ic->ic_caps =
 480               IEEE80211_C_STA           /* station mode supported */
 481             | IEEE80211_C_IBSS          /* IBSS mode supported */
 482             | IEEE80211_C_MONITOR       /* monitor mode supported */
 483             | IEEE80211_C_HOSTAP        /* HostAp mode supported */
 484             | IEEE80211_C_TXPMGT        /* tx power management */
 485             | IEEE80211_C_SHPREAMBLE    /* short preamble supported */
 486             | IEEE80211_C_SHSLOT        /* short slot time supported */
 487             | IEEE80211_C_BGSCAN        /* bg scanning supported */
 488             | IEEE80211_C_WPA           /* 802.11i */
 489             ;
 490
 491         bands = 0;
 492         setbit(&bands, IEEE80211_MODE_11B);
 493         setbit(&bands, IEEE80211_MODE_11G);
 494         if (sc->rf_rev == RAL_RF_5222)
 495                 setbit(&bands, IEEE80211_MODE_11A);
 496         ieee80211_init_channels(ic, NULL, &bands);
 497
 498         ieee80211_ifattach(ic, sc->sc_bssid);
 499         ic->ic_update_promisc = ural_update_promisc;
 500         ic->ic_raw_xmit = ural_raw_xmit;
 501         ic->ic_scan_start = ural_scan_start;
 502         ic->ic_scan_end = ural_scan_end;
 503         ic->ic_set_channel = ural_set_channel;
 504
 505         ic->ic_vap_create = ural_vap_create;
 506         ic->ic_vap_delete = ural_vap_delete;
 507
 508         ieee80211_radiotap_attach(ic,
 509             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
 510                 RAL_TX_RADIOTAP_PRESENT,
 511             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
 512                 RAL_RX_RADIOTAP_PRESENT);
 513
 514         if (bootverbose)
 515                 ieee80211_announce(ic);
 516
 517         return (0);
 518
 519 detach:
 520         ural_detach(self);
 521         return (ENXIO);                 /* failure */
 522 }
 523
 524 static int
 525 ural_detach(device_t self)
 526 {
 527         struct ural_softc *sc = device_get_softc(self);
 528         struct ifnet *ifp = sc->sc_ifp;
 529         struct ieee80211com *ic;
 530
 531         /* stop all USB transfers */
 532         usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
 533
 534         /* free TX list, if any */
 535         RAL_LOCK(sc);
 536         ural_unsetup_tx_list(sc);
 537         RAL_UNLOCK(sc);
 538
 539         if (ifp) {
 540                 ic = ifp->if_l2com;
 541                 ieee80211_ifdetach(ic);
 542                 if_free(ifp);
 543         }
 544         mtx_destroy(&sc->sc_mtx);
 545
 546         return (0);
 547 }
 548
 549 static usb_error_t
 550 ural_do_request(struct ural_softc *sc,
 551     struct usb_device_request *req, void *data)
 552 {
 553         usb_error_t err;
 554         int ntries = 10;
 555
 556         while (ntries--) {
 557                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
 558                     req, data, 0, NULL, 250 /* ms */);
 559                 if (err == 0)
 560                         break;
 561
 562                 DPRINTFN(1, "Control request failed, %s (retrying)\n",
 563                     usbd_errstr(err));
 564                 if (ural_pause(sc, hz / 100))
 565                         break;
 566         }
 567         return (err);
 568 }
 569
 570 static struct ieee80211vap *
 571 ural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
 572     enum ieee80211_opmode opmode, int flags,
 573     const uint8_t bssid[IEEE80211_ADDR_LEN],
 574     const uint8_t mac[IEEE80211_ADDR_LEN])
 575 {
 576         struct ural_softc *sc = ic->ic_ifp->if_softc;
 577         struct ural_vap *uvp;
 578         struct ieee80211vap *vap;
 579
 580         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
 581                 return NULL;
 582         uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
 583             M_80211_VAP, M_NOWAIT | M_ZERO);
 584         if (uvp == NULL)
 585                 return NULL;
 586         vap = &uvp->vap;
 587         /* enable s/w bmiss handling for sta mode */
 588         ieee80211_vap_setup(ic, vap, name, unit, opmode,
 589             flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
 590
 591         /* override state transition machine */
 592         uvp->newstate = vap->iv_newstate;
 593         vap->iv_newstate = ural_newstate;
 594
 595         usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
 596         TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
 597         ieee80211_ratectl_init(vap);
 598         ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
 599
 600         /* complete setup */
 601         ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
 602         ic->ic_opmode = opmode;
 603         return vap;
 604 }
 605
 606 static void
 607 ural_vap_delete(struct ieee80211vap *vap)
 608 {
 609         struct ural_vap *uvp = URAL_VAP(vap);
 610         struct ieee80211com *ic = vap->iv_ic;
 611
 612         usb_callout_drain(&uvp->ratectl_ch);
 613         ieee80211_draintask(ic, &uvp->ratectl_task);
 614         ieee80211_ratectl_deinit(vap);
 615         ieee80211_vap_detach(vap);
 616         free(uvp, M_80211_VAP);
 617 }
 618
 619 static void
 620 ural_tx_free(struct ural_tx_data *data, int txerr)
 621 {
 622         struct ural_softc *sc = data->sc;
 623
 624         if (data->m != NULL) {
 625                 if (data->m->m_flags & M_TXCB)
 626                         ieee80211_process_callback(data->ni, data->m,
 627                             txerr ? ETIMEDOUT : 0);
 628                 m_freem(data->m);
 629                 data->m = NULL;
 630
 631                 ieee80211_free_node(data->ni);
 632                 data->ni = NULL;
 633         }
 634         STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 635         sc->tx_nfree++;
 636 }
 637
 638 static void
 639 ural_setup_tx_list(struct ural_softc *sc)
 640 {
 641         struct ural_tx_data *data;
 642         int i;
 643
 644         sc->tx_nfree = 0;
 645         STAILQ_INIT(&sc->tx_q);
 646         STAILQ_INIT(&sc->tx_free);
 647
 648         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 649                 data = &sc->tx_data[i];
 650
 651                 data->sc = sc;
 652                 STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 653                 sc->tx_nfree++;
 654         }
 655 }
 656
 657 static void
 658 ural_unsetup_tx_list(struct ural_softc *sc)
 659 {
 660         struct ural_tx_data *data;
 661         int i;
 662
 663         /* make sure any subsequent use of the queues will fail */
 664         sc->tx_nfree = 0;
 665         STAILQ_INIT(&sc->tx_q);
 666         STAILQ_INIT(&sc->tx_free);
 667
 668         /* free up all node references and mbufs */
 669         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 670                 data = &sc->tx_data[i];
 671
 672                 if (data->m != NULL) {
 673                         m_freem(data->m);
 674                         data->m = NULL;
 675                 }
 676                 if (data->ni != NULL) {
 677                         ieee80211_free_node(data->ni);
 678                         data->ni = NULL;
 679                 }
 680         }
 681 }
 682
 683 static int
 684 ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 685 {
 686         struct ural_vap *uvp = URAL_VAP(vap);
 687         struct ieee80211com *ic = vap->iv_ic;
 688         struct ural_softc *sc = ic->ic_ifp->if_softc;
 689         const struct ieee80211_txparam *tp;
 690         struct ieee80211_node *ni;
 691         struct mbuf *m;
 692
 693         DPRINTF("%s -> %s\n",
 694                 ieee80211_state_name[vap->iv_state],
 695                 ieee80211_state_name[nstate]);
 696
 697         IEEE80211_UNLOCK(ic);
 698         RAL_LOCK(sc);
 699         usb_callout_stop(&uvp->ratectl_ch);
 700
 701         switch (nstate) {
 702         case IEEE80211_S_INIT:
 703                 if (vap->iv_state == IEEE80211_S_RUN) {
 704                         /* abort TSF synchronization */
 705                         ural_write(sc, RAL_TXRX_CSR19, 0);
 706
 707                         /* force tx led to stop blinking */
 708                         ural_write(sc, RAL_MAC_CSR20, 0);
 709                 }
 710                 break;
 711
 712         case IEEE80211_S_RUN:
 713                 ni = ieee80211_ref_node(vap->iv_bss);
 714
 715                 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
 716                         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
 717                                 RAL_UNLOCK(sc);
 718                                 IEEE80211_LOCK(ic);
 719                                 ieee80211_free_node(ni);
 720                                 return (-1);
 721                         }
 722                         ural_update_slot(ic->ic_ifp);
 723                         ural_set_txpreamble(sc);
 724                         ural_set_basicrates(sc, ic->ic_bsschan);
 725                         IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
 726                         ural_set_bssid(sc, sc->sc_bssid);
 727                 }
 728
 729                 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
 730                     vap->iv_opmode == IEEE80211_M_IBSS) {
 731                         m = ieee80211_beacon_alloc(ni, &uvp->bo);
 732                         if (m == NULL) {
 733                                 device_printf(sc->sc_dev,
 734                                     "could not allocate beacon\n");
 735                                 RAL_UNLOCK(sc);
 736                                 IEEE80211_LOCK(ic);
 737                                 ieee80211_free_node(ni);
 738                                 return (-1);
 739                         }
 740                         ieee80211_ref_node(ni);
 741                         if (ural_tx_bcn(sc, m, ni) != 0) {
 742                                 device_printf(sc->sc_dev,
 743                                     "could not send beacon\n");
 744                                 RAL_UNLOCK(sc);
 745                                 IEEE80211_LOCK(ic);
 746                                 ieee80211_free_node(ni);
 747                                 return (-1);
 748                         }
 749                 }
 750
 751                 /* make tx led blink on tx (controlled by ASIC) */
 752                 ural_write(sc, RAL_MAC_CSR20, 1);
 753
 754                 if (vap->iv_opmode != IEEE80211_M_MONITOR)
 755                         ural_enable_tsf_sync(sc);
 756                 else
 757                         ural_enable_tsf(sc);
 758
 759                 /* enable automatic rate adaptation */
 760                 /* XXX should use ic_bsschan but not valid until after newstate call below */
 761                 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
 762                 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
 763                         ural_ratectl_start(sc, ni);
 764                 ieee80211_free_node(ni);
 765                 break;
 766
 767         default:
 768                 break;
 769         }
 770         RAL_UNLOCK(sc);
 771         IEEE80211_LOCK(ic);
 772         return (uvp->newstate(vap, nstate, arg));
 773 }
 774
 775
 776 static void
 777 ural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
 778 {
 779         struct ural_softc *sc = usbd_xfer_softc(xfer);
 780         struct ifnet *ifp = sc->sc_ifp;
 781         struct ieee80211vap *vap;
 782         struct ural_tx_data *data;
 783         struct mbuf *m;
 784         struct usb_page_cache *pc;
 785         int len;
 786
 787         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 788
 789         switch (USB_GET_STATE(xfer)) {
 790         case USB_ST_TRANSFERRED:
 791                 DPRINTFN(11, "transfer complete, %d bytes\n", len);
 792
 793                 /* free resources */
 794                 data = usbd_xfer_get_priv(xfer);
 795                 ural_tx_free(data, 0);
 796                 usbd_xfer_set_priv(xfer, NULL);
 797
 798                 ifp->if_opackets++;
 799                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 800
 801                 /* FALLTHROUGH */
 802         case USB_ST_SETUP:
 803 tr_setup:
 804                 data = STAILQ_FIRST(&sc->tx_q);
 805                 if (data) {
 806                         STAILQ_REMOVE_HEAD(&sc->tx_q, next);
 807                         m = data->m;
 808
 809                         if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
 810                                 DPRINTFN(0, "data overflow, %u bytes\n",
 811                                     m->m_pkthdr.len);
 812                                 m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
 813                         }
 814                         pc = usbd_xfer_get_frame(xfer, 0);
 815                         usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
 816                         usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
 817                             m->m_pkthdr.len);
 818
 819                         vap = data->ni->ni_vap;
 820                         if (ieee80211_radiotap_active_vap(vap)) {
 821                                 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
 822
 823                                 tap->wt_flags = 0;
 824                                 tap->wt_rate = data->rate;
 825                                 tap->wt_antenna = sc->tx_ant;
 826
 827                                 ieee80211_radiotap_tx(vap, m);
 828                         }
 829
 830                         /* xfer length needs to be a multiple of two! */
 831                         len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
 832                         if ((len % 64) == 0)
 833                                 len += 2;
 834
 835                         DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
 836                             m->m_pkthdr.len, len);
 837
 838                         usbd_xfer_set_frame_len(xfer, 0, len);
 839                         usbd_xfer_set_priv(xfer, data);
 840
 841                         usbd_transfer_submit(xfer);
 842                 }
 843                 RAL_UNLOCK(sc);
 844                 ural_start(ifp);
 845                 RAL_LOCK(sc);
 846                 break;
 847
 848         default:                        /* Error */
 849                 DPRINTFN(11, "transfer error, %s\n",
 850                     usbd_errstr(error));
 851
 852                 ifp->if_oerrors++;
 853                 data = usbd_xfer_get_priv(xfer);
 854                 if (data != NULL) {
 855                         ural_tx_free(data, error);
 856                         usbd_xfer_set_priv(xfer, NULL);
 857                 }
 858
 859                 if (error == USB_ERR_STALLED) {
 860                         /* try to clear stall first */
 861                         usbd_xfer_set_stall(xfer);
 862                         goto tr_setup;
 863                 }
 864                 if (error == USB_ERR_TIMEOUT)
 865                         device_printf(sc->sc_dev, "device timeout\n");
 866                 break;
 867         }
 868 }
 869
 870 static void
 871 ural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
 872 {
 873         struct ural_softc *sc = usbd_xfer_softc(xfer);
 874         struct ifnet *ifp = sc->sc_ifp;
 875         struct ieee80211com *ic = ifp->if_l2com;
 876         struct ieee80211_node *ni;
 877         struct mbuf *m = NULL;
 878         struct usb_page_cache *pc;
 879         uint32_t flags;
 880         int8_t rssi = 0, nf = 0;
 881         int len;
 882
 883         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 884
 885         switch (USB_GET_STATE(xfer)) {
 886         case USB_ST_TRANSFERRED:
 887
 888                 DPRINTFN(15, "rx done, actlen=%d\n", len);
 889
 890                 if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) {
 891                         DPRINTF("%s: xfer too short %d\n",
 892                             device_get_nameunit(sc->sc_dev), len);
 893                         ifp->if_ierrors++;
 894                         goto tr_setup;
 895                 }
 896
 897                 len -= RAL_RX_DESC_SIZE;
 898                 /* rx descriptor is located at the end */
 899                 pc = usbd_xfer_get_frame(xfer, 0);
 900                 usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
 901
 902                 rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
 903                 nf = RAL_NOISE_FLOOR;
 904                 flags = le32toh(sc->sc_rx_desc.flags);
 905                 if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
 906                         /*
 907                          * This should not happen since we did not
 908                          * request to receive those frames when we
 909                          * filled RAL_TXRX_CSR2:
 910                          */
 911                         DPRINTFN(5, "PHY or CRC error\n");
 912                         ifp->if_ierrors++;
 913                         goto tr_setup;
 914                 }
 915
 916                 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
 917                 if (m == NULL) {
 918                         DPRINTF("could not allocate mbuf\n");
 919                         ifp->if_ierrors++;
 920                         goto tr_setup;
 921                 }
 922                 usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
 923
 924                 /* finalize mbuf */
 925                 m->m_pkthdr.rcvif = ifp;
 926                 m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
 927
 928                 if (ieee80211_radiotap_active(ic)) {
 929                         struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
 930
 931                         /* XXX set once */
 932                         tap->wr_flags = 0;
 933                         tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
 934                             (flags & RAL_RX_OFDM) ?
 935                             IEEE80211_T_OFDM : IEEE80211_T_CCK);
 936                         tap->wr_antenna = sc->rx_ant;
 937                         tap->wr_antsignal = nf + rssi;
 938                         tap->wr_antnoise = nf;
 939                 }
 940                 /* Strip trailing 802.11 MAC FCS. */
 941                 m_adj(m, -IEEE80211_CRC_LEN);
 942
 943                 /* FALLTHROUGH */
 944         case USB_ST_SETUP:
 945 tr_setup:
 946                 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
 947                 usbd_transfer_submit(xfer);
 948
 949                 /*
 950                  * At the end of a USB callback it is always safe to unlock
 951                  * the private mutex of a device! That is why we do the
 952                  * "ieee80211_input" here, and not some lines up!
 953                  */
 954                 RAL_UNLOCK(sc);
 955                 if (m) {
 956                         ni = ieee80211_find_rxnode(ic,
 957                             mtod(m, struct ieee80211_frame_min *));
 958                         if (ni != NULL) {
 959                                 (void) ieee80211_input(ni, m, rssi, nf);
 960                                 ieee80211_free_node(ni);
 961                         } else
 962                                 (void) ieee80211_input_all(ic, m, rssi, nf);
 963                 }
 964                 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
 965                     !IFQ_IS_EMPTY(&ifp->if_snd))
 966                         ural_start(ifp);
 967                 RAL_LOCK(sc);
 968                 return;
 969
 970         default:                        /* Error */
 971                 if (error != USB_ERR_CANCELLED) {
 972                         /* try to clear stall first */
 973                         usbd_xfer_set_stall(xfer);
 974                         goto tr_setup;
 975                 }
 976                 return;
 977         }
 978 }
 979
 980 static uint8_t
 981 ural_plcp_signal(int rate)
 982 {
 983         switch (rate) {
 984         /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
 985         case 12:        return 0xb;
 986         case 18:        return 0xf;
 987         case 24:        return 0xa;
 988         case 36:        return 0xe;
 989         case 48:        return 0x9;
 990         case 72:        return 0xd;
 991         case 96:        return 0x8;
 992         case 108:       return 0xc;
 993
 994         /* CCK rates (NB: not IEEE std, device-specific) */
 995         case 2:         return 0x0;
 996         case 4:         return 0x1;
 997         case 11:        return 0x2;
 998         case 22:        return 0x3;
 999         }
1000         return 0xff;            /* XXX unsupported/unknown rate */
1001 }
1002
1003 static void
1004 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1005     uint32_t flags, int len, int rate)
1006 {
1007         struct ifnet *ifp = sc->sc_ifp;
1008         struct ieee80211com *ic = ifp->if_l2com;
1009         uint16_t plcp_length;
1010         int remainder;
1011
1012         desc->flags = htole32(flags);
1013         desc->flags |= htole32(RAL_TX_NEWSEQ);
1014         desc->flags |= htole32(len << 16);
1015
1016         desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1017         desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1018
1019         /* setup PLCP fields */
1020         desc->plcp_signal  = ural_plcp_signal(rate);
1021         desc->plcp_service = 4;
1022
1023         len += IEEE80211_CRC_LEN;
1024         if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1025                 desc->flags |= htole32(RAL_TX_OFDM);
1026
1027                 plcp_length = len & 0xfff;
1028                 desc->plcp_length_hi = plcp_length >> 6;
1029                 desc->plcp_length_lo = plcp_length & 0x3f;
1030         } else {
1031                 plcp_length = (16 * len + rate - 1) / rate;
1032                 if (rate == 22) {
1033                         remainder = (16 * len) % 22;
1034                         if (remainder != 0 && remainder < 7)
1035                                 desc->plcp_service |= RAL_PLCP_LENGEXT;
1036                 }
1037                 desc->plcp_length_hi = plcp_length >> 8;
1038                 desc->plcp_length_lo = plcp_length & 0xff;
1039
1040                 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1041                         desc->plcp_signal |= 0x08;
1042         }
1043
1044         desc->iv = 0;
1045         desc->eiv = 0;
1046 }
1047
1048 #define RAL_TX_TIMEOUT  5000
1049
1050 static int
1051 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1052 {
1053         struct ieee80211vap *vap = ni->ni_vap;
1054         struct ieee80211com *ic = ni->ni_ic;
1055         struct ifnet *ifp = sc->sc_ifp;
1056         const struct ieee80211_txparam *tp;
1057         struct ural_tx_data *data;
1058
1059         if (sc->tx_nfree == 0) {
1060                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1061                 m_freem(m0);
1062                 ieee80211_free_node(ni);
1063                 return (EIO);
1064         }
1065         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
1066                 m_freem(m0);
1067                 ieee80211_free_node(ni);
1068                 return (ENXIO);
1069         }
1070         data = STAILQ_FIRST(&sc->tx_free);
1071         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1072         sc->tx_nfree--;
1073         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1074
1075         data->m = m0;
1076         data->ni = ni;
1077         data->rate = tp->mgmtrate;
1078
1079         ural_setup_tx_desc(sc, &data->desc,
1080             RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1081             tp->mgmtrate);
1082
1083         DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1084             m0->m_pkthdr.len, tp->mgmtrate);
1085
1086         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1087         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1088
1089         return (0);
1090 }
1091
1092 static int
1093 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1094 {
1095         struct ieee80211vap *vap = ni->ni_vap;
1096         struct ieee80211com *ic = ni->ni_ic;
1097         const struct ieee80211_txparam *tp;
1098         struct ural_tx_data *data;
1099         struct ieee80211_frame *wh;
1100         struct ieee80211_key *k;
1101         uint32_t flags;
1102         uint16_t dur;
1103
1104         RAL_LOCK_ASSERT(sc, MA_OWNED);
1105
1106         data = STAILQ_FIRST(&sc->tx_free);
1107         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1108         sc->tx_nfree--;
1109
1110         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1111
1112         wh = mtod(m0, struct ieee80211_frame *);
1113         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1114                 k = ieee80211_crypto_encap(ni, m0);
1115                 if (k == NULL) {
1116                         m_freem(m0);
1117                         return ENOBUFS;
1118                 }
1119                 wh = mtod(m0, struct ieee80211_frame *);
1120         }
1121
1122         data->m = m0;
1123         data->ni = ni;
1124         data->rate = tp->mgmtrate;
1125
1126         flags = 0;
1127         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1128                 flags |= RAL_TX_ACK;
1129
1130                 dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1131                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1132                 *(uint16_t *)wh->i_dur = htole16(dur);
1133
1134                 /* tell hardware to add timestamp for probe responses */
1135                 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1136                     IEEE80211_FC0_TYPE_MGT &&
1137                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1138                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1139                         flags |= RAL_TX_TIMESTAMP;
1140         }
1141
1142         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1143
1144         DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1145             m0->m_pkthdr.len, tp->mgmtrate);
1146
1147         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1148         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1149
1150         return 0;
1151 }
1152
1153 static int
1154 ural_sendprot(struct ural_softc *sc,
1155     const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1156 {
1157         struct ieee80211com *ic = ni->ni_ic;
1158         const struct ieee80211_frame *wh;
1159         struct ural_tx_data *data;
1160         struct mbuf *mprot;
1161         int protrate, ackrate, pktlen, flags, isshort;
1162         uint16_t dur;
1163
1164         KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1165             ("protection %d", prot));
1166
1167         wh = mtod(m, const struct ieee80211_frame *);
1168         pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1169
1170         protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1171         ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1172
1173         isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1174         dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1175             + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1176         flags = RAL_TX_RETRY(7);
1177         if (prot == IEEE80211_PROT_RTSCTS) {
1178                 /* NB: CTS is the same size as an ACK */
1179                 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1180                 flags |= RAL_TX_ACK;
1181                 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1182         } else {
1183                 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1184         }
1185         if (mprot == NULL) {
1186                 /* XXX stat + msg */
1187                 return ENOBUFS;
1188         }
1189         data = STAILQ_FIRST(&sc->tx_free);
1190         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1191         sc->tx_nfree--;
1192
1193         data->m = mprot;
1194         data->ni = ieee80211_ref_node(ni);
1195         data->rate = protrate;
1196         ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1197
1198         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1199         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1200
1201         return 0;
1202 }
1203
1204 static int
1205 ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1206     const struct ieee80211_bpf_params *params)
1207 {
1208         struct ieee80211com *ic = ni->ni_ic;
1209         struct ural_tx_data *data;
1210         uint32_t flags;
1211         int error;
1212         int rate;
1213
1214         RAL_LOCK_ASSERT(sc, MA_OWNED);
1215         KASSERT(params != NULL, ("no raw xmit params"));
1216
1217         rate = params->ibp_rate0;
1218         if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1219                 m_freem(m0);
1220                 return EINVAL;
1221         }
1222         flags = 0;
1223         if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1224                 flags |= RAL_TX_ACK;
1225         if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1226                 error = ural_sendprot(sc, m0, ni,
1227                     params->ibp_flags & IEEE80211_BPF_RTS ?
1228                          IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1229                     rate);
1230                 if (error || sc->tx_nfree == 0) {
1231                         m_freem(m0);
1232                         return ENOBUFS;
1233                 }
1234                 flags |= RAL_TX_IFS_SIFS;
1235         }
1236
1237         data = STAILQ_FIRST(&sc->tx_free);
1238         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1239         sc->tx_nfree--;
1240
1241         data->m = m0;
1242         data->ni = ni;
1243         data->rate = rate;
1244
1245         /* XXX need to setup descriptor ourself */
1246         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1247
1248         DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1249             m0->m_pkthdr.len, rate);
1250
1251         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1252         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1253
1254         return 0;
1255 }
1256
1257 static int
1258 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1259 {
1260         struct ieee80211vap *vap = ni->ni_vap;
1261         struct ieee80211com *ic = ni->ni_ic;
1262         struct ural_tx_data *data;
1263         struct ieee80211_frame *wh;
1264         const struct ieee80211_txparam *tp;
1265         struct ieee80211_key *k;
1266         uint32_t flags = 0;
1267         uint16_t dur;
1268         int error, rate;
1269
1270         RAL_LOCK_ASSERT(sc, MA_OWNED);
1271
1272         wh = mtod(m0, struct ieee80211_frame *);
1273
1274         tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1275         if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1276                 rate = tp->mcastrate;
1277         else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1278                 rate = tp->ucastrate;
1279         else
1280                 rate = ni->ni_txrate;
1281
1282         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1283                 k = ieee80211_crypto_encap(ni, m0);
1284                 if (k == NULL) {
1285                         m_freem(m0);
1286                         return ENOBUFS;
1287                 }
1288                 /* packet header may have moved, reset our local pointer */
1289                 wh = mtod(m0, struct ieee80211_frame *);
1290         }
1291
1292         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1293                 int prot = IEEE80211_PROT_NONE;
1294                 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1295                         prot = IEEE80211_PROT_RTSCTS;
1296                 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1297                     ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1298                         prot = ic->ic_protmode;
1299                 if (prot != IEEE80211_PROT_NONE) {
1300                         error = ural_sendprot(sc, m0, ni, prot, rate);
1301                         if (error || sc->tx_nfree == 0) {
1302                                 m_freem(m0);
1303                                 return ENOBUFS;
1304                         }
1305                         flags |= RAL_TX_IFS_SIFS;
1306                 }
1307         }
1308
1309         data = STAILQ_FIRST(&sc->tx_free);
1310         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1311         sc->tx_nfree--;
1312
1313         data->m = m0;
1314         data->ni = ni;
1315         data->rate = rate;
1316
1317         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1318                 flags |= RAL_TX_ACK;
1319                 flags |= RAL_TX_RETRY(7);
1320
1321                 dur = ieee80211_ack_duration(ic->ic_rt, rate,
1322                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1323                 *(uint16_t *)wh->i_dur = htole16(dur);
1324         }
1325
1326         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1327
1328         DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1329             m0->m_pkthdr.len, rate);
1330
1331         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1332         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1333
1334         return 0;
1335 }
1336
1337 static void
1338 ural_start(struct ifnet *ifp)
1339 {
1340         struct ural_softc *sc = ifp->if_softc;
1341         struct ieee80211_node *ni;
1342         struct mbuf *m;
1343
1344         RAL_LOCK(sc);
1345         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1346                 RAL_UNLOCK(sc);
1347                 return;
1348         }
1349         for (;;) {
1350                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1351                 if (m == NULL)
1352                         break;
1353                 if (sc->tx_nfree < RAL_TX_MINFREE) {
1354                         IFQ_DRV_PREPEND(&ifp->if_snd, m);
1355                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1356                         break;
1357                 }
1358                 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1359                 if (ural_tx_data(sc, m, ni) != 0) {
1360                         ieee80211_free_node(ni);
1361                         ifp->if_oerrors++;
1362                         break;
1363                 }
1364         }
1365         RAL_UNLOCK(sc);
1366 }
1367
1368 static int
1369 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1370 {
1371         struct ural_softc *sc = ifp->if_softc;
1372         struct ieee80211com *ic = ifp->if_l2com;
1373         struct ifreq *ifr = (struct ifreq *) data;
1374         int error = 0, startall = 0;
1375
1376         switch (cmd) {
1377         case SIOCSIFFLAGS:
1378                 RAL_LOCK(sc);
1379                 if (ifp->if_flags & IFF_UP) {
1380                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1381                                 ural_init_locked(sc);
1382                                 startall = 1;
1383                         } else
1384                                 ural_setpromisc(sc);
1385                 } else {
1386                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1387                                 ural_stop(sc);
1388                 }
1389                 RAL_UNLOCK(sc);
1390                 if (startall)
1391                         ieee80211_start_all(ic);
1392                 break;
1393         case SIOCGIFMEDIA:
1394         case SIOCSIFMEDIA:
1395                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1396                 break;
1397         default:
1398                 error = ether_ioctl(ifp, cmd, data);
1399                 break;
1400         }
1401         return error;
1402 }
1403
1404 static void
1405 ural_set_testmode(struct ural_softc *sc)
1406 {
1407         struct usb_device_request req;
1408         usb_error_t error;
1409
1410         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1411         req.bRequest = RAL_VENDOR_REQUEST;
1412         USETW(req.wValue, 4);
1413         USETW(req.wIndex, 1);
1414         USETW(req.wLength, 0);
1415
1416         error = ural_do_request(sc, &req, NULL);
1417         if (error != 0) {
1418                 device_printf(sc->sc_dev, "could not set test mode: %s\n",
1419                     usbd_errstr(error));
1420         }
1421 }
1422
1423 static void
1424 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1425 {
1426         struct usb_device_request req;
1427         usb_error_t error;
1428
1429         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1430         req.bRequest = RAL_READ_EEPROM;
1431         USETW(req.wValue, 0);
1432         USETW(req.wIndex, addr);
1433         USETW(req.wLength, len);
1434
1435         error = ural_do_request(sc, &req, buf);
1436         if (error != 0) {
1437                 device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1438                     usbd_errstr(error));
1439         }
1440 }
1441
1442 static uint16_t
1443 ural_read(struct ural_softc *sc, uint16_t reg)
1444 {
1445         struct usb_device_request req;
1446         usb_error_t error;
1447         uint16_t val;
1448
1449         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1450         req.bRequest = RAL_READ_MAC;
1451         USETW(req.wValue, 0);
1452         USETW(req.wIndex, reg);
1453         USETW(req.wLength, sizeof (uint16_t));
1454
1455         error = ural_do_request(sc, &req, &val);
1456         if (error != 0) {
1457                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1458                     usbd_errstr(error));
1459                 return 0;
1460         }
1461
1462         return le16toh(val);
1463 }
1464
1465 static void
1466 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1467 {
1468         struct usb_device_request req;
1469         usb_error_t error;
1470
1471         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1472         req.bRequest = RAL_READ_MULTI_MAC;
1473         USETW(req.wValue, 0);
1474         USETW(req.wIndex, reg);
1475         USETW(req.wLength, len);
1476
1477         error = ural_do_request(sc, &req, buf);
1478         if (error != 0) {
1479                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1480                     usbd_errstr(error));
1481         }
1482 }
1483
1484 static void
1485 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1486 {
1487         struct usb_device_request req;
1488         usb_error_t error;
1489
1490         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1491         req.bRequest = RAL_WRITE_MAC;
1492         USETW(req.wValue, val);
1493         USETW(req.wIndex, reg);
1494         USETW(req.wLength, 0);
1495
1496         error = ural_do_request(sc, &req, NULL);
1497         if (error != 0) {
1498                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1499                     usbd_errstr(error));
1500         }
1501 }
1502
1503 static void
1504 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1505 {
1506         struct usb_device_request req;
1507         usb_error_t error;
1508
1509         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1510         req.bRequest = RAL_WRITE_MULTI_MAC;
1511         USETW(req.wValue, 0);
1512         USETW(req.wIndex, reg);
1513         USETW(req.wLength, len);
1514
1515         error = ural_do_request(sc, &req, buf);
1516         if (error != 0) {
1517                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1518                     usbd_errstr(error));
1519         }
1520 }
1521
1522 static void
1523 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1524 {
1525         uint16_t tmp;
1526         int ntries;
1527
1528         for (ntries = 0; ntries < 100; ntries++) {
1529                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1530                         break;
1531                 if (ural_pause(sc, hz / 100))
1532                         break;
1533         }
1534         if (ntries == 100) {
1535                 device_printf(sc->sc_dev, "could not write to BBP\n");
1536                 return;
1537         }
1538
1539         tmp = reg << 8 | val;
1540         ural_write(sc, RAL_PHY_CSR7, tmp);
1541 }
1542
1543 static uint8_t
1544 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1545 {
1546         uint16_t val;
1547         int ntries;
1548
1549         val = RAL_BBP_WRITE | reg << 8;
1550         ural_write(sc, RAL_PHY_CSR7, val);
1551
1552         for (ntries = 0; ntries < 100; ntries++) {
1553                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1554                         break;
1555                 if (ural_pause(sc, hz / 100))
1556                         break;
1557         }
1558         if (ntries == 100) {
1559                 device_printf(sc->sc_dev, "could not read BBP\n");
1560                 return 0;
1561         }
1562
1563         return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1564 }
1565
1566 static void
1567 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1568 {
1569         uint32_t tmp;
1570         int ntries;
1571
1572         for (ntries = 0; ntries < 100; ntries++) {
1573                 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1574                         break;
1575                 if (ural_pause(sc, hz / 100))
1576                         break;
1577         }
1578         if (ntries == 100) {
1579                 device_printf(sc->sc_dev, "could not write to RF\n");
1580                 return;
1581         }
1582
1583         tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1584         ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1585         ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1586
1587         /* remember last written value in sc */
1588         sc->rf_regs[reg] = val;
1589
1590         DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1591 }
1592
1593 static void
1594 ural_scan_start(struct ieee80211com *ic)
1595 {
1596         struct ifnet *ifp = ic->ic_ifp;
1597         struct ural_softc *sc = ifp->if_softc;
1598
1599         RAL_LOCK(sc);
1600         ural_write(sc, RAL_TXRX_CSR19, 0);
1601         ural_set_bssid(sc, ifp->if_broadcastaddr);
1602         RAL_UNLOCK(sc);
1603 }
1604
1605 static void
1606 ural_scan_end(struct ieee80211com *ic)
1607 {
1608         struct ural_softc *sc = ic->ic_ifp->if_softc;
1609
1610         RAL_LOCK(sc);
1611         ural_enable_tsf_sync(sc);
1612         ural_set_bssid(sc, sc->sc_bssid);
1613         RAL_UNLOCK(sc);
1614
1615 }
1616
1617 static void
1618 ural_set_channel(struct ieee80211com *ic)
1619 {
1620         struct ural_softc *sc = ic->ic_ifp->if_softc;
1621
1622         RAL_LOCK(sc);
1623         ural_set_chan(sc, ic->ic_curchan);
1624         RAL_UNLOCK(sc);
1625 }
1626
1627 static void
1628 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1629 {
1630         struct ifnet *ifp = sc->sc_ifp;
1631         struct ieee80211com *ic = ifp->if_l2com;
1632         uint8_t power, tmp;
1633         int i, chan;
1634
1635         chan = ieee80211_chan2ieee(ic, c);
1636         if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1637                 return;
1638
1639         if (IEEE80211_IS_CHAN_2GHZ(c))
1640                 power = min(sc->txpow[chan - 1], 31);
1641         else
1642                 power = 31;
1643
1644         /* adjust txpower using ifconfig settings */
1645         power -= (100 - ic->ic_txpowlimit) / 8;
1646
1647         DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1648
1649         switch (sc->rf_rev) {
1650         case RAL_RF_2522:
1651                 ural_rf_write(sc, RAL_RF1, 0x00814);
1652                 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1653                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1654                 break;
1655
1656         case RAL_RF_2523:
1657                 ural_rf_write(sc, RAL_RF1, 0x08804);
1658                 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1659                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1660                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1661                 break;
1662
1663         case RAL_RF_2524:
1664                 ural_rf_write(sc, RAL_RF1, 0x0c808);
1665                 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1666                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1667                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1668                 break;
1669
1670         case RAL_RF_2525:
1671                 ural_rf_write(sc, RAL_RF1, 0x08808);
1672                 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1673                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1674                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1675
1676                 ural_rf_write(sc, RAL_RF1, 0x08808);
1677                 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1678                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1679                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1680                 break;
1681
1682         case RAL_RF_2525E:
1683                 ural_rf_write(sc, RAL_RF1, 0x08808);
1684                 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1685                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1686                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1687                 break;
1688
1689         case RAL_RF_2526:
1690                 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1691                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1692                 ural_rf_write(sc, RAL_RF1, 0x08804);
1693
1694                 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1695                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1696                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1697                 break;
1698
1699         /* dual-band RF */
1700         case RAL_RF_5222:
1701                 for (i = 0; ural_rf5222[i].chan != chan; i++);
1702
1703                 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1704                 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1705                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1706                 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1707                 break;
1708         }
1709
1710         if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1711             (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1712                 /* set Japan filter bit for channel 14 */
1713                 tmp = ural_bbp_read(sc, 70);
1714
1715                 tmp &= ~RAL_JAPAN_FILTER;
1716                 if (chan == 14)
1717                         tmp |= RAL_JAPAN_FILTER;
1718
1719                 ural_bbp_write(sc, 70, tmp);
1720
1721                 /* clear CRC errors */
1722                 ural_read(sc, RAL_STA_CSR0);
1723
1724                 ural_pause(sc, hz / 100);
1725                 ural_disable_rf_tune(sc);
1726         }
1727
1728         /* XXX doesn't belong here */
1729         /* update basic rate set */
1730         ural_set_basicrates(sc, c);
1731
1732         /* give the hardware some time to do the switchover */
1733         ural_pause(sc, hz / 100);
1734 }
1735
1736 /*
1737  * Disable RF auto-tuning.
1738  */
1739 static void
1740 ural_disable_rf_tune(struct ural_softc *sc)
1741 {
1742         uint32_t tmp;
1743
1744         if (sc->rf_rev != RAL_RF_2523) {
1745                 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1746                 ural_rf_write(sc, RAL_RF1, tmp);
1747         }
1748
1749         tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1750         ural_rf_write(sc, RAL_RF3, tmp);
1751
1752         DPRINTFN(2, "disabling RF autotune\n");
1753 }
1754
1755 /*
1756  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1757  * synchronization.
1758  */
1759 static void
1760 ural_enable_tsf_sync(struct ural_softc *sc)
1761 {
1762         struct ifnet *ifp = sc->sc_ifp;
1763         struct ieee80211com *ic = ifp->if_l2com;
1764         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1765         uint16_t logcwmin, preload, tmp;
1766
1767         /* first, disable TSF synchronization */
1768         ural_write(sc, RAL_TXRX_CSR19, 0);
1769
1770         tmp = (16 * vap->iv_bss->ni_intval) << 4;
1771         ural_write(sc, RAL_TXRX_CSR18, tmp);
1772
1773         logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1774         preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1775         tmp = logcwmin << 12 | preload;
1776         ural_write(sc, RAL_TXRX_CSR20, tmp);
1777
1778         /* finally, enable TSF synchronization */
1779         tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1780         if (ic->ic_opmode == IEEE80211_M_STA)
1781                 tmp |= RAL_ENABLE_TSF_SYNC(1);
1782         else
1783                 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1784         ural_write(sc, RAL_TXRX_CSR19, tmp);
1785
1786         DPRINTF("enabling TSF synchronization\n");
1787 }
1788
1789 static void
1790 ural_enable_tsf(struct ural_softc *sc)
1791 {
1792         /* first, disable TSF synchronization */
1793         ural_write(sc, RAL_TXRX_CSR19, 0);
1794         ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1795 }
1796
1797 #define RAL_RXTX_TURNAROUND     5       /* us */
1798 static void
1799 ural_update_slot(struct ifnet *ifp)
1800 {
1801         struct ural_softc *sc = ifp->if_softc;
1802         struct ieee80211com *ic = ifp->if_l2com;
1803         uint16_t slottime, sifs, eifs;
1804
1805         slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1806
1807         /*
1808          * These settings may sound a bit inconsistent but this is what the
1809          * reference driver does.
1810          */
1811         if (ic->ic_curmode == IEEE80211_MODE_11B) {
1812                 sifs = 16 - RAL_RXTX_TURNAROUND;
1813                 eifs = 364;
1814         } else {
1815                 sifs = 10 - RAL_RXTX_TURNAROUND;
1816                 eifs = 64;
1817         }
1818
1819         ural_write(sc, RAL_MAC_CSR10, slottime);
1820         ural_write(sc, RAL_MAC_CSR11, sifs);
1821         ural_write(sc, RAL_MAC_CSR12, eifs);
1822 }
1823
1824 static void
1825 ural_set_txpreamble(struct ural_softc *sc)
1826 {
1827         struct ifnet *ifp = sc->sc_ifp;
1828         struct ieee80211com *ic = ifp->if_l2com;
1829         uint16_t tmp;
1830
1831         tmp = ural_read(sc, RAL_TXRX_CSR10);
1832
1833         tmp &= ~RAL_SHORT_PREAMBLE;
1834         if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1835                 tmp |= RAL_SHORT_PREAMBLE;
1836
1837         ural_write(sc, RAL_TXRX_CSR10, tmp);
1838 }
1839
1840 static void
1841 ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1842 {
1843         /* XXX wrong, take from rate set */
1844         /* update basic rate set */
1845         if (IEEE80211_IS_CHAN_5GHZ(c)) {
1846                 /* 11a basic rates: 6, 12, 24Mbps */
1847                 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1848         } else if (IEEE80211_IS_CHAN_ANYG(c)) {
1849                 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1850                 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1851         } else {
1852                 /* 11b basic rates: 1, 2Mbps */
1853                 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1854         }
1855 }
1856
1857 static void
1858 ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1859 {
1860         uint16_t tmp;
1861
1862         tmp = bssid[0] | bssid[1] << 8;
1863         ural_write(sc, RAL_MAC_CSR5, tmp);
1864
1865         tmp = bssid[2] | bssid[3] << 8;
1866         ural_write(sc, RAL_MAC_CSR6, tmp);
1867
1868         tmp = bssid[4] | bssid[5] << 8;
1869         ural_write(sc, RAL_MAC_CSR7, tmp);
1870
1871         DPRINTF("setting BSSID to %6D\n", bssid, ":");
1872 }
1873
1874 static void
1875 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1876 {
1877         uint16_t tmp;
1878
1879         tmp = addr[0] | addr[1] << 8;
1880         ural_write(sc, RAL_MAC_CSR2, tmp);
1881
1882         tmp = addr[2] | addr[3] << 8;
1883         ural_write(sc, RAL_MAC_CSR3, tmp);
1884
1885         tmp = addr[4] | addr[5] << 8;
1886         ural_write(sc, RAL_MAC_CSR4, tmp);
1887
1888         DPRINTF("setting MAC address to %6D\n", addr, ":");
1889 }
1890
1891 static void
1892 ural_setpromisc(struct ural_softc *sc)
1893 {
1894         struct ifnet *ifp = sc->sc_ifp;
1895         uint32_t tmp;
1896
1897         tmp = ural_read(sc, RAL_TXRX_CSR2);
1898
1899         tmp &= ~RAL_DROP_NOT_TO_ME;
1900         if (!(ifp->if_flags & IFF_PROMISC))
1901                 tmp |= RAL_DROP_NOT_TO_ME;
1902
1903         ural_write(sc, RAL_TXRX_CSR2, tmp);
1904
1905         DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1906             "entering" : "leaving");
1907 }
1908
1909 static void
1910 ural_update_promisc(struct ifnet *ifp)
1911 {
1912         struct ural_softc *sc = ifp->if_softc;
1913
1914         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1915                 return;
1916
1917         RAL_LOCK(sc);
1918         ural_setpromisc(sc);
1919         RAL_UNLOCK(sc);
1920 }
1921
1922 static const char *
1923 ural_get_rf(int rev)
1924 {
1925         switch (rev) {
1926         case RAL_RF_2522:       return "RT2522";
1927         case RAL_RF_2523:       return "RT2523";
1928         case RAL_RF_2524:       return "RT2524";
1929         case RAL_RF_2525:       return "RT2525";
1930         case RAL_RF_2525E:      return "RT2525e";
1931         case RAL_RF_2526:       return "RT2526";
1932         case RAL_RF_5222:       return "RT5222";
1933         default:                return "unknown";
1934         }
1935 }
1936
1937 static void
1938 ural_read_eeprom(struct ural_softc *sc)
1939 {
1940         uint16_t val;
1941
1942         ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1943         val = le16toh(val);
1944         sc->rf_rev =   (val >> 11) & 0x7;
1945         sc->hw_radio = (val >> 10) & 0x1;
1946         sc->led_mode = (val >> 6)  & 0x7;
1947         sc->rx_ant =   (val >> 4)  & 0x3;
1948         sc->tx_ant =   (val >> 2)  & 0x3;
1949         sc->nb_ant =   val & 0x3;
1950
1951         /* read MAC address */
1952         ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1953
1954         /* read default values for BBP registers */
1955         ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1956
1957         /* read Tx power for all b/g channels */
1958         ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1959 }
1960
1961 static int
1962 ural_bbp_init(struct ural_softc *sc)
1963 {
1964 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
1965         int i, ntries;
1966
1967         /* wait for BBP to be ready */
1968         for (ntries = 0; ntries < 100; ntries++) {
1969                 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1970                         break;
1971                 if (ural_pause(sc, hz / 100))
1972                         break;
1973         }
1974         if (ntries == 100) {
1975                 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1976                 return EIO;
1977         }
1978
1979         /* initialize BBP registers to default values */
1980         for (i = 0; i < N(ural_def_bbp); i++)
1981                 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1982
1983 #if 0
1984         /* initialize BBP registers to values stored in EEPROM */
1985         for (i = 0; i < 16; i++) {
1986                 if (sc->bbp_prom[i].reg == 0xff)
1987                         continue;
1988                 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1989         }
1990 #endif
1991
1992         return 0;
1993 #undef N
1994 }
1995
1996 static void
1997 ural_set_txantenna(struct ural_softc *sc, int antenna)
1998 {
1999         uint16_t tmp;
2000         uint8_t tx;
2001
2002         tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2003         if (antenna == 1)
2004                 tx |= RAL_BBP_ANTA;
2005         else if (antenna == 2)
2006                 tx |= RAL_BBP_ANTB;
2007         else
2008                 tx |= RAL_BBP_DIVERSITY;
2009
2010         /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2011         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2012             sc->rf_rev == RAL_RF_5222)
2013                 tx |= RAL_BBP_FLIPIQ;
2014
2015         ural_bbp_write(sc, RAL_BBP_TX, tx);
2016
2017         /* update values in PHY_CSR5 and PHY_CSR6 */
2018         tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2019         ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2020
2021         tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2022         ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2023 }
2024
2025 static void
2026 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2027 {
2028         uint8_t rx;
2029
2030         rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2031         if (antenna == 1)
2032                 rx |= RAL_BBP_ANTA;
2033         else if (antenna == 2)
2034                 rx |= RAL_BBP_ANTB;
2035         else
2036                 rx |= RAL_BBP_DIVERSITY;
2037
2038         /* need to force no I/Q flip for RF 2525e and 2526 */
2039         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2040                 rx &= ~RAL_BBP_FLIPIQ;
2041
2042         ural_bbp_write(sc, RAL_BBP_RX, rx);
2043 }
2044
2045 static void
2046 ural_init_locked(struct ural_softc *sc)
2047 {
2048 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
2049         struct ifnet *ifp = sc->sc_ifp;
2050         struct ieee80211com *ic = ifp->if_l2com;
2051         uint16_t tmp;
2052         int i, ntries;
2053
2054         RAL_LOCK_ASSERT(sc, MA_OWNED);
2055
2056         ural_set_testmode(sc);
2057         ural_write(sc, 0x308, 0x00f0);  /* XXX magic */
2058
2059         ural_stop(sc);
2060
2061         /* initialize MAC registers to default values */
2062         for (i = 0; i < N(ural_def_mac); i++)
2063                 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2064
2065         /* wait for BBP and RF to wake up (this can take a long time!) */
2066         for (ntries = 0; ntries < 100; ntries++) {
2067                 tmp = ural_read(sc, RAL_MAC_CSR17);
2068                 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2069                     (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2070                         break;
2071                 if (ural_pause(sc, hz / 100))
2072                         break;
2073         }
2074         if (ntries == 100) {
2075                 device_printf(sc->sc_dev,
2076                     "timeout waiting for BBP/RF to wakeup\n");
2077                 goto fail;
2078         }
2079
2080         /* we're ready! */
2081         ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2082
2083         /* set basic rate set (will be updated later) */
2084         ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2085
2086         if (ural_bbp_init(sc) != 0)
2087                 goto fail;
2088
2089         ural_set_chan(sc, ic->ic_curchan);
2090
2091         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2092         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2093
2094         ural_set_txantenna(sc, sc->tx_ant);
2095         ural_set_rxantenna(sc, sc->rx_ant);
2096
2097         ural_set_macaddr(sc, IF_LLADDR(ifp));
2098
2099         /*
2100          * Allocate Tx and Rx xfer queues.
2101          */
2102         ural_setup_tx_list(sc);
2103
2104         /* kick Rx */
2105         tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2106         if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2107                 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2108                 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2109                         tmp |= RAL_DROP_TODS;
2110                 if (!(ifp->if_flags & IFF_PROMISC))
2111                         tmp |= RAL_DROP_NOT_TO_ME;
2112         }
2113         ural_write(sc, RAL_TXRX_CSR2, tmp);
2114
2115         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2116         ifp->if_drv_flags |= IFF_DRV_RUNNING;
2117         usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2118         usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2119         return;
2120
2121 fail:   ural_stop(sc);
2122 #undef N
2123 }
2124
2125 static void
2126 ural_init(void *priv)
2127 {
2128         struct ural_softc *sc = priv;
2129         struct ifnet *ifp = sc->sc_ifp;
2130         struct ieee80211com *ic = ifp->if_l2com;
2131
2132         RAL_LOCK(sc);
2133         ural_init_locked(sc);
2134         RAL_UNLOCK(sc);
2135
2136         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2137                 ieee80211_start_all(ic);                /* start all vap's */
2138 }
2139
2140 static void
2141 ural_stop(struct ural_softc *sc)
2142 {
2143         struct ifnet *ifp = sc->sc_ifp;
2144
2145         RAL_LOCK_ASSERT(sc, MA_OWNED);
2146
2147         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2148
2149         /*
2150          * Drain all the transfers, if not already drained:
2151          */
2152         RAL_UNLOCK(sc);
2153         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2154         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2155         RAL_LOCK(sc);
2156
2157         ural_unsetup_tx_list(sc);
2158
2159         /* disable Rx */
2160         ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2161         /* reset ASIC and BBP (but won't reset MAC registers!) */
2162         ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2163         /* wait a little */
2164         ural_pause(sc, hz / 10);
2165         ural_write(sc, RAL_MAC_CSR1, 0);
2166         /* wait a little */
2167         ural_pause(sc, hz / 10);
2168 }
2169
2170 static int
2171 ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2172         const struct ieee80211_bpf_params *params)
2173 {
2174         struct ieee80211com *ic = ni->ni_ic;
2175         struct ifnet *ifp = ic->ic_ifp;
2176         struct ural_softc *sc = ifp->if_softc;
2177
2178         RAL_LOCK(sc);
2179         /* prevent management frames from being sent if we're not ready */
2180         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2181                 RAL_UNLOCK(sc);
2182                 m_freem(m);
2183                 ieee80211_free_node(ni);
2184                 return ENETDOWN;
2185         }
2186         if (sc->tx_nfree < RAL_TX_MINFREE) {
2187                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2188                 RAL_UNLOCK(sc);
2189                 m_freem(m);
2190                 ieee80211_free_node(ni);
2191                 return EIO;
2192         }
2193
2194         ifp->if_opackets++;
2195
2196         if (params == NULL) {
2197                 /*
2198                  * Legacy path; interpret frame contents to decide
2199                  * precisely how to send the frame.
2200                  */
2201                 if (ural_tx_mgt(sc, m, ni) != 0)
2202                         goto bad;
2203         } else {
2204                 /*
2205                  * Caller supplied explicit parameters to use in
2206                  * sending the frame.
2207                  */
2208                 if (ural_tx_raw(sc, m, ni, params) != 0)
2209                         goto bad;
2210         }
2211         RAL_UNLOCK(sc);
2212         return 0;
2213 bad:
2214         ifp->if_oerrors++;
2215         RAL_UNLOCK(sc);
2216         ieee80211_free_node(ni);
2217         return EIO;             /* XXX */
2218 }
2219
2220 static void
2221 ural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2222 {
2223         struct ieee80211vap *vap = ni->ni_vap;
2224         struct ural_vap *uvp = URAL_VAP(vap);
2225
2226         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2227         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2228
2229         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2230 }
2231
2232 static void
2233 ural_ratectl_timeout(void *arg)
2234 {
2235         struct ural_vap *uvp = arg;
2236         struct ieee80211vap *vap = &uvp->vap;
2237         struct ieee80211com *ic = vap->iv_ic;
2238
2239         ieee80211_runtask(ic, &uvp->ratectl_task);
2240 }
2241
2242 static void
2243 ural_ratectl_task(void *arg, int pending)
2244 {
2245         struct ural_vap *uvp = arg;
2246         struct ieee80211vap *vap = &uvp->vap;
2247         struct ieee80211com *ic = vap->iv_ic;
2248         struct ifnet *ifp = ic->ic_ifp;
2249         struct ural_softc *sc = ifp->if_softc;
2250         struct ieee80211_node *ni;
2251         int ok, fail;
2252         int sum, retrycnt;
2253
2254         ni = ieee80211_ref_node(vap->iv_bss);
2255         RAL_LOCK(sc);
2256         /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2257         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2258
2259         ok = sc->sta[7] +               /* TX ok w/o retry */
2260              sc->sta[8];                /* TX ok w/ retry */
2261         fail = sc->sta[9];              /* TX retry-fail count */
2262         sum = ok+fail;
2263         retrycnt = sc->sta[8] + fail;
2264
2265         ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2266         (void) ieee80211_ratectl_rate(ni, NULL, 0);
2267
2268         ifp->if_oerrors += fail;        /* count TX retry-fail as Tx errors */
2269
2270         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2271         RAL_UNLOCK(sc);
2272         ieee80211_free_node(ni);
2273 }
2274
2275 static int
2276 ural_pause(struct ural_softc *sc, int timeout)
2277 {
2278
2279         usb_pause_mtx(&sc->sc_mtx, timeout);
2280         return (0);
2281 }