sys/ofed/drivers/net/mlx4/en_rx.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include "opt_inet.h"
  35 #include "mlx4_en.h"
  36
  37 #include <linux/mlx4/cq.h>
  38 #include <linux/mlx4/qp.h>
  39
  40 #include <net/ethernet.h>
  41 #include <net/if_vlan_var.h>
  42 #include <sys/mbuf.h>
  43
  44 enum {
  45         MIN_RX_ARM = 1024,
  46 };
  47
  48 static int mlx4_en_alloc_buf(struct mlx4_en_priv *priv,
  49                              struct mlx4_en_rx_desc *rx_desc,
  50                              struct mbuf **mb_list,
  51                              int i)
  52 {
  53         struct mlx4_en_dev *mdev = priv->mdev;
  54         struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
  55         struct mbuf *mb;
  56         dma_addr_t dma;
  57
  58         if (i == 0)
  59                 mb = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, frag_info->frag_size);
  60         else
  61                 mb = m_getjcl(M_NOWAIT, MT_DATA, 0, frag_info->frag_size);
  62         if (mb == NULL) {
  63                 priv->port_stats.rx_alloc_failed++;
  64                 return -ENOMEM;
  65         }
  66         dma = pci_map_single(mdev->pdev, mb->m_data, frag_info->frag_size,
  67                              PCI_DMA_FROMDEVICE);
  68         rx_desc->data[i].addr = cpu_to_be64(dma);
  69         mb_list[i] = mb;
  70         return 0;
  71 }
  72
  73 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
  74                                  struct mlx4_en_rx_ring *ring, int index)
  75 {
  76         struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
  77         int possible_frags;
  78         int i;
  79
  80         /* Set size and memtype fields */
  81         for (i = 0; i < priv->num_frags; i++) {
  82                 rx_desc->data[i].byte_count =
  83                         cpu_to_be32(priv->frag_info[i].frag_size);
  84                 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
  85         }
  86
  87         /* If the number of used fragments does not fill up the ring stride,
  88          * remaining (unused) fragments must be padded with null address/size
  89          * and a special memory key */
  90         possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
  91         for (i = priv->num_frags; i < possible_frags; i++) {
  92                 rx_desc->data[i].byte_count = 0;
  93                 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
  94                 rx_desc->data[i].addr = 0;
  95         }
  96 }
  97
  98 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
  99                                    struct mlx4_en_rx_ring *ring, int index)
 100 {
 101         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
 102         struct mbuf **mb_list = ring->rx_info + (index << priv->log_rx_info);
 103         int i;
 104
 105         for (i = 0; i < priv->num_frags; i++)
 106                 if (mlx4_en_alloc_buf(priv, rx_desc, mb_list, i))
 107                         goto err;
 108
 109         return 0;
 110
 111 err:
 112         while (i--)
 113                 m_free(mb_list[i]);
 114         return -ENOMEM;
 115 }
 116
 117 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
 118 {
 119         *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
 120 }
 121
 122 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
 123                                  struct mlx4_en_rx_ring *ring,
 124                                  int index)
 125 {
 126         struct mlx4_en_frag_info *frag_info;
 127         struct mlx4_en_dev *mdev = priv->mdev;
 128         struct mbuf **mb_list;
 129         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
 130         dma_addr_t dma;
 131         int nr;
 132
 133         mb_list = ring->rx_info + (index << priv->log_rx_info);
 134         for (nr = 0; nr < priv->num_frags; nr++) {
 135                 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
 136                 frag_info = &priv->frag_info[nr];
 137                 dma = be64_to_cpu(rx_desc->data[nr].addr);
 138
 139                 en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
 140                 pci_unmap_single(mdev->pdev, dma, frag_info->frag_size,
 141                                  PCI_DMA_FROMDEVICE);
 142                 m_free(mb_list[nr]);
 143         }
 144 }
 145
 146 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
 147 {
 148         struct mlx4_en_rx_ring *ring;
 149         int ring_ind;
 150         int buf_ind;
 151         int new_size;
 152         int err;
 153
 154         for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
 155                 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 156                         ring = &priv->rx_ring[ring_ind];
 157
 158                         err = mlx4_en_prepare_rx_desc(priv, ring,
 159                                                       ring->actual_size);
 160                         if (err) {
 161                                 if (ring->actual_size == 0) {
 162                                         en_err(priv, "Failed to allocate "
 163                                                      "enough rx buffers\n");
 164                                         return -ENOMEM;
 165                                 } else {
 166                                         new_size = rounddown_pow_of_two(ring->actual_size);
 167                                         en_warn(priv, "Only %d buffers allocated "
 168                                                       "reducing ring size to %d\n",
 169                                                 ring->actual_size, new_size);
 170                                         goto reduce_rings;
 171                                 }
 172                         }
 173                         ring->actual_size++;
 174                         ring->prod++;
 175                 }
 176         }
 177         return 0;
 178
 179 reduce_rings:
 180         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 181                 ring = &priv->rx_ring[ring_ind];
 182                 while (ring->actual_size > new_size) {
 183                         ring->actual_size--;
 184                         ring->prod--;
 185                         mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
 186                 }
 187         }
 188
 189         return 0;
 190 }
 191
 192 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
 193                                 struct mlx4_en_rx_ring *ring)
 194 {
 195         int index;
 196
 197         en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
 198                ring->cons, ring->prod);
 199
 200         /* Unmap and free Rx buffers */
 201         BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
 202         while (ring->cons != ring->prod) {
 203                 index = ring->cons & ring->size_mask;
 204                 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
 205                 mlx4_en_free_rx_desc(priv, ring, index);
 206                 ++ring->cons;
 207         }
 208 }
 209
 210
 211 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
 212                            struct mlx4_en_rx_ring *ring, u32 size)
 213 {
 214         struct mlx4_en_dev *mdev = priv->mdev;
 215         int err;
 216         int tmp;
 217
 218
 219         ring->prod = 0;
 220         ring->cons = 0;
 221         ring->size = size;
 222         ring->size_mask = size - 1;
 223         ring->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
 224                                           DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
 225         ring->log_stride = ffs(ring->stride) - 1;
 226         ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
 227
 228         tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
 229                                         sizeof(struct mbuf *));
 230
 231         ring->rx_info = kmalloc(tmp, GFP_KERNEL);
 232         if (!ring->rx_info) {
 233                 en_err(priv, "Failed allocating rx_info ring\n");
 234                 return -ENOMEM;
 235         }
 236         en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d stride:%d (%d)\n",
 237                  ring->rx_info, tmp, ring->stride, ring->log_stride);
 238
 239         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
 240                                  ring->buf_size, 2 * PAGE_SIZE);
 241         if (err)
 242                 goto err_ring;
 243
 244         err = mlx4_en_map_buffer(&ring->wqres.buf);
 245         if (err) {
 246                 en_err(priv, "Failed to map RX buffer\n");
 247                 goto err_hwq;
 248         }
 249         ring->buf = ring->wqres.buf.direct.buf;
 250
 251         return 0;
 252
 253         mlx4_en_unmap_buffer(&ring->wqres.buf);
 254 err_hwq:
 255         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 256 err_ring:
 257         kfree(ring->rx_info);
 258         ring->rx_info = NULL;
 259         return err;
 260 }
 261
 262 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
 263 {
 264         struct mlx4_en_rx_ring *ring;
 265         int i;
 266         int ring_ind;
 267         int err;
 268         int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
 269                                         DS_SIZE * priv->num_frags);
 270
 271         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 272                 ring = &priv->rx_ring[ring_ind];
 273
 274                 ring->prod = 0;
 275                 ring->cons = 0;
 276                 ring->actual_size = 0;
 277                 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
 278                 ring->stride = stride;
 279                 if (ring->stride <= TXBB_SIZE)
 280                         ring->buf += TXBB_SIZE;
 281
 282                 ring->log_stride = ffs(ring->stride) - 1;
 283                 ring->buf_size = ring->size * ring->stride;
 284
 285                 memset(ring->buf, 0, ring->buf_size);
 286                 mlx4_en_update_rx_prod_db(ring);
 287
 288                 /* Initailize all descriptors */
 289                 for (i = 0; i < ring->size; i++)
 290                         mlx4_en_init_rx_desc(priv, ring, i);
 291 #ifdef INET
 292                 /* Configure lro mngr */
 293                 if (priv->dev->if_capenable & IFCAP_LRO) {
 294                         if (tcp_lro_init(&ring->lro))
 295                                 priv->dev->if_capenable &= ~IFCAP_LRO;
 296                         else
 297                                 ring->lro.ifp = priv->dev;
 298                 }
 299 #endif
 300         }
 301         err = mlx4_en_fill_rx_buffers(priv);
 302         if (err)
 303                 goto err_buffers;
 304
 305         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 306                 ring = &priv->rx_ring[ring_ind];
 307
 308                 ring->size_mask = ring->actual_size - 1;
 309                 mlx4_en_update_rx_prod_db(ring);
 310         }
 311
 312
 313         return 0;
 314
 315 err_buffers:
 316         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
 317                 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
 318
 319         return err;
 320 }
 321
 322 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
 323                              struct mlx4_en_rx_ring *ring)
 324 {
 325         struct mlx4_en_dev *mdev = priv->mdev;
 326
 327         mlx4_en_unmap_buffer(&ring->wqres.buf);
 328         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size + TXBB_SIZE);
 329         kfree(ring->rx_info);
 330         ring->rx_info = NULL;
 331 }
 332
 333 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
 334                                 struct mlx4_en_rx_ring *ring)
 335 {
 336 #ifdef INET
 337         tcp_lro_free(&ring->lro);
 338 #endif
 339         mlx4_en_free_rx_buf(priv, ring);
 340         if (ring->stride <= TXBB_SIZE)
 341                 ring->buf -= TXBB_SIZE;
 342 }
 343
 344
 345 /* Unmap a completed descriptor and free unused pages */
 346 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
 347                                     struct mlx4_en_rx_desc *rx_desc,
 348                                     struct mbuf **mb_list,
 349                                     int length)
 350 {
 351         struct mlx4_en_dev *mdev = priv->mdev;
 352         struct mlx4_en_frag_info *frag_info;
 353         dma_addr_t dma;
 354         struct mbuf *mb;
 355         int nr;
 356
 357         mb = mb_list[0];
 358         mb->m_pkthdr.len = length;
 359         /* Collect used fragments while replacing them in the HW descirptors */
 360         for (nr = 0; nr < priv->num_frags; nr++) {
 361                 frag_info = &priv->frag_info[nr];
 362                 if (length <= frag_info->frag_prefix_size)
 363                         break;
 364                 if (nr)
 365                         mb->m_next = mb_list[nr];
 366                 mb = mb_list[nr];
 367                 mb->m_len = frag_info[nr].frag_size;
 368                 dma = be64_to_cpu(rx_desc->data[nr].addr);
 369
 370                 /* Allocate a replacement page */
 371                 if (mlx4_en_alloc_buf(priv, rx_desc, mb_list, nr))
 372                         goto fail;
 373
 374                 /* Unmap buffer */
 375                 pci_unmap_single(mdev->pdev, dma, frag_info[nr].frag_size,
 376                                  PCI_DMA_FROMDEVICE);
 377         }
 378         /* Adjust size of last fragment to match actual length */
 379         mb->m_len = length - priv->frag_info[nr - 1].frag_prefix_size;
 380         mb->m_next = NULL;
 381         return 0;
 382
 383 fail:
 384         /* Drop all accumulated fragments (which have already been replaced in
 385          * the descriptor) of this packet; remaining fragments are reused... */
 386         while (nr > 0) {
 387                 nr--;
 388                 m_free(mb_list[nr]);
 389         }
 390         return -ENOMEM;
 391 }
 392
 393
 394 static inline int invalid_cqe(struct mlx4_en_priv *priv,
 395                               struct mlx4_cqe *cqe)
 396 {
 397         /* Drop packet on bad receive or bad checksum */
 398         if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 399                      MLX4_CQE_OPCODE_ERROR)) {
 400                 en_err(priv, "CQE completed in error - vendor "
 401                          "syndrom:%d syndrom:%d\n",
 402                          ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
 403                          ((struct mlx4_err_cqe *) cqe)->syndrome);
 404                 return 1;
 405         }
 406         if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
 407                 en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
 408                 return 1;
 409         }
 410
 411         return 0;
 412 }
 413
 414 static void validate_loopback(struct mlx4_en_priv *priv, struct mbuf *mb)
 415 {
 416         int i;
 417         int offset = ETHER_HDR_LEN;
 418
 419         for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) {
 420                 if (*(mb->m_data + offset) != (unsigned char) (i & 0xff))
 421                         goto out_loopback;
 422         }
 423         /* Loopback found */
 424         priv->loopback_ok = 1;
 425
 426 out_loopback:
 427         m_freem(mb);
 428 }
 429
 430 static struct mbuf *mlx4_en_rx_mb(struct mlx4_en_priv *priv,
 431                                   struct mlx4_en_rx_desc *rx_desc,
 432                                   struct mbuf **mb_list,
 433                                   unsigned int length)
 434 {
 435         struct mbuf *mb;
 436
 437         mb = mb_list[0];
 438         /* Move relevant fragments to mb */
 439         if (unlikely(mlx4_en_complete_rx_desc(priv, rx_desc, mb_list, length)))
 440                 return NULL;
 441
 442         return mb;
 443 }
 444
 445
 446 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
 447 {
 448         struct mlx4_en_priv *priv = netdev_priv(dev);
 449         struct mlx4_cqe *cqe;
 450         struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
 451         struct mbuf **mb_list;
 452         struct mlx4_en_rx_desc *rx_desc;
 453         struct mbuf *mb;
 454 #ifdef INET
 455         struct lro_entry *queued;
 456 #endif
 457         int index;
 458         unsigned int length;
 459         int polled = 0;
 460
 461         if (!priv->port_up)
 462                 return 0;
 463
 464         /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
 465          * descriptor offset can be deduced from the CQE index instead of
 466          * reading 'cqe->index' */
 467         index = cq->mcq.cons_index & ring->size_mask;
 468         cqe = &cq->buf[index];
 469
 470         /* Process all completed CQEs */
 471         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 472                     cq->mcq.cons_index & cq->size)) {
 473
 474                 mb_list = ring->rx_info + (index << priv->log_rx_info);
 475                 rx_desc = ring->buf + (index << ring->log_stride);
 476
 477                 /*
 478                  * make sure we read the CQE after we read the ownership bit
 479                  */
 480                 rmb();
 481
 482                 if (invalid_cqe(priv, cqe))
 483                         goto next;
 484
 485                 /*
 486                  * Packet is OK - process it.
 487                  */
 488                 length = be32_to_cpu(cqe->byte_cnt);
 489                 mb = mlx4_en_rx_mb(priv, rx_desc, mb_list, length);
 490                 if (!mb) {
 491                         ring->errors++;
 492                         goto next;
 493                 }
 494
 495                 ring->bytes += length;
 496                 ring->packets++;
 497
 498                 if (unlikely(priv->validate_loopback)) {
 499                         validate_loopback(priv, mb);
 500                         goto next;
 501                 }
 502
 503                 mb->m_pkthdr.flowid = cq->ring;
 504                 mb->m_flags |= M_FLOWID;
 505                 mb->m_pkthdr.rcvif = dev;
 506                 if (be32_to_cpu(cqe->vlan_my_qpn) &
 507                     MLX4_CQE_VLAN_PRESENT_MASK) {
 508                         mb->m_pkthdr.ether_vtag = be16_to_cpu(cqe->sl_vid);
 509                         mb->m_flags |= M_VLANTAG;
 510                 }
 511                 if (likely(priv->rx_csum) &&
 512                     (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
 513                     (cqe->checksum == cpu_to_be16(0xffff))) {
 514                         priv->port_stats.rx_chksum_good++;
 515                         mb->m_pkthdr.csum_flags =
 516                             CSUM_IP_CHECKED | CSUM_IP_VALID |
 517                             CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
 518                         mb->m_pkthdr.csum_data = htons(0xffff);
 519                         /* This packet is eligible for LRO if it is:
 520                          * - DIX Ethernet (type interpretation)
 521                          * - TCP/IP (v4)
 522                          * - without IP options
 523                          * - not an IP fragment
 524                          */
 525 #ifdef INET
 526                         if (mlx4_en_can_lro(cqe->status) &&
 527                             (dev->if_capenable & IFCAP_LRO)) {
 528                                 if (ring->lro.lro_cnt != 0 &&
 529                                     tcp_lro_rx(&ring->lro, mb, 0) == 0)
 530                                         goto next;
 531                         }
 532 #endif
 533
 534                         /* LRO not possible, complete processing here */
 535                         INC_PERF_COUNTER(priv->pstats.lro_misses);
 536                 } else {
 537                         mb->m_pkthdr.csum_flags = 0;
 538                         priv->port_stats.rx_chksum_none++;
 539 #ifdef INET
 540                         if (priv->ip_reasm &&
 541                             cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4) &&
 542                             !mlx4_en_rx_frags(priv, ring, mb, cqe))
 543                                 goto next;
 544 #endif
 545                 }
 546
 547                 /* Push it up the stack */
 548                 dev->if_input(dev, mb);
 549
 550 next:
 551                 ++cq->mcq.cons_index;
 552                 index = (cq->mcq.cons_index) & ring->size_mask;
 553                 cqe = &cq->buf[index];
 554                 if (++polled == budget)
 555                         goto out;
 556         }
 557         /* Flush all pending IP reassembly sessions */
 558 out:
 559 #ifdef INET
 560         mlx4_en_flush_frags(priv, ring);
 561         while ((queued = SLIST_FIRST(&ring->lro.lro_active)) != NULL) {
 562                 SLIST_REMOVE_HEAD(&ring->lro.lro_active, next);
 563                 tcp_lro_flush(&ring->lro, queued);
 564         }
 565 #endif
 566         AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
 567         mlx4_cq_set_ci(&cq->mcq);
 568         wmb(); /* ensure HW sees CQ consumer before we post new buffers */
 569         ring->cons = cq->mcq.cons_index;
 570         ring->prod += polled; /* Polled descriptors were realocated in place */
 571         mlx4_en_update_rx_prod_db(ring);
 572         return polled;
 573 }
 574
 575
 576 /* Rx CQ polling - called by NAPI */
 577 static int mlx4_en_poll_rx_cq(struct mlx4_en_cq *cq, int budget)
 578 {
 579         struct net_device *dev = cq->dev;
 580         int done;
 581
 582         done = mlx4_en_process_rx_cq(dev, cq, budget);
 583         cq->tot_rx += done;
 584
 585         return done;
 586 }
 587
 588 void mlx4_en_rx_que(void *context, int pending)
 589 {
 590         struct mlx4_en_cq *cq;
 591
 592         cq = context;
 593         while (mlx4_en_poll_rx_cq(cq, MLX4_EN_MAX_RX_POLL)
 594             == MLX4_EN_MAX_RX_POLL);
 595         mlx4_en_arm_cq(cq->dev->if_softc, cq);
 596 }
 597
 598 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
 599 {
 600         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 601         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 602         int done;
 603
 604         done = mlx4_en_poll_rx_cq(cq, MLX4_EN_MAX_RX_POLL);
 605         if (done == MLX4_EN_MAX_RX_POLL)
 606                 taskqueue_enqueue(cq->tq, &cq->cq_task);
 607         else
 608                 mlx4_en_arm_cq(priv, cq);
 609 }
 610
 611
 612 #if MLX4_EN_MAX_RX_FRAGS == 3
 613 static int frag_sizes[] = {
 614         FRAG_SZ0,
 615         FRAG_SZ1,
 616         FRAG_SZ2,
 617 };
 618 #elif MLX4_EN_MAX_RX_FRAGS == 2
 619 static int frag_sizes[] = {
 620         FRAG_SZ0,
 621         FRAG_SZ1,
 622 };
 623 #else
 624 #error "Unknown MAX_RX_FRAGS"
 625 #endif
 626
 627 void mlx4_en_calc_rx_buf(struct net_device *dev)
 628 {
 629         struct mlx4_en_priv *priv = netdev_priv(dev);
 630         int eff_mtu = dev->if_mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ETH_LLC_SNAP_SIZE;
 631         int buf_size = 0;
 632         int i, frag;
 633
 634         for (i = 0, frag = 0; buf_size < eff_mtu; frag++, i++) {
 635                 /*
 636                  * Allocate small to large but only as much as is needed for
 637                  * the tail.
 638                  */
 639                 while (i > 0 && eff_mtu - buf_size <= frag_sizes[i - 1])
 640                         i--;
 641                 priv->frag_info[frag].frag_size = frag_sizes[i];
 642                 priv->frag_info[frag].frag_prefix_size = buf_size;
 643                 buf_size += priv->frag_info[frag].frag_size;
 644         }
 645
 646         priv->num_frags = frag;
 647         priv->rx_mb_size = eff_mtu;
 648         priv->log_rx_info =
 649             ROUNDUP_LOG2(priv->num_frags * sizeof(struct mbuf *));
 650
 651         en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
 652                   "num_frags:%d):\n", eff_mtu, priv->num_frags);
 653         for (i = 0; i < priv->num_frags; i++) {
 654                 en_dbg(DRV, priv, "  frag:%d - size:%d prefix:%d\n", i,
 655                                 priv->frag_info[i].frag_size,
 656                                 priv->frag_info[i].frag_prefix_size)
 657         }
 658 }
 659
 660 /* RSS related functions */
 661
 662 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
 663                                  struct mlx4_en_rx_ring *ring,
 664                                  enum mlx4_qp_state *state,
 665                                  struct mlx4_qp *qp)
 666 {
 667         struct mlx4_en_dev *mdev = priv->mdev;
 668         struct mlx4_qp_context *context;
 669         int err = 0;
 670
 671         context = kmalloc(sizeof *context , GFP_KERNEL);
 672         if (!context) {
 673                 en_err(priv, "Failed to allocate qp context\n");
 674                 return -ENOMEM;
 675         }
 676
 677         err = mlx4_qp_alloc(mdev->dev, qpn, qp);
 678         if (err) {
 679                 en_err(priv, "Failed to allocate qp #%x\n", qpn);
 680                 goto out;
 681         }
 682         qp->event = mlx4_en_sqp_event;
 683
 684         memset(context, 0, sizeof *context);
 685         mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0,
 686                                 qpn, ring->cqn, context);
 687         context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
 688
 689         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
 690         if (err) {
 691                 mlx4_qp_remove(mdev->dev, qp);
 692                 mlx4_qp_free(mdev->dev, qp);
 693         }
 694         mlx4_en_update_rx_prod_db(ring);
 695 out:
 696         kfree(context);
 697         return err;
 698 }
 699
 700 /* Allocate rx qp's and configure them according to rss map */
 701 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
 702 {
 703         struct mlx4_en_dev *mdev = priv->mdev;
 704         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
 705         struct mlx4_qp_context context;
 706         struct mlx4_en_rss_context *rss_context;
 707         void *ptr;
 708         u8 rss_mask;
 709         int i, qpn;
 710         int err = 0;
 711         int good_qps = 0;
 712
 713         if (mdev->profile.udp_rss)
 714                 rss_mask = 0x3f;
 715         else
 716                 rss_mask = 0x14;
 717         en_dbg(DRV, priv, "Configuring rss steering\n");
 718         err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
 719                                     roundup_pow_of_two(priv->rx_ring_num),
 720                                     &rss_map->base_qpn);
 721         if (err) {
 722                 en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
 723                 return err;
 724         }
 725
 726         for (i = 0; i < priv->rx_ring_num; i++) {
 727                 qpn = rss_map->base_qpn + i;
 728                 err = mlx4_en_config_rss_qp(priv, qpn,
 729                                             &priv->rx_ring[i],
 730                                             &rss_map->state[i],
 731                                             &rss_map->qps[i]);
 732                 if (err)
 733                         goto rss_err;
 734
 735                 ++good_qps;
 736         }
 737
 738         /* Configure RSS indirection qp */
 739         err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn);
 740         if (err) {
 741                 en_err(priv, "Failed to reserve range for RSS "
 742                              "indirection qp\n");
 743                 goto rss_err;
 744         }
 745         err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
 746         if (err) {
 747                 en_err(priv, "Failed to allocate RSS indirection QP\n");
 748                 goto reserve_err;
 749         }
 750         rss_map->indir_qp.event = mlx4_en_sqp_event;
 751         mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
 752                                 priv->rx_ring[0].cqn, &context);
 753
 754         ptr = ((void *) &context) + 0x3c;
 755         rss_context = (struct mlx4_en_rss_context *) ptr;
 756         rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 |
 757                                             (rss_map->base_qpn));
 758         rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
 759         rss_context->flags = rss_mask;
 760         rss_context->base_qpn_udp = rss_context->default_qpn;
 761
 762         err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
 763                                &rss_map->indir_qp, &rss_map->indir_state);
 764         if (err)
 765                 goto indir_err;
 766
 767         return 0;
 768
 769 indir_err:
 770         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
 771                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
 772         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
 773         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
 774 reserve_err:
 775         mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
 776 rss_err:
 777         for (i = 0; i < good_qps; i++) {
 778                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
 779                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
 780                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
 781                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
 782         }
 783         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
 784         return err;
 785 }
 786
 787 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
 788 {
 789         struct mlx4_en_dev *mdev = priv->mdev;
 790         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
 791         int i;
 792
 793         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
 794                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
 795         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
 796         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
 797         mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
 798
 799         for (i = 0; i < priv->rx_ring_num; i++) {
 800                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
 801                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
 802                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
 803                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
 804         }
 805         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
 806 }