2 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * Copyright (C) 2001 Benno Rice
27 * All rights reserved.
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
32 * 1. Redistributions of source code must retain the above copyright
33 * notice, this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright
35 * notice, this list of conditions and the following disclaimer in the
36 * documentation and/or other materials provided with the distribution.
38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
51 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
52 * Copyright (C) 1995, 1996 TooLs GmbH.
53 * All rights reserved.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
63 * 3. All advertising materials mentioning features or use of this software
64 * must display the following acknowledgement:
65 * This product includes software developed by TooLs GmbH.
66 * 4. The name of TooLs GmbH may not be used to endorse or promote products
67 * derived from this software without specific prior written permission.
69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81 #include <sys/cdefs.h>
82 __FBSDID("$FreeBSD$");
84 #include "opt_compat.h"
86 #include "opt_kstack_pages.h"
87 #include "opt_platform.h"
89 #include <sys/cdefs.h>
90 #include <sys/types.h>
91 #include <sys/param.h>
93 #include <sys/systm.h>
101 #include <sys/kernel.h>
102 #include <sys/lock.h>
103 #include <sys/mutex.h>
104 #include <sys/sysctl.h>
105 #include <sys/exec.h>
107 #include <sys/syscallsubr.h>
108 #include <sys/sysproto.h>
109 #include <sys/signalvar.h>
110 #include <sys/sysent.h>
111 #include <sys/imgact.h>
112 #include <sys/msgbuf.h>
113 #include <sys/ptrace.h>
117 #include <vm/vm_page.h>
118 #include <vm/vm_object.h>
119 #include <vm/vm_pager.h>
121 #include <machine/cpu.h>
122 #include <machine/kdb.h>
123 #include <machine/reg.h>
124 #include <machine/vmparam.h>
125 #include <machine/spr.h>
126 #include <machine/hid.h>
127 #include <machine/psl.h>
128 #include <machine/trap.h>
129 #include <machine/md_var.h>
130 #include <machine/mmuvar.h>
131 #include <machine/sigframe.h>
132 #include <machine/metadata.h>
133 #include <machine/platform.h>
135 #include <sys/linker.h>
136 #include <sys/reboot.h>
138 #include <dev/fdt/fdt_common.h>
139 #include <dev/ofw/openfirm.h>
141 #include <powerpc/mpc85xx/mpc85xx.h>
144 extern vm_offset_t ksym_start, ksym_end;
148 #define debugf(fmt, args...) printf(fmt, ##args)
150 #define debugf(fmt, args...)
153 extern unsigned char kernel_text[];
154 extern unsigned char _etext[];
155 extern unsigned char _edata[];
156 extern unsigned char __bss_start[];
157 extern unsigned char __sbss_start[];
158 extern unsigned char __sbss_end[];
159 extern unsigned char _end[];
161 extern void dcache_enable(void);
162 extern void dcache_inval(void);
163 extern void icache_enable(void);
164 extern void icache_inval(void);
167 * Bootinfo is passed to us by legacy loaders. Save the address of the
168 * structure to handle backward compatibility.
172 struct kva_md_info kmi;
173 struct pcpu __pcpu[MAXCPU];
174 struct trapframe frame0;
178 char machine[] = "powerpc";
179 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
181 int cacheline_size = 32;
183 SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
184 CTLFLAG_RD, &cacheline_size, 0, "");
186 int hw_direct_map = 0;
188 static void cpu_e500_startup(void *);
189 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL);
191 void print_kernel_section_addr(void);
192 void print_kenv(void);
193 u_int booke_init(uint32_t, uint32_t);
195 extern int elf32_nxstack;
198 cpu_e500_startup(void *dummy)
202 /* Initialise the decrementer-based clock. */
205 /* Good {morning,afternoon,evening,night}. */
206 cpu_setup(PCPU_GET(cpuid));
208 printf("real memory = %ld (%ld MB)\n", ptoa(physmem),
209 ptoa(physmem) / 1048576);
212 /* Display any holes after the first chunk of extended memory. */
214 printf("Physical memory chunk(s):\n");
215 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
216 size = phys_avail[indx + 1] - phys_avail[indx];
218 printf("0x%08x - 0x%08x, %d bytes (%ld pages)\n",
219 phys_avail[indx], phys_avail[indx + 1] - 1,
220 size, size / PAGE_SIZE);
224 vm_ksubmap_init(&kmi);
226 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
227 ptoa(cnt.v_free_count) / 1048576);
229 /* Set up buffers, so they can be used to read disk labels. */
231 vm_pager_bufferinit();
233 /* Cpu supports execution permissions on the pages. */
257 debugf("loader passed (static) kenv:\n");
258 if (kern_envp == NULL) {
259 debugf(" no env, null ptr\n");
262 debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp);
265 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
266 debugf(" %x %s\n", (u_int32_t)cp, cp);
270 print_kernel_section_addr(void)
273 debugf("kernel image addresses:\n");
274 debugf(" kernel_text = 0x%08x\n", (uint32_t)kernel_text);
275 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
276 debugf(" _edata = 0x%08x\n", (uint32_t)_edata);
277 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__sbss_start);
278 debugf(" __sbss_end = 0x%08x\n", (uint32_t)__sbss_end);
279 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__bss_start);
280 debugf(" _end = 0x%08x\n", (uint32_t)_end);
284 booke_init(uint32_t arg1, uint32_t arg2)
288 vm_offset_t dtbp, end;
293 end = (uintptr_t)_end;
294 dtbp = (vm_offset_t)NULL;
297 * Handle the various ways we can get loaded and started:
298 * - FreeBSD's loader passes the pointer to the metadata
299 * in arg1, with arg2 undefined. arg1 has a value that's
300 * relative to the kernel's link address (i.e. larger
302 * - Juniper's loader passes the metadata pointer in arg2
303 * and sets arg1 to zero. This is to signal that the
304 * loader maps the kernel and starts it at its link
305 * address (unlike the FreeBSD loader).
306 * - U-Boot passes the standard argc and argv parameters
307 * in arg1 and arg2 (resp). arg1 is between 1 and some
308 * relatively small number, such as 64K. arg2 is the
309 * physical address of the argv vector.
311 if (arg1 > (uintptr_t)kernel_text) /* FreeBSD loader */
313 else if (arg1 == 0) /* Juniper loader */
319 * Parse metadata and fetch parameters.
322 preload_metadata = mdp;
323 kmdp = preload_search_by_type("elf kernel");
325 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
326 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
327 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
328 end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
330 bootinfo = (uint32_t *)preload_search_info(kmdp,
331 MODINFO_METADATA | MODINFOMD_BOOTINFO);
334 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
335 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
339 bzero(__sbss_start, __sbss_end - __sbss_start);
340 bzero(__bss_start, _end - __bss_start);
343 #if defined(FDT_DTB_STATIC)
345 * In case the device tree blob was not retrieved (from metadata) try
346 * to use the statically embedded one.
348 if (dtbp == (vm_offset_t)NULL)
349 dtbp = (vm_offset_t)&fdt_static_dtb;
352 if (OF_install(OFW_FDT, 0) == FALSE)
355 if (OF_init((void *)dtbp) != 0)
358 if (fdt_immr_addr(CCSRBAR_VA) != 0)
361 OF_interpret("perform-fixup", 0);
363 /* Initialize TLB1 handling */
364 tlb1_init(fdt_immr_pa);
366 /* Reset Time Base */
369 /* Init params/tunables that can be overridden by the loader. */
372 /* Start initializing proc0 and thread0. */
373 proc_linkup0(&proc0, &thread0);
374 thread0.td_frame = &frame0;
376 /* Set up per-cpu data and store the pointer in SPR general 0. */
378 pcpu_init(pc, 0, sizeof(struct pcpu));
379 pc->pc_curthread = &thread0;
380 __asm __volatile("mtsprg 0, %0" :: "r"(pc));
382 /* Initialize system mutexes. */
385 /* Initialize the console before printing anything. */
388 /* Print out some debug info... */
389 debugf("%s: console initialized\n", __func__);
390 debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp);
391 debugf(" end = 0x%08x\n", (u_int32_t)end);
392 debugf(" boothowto = 0x%08x\n", boothowto);
393 debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA);
394 debugf(" MSR = 0x%08x\n", mfmsr());
395 debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0));
396 debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1));
397 debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR));
399 __asm __volatile("msync; isync");
400 csr = ccsr_read4(OCP85XX_L2CTL);
401 debugf(" L2CTL = 0x%08x\n", csr);
403 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
405 print_kernel_section_addr();
407 //tlb1_print_entries();
408 //tlb1_print_tlbentries();
413 if (boothowto & RB_KDB)
414 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
417 /* Initialise platform module */
418 platform_probe_and_attach();
420 /* Initialise virtual memory. */
421 pmap_mmu_install(MMU_TYPE_BOOKE, 0);
422 pmap_bootstrap((uintptr_t)kernel_text, end);
423 debugf("MSR = 0x%08x\n", mfmsr());
424 //tlb1_print_entries();
425 //tlb1_print_tlbentries();
427 /* Initialize params/tunables that are derived from memsize. */
428 init_param2(physmem);
430 /* Finish setting up thread0. */
431 thread0.td_pcb = (struct pcb *)
432 ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
433 sizeof(struct pcb)) & ~15);
434 bzero((void *)thread0.td_pcb, sizeof(struct pcb));
435 pc->pc_curpcb = thread0.td_pcb;
437 /* Initialise the message buffer. */
438 msgbufinit(msgbufp, msgbufsize);
440 /* Enable Machine Check interrupt. */
441 mtmsr(mfmsr() | PSL_ME);
444 /* Enable D-cache if applicable */
445 csr = mfspr(SPR_L1CSR0);
446 if ((csr & L1CSR0_DCE) == 0) {
451 csr = mfspr(SPR_L1CSR0);
452 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
453 printf("L1 D-cache %sabled\n",
454 (csr & L1CSR0_DCE) ? "en" : "dis");
456 /* Enable L1 I-cache if applicable. */
457 csr = mfspr(SPR_L1CSR1);
458 if ((csr & L1CSR1_ICE) == 0) {
463 csr = mfspr(SPR_L1CSR1);
464 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
465 printf("L1 I-cache %sabled\n",
466 (csr & L1CSR1_ICE) ? "en" : "dis");
468 debugf("%s: SP = 0x%08x\n", __func__,
469 ((uintptr_t)thread0.td_pcb - 16) & ~15);
471 return (((uintptr_t)thread0.td_pcb - 16) & ~15);
474 #define RES_GRANULE 32
475 extern uint32_t tlb0_miss_locks[];
477 /* Initialise a struct pcpu. */
479 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
482 pcpu->pc_tid_next = TID_MIN;
486 int words_per_gran = RES_GRANULE / sizeof(uint32_t);
488 ptr = &tlb0_miss_locks[cpuid * words_per_gran];
489 pcpu->pc_booke_tlb_lock = ptr;
491 *(ptr + 1) = 0; /* recurse counter */
496 * Flush the D-cache for non-DMA I/O so that the I-cache can
497 * be made coherent later.
500 cpu_flush_dcache(void *ptr, size_t len)
512 if (td->td_md.md_spinlock_count == 0) {
513 msr = intr_disable();
514 td->td_md.md_spinlock_count = 1;
515 td->td_md.md_saved_msr = msr;
517 td->td_md.md_spinlock_count++;
529 msr = td->td_md.md_saved_msr;
530 td->td_md.md_spinlock_count--;
531 if (td->td_md.md_spinlock_count == 0)
535 /* Shutdown the CPU as much as possible. */
540 mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
545 ptrace_set_pc(struct thread *td, unsigned long addr)
547 struct trapframe *tf;
550 tf->srr0 = (register_t)addr;
556 ptrace_single_step(struct thread *td)
558 struct trapframe *tf;
562 tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
567 ptrace_clear_single_step(struct thread *td)
569 struct trapframe *tf;
573 tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
578 kdb_cpu_clear_singlestep(void)
582 r = mfspr(SPR_DBCR0);
583 mtspr(SPR_DBCR0, r & ~DBCR0_IC);
584 kdb_frame->srr1 &= ~PSL_DE;
588 kdb_cpu_set_singlestep(void)
592 r = mfspr(SPR_DBCR0);
593 mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
594 kdb_frame->srr1 |= PSL_DE;
598 bzero(void *buf, size_t len)
604 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
609 while (len >= sizeof(u_long) * 8) {
611 *((u_long*) p + 1) = 0;
612 *((u_long*) p + 2) = 0;
613 *((u_long*) p + 3) = 0;
614 len -= sizeof(u_long) * 8;
615 *((u_long*) p + 4) = 0;
616 *((u_long*) p + 5) = 0;
617 *((u_long*) p + 6) = 0;
618 *((u_long*) p + 7) = 0;
619 p += sizeof(u_long) * 8;
622 while (len >= sizeof(u_long)) {
624 len -= sizeof(u_long);