2 * Copyright (c) 1990 The Regents of the University of California.
3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz and Don Ahn.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
40 * Routines to handle clock hardware.
43 #include "opt_clock.h"
47 #include <sys/param.h>
48 #include <sys/systm.h>
52 #include <sys/mutex.h>
54 #include <sys/kernel.h>
55 #include <sys/module.h>
57 #include <sys/sched.h>
59 #include <sys/sysctl.h>
60 #include <sys/timeet.h>
61 #include <sys/timetc.h>
63 #include <machine/clock.h>
64 #include <machine/cpu.h>
65 #include <machine/intr_machdep.h>
66 #include <machine/ppireg.h>
67 #include <machine/timerreg.h>
70 #include <pc98/pc98/pc98_machdep.h>
76 #include <pc98/cbus/cbus.h>
78 #include <isa/isareg.h>
80 #include <isa/isavar.h>
84 #include <i386/bios/mca_machdep.h>
90 #define TIMER_FREQ 2457600
92 #define TIMER_FREQ 1193182
95 u_int i8254_freq = TIMER_FREQ;
96 TUNABLE_INT("hw.i8254.freq", &i8254_freq);
98 static int i8254_timecounter = 1;
100 struct mtx clock_lock;
101 static struct intsrc *i8254_intsrc;
102 static uint16_t i8254_lastcount;
103 static uint16_t i8254_offset;
104 static int (*i8254_pending)(struct intsrc *);
105 static int i8254_ticked;
107 struct attimer_softc {
109 int port_rid, intr_rid;
110 struct resource *port_res;
111 struct resource *intr_res;
114 struct resource *port_res2;
117 struct timecounter tc;
118 struct eventtimer et;
121 #define MODE_PERIODIC 1
122 #define MODE_ONESHOT 2
125 static struct attimer_softc *attimer_sc = NULL;
127 static int timer0_period = -2;
129 /* Values for timerX_state: */
131 #define RELEASE_PENDING 1
133 #define ACQUIRE_PENDING 3
135 static u_char timer2_state;
137 static unsigned i8254_get_timecount(struct timecounter *tc);
138 static void set_i8254_freq(int mode, uint32_t period);
143 struct attimer_softc *sc = (struct attimer_softc *)arg;
145 if (i8254_timecounter && sc->period != 0) {
146 mtx_lock_spin(&clock_lock);
150 i8254_offset += i8254_max_count;
154 mtx_unlock_spin(&clock_lock);
157 if (sc && sc->et.et_active && sc->mode != MODE_STOP)
158 sc->et.et_event_cb(&sc->et, sc->et.et_arg);
161 /* Reset clock interrupt by asserting bit 7 of port 0x61 */
163 outb(0x61, inb(0x61) | 0x80);
165 return (FILTER_HANDLED);
169 timer_spkr_acquire(void)
174 mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
176 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
179 if (timer2_state != RELEASED)
181 timer2_state = ACQUIRED;
184 * This access to the timer registers is as atomic as possible
185 * because it is a single instruction. We could do better if we
186 * knew the rate. Use of splclock() limits glitches to 10-100us,
187 * and this is probably good enough for timer2, so we aren't as
188 * careful with it as with timer0.
191 outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
193 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
195 ppi_spkr_on(); /* enable counter2 output to speaker */
200 timer_spkr_release(void)
203 if (timer2_state != ACQUIRED)
205 timer2_state = RELEASED;
207 outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
209 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
211 ppi_spkr_off(); /* disable counter2 output to speaker */
216 timer_spkr_setfreq(int freq)
219 freq = i8254_freq / freq;
220 mtx_lock_spin(&clock_lock);
222 outb(TIMER_CNTR1, freq & 0xff);
223 outb(TIMER_CNTR1, freq >> 8);
225 outb(TIMER_CNTR2, freq & 0xff);
226 outb(TIMER_CNTR2, freq >> 8);
228 mtx_unlock_spin(&clock_lock);
236 mtx_lock_spin(&clock_lock);
238 /* Select timer0 and latch counter value. */
239 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
241 low = inb(TIMER_CNTR0);
242 high = inb(TIMER_CNTR0);
244 mtx_unlock_spin(&clock_lock);
245 return ((high << 8) | low);
250 get_tsc(__unused struct timecounter *tc)
259 struct timecounter *tc;
260 timecounter_get_t *func;
261 uint64_t end, freq, now;
265 freq = atomic_load_acq_64(&tsc_freq);
266 if (tsc_is_invariant && freq != 0) {
270 if (tc->tc_quality <= 0)
272 func = tc->tc_get_timecount;
273 mask = tc->tc_counter_mask;
274 freq = tc->tc_frequency;
277 end = freq * n / 1000000;
280 last = func(tc) & mask;
285 now += mask - last + u + 1;
297 * Wait "n" microseconds.
298 * Relies on timer 1 counting down from (i8254_freq / hz)
299 * Note: timer had better have been programmed before this is first used!
304 int delta, prev_tick, tick, ticks_left;
308 static int state = 0;
312 for (n1 = 1; n1 <= 10000000; n1 *= 10)
317 printf("DELAY(%d)...", n);
323 * Read the counter first, so that the rest of the setup overhead is
324 * counted. Guess the initial overhead is 20 usec (on most systems it
325 * takes about 1.5 usec for each of the i/o's in getit(). The loop
326 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
327 * multiplications and divisions to scale the count take a while).
329 * However, if ddb is active then use a fake counter since reading
330 * the i8254 counter involves acquiring a lock. ddb must not do
331 * locking for many reasons, but it calls here for at least atkbd
340 n -= 0; /* XXX actually guess no initial overhead */
342 * Calculate (n * (i8254_freq / 1e6)) without using floating point
343 * and without any avoidable overflows.
349 * Use fixed point to avoid a slow division by 1000000.
350 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
351 * 2^15 is the first power of 2 that gives exact results
352 * for n between 0 and 256.
354 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
357 * Don't bother using fixed point, although gcc-2.7.2
358 * generates particularly poor code for the long long
359 * division, since even the slow way will complete long
360 * before the delay is up (unless we're interrupted).
362 ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
365 while (ticks_left > 0) {
373 tick = prev_tick - 1;
375 tick = i8254_max_count;
382 delta = prev_tick - tick;
385 delta += i8254_max_count;
387 * Guard against i8254_max_count being wrong.
388 * This shouldn't happen in normal operation,
389 * but it may happen if set_i8254_freq() is
399 printf(" %d calls to getit() at %d usec each\n",
400 getit_calls, (n + 5) / getit_calls);
405 set_i8254_freq(int mode, uint32_t period)
409 mtx_lock_spin(&clock_lock);
410 if (mode == MODE_STOP) {
411 if (i8254_timecounter) {
412 mode = MODE_PERIODIC;
417 new_count = min(((uint64_t)i8254_freq * period +
418 0x80000000LLU) >> 32, 0x10000);
420 if (new_count == timer0_period)
422 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
423 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
426 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT);
427 outb(TIMER_CNTR0, 0);
428 outb(TIMER_CNTR0, 0);
431 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
432 outb(TIMER_CNTR0, new_count & 0xff);
433 outb(TIMER_CNTR0, new_count >> 8);
436 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT);
437 outb(TIMER_CNTR0, new_count & 0xff);
438 outb(TIMER_CNTR0, new_count >> 8);
442 mtx_unlock_spin(&clock_lock);
450 if (attimer_sc != NULL)
451 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
453 set_i8254_freq(0, 0);
458 * Restore all the timers non-atomically (XXX: should be atomically).
460 * This function is called from pmtimer_resume() to restore all the timers.
461 * This should not be necessary, but there are broken laptops that do not
462 * restore all the timers on resume.
463 * As long as pmtimer is not part of amd64 suport, skip this for the amd64
470 i8254_restore(); /* restore i8254_freq and hz */
472 atrtc_restore(); /* reenable RTC interrupts */
477 /* This is separate from startrtclock() so that it can be called early. */
482 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
484 if (pc98_machine_type & M_8M)
485 i8254_freq = 1996800L; /* 1.9968 MHz */
487 set_i8254_freq(0, 0);
501 cpu_initclocks_bsp();
505 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
511 * Use `i8254' instead of `timer' in external names because `timer'
512 * is too generic. Should use it everywhere.
515 error = sysctl_handle_int(oidp, &freq, 0, req);
516 if (error == 0 && req->newptr != NULL) {
518 if (attimer_sc != NULL) {
519 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
520 attimer_sc->tc.tc_frequency = freq;
522 set_i8254_freq(0, 0);
528 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
529 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
530 "i8254 timer frequency");
533 i8254_get_timecount(struct timecounter *tc)
535 device_t dev = (device_t)tc->tc_priv;
536 struct attimer_softc *sc = device_get_softc(dev);
542 return (i8254_max_count - getit());
545 flags = read_rflags();
547 flags = read_eflags();
549 mtx_lock_spin(&clock_lock);
551 /* Select timer0 and latch counter value. */
552 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
554 low = inb(TIMER_CNTR0);
555 high = inb(TIMER_CNTR0);
556 count = i8254_max_count - ((high << 8) | low);
557 if (count < i8254_lastcount ||
558 (!i8254_ticked && (clkintr_pending ||
559 ((count < 20 || (!(flags & PSL_I) &&
560 count < i8254_max_count / 2u)) &&
561 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
563 i8254_offset += i8254_max_count;
565 i8254_lastcount = count;
566 count += i8254_offset;
567 mtx_unlock_spin(&clock_lock);
572 attimer_start(struct eventtimer *et,
573 struct bintime *first, struct bintime *period)
575 device_t dev = (device_t)et->et_priv;
576 struct attimer_softc *sc = device_get_softc(dev);
578 if (period != NULL) {
579 sc->mode = MODE_PERIODIC;
580 sc->period = period->frac >> 32;
582 sc->mode = MODE_ONESHOT;
583 sc->period = first->frac >> 32;
586 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
589 set_i8254_freq(sc->mode, sc->period);
594 attimer_stop(struct eventtimer *et)
596 device_t dev = (device_t)et->et_priv;
597 struct attimer_softc *sc = device_get_softc(dev);
599 sc->mode = MODE_STOP;
601 set_i8254_freq(sc->mode, sc->period);
607 * Attach to the ISA PnP descriptors for the timer
609 static struct isa_pnp_id attimer_ids[] = {
610 { 0x0001d041 /* PNP0100 */, "AT timer" },
616 pc98_alloc_resource(device_t dev)
618 static bus_addr_t iat1[] = {0, 2, 4, 6};
619 static bus_addr_t iat2[] = {0, 4};
620 struct attimer_softc *sc;
622 sc = device_get_softc(dev);
625 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid, IO_TIMER1, 1);
626 sc->port_res = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
627 &sc->port_rid, iat1, 4, RF_ACTIVE);
628 if (sc->port_res == NULL)
629 device_printf(dev, "Warning: Couldn't map I/O.\n");
631 isa_load_resourcev(sc->port_res, iat1, 4);
634 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid2, TIMER_CNTR1, 1);
635 sc->port_res2 = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
636 &sc->port_rid2, iat2, 2, RF_ACTIVE);
637 if (sc->port_res2 == NULL)
638 device_printf(dev, "Warning: Couldn't map I/O.\n");
640 isa_load_resourcev(sc->port_res2, iat2, 2);
644 pc98_release_resource(device_t dev)
646 struct attimer_softc *sc;
648 sc = device_get_softc(dev);
651 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
654 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid2,
660 attimer_probe(device_t dev)
664 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
665 /* ENOENT means no PnP-ID, device is hinted. */
666 if (result == ENOENT) {
667 device_set_desc(dev, "AT timer");
669 /* To print resources correctly. */
670 pc98_alloc_resource(dev);
671 pc98_release_resource(dev);
673 return (BUS_PROBE_LOW_PRIORITY);
679 attimer_attach(device_t dev)
681 struct attimer_softc *sc;
685 attimer_sc = sc = device_get_softc(dev);
686 bzero(sc, sizeof(struct attimer_softc));
688 pc98_alloc_resource(dev);
690 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
691 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
692 device_printf(dev,"Warning: Couldn't map I/O.\n");
694 i8254_intsrc = intr_lookup_source(0);
695 if (i8254_intsrc != NULL)
696 i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
697 resource_int_value(device_get_name(dev), device_get_unit(dev),
698 "timecounter", &i8254_timecounter);
699 set_i8254_freq(0, 0);
700 if (i8254_timecounter) {
701 sc->tc.tc_get_timecount = i8254_get_timecount;
702 sc->tc.tc_counter_mask = 0xffff;
703 sc->tc.tc_frequency = i8254_freq;
704 sc->tc.tc_name = "i8254";
705 sc->tc.tc_quality = 0;
706 sc->tc.tc_priv = dev;
709 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
710 "clock", &i) != 0 || i != 0) {
712 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
713 &s, NULL) == 0 && s != 0)
715 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
716 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
717 device_printf(dev,"Can't map interrupt.\n");
720 /* Dirty hack, to make bus_setup_intr to not enable source. */
721 i8254_intsrc->is_handlers++;
722 if ((bus_setup_intr(dev, sc->intr_res,
723 INTR_MPSAFE | INTR_TYPE_CLK,
724 (driver_filter_t *)clkintr, NULL,
725 sc, &sc->intr_handler))) {
726 device_printf(dev, "Can't setup interrupt.\n");
727 i8254_intsrc->is_handlers--;
730 i8254_intsrc->is_handlers--;
731 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
732 sc->et.et_name = "i8254";
733 sc->et.et_flags = ET_FLAGS_PERIODIC;
734 if (!i8254_timecounter)
735 sc->et.et_flags |= ET_FLAGS_ONESHOT;
736 sc->et.et_quality = 100;
737 sc->et.et_frequency = i8254_freq;
738 sc->et.et_min_period.sec = 0;
739 sc->et.et_min_period.frac =
740 ((0x0002LLU << 48) / i8254_freq) << 16;
741 sc->et.et_max_period.sec = 0xffff / i8254_freq;
742 sc->et.et_max_period.frac =
743 ((0xfffeLLU << 48) / i8254_freq) << 16;
744 sc->et.et_start = attimer_start;
745 sc->et.et_stop = attimer_stop;
746 sc->et.et_priv = dev;
747 et_register(&sc->et);
753 attimer_resume(device_t dev)
760 static device_method_t attimer_methods[] = {
761 /* Device interface */
762 DEVMETHOD(device_probe, attimer_probe),
763 DEVMETHOD(device_attach, attimer_attach),
764 DEVMETHOD(device_detach, bus_generic_detach),
765 DEVMETHOD(device_shutdown, bus_generic_shutdown),
766 DEVMETHOD(device_suspend, bus_generic_suspend),
767 DEVMETHOD(device_resume, attimer_resume),
771 static driver_t attimer_driver = {
774 sizeof(struct attimer_softc),
777 static devclass_t attimer_devclass;
779 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
780 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);