2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_perfmon.h"
56 #include "opt_platform.h"
57 #include "opt_sched.h"
58 #include "opt_kdtrace.h"
60 #include <sys/param.h>
62 #include <sys/systm.h>
66 #include <sys/callout.h>
70 #include <sys/eventhandler.h>
72 #include <sys/imgact.h>
74 #include <sys/kernel.h>
76 #include <sys/linker.h>
78 #include <sys/malloc.h>
79 #include <sys/memrange.h>
80 #include <sys/msgbuf.h>
81 #include <sys/mutex.h>
83 #include <sys/ptrace.h>
84 #include <sys/reboot.h>
85 #include <sys/rwlock.h>
86 #include <sys/sched.h>
87 #include <sys/signalvar.h>
91 #include <sys/syscallsubr.h>
92 #include <sys/sysctl.h>
93 #include <sys/sysent.h>
94 #include <sys/sysproto.h>
95 #include <sys/ucontext.h>
96 #include <sys/vmmeter.h>
99 #include <vm/vm_extern.h>
100 #include <vm/vm_kern.h>
101 #include <vm/vm_page.h>
102 #include <vm/vm_map.h>
103 #include <vm/vm_object.h>
104 #include <vm/vm_pager.h>
105 #include <vm/vm_param.h>
109 #error KDB must be enabled in order for DDB to work!
112 #include <ddb/db_sym.h>
115 #include <net/netisr.h>
117 #include <machine/clock.h>
118 #include <machine/cpu.h>
119 #include <machine/cputypes.h>
120 #include <machine/intr_machdep.h>
122 #include <machine/md_var.h>
123 #include <machine/metadata.h>
124 #include <machine/mp_watchdog.h>
125 #include <machine/pc/bios.h>
126 #include <machine/pcb.h>
127 #include <machine/proc.h>
128 #include <machine/reg.h>
129 #include <machine/sigframe.h>
130 #include <machine/specialreg.h>
132 #include <machine/perfmon.h>
134 #include <machine/tss.h>
136 #include <machine/smp.h>
143 #include <x86/isa/icu.h>
145 #include <machine/apicvar.h>
148 #include <isa/isareg.h>
151 /* Sanity check for __curthread() */
152 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
154 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
156 extern void printcpuinfo(void); /* XXX header file */
157 extern void identify_cpu(void);
158 extern void panicifcpuunsupported(void);
160 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
161 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
163 static void cpu_startup(void *);
164 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
165 char *xfpusave, size_t xfpusave_len);
166 static int set_fpcontext(struct thread *td, const mcontext_t *mcp,
167 char *xfpustate, size_t xfpustate_len);
168 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
171 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
172 * the physical address at which the kernel is loaded.
174 extern char kernphys[];
176 extern vm_offset_t ksym_start, ksym_end;
179 struct msgbuf *msgbufp;
181 /* Intel ICH registers */
182 #define ICH_PMBASE 0x400
183 #define ICH_SMI_EN ICH_PMBASE + 0x30
185 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
193 * The number of PHYSMAP entries must be one less than the number of
194 * PHYSSEG entries because the PHYSMAP entry that spans the largest
195 * physical address that is accessible by ISA DMA is split into two
198 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
200 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
201 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
203 /* must be 2 less so 0 0 can signal end of chunks */
204 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
205 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
207 struct kva_md_info kmi;
209 static struct trapframe proc0_tf;
210 struct region_descriptor r_gdt, r_idt;
212 struct pcpu __pcpu[MAXCPU];
216 struct mem_range_softc mem_range_softc;
218 struct mtx dt_lock; /* lock for GDT and LDT */
220 void (*vmm_resume_p)(void);
230 * On MacBooks, we need to disallow the legacy USB circuit to
231 * generate an SMI# because this can cause several problems,
232 * namely: incorrect CPU frequency detection and failure to
234 * We do this by disabling a bit in the SMI_EN (SMI Control and
235 * Enable register) of the Intel ICH LPC Interface Bridge.
237 sysenv = getenv("smbios.system.product");
238 if (sysenv != NULL) {
239 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
240 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
241 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
242 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
243 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
244 strncmp(sysenv, "Macmini1,1", 10) == 0) {
246 printf("Disabling LEGACY_USB_EN bit on "
248 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
254 * Good {morning,afternoon,evening,night}.
258 panicifcpuunsupported();
264 * Display physical memory if SMBIOS reports reasonable amount.
267 sysenv = getenv("smbios.memory.enabled");
268 if (sysenv != NULL) {
269 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
272 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
273 memsize = ptoa((uintmax_t)Maxmem);
274 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
275 realmem = atop(memsize);
278 * Display any holes after the first chunk of extended memory.
283 printf("Physical memory chunk(s):\n");
284 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
287 size = phys_avail[indx + 1] - phys_avail[indx];
289 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
290 (uintmax_t)phys_avail[indx],
291 (uintmax_t)phys_avail[indx + 1] - 1,
292 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
296 vm_ksubmap_init(&kmi);
298 printf("avail memory = %ju (%ju MB)\n",
299 ptoa((uintmax_t)cnt.v_free_count),
300 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
303 * Set up buffers, so they can be used to read disk labels.
306 vm_pager_bufferinit();
312 * Send an interrupt to process.
314 * Stack is set up to allow sigcode stored
315 * at top to call routine, followed by call
316 * to sigreturn routine below. After sigreturn
317 * resets the signal mask, the stack, and the
318 * frame pointer, it returns to the user
322 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
324 struct sigframe sf, *sfp;
330 struct trapframe *regs;
339 PROC_LOCK_ASSERT(p, MA_OWNED);
340 sig = ksi->ksi_signo;
342 mtx_assert(&psp->ps_mtx, MA_OWNED);
344 oonstack = sigonstack(regs->tf_rsp);
346 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
347 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
348 xfpusave = __builtin_alloca(xfpusave_len);
354 /* Save user context. */
355 bzero(&sf, sizeof(sf));
356 sf.sf_uc.uc_sigmask = *mask;
357 sf.sf_uc.uc_stack = td->td_sigstk;
358 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
359 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
360 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
361 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
362 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
363 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
365 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
366 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
367 bzero(sf.sf_uc.uc_mcontext.mc_spare,
368 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
369 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
371 /* Allocate space for the signal handler context. */
372 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
373 SIGISMEMBER(psp->ps_sigonstack, sig)) {
374 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
375 #if defined(COMPAT_43)
376 td->td_sigstk.ss_flags |= SS_ONSTACK;
379 sp = (char *)regs->tf_rsp - 128;
380 if (xfpusave != NULL) {
382 sp = (char *)((unsigned long)sp & ~0x3Ful);
383 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
385 sp -= sizeof(struct sigframe);
386 /* Align to 16 bytes. */
387 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
389 /* Translate the signal if appropriate. */
390 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
391 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
393 /* Build the argument list for the signal handler. */
394 regs->tf_rdi = sig; /* arg 1 in %rdi */
395 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
396 bzero(&sf.sf_si, sizeof(sf.sf_si));
397 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
398 /* Signal handler installed with SA_SIGINFO. */
399 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
400 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
402 /* Fill in POSIX parts */
403 sf.sf_si = ksi->ksi_info;
404 sf.sf_si.si_signo = sig; /* maybe a translated signal */
405 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
407 /* Old FreeBSD-style arguments. */
408 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
409 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
410 sf.sf_ahu.sf_handler = catcher;
412 mtx_unlock(&psp->ps_mtx);
416 * Copy the sigframe out to the user's stack.
418 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
419 (xfpusave != NULL && copyout(xfpusave,
420 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
423 printf("process %ld has trashed its stack\n", (long)p->p_pid);
429 regs->tf_rsp = (long)sfp;
430 regs->tf_rip = p->p_sysent->sv_sigcode_base;
431 regs->tf_rflags &= ~(PSL_T | PSL_D);
432 regs->tf_cs = _ucodesel;
433 regs->tf_ds = _udatasel;
434 regs->tf_es = _udatasel;
435 regs->tf_fs = _ufssel;
436 regs->tf_gs = _ugssel;
437 regs->tf_flags = TF_HASSEGS;
438 set_pcb_flags(pcb, PCB_FULL_IRET);
440 mtx_lock(&psp->ps_mtx);
444 * System call to cleanup state after a signal
445 * has been taken. Reset signal mask and
446 * stack state from context left by sendsig (above).
447 * Return to previous pc and psl as specified by
448 * context left by sendsig. Check carefully to
449 * make sure that the user has not modified the
450 * state to gain improper privileges.
455 sys_sigreturn(td, uap)
457 struct sigreturn_args /* {
458 const struct __ucontext *sigcntxp;
464 struct trapframe *regs;
467 size_t xfpustate_len;
475 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
477 uprintf("pid %d (%s): sigreturn copyin failed\n",
478 p->p_pid, td->td_name);
482 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
483 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
484 td->td_name, ucp->uc_mcontext.mc_flags);
488 rflags = ucp->uc_mcontext.mc_rflags;
490 * Don't allow users to change privileged or reserved flags.
492 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
493 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
494 td->td_name, rflags);
499 * Don't allow users to load a valid privileged %cs. Let the
500 * hardware check for invalid selectors, excess privilege in
501 * other selectors, invalid %eip's and invalid %esp's.
503 cs = ucp->uc_mcontext.mc_cs;
504 if (!CS_SECURE(cs)) {
505 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
507 ksiginfo_init_trap(&ksi);
508 ksi.ksi_signo = SIGBUS;
509 ksi.ksi_code = BUS_OBJERR;
510 ksi.ksi_trapno = T_PROTFLT;
511 ksi.ksi_addr = (void *)regs->tf_rip;
512 trapsignal(td, &ksi);
516 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
517 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
518 if (xfpustate_len > cpu_max_ext_state_size -
519 sizeof(struct savefpu)) {
520 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
521 p->p_pid, td->td_name, xfpustate_len);
524 xfpustate = __builtin_alloca(xfpustate_len);
525 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
526 xfpustate, xfpustate_len);
529 "pid %d (%s): sigreturn copying xfpustate failed\n",
530 p->p_pid, td->td_name);
537 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
539 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
540 p->p_pid, td->td_name, ret);
543 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
544 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
545 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
547 #if defined(COMPAT_43)
548 if (ucp->uc_mcontext.mc_onstack & 1)
549 td->td_sigstk.ss_flags |= SS_ONSTACK;
551 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
554 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
555 set_pcb_flags(pcb, PCB_FULL_IRET);
556 return (EJUSTRETURN);
559 #ifdef COMPAT_FREEBSD4
561 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
564 return sys_sigreturn(td, (struct sigreturn_args *)uap);
570 * Machine dependent boot() routine
572 * I haven't seen anything to put here yet
573 * Possibly some stuff might be grafted back here from boot()
581 * Flush the D-cache for non-DMA I/O so that the I-cache can
582 * be made coherent later.
585 cpu_flush_dcache(void *ptr, size_t len)
590 /* Get current clock frequency for the given cpu id. */
592 cpu_est_clockrate(int cpu_id, uint64_t *rate)
595 uint64_t acnt, mcnt, perf;
598 if (pcpu_find(cpu_id) == NULL || rate == NULL)
602 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
603 * DELAY(9) based logic fails.
605 if (tsc_is_invariant && !tsc_perf_stat)
610 /* Schedule ourselves on the indicated cpu. */
611 thread_lock(curthread);
612 sched_bind(curthread, cpu_id);
613 thread_unlock(curthread);
617 /* Calibrate by measuring a short delay. */
618 reg = intr_disable();
619 if (tsc_is_invariant) {
624 mcnt = rdmsr(MSR_MPERF);
625 acnt = rdmsr(MSR_APERF);
628 perf = 1000 * acnt / mcnt;
629 *rate = (tsc2 - tsc1) * perf;
635 *rate = (tsc2 - tsc1) * 1000;
640 thread_lock(curthread);
641 sched_unbind(curthread);
642 thread_unlock(curthread);
650 * Shutdown the CPU as much as possible
659 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
660 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
661 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
662 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
663 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
664 0, "Use MONITOR/MWAIT for short idle");
666 #define STATE_RUNNING 0x0
667 #define STATE_MWAIT 0x1
668 #define STATE_SLEEPING 0x2
671 cpu_idle_acpi(sbintime_t sbt)
675 state = (int *)PCPU_PTR(monitorbuf);
676 *state = STATE_SLEEPING;
678 /* See comments in cpu_idle_hlt(). */
680 if (sched_runnable())
682 else if (cpu_idle_hook)
685 __asm __volatile("sti; hlt");
686 *state = STATE_RUNNING;
690 cpu_idle_hlt(sbintime_t sbt)
694 state = (int *)PCPU_PTR(monitorbuf);
695 *state = STATE_SLEEPING;
698 * Since we may be in a critical section from cpu_idle(), if
699 * an interrupt fires during that critical section we may have
700 * a pending preemption. If the CPU halts, then that thread
701 * may not execute until a later interrupt awakens the CPU.
702 * To handle this race, check for a runnable thread after
703 * disabling interrupts and immediately return if one is
704 * found. Also, we must absolutely guarentee that hlt is
705 * the next instruction after sti. This ensures that any
706 * interrupt that fires after the call to disable_intr() will
707 * immediately awaken the CPU from hlt. Finally, please note
708 * that on x86 this works fine because of interrupts enabled only
709 * after the instruction following sti takes place, while IF is set
710 * to 1 immediately, allowing hlt instruction to acknowledge the
714 if (sched_runnable())
717 __asm __volatile("sti; hlt");
718 *state = STATE_RUNNING;
722 * MWAIT cpu power states. Lower 4 bits are sub-states.
724 #define MWAIT_C0 0xf0
725 #define MWAIT_C1 0x00
726 #define MWAIT_C2 0x10
727 #define MWAIT_C3 0x20
728 #define MWAIT_C4 0x30
731 cpu_idle_mwait(sbintime_t sbt)
735 state = (int *)PCPU_PTR(monitorbuf);
736 *state = STATE_MWAIT;
738 /* See comments in cpu_idle_hlt(). */
740 if (sched_runnable()) {
742 *state = STATE_RUNNING;
745 cpu_monitor(state, 0, 0);
746 if (*state == STATE_MWAIT)
747 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
750 *state = STATE_RUNNING;
754 cpu_idle_spin(sbintime_t sbt)
759 state = (int *)PCPU_PTR(monitorbuf);
760 *state = STATE_RUNNING;
763 * The sched_runnable() call is racy but as long as there is
764 * a loop missing it one time will have just a little impact if any
765 * (and it is much better than missing the check at all).
767 for (i = 0; i < 1000; i++) {
768 if (sched_runnable())
775 * C1E renders the local APIC timer dead, so we disable it by
776 * reading the Interrupt Pending Message register and clearing
777 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
780 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
781 * #32559 revision 3.00+
783 #define MSR_AMDK8_IPM 0xc0010055
784 #define AMDK8_SMIONCMPHALT (1ULL << 27)
785 #define AMDK8_C1EONCMPHALT (1ULL << 28)
786 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
789 cpu_probe_amdc1e(void)
793 * Detect the presence of C1E capability mostly on latest
794 * dual-cores (or future) k8 family.
796 if (cpu_vendor_id == CPU_VENDOR_AMD &&
797 (cpu_id & 0x00000f00) == 0x00000f00 &&
798 (cpu_id & 0x0fff0000) >= 0x00040000) {
799 cpu_ident_amdc1e = 1;
803 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
811 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
814 ap_watchdog(PCPU_GET(cpuid));
816 /* If we are busy - try to use fast methods. */
818 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
819 cpu_idle_mwait(busy);
824 /* If we have time - switch timers into idle mode. */
827 sbt = cpu_idleclock();
830 /* Apply AMD APIC timer C1E workaround. */
831 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
832 msr = rdmsr(MSR_AMDK8_IPM);
833 if (msr & AMDK8_CMPHALT)
834 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
837 /* Call main idle method. */
840 /* Switch timers mack into active mode. */
846 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
851 cpu_idle_wakeup(int cpu)
856 pcpu = pcpu_find(cpu);
857 state = (int *)pcpu->pc_monitorbuf;
859 * This doesn't need to be atomic since missing the race will
860 * simply result in unnecessary IPIs.
862 if (*state == STATE_SLEEPING)
864 if (*state == STATE_MWAIT)
865 *state = STATE_RUNNING;
870 * Ordered by speed/power consumption.
876 { cpu_idle_spin, "spin" },
877 { cpu_idle_mwait, "mwait" },
878 { cpu_idle_hlt, "hlt" },
879 { cpu_idle_acpi, "acpi" },
884 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
890 avail = malloc(256, M_TEMP, M_WAITOK);
892 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
893 if (strstr(idle_tbl[i].id_name, "mwait") &&
894 (cpu_feature2 & CPUID2_MON) == 0)
896 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
897 cpu_idle_hook == NULL)
899 p += sprintf(p, "%s%s", p != avail ? ", " : "",
900 idle_tbl[i].id_name);
902 error = sysctl_handle_string(oidp, avail, 0, req);
907 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
908 0, 0, idle_sysctl_available, "A", "list of available idle functions");
911 idle_sysctl(SYSCTL_HANDLER_ARGS)
919 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
920 if (idle_tbl[i].id_fn == cpu_idle_fn) {
921 p = idle_tbl[i].id_name;
925 strncpy(buf, p, sizeof(buf));
926 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
927 if (error != 0 || req->newptr == NULL)
929 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
930 if (strstr(idle_tbl[i].id_name, "mwait") &&
931 (cpu_feature2 & CPUID2_MON) == 0)
933 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
934 cpu_idle_hook == NULL)
936 if (strcmp(idle_tbl[i].id_name, buf))
938 cpu_idle_fn = idle_tbl[i].id_fn;
944 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
945 idle_sysctl, "A", "currently selected idle function");
948 * Reset registers to default values on exec.
951 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
953 struct trapframe *regs = td->td_frame;
954 struct pcb *pcb = td->td_pcb;
957 if (td->td_proc->p_md.md_ldt != NULL)
960 mtx_unlock(&dt_lock);
964 clear_pcb_flags(pcb, PCB_32BIT);
965 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
966 set_pcb_flags(pcb, PCB_FULL_IRET);
968 bzero((char *)regs, sizeof(struct trapframe));
969 regs->tf_rip = imgp->entry_addr;
970 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
971 regs->tf_rdi = stack; /* argv */
972 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
973 regs->tf_ss = _udatasel;
974 regs->tf_cs = _ucodesel;
975 regs->tf_ds = _udatasel;
976 regs->tf_es = _udatasel;
977 regs->tf_fs = _ufssel;
978 regs->tf_gs = _ugssel;
979 regs->tf_flags = TF_HASSEGS;
980 td->td_retval[1] = 0;
983 * Reset the hardware debug registers if they were in use.
984 * They won't have any meaning for the newly exec'd process.
986 if (pcb->pcb_flags & PCB_DBREGS) {
995 * Clear the debug registers on the running
996 * CPU, otherwise they will end up affecting
997 * the next process we switch to.
1001 clear_pcb_flags(pcb, PCB_DBREGS);
1005 * Drop the FP state if we hold it, so that the process gets a
1006 * clean FP state if it uses the FPU again.
1018 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1019 * BSP. See the comments there about why we set them.
1021 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1026 * Initialize amd64 and configure to run kernel
1030 * Initialize segments & interrupt table
1033 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
1034 static struct gate_descriptor idt0[NIDT];
1035 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1037 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1039 static char nmi0_stack[PAGE_SIZE] __aligned(16);
1040 CTASSERT(sizeof(struct nmi_pcpu) == 16);
1042 struct amd64tss common_tss[MAXCPU];
1045 * Software prototypes -- in more palatable form.
1047 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1048 * slots as corresponding segments for i386 kernel.
1050 struct soft_segment_descriptor gdt_segs[] = {
1051 /* GNULL_SEL 0 Null Descriptor */
1060 /* GNULL2_SEL 1 Null Descriptor */
1069 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1071 .ssd_limit = 0xfffff,
1072 .ssd_type = SDT_MEMRWA,
1078 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1080 .ssd_limit = 0xfffff,
1081 .ssd_type = SDT_MEMRWA,
1087 /* GCODE_SEL 4 Code Descriptor for kernel */
1089 .ssd_limit = 0xfffff,
1090 .ssd_type = SDT_MEMERA,
1096 /* GDATA_SEL 5 Data Descriptor for kernel */
1098 .ssd_limit = 0xfffff,
1099 .ssd_type = SDT_MEMRWA,
1105 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1107 .ssd_limit = 0xfffff,
1108 .ssd_type = SDT_MEMERA,
1114 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1116 .ssd_limit = 0xfffff,
1117 .ssd_type = SDT_MEMRWA,
1123 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1125 .ssd_limit = 0xfffff,
1126 .ssd_type = SDT_MEMERA,
1132 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1134 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
1135 .ssd_type = SDT_SYSTSS,
1141 /* Actually, the TSS is a system descriptor which is double size */
1150 /* GUSERLDT_SEL 11 LDT Descriptor */
1159 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1171 setidt(idx, func, typ, dpl, ist)
1178 struct gate_descriptor *ip;
1181 ip->gd_looffset = (uintptr_t)func;
1182 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1188 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1192 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1193 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1194 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1195 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1196 IDTVEC(xmm), IDTVEC(dblfault),
1197 #ifdef KDTRACE_HOOKS
1201 IDTVEC(xen_intr_upcall),
1203 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1207 * Display the index and function name of any IDT entries that don't use
1208 * the default 'rsvd' entry point.
1210 DB_SHOW_COMMAND(idt, db_show_idt)
1212 struct gate_descriptor *ip;
1217 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1218 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1219 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1220 db_printf("%3d\t", idx);
1221 db_printsym(func, DB_STGY_PROC);
1228 /* Show privileged registers. */
1229 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1234 } __packed idtr, gdtr;
1237 __asm __volatile("sidt %0" : "=m" (idtr));
1238 db_printf("idtr\t0x%016lx/%04x\n",
1239 (u_long)idtr.base, (u_int)idtr.limit);
1240 __asm __volatile("sgdt %0" : "=m" (gdtr));
1241 db_printf("gdtr\t0x%016lx/%04x\n",
1242 (u_long)gdtr.base, (u_int)gdtr.limit);
1243 __asm __volatile("sldt %0" : "=r" (ldt));
1244 db_printf("ldtr\t0x%04x\n", ldt);
1245 __asm __volatile("str %0" : "=r" (tr));
1246 db_printf("tr\t0x%04x\n", tr);
1247 db_printf("cr0\t0x%016lx\n", rcr0());
1248 db_printf("cr2\t0x%016lx\n", rcr2());
1249 db_printf("cr3\t0x%016lx\n", rcr3());
1250 db_printf("cr4\t0x%016lx\n", rcr4());
1251 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER));
1252 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL));
1253 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
1254 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT));
1255 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE));
1261 struct user_segment_descriptor *sd;
1262 struct soft_segment_descriptor *ssd;
1265 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1266 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1267 ssd->ssd_type = sd->sd_type;
1268 ssd->ssd_dpl = sd->sd_dpl;
1269 ssd->ssd_p = sd->sd_p;
1270 ssd->ssd_long = sd->sd_long;
1271 ssd->ssd_def32 = sd->sd_def32;
1272 ssd->ssd_gran = sd->sd_gran;
1277 struct soft_segment_descriptor *ssd;
1278 struct user_segment_descriptor *sd;
1281 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1282 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1283 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1284 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1285 sd->sd_type = ssd->ssd_type;
1286 sd->sd_dpl = ssd->ssd_dpl;
1287 sd->sd_p = ssd->ssd_p;
1288 sd->sd_long = ssd->ssd_long;
1289 sd->sd_def32 = ssd->ssd_def32;
1290 sd->sd_gran = ssd->ssd_gran;
1295 struct soft_segment_descriptor *ssd;
1296 struct system_segment_descriptor *sd;
1299 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1300 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1301 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1302 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1303 sd->sd_type = ssd->ssd_type;
1304 sd->sd_dpl = ssd->ssd_dpl;
1305 sd->sd_p = ssd->ssd_p;
1306 sd->sd_gran = ssd->ssd_gran;
1309 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1310 #include <isa/isavar.h>
1311 #include <isa/isareg.h>
1313 * Return a bitmap of the current interrupt requests. This is 8259-specific
1314 * and is only suitable for use at probe time.
1315 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1316 * It shouldn't be here. There should probably be an APIC centric
1317 * implementation in the apic driver code, if at all.
1320 isa_irq_pending(void)
1325 irr1 = inb(IO_ICU1);
1326 irr2 = inb(IO_ICU2);
1327 return ((irr2 << 8) | irr1);
1334 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1337 int i, insert_idx, physmap_idx;
1339 physmap_idx = *physmap_idxp;
1345 * Find insertion point while checking for overlap. Start off by
1346 * assuming the new entry will be added to the end.
1348 insert_idx = physmap_idx + 2;
1349 for (i = 0; i <= physmap_idx; i += 2) {
1350 if (base < physmap[i + 1]) {
1351 if (base + length <= physmap[i]) {
1355 if (boothowto & RB_VERBOSE)
1357 "Overlapping memory regions, ignoring second region\n");
1362 /* See if we can prepend to the next entry. */
1363 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1364 physmap[insert_idx] = base;
1368 /* See if we can append to the previous entry. */
1369 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1370 physmap[insert_idx - 1] += length;
1375 *physmap_idxp = physmap_idx;
1376 if (physmap_idx == PHYSMAP_SIZE) {
1378 "Too many segments in the physical address map, giving up\n");
1383 * Move the last 'N' entries down to make room for the new
1386 for (i = physmap_idx; i > insert_idx; i -= 2) {
1387 physmap[i] = physmap[i - 2];
1388 physmap[i + 1] = physmap[i - 1];
1391 /* Insert the new entry. */
1392 physmap[insert_idx] = base;
1393 physmap[insert_idx + 1] = base + length;
1398 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
1401 struct bios_smap *smap, *smapend;
1405 * Memory map from INT 15:E820.
1407 * subr_module.c says:
1408 * "Consumer may safely assume that size value precedes data."
1409 * ie: an int32_t immediately precedes smap.
1411 smapsize = *((u_int32_t *)smapbase - 1);
1412 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1414 for (smap = smapbase; smap < smapend; smap++) {
1415 if (boothowto & RB_VERBOSE)
1416 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1417 smap->type, smap->base, smap->length);
1419 if (smap->type != SMAP_TYPE_MEMORY)
1422 if (!add_physmap_entry(smap->base, smap->length, physmap,
1428 #define efi_next_descriptor(ptr, size) \
1429 ((struct efi_md *)(((uint8_t *) ptr) + size))
1432 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1435 struct efi_md *map, *p;
1440 static const char *types[] = {
1446 "RuntimeServicesCode",
1447 "RuntimeServicesData",
1448 "ConventionalMemory",
1450 "ACPIReclaimMemory",
1453 "MemoryMappedIOPortSpace",
1458 * Memory map data provided by UEFI via the GetMemoryMap
1459 * Boot Services API.
1461 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1462 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1464 if (efihdr->descriptor_size == 0)
1466 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1468 if (boothowto & RB_VERBOSE)
1469 printf("%23s %12s %12s %8s %4s\n",
1470 "Type", "Physical", "Virtual", "#Pages", "Attr");
1472 for (i = 0, p = map; i < ndesc; i++,
1473 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1474 if (boothowto & RB_VERBOSE) {
1475 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1476 type = types[p->md_type];
1479 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1480 p->md_virt, p->md_pages);
1481 if (p->md_attr & EFI_MD_ATTR_UC)
1483 if (p->md_attr & EFI_MD_ATTR_WC)
1485 if (p->md_attr & EFI_MD_ATTR_WT)
1487 if (p->md_attr & EFI_MD_ATTR_WB)
1489 if (p->md_attr & EFI_MD_ATTR_UCE)
1491 if (p->md_attr & EFI_MD_ATTR_WP)
1493 if (p->md_attr & EFI_MD_ATTR_RP)
1495 if (p->md_attr & EFI_MD_ATTR_XP)
1497 if (p->md_attr & EFI_MD_ATTR_RT)
1502 switch (p->md_type) {
1503 case EFI_MD_TYPE_CODE:
1504 case EFI_MD_TYPE_DATA:
1505 case EFI_MD_TYPE_BS_CODE:
1506 case EFI_MD_TYPE_BS_DATA:
1507 case EFI_MD_TYPE_FREE:
1509 * We're allowed to use any entry with these types.
1516 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1517 physmap, physmap_idx))
1522 static char bootmethod[16] = "";
1523 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1524 "System firmware boot method");
1527 * Populate the (physmap) array with base/bound pairs describing the
1528 * available physical memory in the system, then test this memory and
1529 * build the phys_avail array describing the actually-available memory.
1531 * Total memory size may be set by the kernel environment variable
1532 * hw.physmem or the compile-time define MAXMEM.
1534 * XXX first should be vm_paddr_t.
1537 getmemsize(caddr_t kmdp, u_int64_t first)
1539 int i, physmap_idx, pa_indx, da_indx;
1540 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1541 u_long physmem_start, physmem_tunable, memtest;
1543 struct bios_smap *smapbase;
1544 struct efi_map_header *efihdr;
1545 quad_t dcons_addr, dcons_size;
1547 bzero(physmap, sizeof(physmap));
1551 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1552 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1553 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1554 MODINFO_METADATA | MODINFOMD_SMAP);
1556 if (efihdr != NULL) {
1557 add_efi_map_entries(efihdr, physmap, &physmap_idx);
1558 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1559 } else if (smapbase != NULL) {
1560 add_smap_entries(smapbase, physmap, &physmap_idx);
1561 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1563 panic("No BIOS smap or EFI map info from loader!");
1567 * Find the 'base memory' segment for SMP
1570 for (i = 0; i <= physmap_idx; i += 2) {
1571 if (physmap[i] == 0x00000000) {
1572 basemem = physmap[i + 1] / 1024;
1577 panic("BIOS smap did not include a basemem segment!");
1580 /* make hole for AP bootstrap code */
1581 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1585 * Maxmem isn't the "maximum memory", it's one larger than the
1586 * highest page of the physical address space. It should be
1587 * called something like "Maxphyspage". We may adjust this
1588 * based on ``hw.physmem'' and the results of the memory test.
1590 Maxmem = atop(physmap[physmap_idx + 1]);
1593 Maxmem = MAXMEM / 4;
1596 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1597 Maxmem = atop(physmem_tunable);
1600 * By default enable the memory test on real hardware, and disable
1601 * it if we appear to be running in a VM. This avoids touching all
1602 * pages unnecessarily, which doesn't matter on real hardware but is
1603 * bad for shared VM hosts. Use a general name so that
1604 * one could eventually do more with the code than just disable it.
1606 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
1607 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1610 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1613 if (Maxmem > atop(physmap[physmap_idx + 1]))
1614 Maxmem = atop(physmap[physmap_idx + 1]);
1616 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1617 (boothowto & RB_VERBOSE))
1618 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1620 /* call pmap initialization to make new kernel address space */
1621 pmap_bootstrap(&first);
1624 * Size up each available chunk of physical memory.
1626 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1627 * By default, mask off the first 16 pages unless we appear to be
1630 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1631 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1632 if (physmem_start < PAGE_SIZE)
1633 physmap[0] = PAGE_SIZE;
1634 else if (physmem_start >= physmap[1])
1635 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1637 physmap[0] = round_page(physmem_start);
1640 phys_avail[pa_indx++] = physmap[0];
1641 phys_avail[pa_indx] = physmap[0];
1642 dump_avail[da_indx] = physmap[0];
1646 * Get dcons buffer address
1648 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1649 getenv_quad("dcons.size", &dcons_size) == 0)
1653 * physmap is in bytes, so when converting to page boundaries,
1654 * round up the start address and round down the end address.
1656 for (i = 0; i <= physmap_idx; i += 2) {
1659 end = ptoa((vm_paddr_t)Maxmem);
1660 if (physmap[i + 1] < end)
1661 end = trunc_page(physmap[i + 1]);
1662 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1663 int tmp, page_bad, full;
1664 int *ptr = (int *)CADDR1;
1668 * block out kernel memory as not available.
1670 if (pa >= (vm_paddr_t)kernphys && pa < first)
1674 * block out dcons buffer
1677 && pa >= trunc_page(dcons_addr)
1678 && pa < dcons_addr + dcons_size)
1686 * map page into kernel: valid, read/write,non-cacheable
1688 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1693 * Test for alternating 1's and 0's
1695 *(volatile int *)ptr = 0xaaaaaaaa;
1696 if (*(volatile int *)ptr != 0xaaaaaaaa)
1699 * Test for alternating 0's and 1's
1701 *(volatile int *)ptr = 0x55555555;
1702 if (*(volatile int *)ptr != 0x55555555)
1707 *(volatile int *)ptr = 0xffffffff;
1708 if (*(volatile int *)ptr != 0xffffffff)
1713 *(volatile int *)ptr = 0x0;
1714 if (*(volatile int *)ptr != 0x0)
1717 * Restore original value.
1723 * Adjust array of valid/good pages.
1725 if (page_bad == TRUE)
1728 * If this good page is a continuation of the
1729 * previous set of good pages, then just increase
1730 * the end pointer. Otherwise start a new chunk.
1731 * Note that "end" points one higher than end,
1732 * making the range >= start and < end.
1733 * If we're also doing a speculative memory
1734 * test and we at or past the end, bump up Maxmem
1735 * so that we keep going. The first bad page
1736 * will terminate the loop.
1738 if (phys_avail[pa_indx] == pa) {
1739 phys_avail[pa_indx] += PAGE_SIZE;
1742 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1744 "Too many holes in the physical address space, giving up\n");
1749 phys_avail[pa_indx++] = pa; /* start */
1750 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1754 if (dump_avail[da_indx] == pa) {
1755 dump_avail[da_indx] += PAGE_SIZE;
1758 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1762 dump_avail[da_indx++] = pa; /* start */
1763 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1775 * The last chunk must contain at least one page plus the message
1776 * buffer to avoid complicating other code (message buffer address
1777 * calculation, etc.).
1779 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1780 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1781 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1782 phys_avail[pa_indx--] = 0;
1783 phys_avail[pa_indx--] = 0;
1786 Maxmem = atop(phys_avail[pa_indx]);
1788 /* Trim off space for the message buffer. */
1789 phys_avail[pa_indx] -= round_page(msgbufsize);
1791 /* Map the message buffer. */
1792 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1796 hammer_time(u_int64_t modulep, u_int64_t physfree)
1801 struct nmi_pcpu *np;
1802 struct xstate_hdr *xhdr;
1807 thread0.td_kstack = physfree + KERNBASE;
1808 thread0.td_kstack_pages = KSTACK_PAGES;
1809 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1810 bzero((void *)thread0.td_kstack, kstack0_sz);
1811 physfree += kstack0_sz;
1814 * This may be done better later if it gets more high level
1815 * components in it. If so just link td->td_proc here.
1817 proc_linkup0(&proc0, &thread0);
1819 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1820 preload_bootstrap_relocate(KERNBASE);
1821 kmdp = preload_search_by_type("elf kernel");
1823 kmdp = preload_search_by_type("elf64 kernel");
1824 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1825 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1827 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1828 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1831 /* Init basic tunables, hz etc */
1835 * make gdt memory segments
1837 for (x = 0; x < NGDT; x++) {
1838 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1839 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1840 ssdtosd(&gdt_segs[x], &gdt[x]);
1842 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1843 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1844 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1846 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1847 r_gdt.rd_base = (long) gdt;
1851 wrmsr(MSR_FSBASE, 0); /* User value */
1852 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1853 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1855 pcpu_init(pc, 0, sizeof(struct pcpu));
1856 dpcpu_init((void *)(physfree + KERNBASE), 0);
1857 physfree += DPCPU_SIZE;
1858 PCPU_SET(prvspace, pc);
1859 PCPU_SET(curthread, &thread0);
1860 PCPU_SET(tssp, &common_tss[0]);
1861 PCPU_SET(commontssp, &common_tss[0]);
1862 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1863 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1864 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1865 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1868 * Initialize mutexes.
1870 * icu_lock: in order to allow an interrupt to occur in a critical
1871 * section, to set pcpu->ipending (etc...) properly, we
1872 * must be able to get the icu lock, so it can't be
1876 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1877 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1880 for (x = 0; x < NIDT; x++)
1881 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1882 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1883 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1884 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1885 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1886 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1887 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1888 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1889 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1890 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1891 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1892 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1893 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1894 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1895 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1896 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1897 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1898 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1899 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1900 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1901 #ifdef KDTRACE_HOOKS
1902 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1905 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);
1908 r_idt.rd_limit = sizeof(idt0) - 1;
1909 r_idt.rd_base = (long) idt;
1913 * Initialize the i8254 before the console so that console
1914 * initialization can use DELAY().
1919 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1922 if (kmdp != NULL && preload_search_info(kmdp,
1923 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL)
1924 vty_set_preferred(VTY_VT);
1927 * Initialize the console before we print anything out.
1936 /* Reset and mask the atpics and leave them shut down. */
1940 * Point the ICU spurious interrupt vectors at the APIC spurious
1941 * interrupt handler.
1943 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1944 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1947 #error "have you forgotten the isa device?";
1953 if (boothowto & RB_KDB)
1954 kdb_enter(KDB_WHY_BOOTFLAGS,
1955 "Boot flags requested debugger");
1958 identify_cpu(); /* Final stage of CPU initialization */
1959 initializecpu(); /* Initialize CPU registers */
1960 initializecpucache();
1962 /* doublefault stack space, runs on ist1 */
1963 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1966 * NMI stack, runs on ist2. The pcpu pointer is stored just
1967 * above the start of the ist2 stack.
1969 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1970 np->np_pcpu = (register_t) pc;
1971 common_tss[0].tss_ist2 = (long) np;
1973 /* Set the IO permission bitmap (empty due to tss seg limit) */
1974 common_tss[0].tss_iobase = sizeof(struct amd64tss) +
1975 IOPAGES * PAGE_SIZE;
1977 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1980 /* Set up the fast syscall stuff */
1981 msr = rdmsr(MSR_EFER) | EFER_SCE;
1982 wrmsr(MSR_EFER, msr);
1983 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1984 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1985 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1986 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1987 wrmsr(MSR_STAR, msr);
1988 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1990 getmemsize(kmdp, physfree);
1991 init_param2(physmem);
1993 /* now running on new page tables, configured,and u/iom is accessible */
1995 msgbufinit(msgbufp, msgbufsize);
1999 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
2000 * area size. Zero out the extended state header in fpu save
2003 thread0.td_pcb = get_pcb_td(&thread0);
2004 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2006 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2008 xhdr->xstate_bv = xsave_mask;
2010 /* make an initial tss so cpu can get interrupt stack on syscall! */
2011 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb;
2012 /* Ensure the stack is aligned to 16 bytes */
2013 common_tss[0].tss_rsp0 &= ~0xFul;
2014 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
2015 PCPU_SET(curpcb, thread0.td_pcb);
2017 /* transfer to user mode */
2019 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2020 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2021 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
2022 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
2023 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
2029 /* setup proc 0's pcb */
2030 thread0.td_pcb->pcb_flags = 0;
2031 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */
2032 thread0.td_frame = &proc0_tf;
2034 env = getenv("kernelname");
2036 strlcpy(kernelname, env, sizeof(kernelname));
2044 /* Location of kernel stack for locore */
2045 return ((u_int64_t)thread0.td_pcb);
2049 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2052 pcpu->pc_acpi_id = 0xffffffff;
2056 spinlock_enter(void)
2062 if (td->td_md.md_spinlock_count == 0) {
2063 flags = intr_disable();
2064 td->td_md.md_spinlock_count = 1;
2065 td->td_md.md_saved_flags = flags;
2067 td->td_md.md_spinlock_count++;
2079 flags = td->td_md.md_saved_flags;
2080 td->td_md.md_spinlock_count--;
2081 if (td->td_md.md_spinlock_count == 0)
2082 intr_restore(flags);
2086 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2087 * we want to start a backtrace from the function that caused us to enter
2088 * the debugger. We have the context in the trapframe, but base the trace
2089 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2090 * enough for a backtrace.
2093 makectx(struct trapframe *tf, struct pcb *pcb)
2096 pcb->pcb_r12 = tf->tf_r12;
2097 pcb->pcb_r13 = tf->tf_r13;
2098 pcb->pcb_r14 = tf->tf_r14;
2099 pcb->pcb_r15 = tf->tf_r15;
2100 pcb->pcb_rbp = tf->tf_rbp;
2101 pcb->pcb_rbx = tf->tf_rbx;
2102 pcb->pcb_rip = tf->tf_rip;
2103 pcb->pcb_rsp = tf->tf_rsp;
2107 ptrace_set_pc(struct thread *td, unsigned long addr)
2110 td->td_frame->tf_rip = addr;
2111 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2116 ptrace_single_step(struct thread *td)
2118 td->td_frame->tf_rflags |= PSL_T;
2123 ptrace_clear_single_step(struct thread *td)
2125 td->td_frame->tf_rflags &= ~PSL_T;
2130 fill_regs(struct thread *td, struct reg *regs)
2132 struct trapframe *tp;
2135 return (fill_frame_regs(tp, regs));
2139 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2141 regs->r_r15 = tp->tf_r15;
2142 regs->r_r14 = tp->tf_r14;
2143 regs->r_r13 = tp->tf_r13;
2144 regs->r_r12 = tp->tf_r12;
2145 regs->r_r11 = tp->tf_r11;
2146 regs->r_r10 = tp->tf_r10;
2147 regs->r_r9 = tp->tf_r9;
2148 regs->r_r8 = tp->tf_r8;
2149 regs->r_rdi = tp->tf_rdi;
2150 regs->r_rsi = tp->tf_rsi;
2151 regs->r_rbp = tp->tf_rbp;
2152 regs->r_rbx = tp->tf_rbx;
2153 regs->r_rdx = tp->tf_rdx;
2154 regs->r_rcx = tp->tf_rcx;
2155 regs->r_rax = tp->tf_rax;
2156 regs->r_rip = tp->tf_rip;
2157 regs->r_cs = tp->tf_cs;
2158 regs->r_rflags = tp->tf_rflags;
2159 regs->r_rsp = tp->tf_rsp;
2160 regs->r_ss = tp->tf_ss;
2161 if (tp->tf_flags & TF_HASSEGS) {
2162 regs->r_ds = tp->tf_ds;
2163 regs->r_es = tp->tf_es;
2164 regs->r_fs = tp->tf_fs;
2165 regs->r_gs = tp->tf_gs;
2176 set_regs(struct thread *td, struct reg *regs)
2178 struct trapframe *tp;
2182 rflags = regs->r_rflags & 0xffffffff;
2183 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2185 tp->tf_r15 = regs->r_r15;
2186 tp->tf_r14 = regs->r_r14;
2187 tp->tf_r13 = regs->r_r13;
2188 tp->tf_r12 = regs->r_r12;
2189 tp->tf_r11 = regs->r_r11;
2190 tp->tf_r10 = regs->r_r10;
2191 tp->tf_r9 = regs->r_r9;
2192 tp->tf_r8 = regs->r_r8;
2193 tp->tf_rdi = regs->r_rdi;
2194 tp->tf_rsi = regs->r_rsi;
2195 tp->tf_rbp = regs->r_rbp;
2196 tp->tf_rbx = regs->r_rbx;
2197 tp->tf_rdx = regs->r_rdx;
2198 tp->tf_rcx = regs->r_rcx;
2199 tp->tf_rax = regs->r_rax;
2200 tp->tf_rip = regs->r_rip;
2201 tp->tf_cs = regs->r_cs;
2202 tp->tf_rflags = rflags;
2203 tp->tf_rsp = regs->r_rsp;
2204 tp->tf_ss = regs->r_ss;
2205 if (0) { /* XXXKIB */
2206 tp->tf_ds = regs->r_ds;
2207 tp->tf_es = regs->r_es;
2208 tp->tf_fs = regs->r_fs;
2209 tp->tf_gs = regs->r_gs;
2210 tp->tf_flags = TF_HASSEGS;
2212 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2216 /* XXX check all this stuff! */
2217 /* externalize from sv_xmm */
2219 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2221 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2222 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2226 bzero(fpregs, sizeof(*fpregs));
2228 /* FPU control/status */
2229 penv_fpreg->en_cw = penv_xmm->en_cw;
2230 penv_fpreg->en_sw = penv_xmm->en_sw;
2231 penv_fpreg->en_tw = penv_xmm->en_tw;
2232 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2233 penv_fpreg->en_rip = penv_xmm->en_rip;
2234 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2235 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2236 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2239 for (i = 0; i < 8; ++i)
2240 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2243 for (i = 0; i < 16; ++i)
2244 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2247 /* internalize from fpregs into sv_xmm */
2249 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2251 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2252 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2256 /* FPU control/status */
2257 penv_xmm->en_cw = penv_fpreg->en_cw;
2258 penv_xmm->en_sw = penv_fpreg->en_sw;
2259 penv_xmm->en_tw = penv_fpreg->en_tw;
2260 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2261 penv_xmm->en_rip = penv_fpreg->en_rip;
2262 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2263 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2264 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2267 for (i = 0; i < 8; ++i)
2268 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2271 for (i = 0; i < 16; ++i)
2272 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2275 /* externalize from td->pcb */
2277 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2280 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2281 P_SHOULDSTOP(td->td_proc),
2282 ("not suspended thread %p", td));
2284 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2288 /* internalize to td->pcb */
2290 set_fpregs(struct thread *td, struct fpreg *fpregs)
2293 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2299 * Get machine context.
2302 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2305 struct trapframe *tp;
2309 PROC_LOCK(curthread->td_proc);
2310 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2311 PROC_UNLOCK(curthread->td_proc);
2312 mcp->mc_r15 = tp->tf_r15;
2313 mcp->mc_r14 = tp->tf_r14;
2314 mcp->mc_r13 = tp->tf_r13;
2315 mcp->mc_r12 = tp->tf_r12;
2316 mcp->mc_r11 = tp->tf_r11;
2317 mcp->mc_r10 = tp->tf_r10;
2318 mcp->mc_r9 = tp->tf_r9;
2319 mcp->mc_r8 = tp->tf_r8;
2320 mcp->mc_rdi = tp->tf_rdi;
2321 mcp->mc_rsi = tp->tf_rsi;
2322 mcp->mc_rbp = tp->tf_rbp;
2323 mcp->mc_rbx = tp->tf_rbx;
2324 mcp->mc_rcx = tp->tf_rcx;
2325 mcp->mc_rflags = tp->tf_rflags;
2326 if (flags & GET_MC_CLEAR_RET) {
2329 mcp->mc_rflags &= ~PSL_C;
2331 mcp->mc_rax = tp->tf_rax;
2332 mcp->mc_rdx = tp->tf_rdx;
2334 mcp->mc_rip = tp->tf_rip;
2335 mcp->mc_cs = tp->tf_cs;
2336 mcp->mc_rsp = tp->tf_rsp;
2337 mcp->mc_ss = tp->tf_ss;
2338 mcp->mc_ds = tp->tf_ds;
2339 mcp->mc_es = tp->tf_es;
2340 mcp->mc_fs = tp->tf_fs;
2341 mcp->mc_gs = tp->tf_gs;
2342 mcp->mc_flags = tp->tf_flags;
2343 mcp->mc_len = sizeof(*mcp);
2344 get_fpcontext(td, mcp, NULL, 0);
2345 mcp->mc_fsbase = pcb->pcb_fsbase;
2346 mcp->mc_gsbase = pcb->pcb_gsbase;
2347 mcp->mc_xfpustate = 0;
2348 mcp->mc_xfpustate_len = 0;
2349 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2354 * Set machine context.
2356 * However, we don't set any but the user modifiable flags, and we won't
2357 * touch the cs selector.
2360 set_mcontext(struct thread *td, const mcontext_t *mcp)
2363 struct trapframe *tp;
2370 if (mcp->mc_len != sizeof(*mcp) ||
2371 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2373 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2374 (tp->tf_rflags & ~PSL_USERCHANGE);
2375 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2376 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2377 sizeof(struct savefpu))
2379 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2380 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2381 mcp->mc_xfpustate_len);
2386 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2389 tp->tf_r15 = mcp->mc_r15;
2390 tp->tf_r14 = mcp->mc_r14;
2391 tp->tf_r13 = mcp->mc_r13;
2392 tp->tf_r12 = mcp->mc_r12;
2393 tp->tf_r11 = mcp->mc_r11;
2394 tp->tf_r10 = mcp->mc_r10;
2395 tp->tf_r9 = mcp->mc_r9;
2396 tp->tf_r8 = mcp->mc_r8;
2397 tp->tf_rdi = mcp->mc_rdi;
2398 tp->tf_rsi = mcp->mc_rsi;
2399 tp->tf_rbp = mcp->mc_rbp;
2400 tp->tf_rbx = mcp->mc_rbx;
2401 tp->tf_rdx = mcp->mc_rdx;
2402 tp->tf_rcx = mcp->mc_rcx;
2403 tp->tf_rax = mcp->mc_rax;
2404 tp->tf_rip = mcp->mc_rip;
2405 tp->tf_rflags = rflags;
2406 tp->tf_rsp = mcp->mc_rsp;
2407 tp->tf_ss = mcp->mc_ss;
2408 tp->tf_flags = mcp->mc_flags;
2409 if (tp->tf_flags & TF_HASSEGS) {
2410 tp->tf_ds = mcp->mc_ds;
2411 tp->tf_es = mcp->mc_es;
2412 tp->tf_fs = mcp->mc_fs;
2413 tp->tf_gs = mcp->mc_gs;
2415 if (mcp->mc_flags & _MC_HASBASES) {
2416 pcb->pcb_fsbase = mcp->mc_fsbase;
2417 pcb->pcb_gsbase = mcp->mc_gsbase;
2419 set_pcb_flags(pcb, PCB_FULL_IRET);
2424 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2425 size_t xfpusave_len)
2427 size_t max_len, len;
2429 mcp->mc_ownedfp = fpugetregs(td);
2430 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2431 sizeof(mcp->mc_fpstate));
2432 mcp->mc_fpformat = fpuformat();
2433 if (!use_xsave || xfpusave_len == 0)
2435 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2437 if (len > max_len) {
2439 bzero(xfpusave + max_len, len - max_len);
2441 mcp->mc_flags |= _MC_HASFPXSTATE;
2442 mcp->mc_xfpustate_len = len;
2443 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2447 set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate,
2448 size_t xfpustate_len)
2450 struct savefpu *fpstate;
2453 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2455 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2457 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2458 /* We don't care what state is left in the FPU or PCB. */
2461 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2462 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2463 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2464 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2465 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
2472 fpstate_drop(struct thread *td)
2475 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2477 if (PCPU_GET(fpcurthread) == td)
2480 * XXX force a full drop of the fpu. The above only drops it if we
2483 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2484 * drop. Dropping only to the pcb matches fnsave's behaviour.
2485 * We only need to drop to !PCB_INITDONE in sendsig(). But
2486 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2487 * have too many layers.
2489 clear_pcb_flags(curthread->td_pcb,
2490 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2495 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2500 dbregs->dr[0] = rdr0();
2501 dbregs->dr[1] = rdr1();
2502 dbregs->dr[2] = rdr2();
2503 dbregs->dr[3] = rdr3();
2504 dbregs->dr[6] = rdr6();
2505 dbregs->dr[7] = rdr7();
2508 dbregs->dr[0] = pcb->pcb_dr0;
2509 dbregs->dr[1] = pcb->pcb_dr1;
2510 dbregs->dr[2] = pcb->pcb_dr2;
2511 dbregs->dr[3] = pcb->pcb_dr3;
2512 dbregs->dr[6] = pcb->pcb_dr6;
2513 dbregs->dr[7] = pcb->pcb_dr7;
2529 set_dbregs(struct thread *td, struct dbreg *dbregs)
2535 load_dr0(dbregs->dr[0]);
2536 load_dr1(dbregs->dr[1]);
2537 load_dr2(dbregs->dr[2]);
2538 load_dr3(dbregs->dr[3]);
2539 load_dr6(dbregs->dr[6]);
2540 load_dr7(dbregs->dr[7]);
2543 * Don't let an illegal value for dr7 get set. Specifically,
2544 * check for undefined settings. Setting these bit patterns
2545 * result in undefined behaviour and can lead to an unexpected
2546 * TRCTRAP or a general protection fault right here.
2547 * Upper bits of dr6 and dr7 must not be set
2549 for (i = 0; i < 4; i++) {
2550 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2552 if (td->td_frame->tf_cs == _ucode32sel &&
2553 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2556 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2557 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2563 * Don't let a process set a breakpoint that is not within the
2564 * process's address space. If a process could do this, it
2565 * could halt the system by setting a breakpoint in the kernel
2566 * (if ddb was enabled). Thus, we need to check to make sure
2567 * that no breakpoints are being enabled for addresses outside
2568 * process's address space.
2570 * XXX - what about when the watched area of the user's
2571 * address space is written into from within the kernel
2572 * ... wouldn't that still cause a breakpoint to be generated
2573 * from within kernel mode?
2576 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2577 /* dr0 is enabled */
2578 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2581 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2582 /* dr1 is enabled */
2583 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2586 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2587 /* dr2 is enabled */
2588 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2591 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2592 /* dr3 is enabled */
2593 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2597 pcb->pcb_dr0 = dbregs->dr[0];
2598 pcb->pcb_dr1 = dbregs->dr[1];
2599 pcb->pcb_dr2 = dbregs->dr[2];
2600 pcb->pcb_dr3 = dbregs->dr[3];
2601 pcb->pcb_dr6 = dbregs->dr[6];
2602 pcb->pcb_dr7 = dbregs->dr[7];
2604 set_pcb_flags(pcb, PCB_DBREGS);
2614 load_dr7(0); /* Turn off the control bits first */
2623 * Return > 0 if a hardware breakpoint has been hit, and the
2624 * breakpoint was in user space. Return 0, otherwise.
2627 user_dbreg_trap(void)
2629 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2630 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2631 int nbp; /* number of breakpoints that triggered */
2632 caddr_t addr[4]; /* breakpoint addresses */
2636 if ((dr7 & 0x000000ff) == 0) {
2638 * all GE and LE bits in the dr7 register are zero,
2639 * thus the trap couldn't have been caused by the
2640 * hardware debug registers
2647 bp = dr6 & 0x0000000f;
2651 * None of the breakpoint bits are set meaning this
2652 * trap was not caused by any of the debug registers
2658 * at least one of the breakpoints were hit, check to see
2659 * which ones and if any of them are user space addresses
2663 addr[nbp++] = (caddr_t)rdr0();
2666 addr[nbp++] = (caddr_t)rdr1();
2669 addr[nbp++] = (caddr_t)rdr2();
2672 addr[nbp++] = (caddr_t)rdr3();
2675 for (i = 0; i < nbp; i++) {
2676 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2678 * addr[i] is in user space
2685 * None of the breakpoints are in user space.
2693 * Provide inb() and outb() as functions. They are normally only available as
2694 * inline functions, thus cannot be called from the debugger.
2697 /* silence compiler warnings */
2698 u_char inb_(u_short);
2699 void outb_(u_short, u_char);
2708 outb_(u_short port, u_char data)