2 * Copyright (c) 2011, 2016 Chelsio Communications, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 NCHAN = 4, /* # of HW channels */
39 MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */
40 EEPROMSIZE = 17408, /* Serial EEPROM physical size */
41 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */
42 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */
43 RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */
44 TCB_SIZE = 128, /* TCB size */
45 NMTUS = 16, /* size of MTU table */
46 NCCTRL_WIN = 32, /* # of congestion control windows */
47 NTX_SCHED = 8, /* # of HW Tx scheduling queues */
48 PM_NSTATS = 5, /* # of PM stats */
51 MBOX_LEN = 64, /* mailbox size in bytes */
52 NTRACE = 4, /* # of tracing filters */
53 TRACE_LEN = 112, /* length of trace data and mask */
54 FILTER_OPT_LEN = 36, /* filter tuple width of optional components */
55 NWOL_PAT = 8, /* # of WoL patterns */
56 WOL_PAT_LEN = 128, /* length of WoL patterns */
57 UDBS_SEG_SIZE = 128, /* Segment size of BAR2 doorbells */
58 UDBS_SEG_SHIFT = 7, /* log2(UDBS_SEG_SIZE) */
59 UDBS_DB_OFFSET = 8, /* offset of the 4B doorbell in a segment */
60 UDBS_WR_OFFSET = 64, /* offset of the work request in a segment */
64 CIM_NUM_IBQ = 6, /* # of CIM IBQs */
65 CIM_NUM_OBQ = 6, /* # of CIM OBQs */
66 CIM_NUM_OBQ_T5 = 8, /* # of CIM OBQs for T5 adapter */
67 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */
68 CIM_PIFLA_SIZE = 64, /* # of 192-bit words in CIM PIF LA */
69 CIM_MALA_SIZE = 64, /* # of 160-bit words in CIM MA LA */
70 CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */
71 CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */
72 TPLA_SIZE = 128, /* # of 64-bit words in TP LA */
73 ULPRX_LA_SIZE = 512, /* # of 256-bit words in ULP_RX LA */
77 SF_PAGE_SIZE = 256, /* serial flash page size */
78 SF_SEC_SIZE = 64 * 1024, /* serial flash sector size */
81 /* SGE context types */
82 enum ctxt_type { CTXT_EGRESS, CTXT_INGRESS, CTXT_FLM, CTXT_CNM };
84 enum { RSP_TYPE_FLBUF, RSP_TYPE_CPL, RSP_TYPE_INTR }; /* response entry types */
86 enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */
89 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */
90 SGE_CTXT_SIZE = 24, /* size of SGE context */
91 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */
92 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */
93 SGE_MAX_IQ_SIZE = 65520,
97 struct sge_qstat { /* data written to SGE queue status entries */
100 volatile __be16 pidx;
103 #define S_QSTAT_PIDX 0
104 #define M_QSTAT_PIDX 0xffff
105 #define G_QSTAT_PIDX(x) (((x) >> S_QSTAT_PIDX) & M_QSTAT_PIDX)
107 #define S_QSTAT_CIDX 16
108 #define M_QSTAT_CIDX 0xffff
109 #define G_QSTAT_CIDX(x) (((x) >> S_QSTAT_CIDX) & M_QSTAT_CIDX)
112 * Structure for last 128 bits of response descriptors
115 __be32 hdrbuflen_pidx;
116 __be32 pldbuflen_qid;
123 #define S_RSPD_NEWBUF 31
124 #define V_RSPD_NEWBUF(x) ((x) << S_RSPD_NEWBUF)
125 #define F_RSPD_NEWBUF V_RSPD_NEWBUF(1U)
128 #define M_RSPD_LEN 0x7fffffff
129 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN)
130 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN)
132 #define S_RSPD_QID S_RSPD_LEN
133 #define M_RSPD_QID M_RSPD_LEN
134 #define V_RSPD_QID(x) V_RSPD_LEN(x)
135 #define G_RSPD_QID(x) G_RSPD_LEN(x)
138 #define V_RSPD_GEN(x) ((x) << S_RSPD_GEN)
139 #define F_RSPD_GEN V_RSPD_GEN(1U)
141 #define S_RSPD_QOVFL 6
142 #define V_RSPD_QOVFL(x) ((x) << S_RSPD_QOVFL)
143 #define F_RSPD_QOVFL V_RSPD_QOVFL(1U)
145 #define S_RSPD_TYPE 4
146 #define M_RSPD_TYPE 0x3
147 #define V_RSPD_TYPE(x) ((x) << S_RSPD_TYPE)
148 #define G_RSPD_TYPE(x) (((x) >> S_RSPD_TYPE) & M_RSPD_TYPE)
150 /* Rx queue interrupt deferral fields: counter enable and timer index */
151 #define S_QINTR_CNT_EN 0
152 #define V_QINTR_CNT_EN(x) ((x) << S_QINTR_CNT_EN)
153 #define F_QINTR_CNT_EN V_QINTR_CNT_EN(1U)
155 #define S_QINTR_TIMER_IDX 1
156 #define M_QINTR_TIMER_IDX 0x7
157 #define V_QINTR_TIMER_IDX(x) ((x) << S_QINTR_TIMER_IDX)
158 #define G_QINTR_TIMER_IDX(x) (((x) >> S_QINTR_TIMER_IDX) & M_QINTR_TIMER_IDX)
160 /* # of pages a pagepod can hold without needing another pagepod */
161 #define PPOD_PAGES 4U
164 __be64 vld_tid_pgsz_tag_color;
167 __be64 addr[PPOD_PAGES + 1];
170 #define S_PPOD_COLOR 0
171 #define M_PPOD_COLOR 0x3F
172 #define V_PPOD_COLOR(x) ((x) << S_PPOD_COLOR)
175 #define M_PPOD_TAG 0xFFFFFF
176 #define V_PPOD_TAG(x) ((x) << S_PPOD_TAG)
177 #define G_PPOD_TAG(x) (((x) >> S_PPOD_TAG) & M_PPOD_TAG)
179 #define S_PPOD_PGSZ 30
180 #define M_PPOD_PGSZ 0x3
181 #define V_PPOD_PGSZ(x) ((x) << S_PPOD_PGSZ)
182 #define G_PPOD_PGSZ(x) (((x) >> S_PPOD_PGSZ) & M_PPOD_PGSZ)
184 #define S_PPOD_TID 32
185 #define M_PPOD_TID 0xFFFFFF
186 #define V_PPOD_TID(x) ((__u64)(x) << S_PPOD_TID)
188 #define S_PPOD_VALID 56
189 #define V_PPOD_VALID(x) ((__u64)(x) << S_PPOD_VALID)
190 #define F_PPOD_VALID V_PPOD_VALID(1ULL)
192 #define S_PPOD_LEN 32
193 #define M_PPOD_LEN 0xFFFFFFFF
194 #define V_PPOD_LEN(x) ((__u64)(x) << S_PPOD_LEN)
196 #define S_PPOD_OFST 0
197 #define M_PPOD_OFST 0xFFFFFFFF
198 #define V_PPOD_OFST(x) ((x) << S_PPOD_OFST)
203 #define FLASH_START(start) ((start) * SF_SEC_SIZE)
204 #define FLASH_MAX_SIZE(nsecs) ((nsecs) * SF_SEC_SIZE)
208 * Various Expansion-ROM boot images, etc.
210 FLASH_EXP_ROM_START_SEC = 0,
211 FLASH_EXP_ROM_NSECS = 6,
212 FLASH_EXP_ROM_START = FLASH_START(FLASH_EXP_ROM_START_SEC),
213 FLASH_EXP_ROM_MAX_SIZE = FLASH_MAX_SIZE(FLASH_EXP_ROM_NSECS),
216 * iSCSI Boot Firmware Table (iBFT) and other driver-related
219 FLASH_IBFT_START_SEC = 6,
220 FLASH_IBFT_NSECS = 1,
221 FLASH_IBFT_START = FLASH_START(FLASH_IBFT_START_SEC),
222 FLASH_IBFT_MAX_SIZE = FLASH_MAX_SIZE(FLASH_IBFT_NSECS),
225 * Boot configuration data.
227 FLASH_BOOTCFG_START_SEC = 7,
228 FLASH_BOOTCFG_NSECS = 1,
229 FLASH_BOOTCFG_START = FLASH_START(FLASH_BOOTCFG_START_SEC),
230 FLASH_BOOTCFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_BOOTCFG_NSECS),
233 * Location of firmware image in FLASH.
235 FLASH_FW_START_SEC = 8,
237 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC),
238 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS),
241 * Location of bootstrap firmware image in FLASH.
243 FLASH_FWBOOTSTRAP_START_SEC = 27,
244 FLASH_FWBOOTSTRAP_NSECS = 1,
245 FLASH_FWBOOTSTRAP_START = FLASH_START(FLASH_FWBOOTSTRAP_START_SEC),
246 FLASH_FWBOOTSTRAP_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FWBOOTSTRAP_NSECS),
249 * iSCSI persistent/crash information.
251 FLASH_ISCSI_CRASH_START_SEC = 29,
252 FLASH_ISCSI_CRASH_NSECS = 1,
253 FLASH_ISCSI_CRASH_START = FLASH_START(FLASH_ISCSI_CRASH_START_SEC),
254 FLASH_ISCSI_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_ISCSI_CRASH_NSECS),
257 * FCoE persistent/crash information.
259 FLASH_FCOE_CRASH_START_SEC = 30,
260 FLASH_FCOE_CRASH_NSECS = 1,
261 FLASH_FCOE_CRASH_START = FLASH_START(FLASH_FCOE_CRASH_START_SEC),
262 FLASH_FCOE_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FCOE_CRASH_NSECS),
265 * Location of Firmware Configuration File in FLASH.
267 FLASH_CFG_START_SEC = 31,
269 FLASH_CFG_START = FLASH_START(FLASH_CFG_START_SEC),
270 FLASH_CFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_CFG_NSECS),
273 * We don't support FLASH devices which can't support the full
274 * standard set of sections which we need for normal operations.
276 FLASH_MIN_SIZE = FLASH_CFG_START + FLASH_CFG_MAX_SIZE,
279 * Sectors 32-63 are reserved for FLASH failover.
284 #undef FLASH_MAX_SIZE
286 #define S_SGE_TIMESTAMP 0
287 #define M_SGE_TIMESTAMP 0xfffffffffffffffULL
288 #define V_SGE_TIMESTAMP(x) ((__u64)(x) << S_SGE_TIMESTAMP)
289 #define G_SGE_TIMESTAMP(x) (((__u64)(x) >> S_SGE_TIMESTAMP) & M_SGE_TIMESTAMP)
291 #endif /* __T4_HW_H */