sys/dev/drm2/radeon/radeon_bios.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <dev/drm2/drmP.h>
  33 #include "radeon_reg.h"
  34 #include "radeon.h"
  35 #include "atom.h"
  36
  37 /*
  38  * BIOS.
  39  */
  40
  41 /* If you boot an IGP board with a discrete card as the primary,
  42  * the IGP rom is not accessible via the rom bar as the IGP rom is
  43  * part of the system bios.  On boot, the system bios puts a
  44  * copy of the igp rom at the start of vram if a discrete card is
  45  * present.
  46  */
  47 static bool igp_read_bios_from_vram(struct radeon_device *rdev)
  48 {
  49         drm_local_map_t bios_map;
  50         uint8_t __iomem *bios;
  51         resource_size_t vram_base;
  52         resource_size_t size = 256 * 1024; /* ??? */
  53
  54         DRM_INFO("%s: ===> Try IGP's VRAM...\n", __func__);
  55
  56         if (!(rdev->flags & RADEON_IS_IGP))
  57                 if (!radeon_card_posted(rdev)) {
  58                         DRM_INFO("%s: not POSTed discrete card detected, skipping this method...\n",
  59                             __func__);
  60                         return false;
  61                 }
  62
  63         rdev->bios = NULL;
  64         vram_base = drm_get_resource_start(rdev->ddev, 0);
  65         DRM_INFO("%s: VRAM base address: 0x%jx\n", __func__, (uintmax_t)vram_base);
  66
  67         bios_map.offset = vram_base;
  68         bios_map.size   = size;
  69         bios_map.type   = 0;
  70         bios_map.flags  = 0;
  71         bios_map.mtrr   = 0;
  72         drm_core_ioremap(&bios_map, rdev->ddev);
  73         if (bios_map.virtual == NULL) {
  74                 DRM_INFO("%s: failed to ioremap\n", __func__);
  75                 return false;
  76         }
  77         bios = bios_map.virtual;
  78         size = bios_map.size;
  79         DRM_INFO("%s: Map address: %p (%ju bytes)\n", __func__, bios, (uintmax_t)size);
  80
  81         if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
  82                 if (size == 0) {
  83                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
  84                 } else {
  85                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
  86                             __func__, bios[0], bios[1]);
  87                 }
  88                 drm_core_ioremapfree(&bios_map, rdev->ddev);
  89                 return false;
  90         }
  91         rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK);
  92         if (rdev->bios == NULL) {
  93                 drm_core_ioremapfree(&bios_map, rdev->ddev);
  94                 return false;
  95         }
  96         memcpy_fromio(rdev->bios, bios, size);
  97         drm_core_ioremapfree(&bios_map, rdev->ddev);
  98         return true;
  99 }
 100
 101 static bool radeon_read_bios(struct radeon_device *rdev)
 102 {
 103         device_t vga_dev;
 104         uint8_t __iomem *bios;
 105         size_t size;
 106
 107         DRM_INFO("%s: ===> Try PCI Expansion ROM...\n", __func__);
 108
 109         vga_dev = device_get_parent(rdev->dev);
 110         rdev->bios = NULL;
 111         /* XXX: some cards may return 0 for rom size? ddx has a workaround */
 112         bios = vga_pci_map_bios(vga_dev, &size);
 113         if (!bios) {
 114                 return false;
 115         }
 116         DRM_INFO("%s: Map address: %p (%zu bytes)\n", __func__, bios, size);
 117
 118         if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
 119                 if (size == 0) {
 120                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
 121                 } else {
 122                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
 123                             __func__, bios[0], bios[1]);
 124                 }
 125                 vga_pci_unmap_bios(vga_dev, bios);
 126                 return false;
 127         }
 128         rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK);
 129         memcpy(rdev->bios, bios, size);
 130         vga_pci_unmap_bios(vga_dev, bios);
 131         return true;
 132 }
 133
 134 /* ATRM is used to get the BIOS on the discrete cards in
 135  * dual-gpu systems.
 136  */
 137 /* retrieve the ROM in 4k blocks */
 138 #define ATRM_BIOS_PAGE 4096
 139 /**
 140  * radeon_atrm_call - fetch a chunk of the vbios
 141  *
 142  * @atrm_handle: acpi ATRM handle
 143  * @bios: vbios image pointer
 144  * @offset: offset of vbios image data to fetch
 145  * @len: length of vbios image data to fetch
 146  *
 147  * Executes ATRM to fetch a chunk of the discrete
 148  * vbios image on PX systems (all asics).
 149  * Returns the length of the buffer fetched.
 150  */
 151 static int radeon_atrm_call(ACPI_HANDLE atrm_handle, uint8_t *bios,
 152                             int offset, int len)
 153 {
 154         ACPI_STATUS status;
 155         ACPI_OBJECT atrm_arg_elements[2], *obj;
 156         ACPI_OBJECT_LIST atrm_arg;
 157         ACPI_BUFFER buffer = { ACPI_ALLOCATE_BUFFER, NULL};
 158
 159         atrm_arg.Count = 2;
 160         atrm_arg.Pointer = &atrm_arg_elements[0];
 161
 162         atrm_arg_elements[0].Type = ACPI_TYPE_INTEGER;
 163         atrm_arg_elements[0].Integer.Value = offset;
 164
 165         atrm_arg_elements[1].Type = ACPI_TYPE_INTEGER;
 166         atrm_arg_elements[1].Integer.Value = len;
 167
 168         status = AcpiEvaluateObject(atrm_handle, NULL, &atrm_arg, &buffer);
 169         if (ACPI_FAILURE(status)) {
 170                 DRM_ERROR("failed to evaluate ATRM got %s\n", AcpiFormatException(status));
 171                 return -ENODEV;
 172         }
 173
 174         obj = (ACPI_OBJECT *)buffer.Pointer;
 175         memcpy(bios+offset, obj->Buffer.Pointer, obj->Buffer.Length);
 176         len = obj->Buffer.Length;
 177         AcpiOsFree(buffer.Pointer);
 178         return len;
 179 }
 180
 181 static bool radeon_atrm_get_bios(struct radeon_device *rdev)
 182 {
 183         int ret;
 184         int size = 256 * 1024;
 185         int i;
 186         device_t dev;
 187         ACPI_HANDLE dhandle, atrm_handle;
 188         ACPI_STATUS status;
 189         bool found = false;
 190
 191         DRM_INFO("%s: ===> Try ATRM...\n", __func__);
 192
 193         /* ATRM is for the discrete card only */
 194         if (rdev->flags & RADEON_IS_IGP) {
 195                 DRM_INFO("%s: IGP card detected, skipping this method...\n",
 196                     __func__);
 197                 return false;
 198         }
 199
 200 #ifdef DUMBBELL_WIP
 201         while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
 202 #endif /* DUMBBELL_WIP */
 203         if ((dev = pci_find_class(PCIC_DISPLAY, PCIS_DISPLAY_VGA)) != NULL) {
 204                 DRM_INFO("%s: pci_find_class() found: %d:%d:%d:%d, vendor=%04x, device=%04x\n",
 205                     __func__,
 206                     pci_get_domain(dev),
 207                     pci_get_bus(dev),
 208                     pci_get_slot(dev),
 209                     pci_get_function(dev),
 210                     pci_get_vendor(dev),
 211                     pci_get_device(dev));
 212                 DRM_INFO("%s: Get ACPI device handle\n", __func__);
 213                 dhandle = acpi_get_handle(dev);
 214 #ifdef DUMBBELL_WIP
 215                 if (!dhandle)
 216                         continue;
 217 #endif /* DUMBBELL_WIP */
 218                 if (!dhandle)
 219                         return false;
 220
 221                 DRM_INFO("%s: Get ACPI handle for \"ATRM\"\n", __func__);
 222                 status = AcpiGetHandle(dhandle, "ATRM", &atrm_handle);
 223                 if (!ACPI_FAILURE(status)) {
 224                         found = true;
 225 #ifdef DUMBBELL_WIP
 226                         break;
 227 #endif /* DUMBBELL_WIP */
 228                 } else {
 229                         DRM_INFO("%s: Failed to get \"ATRM\" handle: %s\n",
 230                             __func__, AcpiFormatException(status));
 231                 }
 232         }
 233
 234         if (!found)
 235                 return false;
 236
 237         rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK);
 238         if (!rdev->bios) {
 239                 DRM_ERROR("Unable to allocate bios\n");
 240                 return false;
 241         }
 242
 243         for (i = 0; i < size / ATRM_BIOS_PAGE; i++) {
 244                 DRM_INFO("%s: Call radeon_atrm_call()\n", __func__);
 245                 ret = radeon_atrm_call(atrm_handle,
 246                                        rdev->bios,
 247                                        (i * ATRM_BIOS_PAGE),
 248                                        ATRM_BIOS_PAGE);
 249                 if (ret < ATRM_BIOS_PAGE)
 250                         break;
 251         }
 252
 253         if (i == 0 || rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) {
 254                 if (i == 0) {
 255                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
 256                 } else {
 257                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
 258                             __func__, rdev->bios[0], rdev->bios[1]);
 259                 }
 260                 free(rdev->bios, DRM_MEM_DRIVER);
 261                 return false;
 262         }
 263         return true;
 264 }
 265
 266 static bool ni_read_disabled_bios(struct radeon_device *rdev)
 267 {
 268         u32 bus_cntl;
 269         u32 d1vga_control;
 270         u32 d2vga_control;
 271         u32 vga_render_control;
 272         u32 rom_cntl;
 273         bool r;
 274
 275         DRM_INFO("%s: ===> Try disabled BIOS (ni)...\n", __func__);
 276
 277         bus_cntl = RREG32(R600_BUS_CNTL);
 278         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 279         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 280         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 281         rom_cntl = RREG32(R600_ROM_CNTL);
 282
 283         /* enable the rom */
 284         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 285         /* Disable VGA mode */
 286         WREG32(AVIVO_D1VGA_CONTROL,
 287                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 288                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 289         WREG32(AVIVO_D2VGA_CONTROL,
 290                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 291                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 292         WREG32(AVIVO_VGA_RENDER_CONTROL,
 293                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 294         WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);
 295
 296         r = radeon_read_bios(rdev);
 297
 298         /* restore regs */
 299         WREG32(R600_BUS_CNTL, bus_cntl);
 300         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 301         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 302         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 303         WREG32(R600_ROM_CNTL, rom_cntl);
 304         return r;
 305 }
 306
 307 static bool r700_read_disabled_bios(struct radeon_device *rdev)
 308 {
 309         uint32_t viph_control;
 310         uint32_t bus_cntl;
 311         uint32_t d1vga_control;
 312         uint32_t d2vga_control;
 313         uint32_t vga_render_control;
 314         uint32_t rom_cntl;
 315         uint32_t cg_spll_func_cntl = 0;
 316         uint32_t cg_spll_status;
 317         bool r;
 318
 319         DRM_INFO("%s: ===> Try disabled BIOS (r700)...\n", __func__);
 320
 321         viph_control = RREG32(RADEON_VIPH_CONTROL);
 322         bus_cntl = RREG32(R600_BUS_CNTL);
 323         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 324         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 325         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 326         rom_cntl = RREG32(R600_ROM_CNTL);
 327
 328         /* disable VIP */
 329         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 330         /* enable the rom */
 331         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 332         /* Disable VGA mode */
 333         WREG32(AVIVO_D1VGA_CONTROL,
 334                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 335                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 336         WREG32(AVIVO_D2VGA_CONTROL,
 337                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 338                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 339         WREG32(AVIVO_VGA_RENDER_CONTROL,
 340                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 341
 342         if (rdev->family == CHIP_RV730) {
 343                 cg_spll_func_cntl = RREG32(R600_CG_SPLL_FUNC_CNTL);
 344
 345                 /* enable bypass mode */
 346                 WREG32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl |
 347                                                 R600_SPLL_BYPASS_EN));
 348
 349                 /* wait for SPLL_CHG_STATUS to change to 1 */
 350                 cg_spll_status = 0;
 351                 while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
 352                         cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
 353
 354                 WREG32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
 355         } else
 356                 WREG32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
 357
 358         r = radeon_read_bios(rdev);
 359
 360         /* restore regs */
 361         if (rdev->family == CHIP_RV730) {
 362                 WREG32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
 363
 364                 /* wait for SPLL_CHG_STATUS to change to 1 */
 365                 cg_spll_status = 0;
 366                 while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
 367                         cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
 368         }
 369         WREG32(RADEON_VIPH_CONTROL, viph_control);
 370         WREG32(R600_BUS_CNTL, bus_cntl);
 371         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 372         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 373         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 374         WREG32(R600_ROM_CNTL, rom_cntl);
 375         return r;
 376 }
 377
 378 static bool r600_read_disabled_bios(struct radeon_device *rdev)
 379 {
 380         uint32_t viph_control;
 381         uint32_t bus_cntl;
 382         uint32_t d1vga_control;
 383         uint32_t d2vga_control;
 384         uint32_t vga_render_control;
 385         uint32_t rom_cntl;
 386         uint32_t general_pwrmgt;
 387         uint32_t low_vid_lower_gpio_cntl;
 388         uint32_t medium_vid_lower_gpio_cntl;
 389         uint32_t high_vid_lower_gpio_cntl;
 390         uint32_t ctxsw_vid_lower_gpio_cntl;
 391         uint32_t lower_gpio_enable;
 392         bool r;
 393
 394         DRM_INFO("%s: ===> Try disabled BIOS (r600)...\n", __func__);
 395
 396         viph_control = RREG32(RADEON_VIPH_CONTROL);
 397         bus_cntl = RREG32(R600_BUS_CNTL);
 398         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 399         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 400         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 401         rom_cntl = RREG32(R600_ROM_CNTL);
 402         general_pwrmgt = RREG32(R600_GENERAL_PWRMGT);
 403         low_vid_lower_gpio_cntl = RREG32(R600_LOW_VID_LOWER_GPIO_CNTL);
 404         medium_vid_lower_gpio_cntl = RREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
 405         high_vid_lower_gpio_cntl = RREG32(R600_HIGH_VID_LOWER_GPIO_CNTL);
 406         ctxsw_vid_lower_gpio_cntl = RREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
 407         lower_gpio_enable = RREG32(R600_LOWER_GPIO_ENABLE);
 408
 409         /* disable VIP */
 410         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 411         /* enable the rom */
 412         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 413         /* Disable VGA mode */
 414         WREG32(AVIVO_D1VGA_CONTROL,
 415                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 416                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 417         WREG32(AVIVO_D2VGA_CONTROL,
 418                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 419                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 420         WREG32(AVIVO_VGA_RENDER_CONTROL,
 421                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 422
 423         WREG32(R600_ROM_CNTL,
 424                ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) |
 425                 (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) |
 426                 R600_SCK_OVERWRITE));
 427
 428         WREG32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
 429         WREG32(R600_LOW_VID_LOWER_GPIO_CNTL,
 430                (low_vid_lower_gpio_cntl & ~0x400));
 431         WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL,
 432                (medium_vid_lower_gpio_cntl & ~0x400));
 433         WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL,
 434                (high_vid_lower_gpio_cntl & ~0x400));
 435         WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL,
 436                (ctxsw_vid_lower_gpio_cntl & ~0x400));
 437         WREG32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
 438
 439         r = radeon_read_bios(rdev);
 440
 441         /* restore regs */
 442         WREG32(RADEON_VIPH_CONTROL, viph_control);
 443         WREG32(R600_BUS_CNTL, bus_cntl);
 444         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 445         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 446         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 447         WREG32(R600_ROM_CNTL, rom_cntl);
 448         WREG32(R600_GENERAL_PWRMGT, general_pwrmgt);
 449         WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
 450         WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
 451         WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
 452         WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
 453         WREG32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
 454         return r;
 455 }
 456
 457 static bool avivo_read_disabled_bios(struct radeon_device *rdev)
 458 {
 459         uint32_t seprom_cntl1;
 460         uint32_t viph_control;
 461         uint32_t bus_cntl;
 462         uint32_t d1vga_control;
 463         uint32_t d2vga_control;
 464         uint32_t vga_render_control;
 465         uint32_t gpiopad_a;
 466         uint32_t gpiopad_en;
 467         uint32_t gpiopad_mask;
 468         bool r;
 469
 470         DRM_INFO("%s: ===> Try disabled BIOS (avivo)...\n", __func__);
 471
 472         seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
 473         viph_control = RREG32(RADEON_VIPH_CONTROL);
 474         bus_cntl = RREG32(RV370_BUS_CNTL);
 475         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 476         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 477         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 478         gpiopad_a = RREG32(RADEON_GPIOPAD_A);
 479         gpiopad_en = RREG32(RADEON_GPIOPAD_EN);
 480         gpiopad_mask = RREG32(RADEON_GPIOPAD_MASK);
 481
 482         WREG32(RADEON_SEPROM_CNTL1,
 483                ((seprom_cntl1 & ~RADEON_SCK_PRESCALE_MASK) |
 484                 (0xc << RADEON_SCK_PRESCALE_SHIFT)));
 485         WREG32(RADEON_GPIOPAD_A, 0);
 486         WREG32(RADEON_GPIOPAD_EN, 0);
 487         WREG32(RADEON_GPIOPAD_MASK, 0);
 488
 489         /* disable VIP */
 490         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 491
 492         /* enable the rom */
 493         WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
 494
 495         /* Disable VGA mode */
 496         WREG32(AVIVO_D1VGA_CONTROL,
 497                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 498                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 499         WREG32(AVIVO_D2VGA_CONTROL,
 500                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 501                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 502         WREG32(AVIVO_VGA_RENDER_CONTROL,
 503                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 504
 505         r = radeon_read_bios(rdev);
 506
 507         /* restore regs */
 508         WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);
 509         WREG32(RADEON_VIPH_CONTROL, viph_control);
 510         WREG32(RV370_BUS_CNTL, bus_cntl);
 511         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 512         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 513         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 514         WREG32(RADEON_GPIOPAD_A, gpiopad_a);
 515         WREG32(RADEON_GPIOPAD_EN, gpiopad_en);
 516         WREG32(RADEON_GPIOPAD_MASK, gpiopad_mask);
 517         return r;
 518 }
 519
 520 static bool legacy_read_disabled_bios(struct radeon_device *rdev)
 521 {
 522         uint32_t seprom_cntl1;
 523         uint32_t viph_control;
 524         uint32_t bus_cntl;
 525         uint32_t crtc_gen_cntl;
 526         uint32_t crtc2_gen_cntl;
 527         uint32_t crtc_ext_cntl;
 528         uint32_t fp2_gen_cntl;
 529         bool r;
 530
 531         DRM_INFO("%s: ===> Try disabled BIOS (legacy)...\n", __func__);
 532
 533         seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
 534         viph_control = RREG32(RADEON_VIPH_CONTROL);
 535         if (rdev->flags & RADEON_IS_PCIE)
 536                 bus_cntl = RREG32(RV370_BUS_CNTL);
 537         else
 538                 bus_cntl = RREG32(RADEON_BUS_CNTL);
 539         crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL);
 540         crtc2_gen_cntl = 0;
 541         crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
 542         fp2_gen_cntl = 0;
 543
 544 #define PCI_DEVICE_ID_ATI_RADEON_QY     0x5159
 545
 546         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 547                 fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
 548         }
 549
 550         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 551                 crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
 552         }
 553
 554         WREG32(RADEON_SEPROM_CNTL1,
 555                ((seprom_cntl1 & ~RADEON_SCK_PRESCALE_MASK) |
 556                 (0xc << RADEON_SCK_PRESCALE_SHIFT)));
 557
 558         /* disable VIP */
 559         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 560
 561         /* enable the rom */
 562         if (rdev->flags & RADEON_IS_PCIE)
 563                 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
 564         else
 565                 WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
 566
 567         /* Turn off mem requests and CRTC for both controllers */
 568         WREG32(RADEON_CRTC_GEN_CNTL,
 569                ((crtc_gen_cntl & ~RADEON_CRTC_EN) |
 570                 (RADEON_CRTC_DISP_REQ_EN_B |
 571                  RADEON_CRTC_EXT_DISP_EN)));
 572         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 573                 WREG32(RADEON_CRTC2_GEN_CNTL,
 574                        ((crtc2_gen_cntl & ~RADEON_CRTC2_EN) |
 575                         RADEON_CRTC2_DISP_REQ_EN_B));
 576         }
 577         /* Turn off CRTC */
 578         WREG32(RADEON_CRTC_EXT_CNTL,
 579                ((crtc_ext_cntl & ~RADEON_CRTC_CRT_ON) |
 580                 (RADEON_CRTC_SYNC_TRISTAT |
 581                  RADEON_CRTC_DISPLAY_DIS)));
 582
 583         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 584                 WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON));
 585         }
 586
 587         r = radeon_read_bios(rdev);
 588
 589         /* restore regs */
 590         WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);
 591         WREG32(RADEON_VIPH_CONTROL, viph_control);
 592         if (rdev->flags & RADEON_IS_PCIE)
 593                 WREG32(RV370_BUS_CNTL, bus_cntl);
 594         else
 595                 WREG32(RADEON_BUS_CNTL, bus_cntl);
 596         WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);
 597         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 598                 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
 599         }
 600         WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
 601         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 602                 WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
 603         }
 604         return r;
 605 }
 606
 607 static bool radeon_read_disabled_bios(struct radeon_device *rdev)
 608 {
 609         if (rdev->flags & RADEON_IS_IGP)
 610                 return igp_read_bios_from_vram(rdev);
 611         else if (rdev->family >= CHIP_BARTS)
 612                 return ni_read_disabled_bios(rdev);
 613         else if (rdev->family >= CHIP_RV770)
 614                 return r700_read_disabled_bios(rdev);
 615         else if (rdev->family >= CHIP_R600)
 616                 return r600_read_disabled_bios(rdev);
 617         else if (rdev->family >= CHIP_RS600)
 618                 return avivo_read_disabled_bios(rdev);
 619         else
 620                 return legacy_read_disabled_bios(rdev);
 621 }
 622
 623 static bool radeon_acpi_vfct_bios(struct radeon_device *rdev)
 624 {
 625         bool ret = false;
 626         ACPI_TABLE_HEADER *hdr;
 627         ACPI_SIZE tbl_size;
 628         UEFI_ACPI_VFCT *vfct;
 629         GOP_VBIOS_CONTENT *vbios;
 630         VFCT_IMAGE_HEADER *vhdr;
 631         ACPI_STATUS status;
 632
 633         DRM_INFO("%s: ===> Try VFCT...\n", __func__);
 634
 635         DRM_INFO("%s: Get \"VFCT\" ACPI table\n", __func__);
 636         status = AcpiGetTable("VFCT", 1, &hdr);
 637         if (!ACPI_SUCCESS(status)) {
 638                 DRM_INFO("%s: Failed to get \"VFCT\" table: %s\n",
 639                     __func__, AcpiFormatException(status));
 640                 return false;
 641         }
 642         tbl_size = hdr->Length;
 643         if (tbl_size < sizeof(UEFI_ACPI_VFCT)) {
 644                 DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n");
 645                 goto out_unmap;
 646         }
 647
 648         vfct = (UEFI_ACPI_VFCT *)hdr;
 649         if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) > tbl_size) {
 650                 DRM_ERROR("ACPI VFCT table present but broken (too short #2)\n");
 651                 goto out_unmap;
 652         }
 653
 654         vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + vfct->VBIOSImageOffset);
 655         vhdr = &vbios->VbiosHeader;
 656         DRM_INFO("ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d\n",
 657                         vhdr->PCIBus, vhdr->PCIDevice, vhdr->PCIFunction,
 658                         vhdr->VendorID, vhdr->DeviceID, vhdr->ImageLength);
 659
 660         if (vhdr->PCIBus != rdev->ddev->pci_bus ||
 661             vhdr->PCIDevice != rdev->ddev->pci_slot ||
 662             vhdr->PCIFunction != rdev->ddev->pci_func ||
 663             vhdr->VendorID != rdev->ddev->pci_vendor ||
 664             vhdr->DeviceID != rdev->ddev->pci_device) {
 665                 DRM_INFO("ACPI VFCT table is not for this card\n");
 666                 goto out_unmap;
 667         };
 668
 669         if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) + vhdr->ImageLength > tbl_size) {
 670                 DRM_ERROR("ACPI VFCT image truncated\n");
 671                 goto out_unmap;
 672         }
 673
 674         rdev->bios = malloc(vhdr->ImageLength, DRM_MEM_DRIVER, M_WAITOK);
 675         memcpy(rdev->bios, &vbios->VbiosContent, vhdr->ImageLength);
 676         ret = !!rdev->bios;
 677
 678 out_unmap:
 679         return ret;
 680 }
 681
 682 bool radeon_get_bios(struct radeon_device *rdev)
 683 {
 684         bool r;
 685         uint16_t tmp;
 686
 687         r = radeon_atrm_get_bios(rdev);
 688         if (r == false)
 689                 r = radeon_acpi_vfct_bios(rdev);
 690         if (r == false)
 691                 r = igp_read_bios_from_vram(rdev);
 692         if (r == false)
 693                 r = radeon_read_bios(rdev);
 694         if (r == false) {
 695                 r = radeon_read_disabled_bios(rdev);
 696         }
 697         if (r == false || rdev->bios == NULL) {
 698                 DRM_ERROR("Unable to locate a BIOS ROM\n");
 699                 rdev->bios = NULL;
 700                 return false;
 701         }
 702         if (rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) {
 703                 DRM_ERROR("BIOS signature incorrect %x %x\n", rdev->bios[0], rdev->bios[1]);
 704                 goto free_bios;
 705         }
 706
 707         tmp = RBIOS16(0x18);
 708         if (RBIOS8(tmp + 0x14) != 0x0) {
 709                 DRM_INFO("Not an x86 BIOS ROM, not using.\n");
 710                 goto free_bios;
 711         }
 712
 713         rdev->bios_header_start = RBIOS16(0x48);
 714         if (!rdev->bios_header_start) {
 715                 goto free_bios;
 716         }
 717         tmp = rdev->bios_header_start + 4;
 718         if (!memcmp(rdev->bios + tmp, "ATOM", 4) ||
 719             !memcmp(rdev->bios + tmp, "MOTA", 4)) {
 720                 rdev->is_atom_bios = true;
 721         } else {
 722                 rdev->is_atom_bios = false;
 723         }
 724
 725         DRM_DEBUG("%sBIOS detected\n", rdev->is_atom_bios ? "ATOM" : "COM");
 726         return true;
 727 free_bios:
 728         free(rdev->bios, DRM_MEM_DRIVER);
 729         rdev->bios = NULL;
 730         return false;
 731 }