sys/dev/drm2/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __FBSDID("$FreeBSD$");
  35
  36 #include <dev/drm2/ttm/ttm_bo_api.h>
  37 #include <dev/drm2/ttm/ttm_bo_driver.h>
  38 #include <dev/drm2/ttm/ttm_placement.h>
  39 #include <dev/drm2/ttm/ttm_module.h>
  40 #include <dev/drm2/ttm/ttm_page_alloc.h>
  41 #include <dev/drm2/drmP.h>
  42 #include <dev/drm2/radeon/radeon_drm.h>
  43 #include "radeon_reg.h"
  44 #include "radeon.h"
  45
  46 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  47
  48 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  49
  50 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  51 {
  52         struct radeon_mman *mman;
  53         struct radeon_device *rdev;
  54
  55         mman = container_of(bdev, struct radeon_mman, bdev);
  56         rdev = container_of(mman, struct radeon_device, mman);
  57         return rdev;
  58 }
  59
  60
  61 /*
  62  * Global memory.
  63  */
  64 static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
  65 {
  66         return ttm_mem_global_init(ref->object);
  67 }
  68
  69 static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
  70 {
  71         ttm_mem_global_release(ref->object);
  72 }
  73
  74 static int radeon_ttm_global_init(struct radeon_device *rdev)
  75 {
  76         struct drm_global_reference *global_ref;
  77         int r;
  78
  79         rdev->mman.mem_global_referenced = false;
  80         global_ref = &rdev->mman.mem_global_ref;
  81         global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  82         global_ref->size = sizeof(struct ttm_mem_global);
  83         global_ref->init = &radeon_ttm_mem_global_init;
  84         global_ref->release = &radeon_ttm_mem_global_release;
  85         r = drm_global_item_ref(global_ref);
  86         if (r != 0) {
  87                 DRM_ERROR("Failed setting up TTM memory accounting "
  88                           "subsystem.\n");
  89                 return r;
  90         }
  91
  92         rdev->mman.bo_global_ref.mem_glob =
  93                 rdev->mman.mem_global_ref.object;
  94         global_ref = &rdev->mman.bo_global_ref.ref;
  95         global_ref->global_type = DRM_GLOBAL_TTM_BO;
  96         global_ref->size = sizeof(struct ttm_bo_global);
  97         global_ref->init = &ttm_bo_global_init;
  98         global_ref->release = &ttm_bo_global_release;
  99         r = drm_global_item_ref(global_ref);
 100         if (r != 0) {
 101                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
 102                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 103                 return r;
 104         }
 105
 106         rdev->mman.mem_global_referenced = true;
 107         return 0;
 108 }
 109
 110 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 111 {
 112         if (rdev->mman.mem_global_referenced) {
 113                 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 114                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 115                 rdev->mman.mem_global_referenced = false;
 116         }
 117 }
 118
 119 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 120 {
 121         return 0;
 122 }
 123
 124 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 125                                 struct ttm_mem_type_manager *man)
 126 {
 127         struct radeon_device *rdev;
 128
 129         rdev = radeon_get_rdev(bdev);
 130
 131         switch (type) {
 132         case TTM_PL_SYSTEM:
 133                 /* System memory */
 134                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 135                 man->available_caching = TTM_PL_MASK_CACHING;
 136                 man->default_caching = TTM_PL_FLAG_CACHED;
 137                 break;
 138         case TTM_PL_TT:
 139                 man->func = &ttm_bo_manager_func;
 140                 man->gpu_offset = rdev->mc.gtt_start;
 141                 man->available_caching = TTM_PL_MASK_CACHING;
 142                 man->default_caching = TTM_PL_FLAG_CACHED;
 143                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 144 #if __OS_HAS_AGP
 145                 if (rdev->flags & RADEON_IS_AGP) {
 146                         if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
 147                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 148                                           (unsigned)type);
 149                                 return -EINVAL;
 150                         }
 151                         if (!rdev->ddev->agp->cant_use_aperture)
 152                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 153                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 154                                                  TTM_PL_FLAG_WC;
 155                         man->default_caching = TTM_PL_FLAG_WC;
 156                 }
 157 #endif
 158                 break;
 159         case TTM_PL_VRAM:
 160                 /* "On-card" video ram */
 161                 man->func = &ttm_bo_manager_func;
 162                 man->gpu_offset = rdev->mc.vram_start;
 163                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 164                              TTM_MEMTYPE_FLAG_MAPPABLE;
 165                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 166                 man->default_caching = TTM_PL_FLAG_WC;
 167                 break;
 168         default:
 169                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 170                 return -EINVAL;
 171         }
 172         return 0;
 173 }
 174
 175 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 176                                 struct ttm_placement *placement)
 177 {
 178         struct radeon_bo *rbo;
 179         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 180
 181         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 182                 placement->fpfn = 0;
 183                 placement->lpfn = 0;
 184                 placement->placement = &placements;
 185                 placement->busy_placement = &placements;
 186                 placement->num_placement = 1;
 187                 placement->num_busy_placement = 1;
 188                 return;
 189         }
 190         rbo = container_of(bo, struct radeon_bo, tbo);
 191         switch (bo->mem.mem_type) {
 192         case TTM_PL_VRAM:
 193                 if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false)
 194                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 195                 else
 196                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 197                 break;
 198         case TTM_PL_TT:
 199         default:
 200                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 201         }
 202         *placement = rbo->placement;
 203 }
 204
 205 static int radeon_verify_access(struct ttm_buffer_object *bo)
 206 {
 207         return 0;
 208 }
 209
 210 static void radeon_move_null(struct ttm_buffer_object *bo,
 211                              struct ttm_mem_reg *new_mem)
 212 {
 213         struct ttm_mem_reg *old_mem = &bo->mem;
 214
 215         KASSERT(old_mem->mm_node == NULL, ("old_mem->mm_node != NULL"));
 216         *old_mem = *new_mem;
 217         new_mem->mm_node = NULL;
 218 }
 219
 220 static int radeon_move_blit(struct ttm_buffer_object *bo,
 221                         bool evict, bool no_wait_gpu,
 222                         struct ttm_mem_reg *new_mem,
 223                         struct ttm_mem_reg *old_mem)
 224 {
 225         struct radeon_device *rdev;
 226         uint64_t old_start, new_start;
 227         struct radeon_fence *fence;
 228         int r, ridx;
 229
 230         rdev = radeon_get_rdev(bo->bdev);
 231         ridx = radeon_copy_ring_index(rdev);
 232         old_start = old_mem->start << PAGE_SHIFT;
 233         new_start = new_mem->start << PAGE_SHIFT;
 234
 235         switch (old_mem->mem_type) {
 236         case TTM_PL_VRAM:
 237                 old_start += rdev->mc.vram_start;
 238                 break;
 239         case TTM_PL_TT:
 240                 old_start += rdev->mc.gtt_start;
 241                 break;
 242         default:
 243                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 244                 return -EINVAL;
 245         }
 246         switch (new_mem->mem_type) {
 247         case TTM_PL_VRAM:
 248                 new_start += rdev->mc.vram_start;
 249                 break;
 250         case TTM_PL_TT:
 251                 new_start += rdev->mc.gtt_start;
 252                 break;
 253         default:
 254                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 255                 return -EINVAL;
 256         }
 257         if (!rdev->ring[ridx].ready) {
 258                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 259                 return -EINVAL;
 260         }
 261
 262         CTASSERT((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) == 0);
 263
 264         /* sync other rings */
 265         fence = bo->sync_obj;
 266         r = radeon_copy(rdev, old_start, new_start,
 267                         new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE), /* GPU pages */
 268                         &fence);
 269         /* FIXME: handle copy error */
 270         r = ttm_bo_move_accel_cleanup(bo, (void *)fence,
 271                                       evict, no_wait_gpu, new_mem);
 272         radeon_fence_unref(&fence);
 273         return r;
 274 }
 275
 276 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 277                                 bool evict, bool interruptible,
 278                                 bool no_wait_gpu,
 279                                 struct ttm_mem_reg *new_mem)
 280 {
 281         struct radeon_device *rdev;
 282         struct ttm_mem_reg *old_mem = &bo->mem;
 283         struct ttm_mem_reg tmp_mem;
 284         u32 placements;
 285         struct ttm_placement placement;
 286         int r;
 287
 288         rdev = radeon_get_rdev(bo->bdev);
 289         tmp_mem = *new_mem;
 290         tmp_mem.mm_node = NULL;
 291         placement.fpfn = 0;
 292         placement.lpfn = 0;
 293         placement.num_placement = 1;
 294         placement.placement = &placements;
 295         placement.num_busy_placement = 1;
 296         placement.busy_placement = &placements;
 297         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 298         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 299                              interruptible, no_wait_gpu);
 300         if (unlikely(r)) {
 301                 return r;
 302         }
 303
 304         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 305         if (unlikely(r)) {
 306                 goto out_cleanup;
 307         }
 308
 309         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 310         if (unlikely(r)) {
 311                 goto out_cleanup;
 312         }
 313         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 314         if (unlikely(r)) {
 315                 goto out_cleanup;
 316         }
 317         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
 318 out_cleanup:
 319         ttm_bo_mem_put(bo, &tmp_mem);
 320         return r;
 321 }
 322
 323 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 324                                 bool evict, bool interruptible,
 325                                 bool no_wait_gpu,
 326                                 struct ttm_mem_reg *new_mem)
 327 {
 328         struct radeon_device *rdev;
 329         struct ttm_mem_reg *old_mem = &bo->mem;
 330         struct ttm_mem_reg tmp_mem;
 331         struct ttm_placement placement;
 332         u32 placements;
 333         int r;
 334
 335         rdev = radeon_get_rdev(bo->bdev);
 336         tmp_mem = *new_mem;
 337         tmp_mem.mm_node = NULL;
 338         placement.fpfn = 0;
 339         placement.lpfn = 0;
 340         placement.num_placement = 1;
 341         placement.placement = &placements;
 342         placement.num_busy_placement = 1;
 343         placement.busy_placement = &placements;
 344         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 345         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 346                              interruptible, no_wait_gpu);
 347         if (unlikely(r)) {
 348                 return r;
 349         }
 350         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
 351         if (unlikely(r)) {
 352                 goto out_cleanup;
 353         }
 354         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 355         if (unlikely(r)) {
 356                 goto out_cleanup;
 357         }
 358 out_cleanup:
 359         ttm_bo_mem_put(bo, &tmp_mem);
 360         return r;
 361 }
 362
 363 static int radeon_bo_move(struct ttm_buffer_object *bo,
 364                         bool evict, bool interruptible,
 365                         bool no_wait_gpu,
 366                         struct ttm_mem_reg *new_mem)
 367 {
 368         struct radeon_device *rdev;
 369         struct ttm_mem_reg *old_mem = &bo->mem;
 370         int r;
 371
 372         rdev = radeon_get_rdev(bo->bdev);
 373         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 374                 radeon_move_null(bo, new_mem);
 375                 return 0;
 376         }
 377         if ((old_mem->mem_type == TTM_PL_TT &&
 378              new_mem->mem_type == TTM_PL_SYSTEM) ||
 379             (old_mem->mem_type == TTM_PL_SYSTEM &&
 380              new_mem->mem_type == TTM_PL_TT)) {
 381                 /* bind is enough */
 382                 radeon_move_null(bo, new_mem);
 383                 return 0;
 384         }
 385         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 386             rdev->asic->copy.copy == NULL) {
 387                 /* use memcpy */
 388                 goto memcpy;
 389         }
 390
 391         if (old_mem->mem_type == TTM_PL_VRAM &&
 392             new_mem->mem_type == TTM_PL_SYSTEM) {
 393                 r = radeon_move_vram_ram(bo, evict, interruptible,
 394                                         no_wait_gpu, new_mem);
 395         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 396                    new_mem->mem_type == TTM_PL_VRAM) {
 397                 r = radeon_move_ram_vram(bo, evict, interruptible,
 398                                             no_wait_gpu, new_mem);
 399         } else {
 400                 r = radeon_move_blit(bo, evict, no_wait_gpu, new_mem, old_mem);
 401         }
 402
 403         if (r) {
 404 memcpy:
 405                 r = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
 406         }
 407         return r;
 408 }
 409
 410 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 411 {
 412         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 413         struct radeon_device *rdev = radeon_get_rdev(bdev);
 414
 415         mem->bus.addr = NULL;
 416         mem->bus.offset = 0;
 417         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 418         mem->bus.base = 0;
 419         mem->bus.is_iomem = false;
 420         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 421                 return -EINVAL;
 422         switch (mem->mem_type) {
 423         case TTM_PL_SYSTEM:
 424                 /* system memory */
 425                 return 0;
 426         case TTM_PL_TT:
 427 #if __OS_HAS_AGP
 428                 if (rdev->flags & RADEON_IS_AGP) {
 429                         /* RADEON_IS_AGP is set only if AGP is active */
 430                         mem->bus.offset = mem->start << PAGE_SHIFT;
 431                         mem->bus.base = rdev->mc.agp_base;
 432                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 433                 }
 434 #endif
 435                 break;
 436         case TTM_PL_VRAM:
 437                 mem->bus.offset = mem->start << PAGE_SHIFT;
 438                 /* check if it's visible */
 439                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 440                         return -EINVAL;
 441                 mem->bus.base = rdev->mc.aper_base;
 442                 mem->bus.is_iomem = true;
 443 #ifdef __alpha__
 444                 /*
 445                  * Alpha: use bus.addr to hold the ioremap() return,
 446                  * so we can modify bus.base below.
 447                  */
 448                 if (mem->placement & TTM_PL_FLAG_WC)
 449                         mem->bus.addr =
 450                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 451                                            mem->bus.size);
 452                 else
 453                         mem->bus.addr =
 454                                 ioremap_nocache(mem->bus.base + mem->bus.offset,
 455                                                 mem->bus.size);
 456
 457                 /*
 458                  * Alpha: Use just the bus offset plus
 459                  * the hose/domain memory base for bus.base.
 460                  * It then can be used to build PTEs for VRAM
 461                  * access, as done in ttm_bo_vm_fault().
 462                  */
 463                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 464                         rdev->ddev->hose->dense_mem_base;
 465 #endif
 466                 break;
 467         default:
 468                 return -EINVAL;
 469         }
 470         return 0;
 471 }
 472
 473 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 474 {
 475 }
 476
 477 static int radeon_sync_obj_wait(void *sync_obj, bool lazy, bool interruptible)
 478 {
 479         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 480 }
 481
 482 static int radeon_sync_obj_flush(void *sync_obj)
 483 {
 484         return 0;
 485 }
 486
 487 static void radeon_sync_obj_unref(void **sync_obj)
 488 {
 489         radeon_fence_unref((struct radeon_fence **)sync_obj);
 490 }
 491
 492 static void *radeon_sync_obj_ref(void *sync_obj)
 493 {
 494         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 495 }
 496
 497 static bool radeon_sync_obj_signaled(void *sync_obj)
 498 {
 499         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 500 }
 501
 502 /*
 503  * TTM backend functions.
 504  */
 505 struct radeon_ttm_tt {
 506         struct ttm_dma_tt               ttm;
 507         struct radeon_device            *rdev;
 508         u64                             offset;
 509 };
 510
 511 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 512                                    struct ttm_mem_reg *bo_mem)
 513 {
 514         struct radeon_ttm_tt *gtt = (void*)ttm;
 515         int r;
 516
 517         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 518         if (!ttm->num_pages) {
 519                 DRM_ERROR("nothing to bind %lu pages for mreg %p back %p!\n",
 520                      ttm->num_pages, bo_mem, ttm);
 521         }
 522         r = radeon_gart_bind(gtt->rdev, gtt->offset,
 523                              ttm->num_pages, ttm->pages, gtt->ttm.dma_address);
 524         if (r) {
 525                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 526                           ttm->num_pages, (unsigned)gtt->offset);
 527                 return r;
 528         }
 529         return 0;
 530 }
 531
 532 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 533 {
 534         struct radeon_ttm_tt *gtt = (void *)ttm;
 535
 536         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 537         return 0;
 538 }
 539
 540 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 541 {
 542         struct radeon_ttm_tt *gtt = (void *)ttm;
 543
 544         ttm_dma_tt_fini(&gtt->ttm);
 545         free(gtt, DRM_MEM_DRIVER);
 546 }
 547
 548 static struct ttm_backend_func radeon_backend_func = {
 549         .bind = &radeon_ttm_backend_bind,
 550         .unbind = &radeon_ttm_backend_unbind,
 551         .destroy = &radeon_ttm_backend_destroy,
 552 };
 553
 554 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
 555                                     unsigned long size, uint32_t page_flags,
 556                                     vm_page_t dummy_read_page)
 557 {
 558         struct radeon_device *rdev;
 559         struct radeon_ttm_tt *gtt;
 560
 561         rdev = radeon_get_rdev(bdev);
 562 #if __OS_HAS_AGP
 563 #ifdef DUMBBELL_WIP
 564         if (rdev->flags & RADEON_IS_AGP) {
 565                 return ttm_agp_tt_create(bdev, rdev->ddev->agp->agpdev,
 566                                          size, page_flags, dummy_read_page);
 567         }
 568 #endif /* DUMBBELL_WIP */
 569 #endif
 570
 571         gtt = malloc(sizeof(struct radeon_ttm_tt),
 572             DRM_MEM_DRIVER, M_WAITOK | M_ZERO);
 573         if (gtt == NULL) {
 574                 return NULL;
 575         }
 576         gtt->ttm.ttm.func = &radeon_backend_func;
 577         gtt->rdev = rdev;
 578         if (ttm_dma_tt_init(&gtt->ttm, bdev, size, page_flags, dummy_read_page)) {
 579                 free(gtt, DRM_MEM_DRIVER);
 580                 return NULL;
 581         }
 582         return &gtt->ttm.ttm;
 583 }
 584
 585 static int radeon_ttm_tt_populate(struct ttm_tt *ttm)
 586 {
 587         struct radeon_device *rdev;
 588         struct radeon_ttm_tt *gtt = (void *)ttm;
 589         unsigned i;
 590         int r;
 591 #ifdef DUMBBELL_WIP
 592         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 593 #endif /* DUMBBELL_WIP */
 594
 595         if (ttm->state != tt_unpopulated)
 596                 return 0;
 597
 598 #ifdef DUMBBELL_WIP
 599         /*
 600          * Maybe unneeded on FreeBSD.
 601          *   -- dumbbell@
 602          */
 603         if (slave && ttm->sg) {
 604                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 605                                                  gtt->ttm.dma_address, ttm->num_pages);
 606                 ttm->state = tt_unbound;
 607                 return 0;
 608         }
 609 #endif /* DUMBBELL_WIP */
 610
 611         rdev = radeon_get_rdev(ttm->bdev);
 612 #if __OS_HAS_AGP
 613 #ifdef DUMBBELL_WIP
 614         if (rdev->flags & RADEON_IS_AGP) {
 615                 return ttm_agp_tt_populate(ttm);
 616         }
 617 #endif /* DUMBBELL_WIP */
 618 #endif
 619
 620 #ifdef CONFIG_SWIOTLB
 621         if (swiotlb_nr_tbl()) {
 622                 return ttm_dma_populate(&gtt->ttm, rdev->dev);
 623         }
 624 #endif
 625
 626         r = ttm_pool_populate(ttm);
 627         if (r) {
 628                 return r;
 629         }
 630
 631         for (i = 0; i < ttm->num_pages; i++) {
 632                 gtt->ttm.dma_address[i] = VM_PAGE_TO_PHYS(ttm->pages[i]);
 633 #ifdef DUMBBELL_WIP
 634                 gtt->ttm.dma_address[i] = pci_map_page(rdev->pdev, ttm->pages[i],
 635                                                        0, PAGE_SIZE,
 636                                                        PCI_DMA_BIDIRECTIONAL);
 637                 if (pci_dma_mapping_error(rdev->pdev, gtt->ttm.dma_address[i])) {
 638                         while (--i) {
 639                                 pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 640                                                PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 641                                 gtt->ttm.dma_address[i] = 0;
 642                         }
 643                         ttm_pool_unpopulate(ttm);
 644                         return -EFAULT;
 645                 }
 646 #endif /* DUMBBELL_WIP */
 647         }
 648         return 0;
 649 }
 650
 651 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 652 {
 653         struct radeon_device *rdev;
 654         struct radeon_ttm_tt *gtt = (void *)ttm;
 655         unsigned i;
 656         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 657
 658         if (slave)
 659                 return;
 660
 661         rdev = radeon_get_rdev(ttm->bdev);
 662 #if __OS_HAS_AGP
 663 #ifdef DUMBBELL_WIP
 664         if (rdev->flags & RADEON_IS_AGP) {
 665                 ttm_agp_tt_unpopulate(ttm);
 666                 return;
 667         }
 668 #endif /* DUMBBELL_WIP */
 669 #endif
 670
 671 #ifdef CONFIG_SWIOTLB
 672         if (swiotlb_nr_tbl()) {
 673                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 674                 return;
 675         }
 676 #endif
 677
 678         for (i = 0; i < ttm->num_pages; i++) {
 679                 if (gtt->ttm.dma_address[i]) {
 680                         gtt->ttm.dma_address[i] = 0;
 681 #ifdef DUMBBELL_WIP
 682                         pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 683                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 684 #endif /* DUMBBELL_WIP */
 685                 }
 686         }
 687
 688         ttm_pool_unpopulate(ttm);
 689 }
 690
 691 static struct ttm_bo_driver radeon_bo_driver = {
 692         .ttm_tt_create = &radeon_ttm_tt_create,
 693         .ttm_tt_populate = &radeon_ttm_tt_populate,
 694         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 695         .invalidate_caches = &radeon_invalidate_caches,
 696         .init_mem_type = &radeon_init_mem_type,
 697         .evict_flags = &radeon_evict_flags,
 698         .move = &radeon_bo_move,
 699         .verify_access = &radeon_verify_access,
 700         .sync_obj_signaled = &radeon_sync_obj_signaled,
 701         .sync_obj_wait = &radeon_sync_obj_wait,
 702         .sync_obj_flush = &radeon_sync_obj_flush,
 703         .sync_obj_unref = &radeon_sync_obj_unref,
 704         .sync_obj_ref = &radeon_sync_obj_ref,
 705         .move_notify = &radeon_bo_move_notify,
 706         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 707         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 708         .io_mem_free = &radeon_ttm_io_mem_free,
 709 };
 710
 711 int radeon_ttm_init(struct radeon_device *rdev)
 712 {
 713         int r, r2;
 714
 715         r = radeon_ttm_global_init(rdev);
 716         if (r) {
 717                 return r;
 718         }
 719         /* No others user of address space so set it to 0 */
 720         r = ttm_bo_device_init(&rdev->mman.bdev,
 721                                rdev->mman.bo_global_ref.ref.object,
 722                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
 723                                rdev->need_dma32);
 724         if (r) {
 725                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 726                 return r;
 727         }
 728         rdev->mman.initialized = true;
 729         rdev->ddev->drm_ttm_bdev = &rdev->mman.bdev;
 730         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 731                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 732         if (r) {
 733                 DRM_ERROR("Failed initializing VRAM heap.\n");
 734                 return r;
 735         }
 736         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 737                              RADEON_GEM_DOMAIN_VRAM,
 738                              NULL, &rdev->stollen_vga_memory);
 739         if (r) {
 740                 return r;
 741         }
 742         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 743         if (r) {
 744                 radeon_bo_unref(&rdev->stollen_vga_memory);
 745                 return r;
 746         }
 747         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 748         radeon_bo_unreserve(rdev->stollen_vga_memory);
 749         if (r) {
 750                 radeon_bo_unref(&rdev->stollen_vga_memory);
 751                 return r;
 752         }
 753         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 754                  (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
 755         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 756                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 757         if (r) {
 758                 DRM_ERROR("Failed initializing GTT heap.\n");
 759                 r2 = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 760                 if (likely(r2 == 0)) {
 761                         radeon_bo_unpin(rdev->stollen_vga_memory);
 762                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 763                 }
 764                 radeon_bo_unref(&rdev->stollen_vga_memory);
 765                 return r;
 766         }
 767         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 768                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 769
 770         r = radeon_ttm_debugfs_init(rdev);
 771         if (r) {
 772                 DRM_ERROR("Failed to init debugfs\n");
 773                 r2 = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 774                 if (likely(r2 == 0)) {
 775                         radeon_bo_unpin(rdev->stollen_vga_memory);
 776                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 777                 }
 778                 radeon_bo_unref(&rdev->stollen_vga_memory);
 779                 return r;
 780         }
 781         return 0;
 782 }
 783
 784 void radeon_ttm_fini(struct radeon_device *rdev)
 785 {
 786         int r;
 787
 788         if (!rdev->mman.initialized)
 789                 return;
 790         if (rdev->stollen_vga_memory) {
 791                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 792                 if (r == 0) {
 793                         radeon_bo_unpin(rdev->stollen_vga_memory);
 794                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 795                 }
 796                 radeon_bo_unref(&rdev->stollen_vga_memory);
 797         }
 798         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 799         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 800         ttm_bo_device_release(&rdev->mman.bdev);
 801         radeon_gart_fini(rdev);
 802         radeon_ttm_global_fini(rdev);
 803         rdev->mman.initialized = false;
 804         DRM_INFO("radeon: ttm finalized\n");
 805 }
 806
 807 /* this should only be called at bootup or when userspace
 808  * isn't running */
 809 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 810 {
 811         struct ttm_mem_type_manager *man;
 812
 813         if (!rdev->mman.initialized)
 814                 return;
 815
 816         man = &rdev->mman.bdev.man[TTM_PL_VRAM];
 817         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 818         man->size = size >> PAGE_SHIFT;
 819 }
 820
 821 #ifdef DUMBBELL_WIP
 822 static struct vm_operations_struct radeon_ttm_vm_ops;
 823 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 824
 825 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 826 {
 827         struct ttm_buffer_object *bo;
 828         struct radeon_device *rdev;
 829         int r;
 830
 831         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 832         if (bo == NULL) {
 833                 return VM_FAULT_NOPAGE;
 834         }
 835         rdev = radeon_get_rdev(bo->bdev);
 836         sx_slock(&rdev->pm.mclk_lock);
 837         r = ttm_vm_ops->fault(vma, vmf);
 838         sx_sunlock(&rdev->pm.mclk_lock);
 839         return r;
 840 }
 841
 842 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 843 {
 844         struct drm_file *file_priv;
 845         struct radeon_device *rdev;
 846         int r;
 847
 848         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 849                 return drm_mmap(filp, vma);
 850         }
 851
 852         file_priv = filp->private_data;
 853         rdev = file_priv->minor->dev->dev_private;
 854         if (rdev == NULL) {
 855                 return -EINVAL;
 856         }
 857         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 858         if (unlikely(r != 0)) {
 859                 return r;
 860         }
 861         if (unlikely(ttm_vm_ops == NULL)) {
 862                 ttm_vm_ops = vma->vm_ops;
 863                 radeon_ttm_vm_ops = *ttm_vm_ops;
 864                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
 865         }
 866         vma->vm_ops = &radeon_ttm_vm_ops;
 867         return 0;
 868 }
 869 #endif /* DUMBBELL_WIP */
 870
 871
 872 #define RADEON_DEBUGFS_MEM_TYPES 2
 873
 874 #if defined(CONFIG_DEBUG_FS)
 875 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 876 {
 877         struct drm_info_node *node = (struct drm_info_node *)m->private;
 878         struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
 879         struct drm_device *dev = node->minor->dev;
 880         struct radeon_device *rdev = dev->dev_private;
 881         int ret;
 882         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 883
 884         spin_lock(&glob->lru_lock);
 885         ret = drm_mm_dump_table(m, mm);
 886         spin_unlock(&glob->lru_lock);
 887         return ret;
 888 }
 889 #endif
 890
 891 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
 892 {
 893 #if defined(CONFIG_DEBUG_FS)
 894         static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+2];
 895         static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+2][32];
 896         unsigned i;
 897
 898         for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
 899                 if (i == 0)
 900                         sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
 901                 else
 902                         sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
 903                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 904                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
 905                 radeon_mem_types_list[i].driver_features = 0;
 906                 if (i == 0)
 907                         radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_VRAM].priv;
 908                 else
 909                         radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_TT].priv;
 910
 911         }
 912         /* Add ttm page pool to debugfs */
 913         sprintf(radeon_mem_types_names[i], "ttm_page_pool");
 914         radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 915         radeon_mem_types_list[i].show = &ttm_page_alloc_debugfs;
 916         radeon_mem_types_list[i].driver_features = 0;
 917         radeon_mem_types_list[i++].data = NULL;
 918 #ifdef CONFIG_SWIOTLB
 919         if (swiotlb_nr_tbl()) {
 920                 sprintf(radeon_mem_types_names[i], "ttm_dma_page_pool");
 921                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 922                 radeon_mem_types_list[i].show = &ttm_dma_page_alloc_debugfs;
 923                 radeon_mem_types_list[i].driver_features = 0;
 924                 radeon_mem_types_list[i++].data = NULL;
 925         }
 926 #endif
 927         return radeon_debugfs_add_files(rdev, radeon_mem_types_list, i);
 928
 929 #endif
 930         return 0;
 931 }