sys/dev/mpr/mpi/mpi2_ioc.h

   1 /*-
   2  * Copyright (c) 2012-2015 LSI Corp.
   3  * Copyright (c) 2013-2016 Avago Technologies
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
  31  *
  32  * $FreeBSD$
  33  */
  34
  35 /*
  36  *  Copyright (c) 2000-2015 LSI Corporation.
  37  *  Copyright (c) 2013-2016 Avago Technologies
  38  *  All rights reserved.
  39  *
  40  *
  41  *           Name:  mpi2_ioc.h
  42  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
  43  *  Creation Date:  October 11, 2006
  44  *
  45  *  mpi2_ioc.h Version:  02.00.27
  46  *
  47  *  NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
  48  *        prefix are for use only on MPI v2.5 products, and must not be used
  49  *        with MPI v2.0 products. Unless otherwise noted, names beginning with
  50  *        MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
  51  *
  52  *  Version History
  53  *  ---------------
  54  *
  55  *  Date      Version   Description
  56  *  --------  --------  ------------------------------------------------------
  57  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  58  *  06-04-07  02.00.01  In IOCFacts Reply structure, renamed MaxDevices to
  59  *                      MaxTargets.
  60  *                      Added TotalImageSize field to FWDownload Request.
  61  *                      Added reserved words to FWUpload Request.
  62  *  06-26-07  02.00.02  Added IR Configuration Change List Event.
  63  *  08-31-07  02.00.03  Removed SystemReplyQueueDepth field from the IOCInit
  64  *                      request and replaced it with
  65  *                      ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
  66  *                      Replaced the MinReplyQueueDepth field of the IOCFacts
  67  *                      reply with MaxReplyDescriptorPostQueueDepth.
  68  *                      Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
  69  *                      depth for the Reply Descriptor Post Queue.
  70  *                      Added SASAddress field to Initiator Device Table
  71  *                      Overflow Event data.
  72  *  10-31-07  02.00.04  Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
  73  *                      for SAS Initiator Device Status Change Event data.
  74  *                      Modified Reason Code defines for SAS Topology Change
  75  *                      List Event data, including adding a bit for PHY Vacant
  76  *                      status, and adding a mask for the Reason Code.
  77  *                      Added define for
  78  *                      MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
  79  *                      Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
  80  *  12-18-07  02.00.05  Added Boot Status defines for the IOCExceptions field of
  81  *                      the IOCFacts Reply.
  82  *                      Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  83  *                      Moved MPI2_VERSION_UNION to mpi2.h.
  84  *                      Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
  85  *                      instead of enables, and added SASBroadcastPrimitiveMasks
  86  *                      field.
  87  *                      Added Log Entry Added Event and related structure.
  88  *  02-29-08  02.00.06  Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
  89  *                      Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
  90  *                      Added MaxVolumes and MaxPersistentEntries fields to
  91  *                      IOCFacts reply.
  92  *                      Added ProtocalFlags and IOCCapabilities fields to
  93  *                      MPI2_FW_IMAGE_HEADER.
  94  *                      Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
  95  *  03-03-08  02.00.07  Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
  96  *                      a U16 (from a U32).
  97  *                      Removed extra 's' from EventMasks name.
  98  *  06-27-08  02.00.08  Fixed an offset in a comment.
  99  *  10-02-08  02.00.09  Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
 100  *                      Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
 101  *                      renamed MinReplyFrameSize to ReplyFrameSize.
 102  *                      Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
 103  *                      Added two new RAIDOperation values for Integrated RAID
 104  *                      Operations Status Event data.
 105  *                      Added four new IR Configuration Change List Event data
 106  *                      ReasonCode values.
 107  *                      Added two new ReasonCode defines for SAS Device Status
 108  *                      Change Event data.
 109  *                      Added three new DiscoveryStatus bits for the SAS
 110  *                      Discovery event data.
 111  *                      Added Multiplexing Status Change bit to the PhyStatus
 112  *                      field of the SAS Topology Change List event data.
 113  *                      Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
 114  *                      BootFlags are now product-specific.
 115  *                      Added defines for the indivdual signature bytes
 116  *                      for MPI2_INIT_IMAGE_FOOTER.
 117  *  01-19-09  02.00.10  Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
 118  *                      Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
 119  *                      define.
 120  *                      Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
 121  *                      define.
 122  *                      Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
 123  *  05-06-09  02.00.11  Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
 124  *                      Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
 125  *                      Added two new reason codes for SAS Device Status Change
 126  *                      Event.
 127  *                      Added new event: SAS PHY Counter.
 128  *  07-30-09  02.00.12  Added GPIO Interrupt event define and structure.
 129  *                      Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
 130  *                      Added new product id family for 2208.
 131  *  10-28-09  02.00.13  Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
 132  *                      Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
 133  *                      Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
 134  *                      Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
 135  *                      Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
 136  *                      Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
 137  *                      Added Host Based Discovery Phy Event data.
 138  *                      Added defines for ProductID Product field
 139  *                      (MPI2_FW_HEADER_PID_).
 140  *                      Modified values for SAS ProductID Family
 141  *                      (MPI2_FW_HEADER_PID_FAMILY_).
 142  *  02-10-10  02.00.14  Added SAS Quiesce Event structure and defines.
 143  *                      Added PowerManagementControl Request structures and
 144  *                      defines.
 145  *  05-12-10  02.00.15  Marked Task Set Full Event as obsolete.
 146  *                      Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
 147  *  11-10-10  02.00.16  Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
 148  *  02-23-11  02.00.17  Added SAS NOTIFY Primitive event, and added
 149  *                      SASNotifyPrimitiveMasks field to
 150  *                      MPI2_EVENT_NOTIFICATION_REQUEST.
 151  *                      Added Temperature Threshold Event.
 152  *                      Added Host Message Event.
 153  *                      Added Send Host Message request and reply.
 154  *  05-25-11  02.00.18  For Extended Image Header, added
 155  *                      MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
 156  *                      MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
 157  *                      Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
 158  *  08-24-11  02.00.19  Added PhysicalPort field to
 159  *                      MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
 160  *                      Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
 161  *  11-18-11  02.00.20  Incorporating additions for MPI v2.5.
 162  *  03-29-12  02.00.21  Added a product specific range to event values.
 163  *  07-26-12  02.00.22  Added MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE.
 164  *                      Added ElapsedSeconds field to
 165  *                      MPI2_EVENT_DATA_IR_OPERATION_STATUS.
 166  *  08-19-13  02.00.23  For IOCInit, added MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
 167  *                      and MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY.
 168  *                      Added MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE.
 169  *                      Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
 170  *                      Added Encrypted Hash Extended Image.
 171  *  12-05-13  02.00.24  Added MPI25_HASH_IMAGE_TYPE_BIOS.
 172  *  11-18-14  02.00.25  Updated copyright information.
 173  *  03-16-15  02.00.26  Updated for MPI v2.6.
 174  *                      Added MPI2_EVENT_ACTIVE_CABLE_EXCEPTION and
 175  *                      MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT.
 176  *                      Added MPI2_EVENT_PCIE_LINK_COUNTER and
 177  *                      MPI26_EVENT_DATA_PCIE_LINK_COUNTER.
 178  *                      Added MPI26_CTRL_OP_SHUTDOWN.
 179  *                      Added MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG
 180  *                      Added MPI26_FW_HEADER_PID_FAMILY_3324_SAS
 181  *  08-25-15  02.00.27  Added IC ARCH Class based signature defines
 182  *
 183  *  --------------------------------------------------------------------------
 184  */
 185
 186 #ifndef MPI2_IOC_H
 187 #define MPI2_IOC_H
 188
 189 /*****************************************************************************
 190 *
 191 *               IOC Messages
 192 *
 193 *****************************************************************************/
 194
 195 /****************************************************************************
 196 *  IOCInit message
 197 ****************************************************************************/
 198
 199 /* IOCInit Request message */
 200 typedef struct _MPI2_IOC_INIT_REQUEST
 201 {
 202     U8                      WhoInit;                        /* 0x00 */
 203     U8                      Reserved1;                      /* 0x01 */
 204     U8                      ChainOffset;                    /* 0x02 */
 205     U8                      Function;                       /* 0x03 */
 206     U16                     Reserved2;                      /* 0x04 */
 207     U8                      Reserved3;                      /* 0x06 */
 208     U8                      MsgFlags;                       /* 0x07 */
 209     U8                      VP_ID;                          /* 0x08 */
 210     U8                      VF_ID;                          /* 0x09 */
 211     U16                     Reserved4;                      /* 0x0A */
 212     U16                     MsgVersion;                     /* 0x0C */
 213     U16                     HeaderVersion;                  /* 0x0E */
 214     U32                     Reserved5;                      /* 0x10 */
 215     U16                     ConfigurationFlags;             /* 0x14 */
 216     U8                      HostPageSize;                   /* 0x16 */
 217     U8                      HostMSIxVectors;                /* 0x17 */
 218     U16                     Reserved8;                      /* 0x18 */
 219     U16                     SystemRequestFrameSize;         /* 0x1A */
 220     U16                     ReplyDescriptorPostQueueDepth;  /* 0x1C */
 221     U16                     ReplyFreeQueueDepth;            /* 0x1E */
 222     U32                     SenseBufferAddressHigh;         /* 0x20 */
 223     U32                     SystemReplyAddressHigh;         /* 0x24 */
 224     U64                     SystemRequestFrameBaseAddress;  /* 0x28 */
 225     U64                     ReplyDescriptorPostQueueAddress;/* 0x30 */
 226     U64                     ReplyFreeQueueAddress;          /* 0x38 */
 227     U64                     TimeStamp;                      /* 0x40 */
 228 } MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
 229   Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
 230
 231 /* WhoInit values */
 232 #define MPI2_WHOINIT_NOT_INITIALIZED            (0x00)
 233 #define MPI2_WHOINIT_SYSTEM_BIOS                (0x01)
 234 #define MPI2_WHOINIT_ROM_BIOS                   (0x02)
 235 #define MPI2_WHOINIT_PCI_PEER                   (0x03)
 236 #define MPI2_WHOINIT_HOST_DRIVER                (0x04)
 237 #define MPI2_WHOINIT_MANUFACTURER               (0x05)
 238
 239 /* MsgFlags */
 240 #define MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE    (0x01)
 241
 242 /* MsgVersion */
 243 #define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK      (0xFF00)
 244 #define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT     (8)
 245 #define MPI2_IOCINIT_MSGVERSION_MINOR_MASK      (0x00FF)
 246 #define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT     (0)
 247
 248 /* HeaderVersion */
 249 #define MPI2_IOCINIT_HDRVERSION_UNIT_MASK       (0xFF00)
 250 #define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT      (8)
 251 #define MPI2_IOCINIT_HDRVERSION_DEV_MASK        (0x00FF)
 252 #define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT       (0)
 253
 254 /* minimum depth for a Reply Descriptor Post Queue */
 255 #define MPI2_RDPQ_DEPTH_MIN                     (16)
 256
 257 /* Reply Descriptor Post Queue Array Entry */
 258 typedef struct _MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY
 259 {
 260     U64                 RDPQBaseAddress;                    /* 0x00 */
 261     U32                 Reserved1;                          /* 0x08 */
 262     U32                 Reserved2;                          /* 0x0C */
 263 } MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY,
 264   MPI2_POINTER PTR_MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY,
 265   Mpi2IOCInitRDPQArrayEntry, MPI2_POINTER pMpi2IOCInitRDPQArrayEntry;
 266
 267 /* IOCInit Reply message */
 268 typedef struct _MPI2_IOC_INIT_REPLY
 269 {
 270     U8                      WhoInit;                        /* 0x00 */
 271     U8                      Reserved1;                      /* 0x01 */
 272     U8                      MsgLength;                      /* 0x02 */
 273     U8                      Function;                       /* 0x03 */
 274     U16                     Reserved2;                      /* 0x04 */
 275     U8                      Reserved3;                      /* 0x06 */
 276     U8                      MsgFlags;                       /* 0x07 */
 277     U8                      VP_ID;                          /* 0x08 */
 278     U8                      VF_ID;                          /* 0x09 */
 279     U16                     Reserved4;                      /* 0x0A */
 280     U16                     Reserved5;                      /* 0x0C */
 281     U16                     IOCStatus;                      /* 0x0E */
 282     U32                     IOCLogInfo;                     /* 0x10 */
 283 } MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
 284   Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
 285
 286
 287 /****************************************************************************
 288 *  IOCFacts message
 289 ****************************************************************************/
 290
 291 /* IOCFacts Request message */
 292 typedef struct _MPI2_IOC_FACTS_REQUEST
 293 {
 294     U16                     Reserved1;                      /* 0x00 */
 295     U8                      ChainOffset;                    /* 0x02 */
 296     U8                      Function;                       /* 0x03 */
 297     U16                     Reserved2;                      /* 0x04 */
 298     U8                      Reserved3;                      /* 0x06 */
 299     U8                      MsgFlags;                       /* 0x07 */
 300     U8                      VP_ID;                          /* 0x08 */
 301     U8                      VF_ID;                          /* 0x09 */
 302     U16                     Reserved4;                      /* 0x0A */
 303 } MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
 304   Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
 305
 306
 307 /* IOCFacts Reply message */
 308 typedef struct _MPI2_IOC_FACTS_REPLY
 309 {
 310     U16                     MsgVersion;                     /* 0x00 */
 311     U8                      MsgLength;                      /* 0x02 */
 312     U8                      Function;                       /* 0x03 */
 313     U16                     HeaderVersion;                  /* 0x04 */
 314     U8                      IOCNumber;                      /* 0x06 */
 315     U8                      MsgFlags;                       /* 0x07 */
 316     U8                      VP_ID;                          /* 0x08 */
 317     U8                      VF_ID;                          /* 0x09 */
 318     U16                     Reserved1;                      /* 0x0A */
 319     U16                     IOCExceptions;                  /* 0x0C */
 320     U16                     IOCStatus;                      /* 0x0E */
 321     U32                     IOCLogInfo;                     /* 0x10 */
 322     U8                      MaxChainDepth;                  /* 0x14 */
 323     U8                      WhoInit;                        /* 0x15 */
 324     U8                      NumberOfPorts;                  /* 0x16 */
 325     U8                      MaxMSIxVectors;                 /* 0x17 */
 326     U16                     RequestCredit;                  /* 0x18 */
 327     U16                     ProductID;                      /* 0x1A */
 328     U32                     IOCCapabilities;                /* 0x1C */
 329     MPI2_VERSION_UNION      FWVersion;                      /* 0x20 */
 330     U16                     IOCRequestFrameSize;            /* 0x24 */
 331     U16                     IOCMaxChainSegmentSize;         /* 0x26 */ /* MPI 2.5 only; Reserved in MPI 2.0 */
 332     U16                     MaxInitiators;                  /* 0x28 */
 333     U16                     MaxTargets;                     /* 0x2A */
 334     U16                     MaxSasExpanders;                /* 0x2C */
 335     U16                     MaxEnclosures;                  /* 0x2E */
 336     U16                     ProtocolFlags;                  /* 0x30 */
 337     U16                     HighPriorityCredit;             /* 0x32 */
 338     U16                     MaxReplyDescriptorPostQueueDepth; /* 0x34 */
 339     U8                      ReplyFrameSize;                 /* 0x36 */
 340     U8                      MaxVolumes;                     /* 0x37 */
 341     U16                     MaxDevHandle;                   /* 0x38 */
 342     U16                     MaxPersistentEntries;           /* 0x3A */
 343     U16                     MinDevHandle;                   /* 0x3C */
 344     U8                      CurrentHostPageSize;            /* 0x3E */
 345     U8                      Reserved4;                      /* 0x3F */
 346     U8                      SGEModifierMask;                /* 0x40 */
 347     U8                      SGEModifierValue;               /* 0x41 */
 348     U8                      SGEModifierShift;               /* 0x42 */
 349     U8                      Reserved5;                      /* 0x43 */
 350 } MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
 351   Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
 352
 353 /* MsgVersion */
 354 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK             (0xFF00)
 355 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT            (8)
 356 #define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK             (0x00FF)
 357 #define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT            (0)
 358
 359 /* HeaderVersion */
 360 #define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK              (0xFF00)
 361 #define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT             (8)
 362 #define MPI2_IOCFACTS_HDRVERSION_DEV_MASK               (0x00FF)
 363 #define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT              (0)
 364
 365 /* IOCExceptions */
 366 #define MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE     (0x0200)
 367 #define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX      (0x0100)
 368
 369 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK              (0x00E0)
 370 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD              (0x0000)
 371 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP            (0x0020)
 372 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED          (0x0040)
 373 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP    (0x0060)
 374
 375 #define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED       (0x0010)
 376 #define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL     (0x0008)
 377 #define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL           (0x0004)
 378 #define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID        (0x0002)
 379 #define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL       (0x0001)
 380
 381 /* defines for WhoInit field are after the IOCInit Request */
 382
 383 /* ProductID field uses MPI2_FW_HEADER_PID_ */
 384
 385 /* IOCCapabilities */
 386 #define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE     (0x00040000)
 387 #define MPI25_IOCFACTS_CAPABILITY_FAST_PATH_CAPABLE     (0x00020000)
 388 #define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY   (0x00010000)
 389 #define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX            (0x00008000)
 390 #define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR       (0x00004000)
 391 #define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY           (0x00002000)
 392 #define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID        (0x00001000)
 393 #define MPI2_IOCFACTS_CAPABILITY_TLR                    (0x00000800)
 394 #define MPI2_IOCFACTS_CAPABILITY_MULTICAST              (0x00000100)
 395 #define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET   (0x00000080)
 396 #define MPI2_IOCFACTS_CAPABILITY_EEDP                   (0x00000040)
 397 #define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER        (0x00000020)
 398 #define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER        (0x00000010)
 399 #define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER      (0x00000008)
 400 #define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
 401
 402 /* ProtocolFlags */
 403 #define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR           (0x0002)
 404 #define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET              (0x0001)
 405
 406
 407 /****************************************************************************
 408 *  PortFacts message
 409 ****************************************************************************/
 410
 411 /* PortFacts Request message */
 412 typedef struct _MPI2_PORT_FACTS_REQUEST
 413 {
 414     U16                     Reserved1;                      /* 0x00 */
 415     U8                      ChainOffset;                    /* 0x02 */
 416     U8                      Function;                       /* 0x03 */
 417     U16                     Reserved2;                      /* 0x04 */
 418     U8                      PortNumber;                     /* 0x06 */
 419     U8                      MsgFlags;                       /* 0x07 */
 420     U8                      VP_ID;                          /* 0x08 */
 421     U8                      VF_ID;                          /* 0x09 */
 422     U16                     Reserved3;                      /* 0x0A */
 423 } MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
 424   Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
 425
 426 /* PortFacts Reply message */
 427 typedef struct _MPI2_PORT_FACTS_REPLY
 428 {
 429     U16                     Reserved1;                      /* 0x00 */
 430     U8                      MsgLength;                      /* 0x02 */
 431     U8                      Function;                       /* 0x03 */
 432     U16                     Reserved2;                      /* 0x04 */
 433     U8                      PortNumber;                     /* 0x06 */
 434     U8                      MsgFlags;                       /* 0x07 */
 435     U8                      VP_ID;                          /* 0x08 */
 436     U8                      VF_ID;                          /* 0x09 */
 437     U16                     Reserved3;                      /* 0x0A */
 438     U16                     Reserved4;                      /* 0x0C */
 439     U16                     IOCStatus;                      /* 0x0E */
 440     U32                     IOCLogInfo;                     /* 0x10 */
 441     U8                      Reserved5;                      /* 0x14 */
 442     U8                      PortType;                       /* 0x15 */
 443     U16                     Reserved6;                      /* 0x16 */
 444     U16                     MaxPostedCmdBuffers;            /* 0x18 */
 445     U16                     Reserved7;                      /* 0x1A */
 446 } MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
 447   Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
 448
 449 /* PortType values */
 450 #define MPI2_PORTFACTS_PORTTYPE_INACTIVE            (0x00)
 451 #define MPI2_PORTFACTS_PORTTYPE_FC                  (0x10)
 452 #define MPI2_PORTFACTS_PORTTYPE_ISCSI               (0x20)
 453 #define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL        (0x30)
 454 #define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL         (0x31)
 455
 456
 457 /****************************************************************************
 458 *  PortEnable message
 459 ****************************************************************************/
 460
 461 /* PortEnable Request message */
 462 typedef struct _MPI2_PORT_ENABLE_REQUEST
 463 {
 464     U16                     Reserved1;                      /* 0x00 */
 465     U8                      ChainOffset;                    /* 0x02 */
 466     U8                      Function;                       /* 0x03 */
 467     U8                      Reserved2;                      /* 0x04 */
 468     U8                      PortFlags;                      /* 0x05 */
 469     U8                      Reserved3;                      /* 0x06 */
 470     U8                      MsgFlags;                       /* 0x07 */
 471     U8                      VP_ID;                          /* 0x08 */
 472     U8                      VF_ID;                          /* 0x09 */
 473     U16                     Reserved4;                      /* 0x0A */
 474 } MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
 475   Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
 476
 477
 478 /* PortEnable Reply message */
 479 typedef struct _MPI2_PORT_ENABLE_REPLY
 480 {
 481     U16                     Reserved1;                      /* 0x00 */
 482     U8                      MsgLength;                      /* 0x02 */
 483     U8                      Function;                       /* 0x03 */
 484     U8                      Reserved2;                      /* 0x04 */
 485     U8                      PortFlags;                      /* 0x05 */
 486     U8                      Reserved3;                      /* 0x06 */
 487     U8                      MsgFlags;                       /* 0x07 */
 488     U8                      VP_ID;                          /* 0x08 */
 489     U8                      VF_ID;                          /* 0x09 */
 490     U16                     Reserved4;                      /* 0x0A */
 491     U16                     Reserved5;                      /* 0x0C */
 492     U16                     IOCStatus;                      /* 0x0E */
 493     U32                     IOCLogInfo;                     /* 0x10 */
 494 } MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
 495   Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
 496
 497
 498 /****************************************************************************
 499 *  EventNotification message
 500 ****************************************************************************/
 501
 502 /* EventNotification Request message */
 503 #define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
 504
 505 typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
 506 {
 507     U16                     Reserved1;                      /* 0x00 */
 508     U8                      ChainOffset;                    /* 0x02 */
 509     U8                      Function;                       /* 0x03 */
 510     U16                     Reserved2;                      /* 0x04 */
 511     U8                      Reserved3;                      /* 0x06 */
 512     U8                      MsgFlags;                       /* 0x07 */
 513     U8                      VP_ID;                          /* 0x08 */
 514     U8                      VF_ID;                          /* 0x09 */
 515     U16                     Reserved4;                      /* 0x0A */
 516     U32                     Reserved5;                      /* 0x0C */
 517     U32                     Reserved6;                      /* 0x10 */
 518     U32                     EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
 519     U16                     SASBroadcastPrimitiveMasks;     /* 0x24 */
 520     U16                     SASNotifyPrimitiveMasks;        /* 0x26 */
 521     U32                     Reserved8;                      /* 0x28 */
 522 } MPI2_EVENT_NOTIFICATION_REQUEST,
 523   MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
 524   Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
 525
 526
 527 /* EventNotification Reply message */
 528 typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
 529 {
 530     U16                     EventDataLength;                /* 0x00 */
 531     U8                      MsgLength;                      /* 0x02 */
 532     U8                      Function;                       /* 0x03 */
 533     U16                     Reserved1;                      /* 0x04 */
 534     U8                      AckRequired;                    /* 0x06 */
 535     U8                      MsgFlags;                       /* 0x07 */
 536     U8                      VP_ID;                          /* 0x08 */
 537     U8                      VF_ID;                          /* 0x09 */
 538     U16                     Reserved2;                      /* 0x0A */
 539     U16                     Reserved3;                      /* 0x0C */
 540     U16                     IOCStatus;                      /* 0x0E */
 541     U32                     IOCLogInfo;                     /* 0x10 */
 542     U16                     Event;                          /* 0x14 */
 543     U16                     Reserved4;                      /* 0x16 */
 544     U32                     EventContext;                   /* 0x18 */
 545     U32                     EventData[1];                   /* 0x1C */
 546 } MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
 547   Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
 548
 549 /* AckRequired */
 550 #define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED    (0x00)
 551 #define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED        (0x01)
 552
 553 /* Event */
 554 #define MPI2_EVENT_LOG_DATA                         (0x0001)
 555 #define MPI2_EVENT_STATE_CHANGE                     (0x0002)
 556 #define MPI2_EVENT_HARD_RESET_RECEIVED              (0x0005)
 557 #define MPI2_EVENT_EVENT_CHANGE                     (0x000A)
 558 #define MPI2_EVENT_TASK_SET_FULL                    (0x000E) /* obsolete */
 559 #define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE         (0x000F)
 560 #define MPI2_EVENT_IR_OPERATION_STATUS              (0x0014)
 561 #define MPI2_EVENT_SAS_DISCOVERY                    (0x0016)
 562 #define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE          (0x0017)
 563 #define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x0018)
 564 #define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x0019)
 565 #define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x001C)
 566 #define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE    (0x001D)
 567 #define MPI2_EVENT_IR_VOLUME                        (0x001E)
 568 #define MPI2_EVENT_IR_PHYSICAL_DISK                 (0x001F)
 569 #define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST     (0x0020)
 570 #define MPI2_EVENT_LOG_ENTRY_ADDED                  (0x0021)
 571 #define MPI2_EVENT_SAS_PHY_COUNTER                  (0x0022)
 572 #define MPI2_EVENT_GPIO_INTERRUPT                   (0x0023)
 573 #define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY         (0x0024)
 574 #define MPI2_EVENT_SAS_QUIESCE                      (0x0025)
 575 #define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE             (0x0026)
 576 #define MPI2_EVENT_TEMP_THRESHOLD                   (0x0027)
 577 #define MPI2_EVENT_HOST_MESSAGE                     (0x0028)
 578 #define MPI2_EVENT_POWER_PERFORMANCE_CHANGE         (0x0029)
 579 #define MPI2_EVENT_ACTIVE_CABLE_EXCEPTION           (0x0034) /* MPI v2.6 and later */
 580 #define MPI2_EVENT_MIN_PRODUCT_SPECIFIC             (0x006E)
 581 #define MPI2_EVENT_MAX_PRODUCT_SPECIFIC             (0x007F)
 582
 583
 584 /* Log Entry Added Event data */
 585
 586 /* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
 587 #define MPI2_EVENT_DATA_LOG_DATA_LENGTH             (0x1C)
 588
 589 typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
 590 {
 591     U64         TimeStamp;                          /* 0x00 */
 592     U32         Reserved1;                          /* 0x08 */
 593     U16         LogSequence;                        /* 0x0C */
 594     U16         LogEntryQualifier;                  /* 0x0E */
 595     U8          VP_ID;                              /* 0x10 */
 596     U8          VF_ID;                              /* 0x11 */
 597     U16         Reserved2;                          /* 0x12 */
 598     U8          LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
 599 } MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 600   MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 601   Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
 602
 603
 604 /* GPIO Interrupt Event data */
 605
 606 typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT
 607 {
 608     U8          GPIONum;                            /* 0x00 */
 609     U8          Reserved1;                          /* 0x01 */
 610     U16         Reserved2;                          /* 0x02 */
 611 } MPI2_EVENT_DATA_GPIO_INTERRUPT,
 612   MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
 613   Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t;
 614
 615
 616 /* Temperature Threshold Event data */
 617
 618 typedef struct _MPI2_EVENT_DATA_TEMPERATURE
 619 {
 620     U16         Status;                             /* 0x00 */
 621     U8          SensorNum;                          /* 0x02 */
 622     U8          Reserved1;                          /* 0x03 */
 623     U16         CurrentTemperature;                 /* 0x04 */
 624     U16         Reserved2;                          /* 0x06 */
 625     U32         Reserved3;                          /* 0x08 */
 626     U32         Reserved4;                          /* 0x0C */
 627 } MPI2_EVENT_DATA_TEMPERATURE,
 628   MPI2_POINTER PTR_MPI2_EVENT_DATA_TEMPERATURE,
 629   Mpi2EventDataTemperature_t, MPI2_POINTER pMpi2EventDataTemperature_t;
 630
 631 /* Temperature Threshold Event data Status bits */
 632 #define MPI2_EVENT_TEMPERATURE3_EXCEEDED            (0x0008)
 633 #define MPI2_EVENT_TEMPERATURE2_EXCEEDED            (0x0004)
 634 #define MPI2_EVENT_TEMPERATURE1_EXCEEDED            (0x0002)
 635 #define MPI2_EVENT_TEMPERATURE0_EXCEEDED            (0x0001)
 636
 637
 638 /* Host Message Event data */
 639
 640 typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE
 641 {
 642     U8          SourceVF_ID;                        /* 0x00 */
 643     U8          Reserved1;                          /* 0x01 */
 644     U16         Reserved2;                          /* 0x02 */
 645     U32         Reserved3;                          /* 0x04 */
 646     U32         HostData[1];                        /* 0x08 */
 647 } MPI2_EVENT_DATA_HOST_MESSAGE, MPI2_POINTER PTR_MPI2_EVENT_DATA_HOST_MESSAGE,
 648   Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t;
 649
 650
 651 /* Power Performance Change Event data */
 652
 653 typedef struct _MPI2_EVENT_DATA_POWER_PERF_CHANGE
 654 {
 655     U8          CurrentPowerMode;                   /* 0x00 */
 656     U8          PreviousPowerMode;                  /* 0x01 */
 657     U16         Reserved1;                          /* 0x02 */
 658 } MPI2_EVENT_DATA_POWER_PERF_CHANGE,
 659   MPI2_POINTER PTR_MPI2_EVENT_DATA_POWER_PERF_CHANGE,
 660   Mpi2EventDataPowerPerfChange_t, MPI2_POINTER pMpi2EventDataPowerPerfChange_t;
 661
 662 /* defines for CurrentPowerMode and PreviousPowerMode fields */
 663 #define MPI2_EVENT_PM_INIT_MASK              (0xC0)
 664 #define MPI2_EVENT_PM_INIT_UNAVAILABLE       (0x00)
 665 #define MPI2_EVENT_PM_INIT_HOST              (0x40)
 666 #define MPI2_EVENT_PM_INIT_IO_UNIT           (0x80)
 667 #define MPI2_EVENT_PM_INIT_PCIE_DPA          (0xC0)
 668
 669 #define MPI2_EVENT_PM_MODE_MASK              (0x07)
 670 #define MPI2_EVENT_PM_MODE_UNAVAILABLE       (0x00)
 671 #define MPI2_EVENT_PM_MODE_UNKNOWN           (0x01)
 672 #define MPI2_EVENT_PM_MODE_FULL_POWER        (0x04)
 673 #define MPI2_EVENT_PM_MODE_REDUCED_POWER     (0x05)
 674 #define MPI2_EVENT_PM_MODE_STANDBY           (0x06)
 675
 676
 677 /* Active Cable Exception Event data */
 678
 679 typedef struct _MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT
 680 {
 681     U32         ActiveCablePowerRequirement;        /* 0x00 */
 682     U8          ReasonCode;                         /* 0x04 */
 683     U8          ReceptacleID;                       /* 0x05 */
 684     U16         Reserved1;                          /* 0x06 */
 685 } MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT,
 686   MPI2_POINTER PTR_MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT,
 687   Mpi26EventDataActiveCableExcept_t,
 688   MPI2_POINTER pMpi26EventDataActiveCableExcept_t;
 689
 690 /* defines for ReasonCode field */
 691 #define MPI26_EVENT_ACTIVE_CABLE_INSUFFICIENT_POWER     (0x00)
 692 #define MPI26_EVENT_ACTIVE_CABLE_PRESENT                (0x01)
 693 #define MPI26_EVENT_ACTIVE_CABLE_DEGRADED               (0x02)
 694
 695
 696
 697 /* Hard Reset Received Event data */
 698
 699 typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
 700 {
 701     U8                      Reserved1;                      /* 0x00 */
 702     U8                      Port;                           /* 0x01 */
 703     U16                     Reserved2;                      /* 0x02 */
 704 } MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 705   MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 706   Mpi2EventDataHardResetReceived_t,
 707   MPI2_POINTER pMpi2EventDataHardResetReceived_t;
 708
 709
 710 /* Task Set Full Event data */
 711 /*   this event is obsolete */
 712
 713 typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
 714 {
 715     U16                     DevHandle;                      /* 0x00 */
 716     U16                     CurrentDepth;                   /* 0x02 */
 717 } MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
 718   Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
 719
 720
 721 /* SAS Device Status Change Event data */
 722
 723 typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 724 {
 725     U16                     TaskTag;                        /* 0x00 */
 726     U8                      ReasonCode;                     /* 0x02 */
 727     U8                      PhysicalPort;                   /* 0x03 */
 728     U8                      ASC;                            /* 0x04 */
 729     U8                      ASCQ;                           /* 0x05 */
 730     U16                     DevHandle;                      /* 0x06 */
 731     U32                     Reserved2;                      /* 0x08 */
 732     U64                     SASAddress;                     /* 0x0C */
 733     U8                      LUN[8];                         /* 0x14 */
 734 } MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 735   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 736   Mpi2EventDataSasDeviceStatusChange_t,
 737   MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
 738
 739 /* SAS Device Status Change Event data ReasonCode values */
 740 #define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA                           (0x05)
 741 #define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED                          (0x07)
 742 #define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET                (0x08)
 743 #define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL                  (0x09)
 744 #define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL              (0x0A)
 745 #define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL              (0x0B)
 746 #define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL                  (0x0C)
 747 #define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x0D)
 748 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET               (0x0E)
 749 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL              (0x0F)
 750 #define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE                    (0x10)
 751 #define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY       (0x11)
 752 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY   (0x12)
 753
 754
 755 /* Integrated RAID Operation Status Event data */
 756
 757 typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
 758 {
 759     U16                     VolDevHandle;               /* 0x00 */
 760     U16                     Reserved1;                  /* 0x02 */
 761     U8                      RAIDOperation;              /* 0x04 */
 762     U8                      PercentComplete;            /* 0x05 */
 763     U16                     Reserved2;                  /* 0x06 */
 764     U32                     ElapsedSeconds;             /* 0x08 */
 765 } MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 766   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 767   Mpi2EventDataIrOperationStatus_t,
 768   MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
 769
 770 /* Integrated RAID Operation Status Event data RAIDOperation values */
 771 #define MPI2_EVENT_IR_RAIDOP_RESYNC                     (0x00)
 772 #define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION       (0x01)
 773 #define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK          (0x02)
 774 #define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT            (0x03)
 775 #define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT       (0x04)
 776
 777
 778 /* Integrated RAID Volume Event data */
 779
 780 typedef struct _MPI2_EVENT_DATA_IR_VOLUME
 781 {
 782     U16                     VolDevHandle;               /* 0x00 */
 783     U8                      ReasonCode;                 /* 0x02 */
 784     U8                      Reserved1;                  /* 0x03 */
 785     U32                     NewValue;                   /* 0x04 */
 786     U32                     PreviousValue;              /* 0x08 */
 787 } MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
 788   Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
 789
 790 /* Integrated RAID Volume Event data ReasonCode values */
 791 #define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED        (0x01)
 792 #define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED    (0x02)
 793 #define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED           (0x03)
 794
 795
 796 /* Integrated RAID Physical Disk Event data */
 797
 798 typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
 799 {
 800     U16                     Reserved1;                  /* 0x00 */
 801     U8                      ReasonCode;                 /* 0x02 */
 802     U8                      PhysDiskNum;                /* 0x03 */
 803     U16                     PhysDiskDevHandle;          /* 0x04 */
 804     U16                     Reserved2;                  /* 0x06 */
 805     U16                     Slot;                       /* 0x08 */
 806     U16                     EnclosureHandle;            /* 0x0A */
 807     U32                     NewValue;                   /* 0x0C */
 808     U32                     PreviousValue;              /* 0x10 */
 809 } MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 810   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 811   Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
 812
 813 /* Integrated RAID Physical Disk Event data ReasonCode values */
 814 #define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED      (0x01)
 815 #define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED  (0x02)
 816 #define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED         (0x03)
 817
 818
 819 /* Integrated RAID Configuration Change List Event data */
 820
 821 /*
 822  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 823  * one and check NumElements at runtime.
 824  */
 825 #ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
 826 #define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT          (1)
 827 #endif
 828
 829 typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
 830 {
 831     U16                     ElementFlags;               /* 0x00 */
 832     U16                     VolDevHandle;               /* 0x02 */
 833     U8                      ReasonCode;                 /* 0x04 */
 834     U8                      PhysDiskNum;                /* 0x05 */
 835     U16                     PhysDiskDevHandle;          /* 0x06 */
 836 } MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
 837   Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
 838
 839 /* IR Configuration Change List Event data ElementFlags values */
 840 #define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK   (0x000F)
 841 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT      (0x0000)
 842 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
 843 #define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT    (0x0002)
 844
 845 /* IR Configuration Change List Event data ReasonCode values */
 846 #define MPI2_EVENT_IR_CHANGE_RC_ADDED                   (0x01)
 847 #define MPI2_EVENT_IR_CHANGE_RC_REMOVED                 (0x02)
 848 #define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE               (0x03)
 849 #define MPI2_EVENT_IR_CHANGE_RC_HIDE                    (0x04)
 850 #define MPI2_EVENT_IR_CHANGE_RC_UNHIDE                  (0x05)
 851 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED          (0x06)
 852 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED          (0x07)
 853 #define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED              (0x08)
 854 #define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED              (0x09)
 855
 856 typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
 857 {
 858     U8                              NumElements;        /* 0x00 */
 859     U8                              Reserved1;          /* 0x01 */
 860     U8                              Reserved2;          /* 0x02 */
 861     U8                              ConfigNum;          /* 0x03 */
 862     U32                             Flags;              /* 0x04 */
 863     MPI2_EVENT_IR_CONFIG_ELEMENT    ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];    /* 0x08 */
 864 } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 865   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 866   Mpi2EventDataIrConfigChangeList_t,
 867   MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
 868
 869 /* IR Configuration Change List Event data Flags values */
 870 #define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG   (0x00000001)
 871
 872
 873 /* SAS Discovery Event data */
 874
 875 typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
 876 {
 877     U8                      Flags;                      /* 0x00 */
 878     U8                      ReasonCode;                 /* 0x01 */
 879     U8                      PhysicalPort;               /* 0x02 */
 880     U8                      Reserved1;                  /* 0x03 */
 881     U32                     DiscoveryStatus;            /* 0x04 */
 882 } MPI2_EVENT_DATA_SAS_DISCOVERY,
 883   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
 884   Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
 885
 886 /* SAS Discovery Event data Flags values */
 887 #define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE                   (0x02)
 888 #define MPI2_EVENT_SAS_DISC_IN_PROGRESS                     (0x01)
 889
 890 /* SAS Discovery Event data ReasonCode values */
 891 #define MPI2_EVENT_SAS_DISC_RC_STARTED                      (0x01)
 892 #define MPI2_EVENT_SAS_DISC_RC_COMPLETED                    (0x02)
 893
 894 /* SAS Discovery Event data DiscoveryStatus values */
 895 #define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED            (0x80000000)
 896 #define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED             (0x40000000)
 897 #define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED               (0x20000000)
 898 #define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
 899 #define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR             (0x08000000)
 900 #define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE    (0x00008000)
 901 #define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE            (0x00004000)
 902 #define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN                (0x00002000)
 903 #define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK        (0x00001000)
 904 #define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE               (0x00000800)
 905 #define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK                       (0x00000400)
 906 #define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK                 (0x00000200)
 907 #define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR                    (0x00000100)
 908 #define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED              (0x00000080)
 909 #define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST                  (0x00000040)
 910 #define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES                (0x00000020)
 911 #define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT                      (0x00000010)
 912 #define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS                   (0x00000004)
 913 #define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE             (0x00000002)
 914 #define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED                    (0x00000001)
 915
 916
 917 /* SAS Broadcast Primitive Event data */
 918
 919 typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 920 {
 921     U8                      PhyNum;                     /* 0x00 */
 922     U8                      Port;                       /* 0x01 */
 923     U8                      PortWidth;                  /* 0x02 */
 924     U8                      Primitive;                  /* 0x03 */
 925 } MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 926   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 927   Mpi2EventDataSasBroadcastPrimitive_t,
 928   MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
 929
 930 /* defines for the Primitive field */
 931 #define MPI2_EVENT_PRIMITIVE_CHANGE                         (0x01)
 932 #define MPI2_EVENT_PRIMITIVE_SES                            (0x02)
 933 #define MPI2_EVENT_PRIMITIVE_EXPANDER                       (0x03)
 934 #define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT             (0x04)
 935 #define MPI2_EVENT_PRIMITIVE_RESERVED3                      (0x05)
 936 #define MPI2_EVENT_PRIMITIVE_RESERVED4                      (0x06)
 937 #define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED               (0x07)
 938 #define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED               (0x08)
 939
 940
 941 /* SAS Notify Primitive Event data */
 942
 943 typedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE
 944 {
 945     U8                      PhyNum;                     /* 0x00 */
 946     U8                      Port;                       /* 0x01 */
 947     U8                      Reserved1;                  /* 0x02 */
 948     U8                      Primitive;                  /* 0x03 */
 949 } MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 950   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 951   Mpi2EventDataSasNotifyPrimitive_t,
 952   MPI2_POINTER pMpi2EventDataSasNotifyPrimitive_t;
 953
 954 /* defines for the Primitive field */
 955 #define MPI2_EVENT_NOTIFY_ENABLE_SPINUP                     (0x01)
 956 #define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED               (0x02)
 957 #define MPI2_EVENT_NOTIFY_RESERVED1                         (0x03)
 958 #define MPI2_EVENT_NOTIFY_RESERVED2                         (0x04)
 959
 960
 961 /* SAS Initiator Device Status Change Event data */
 962
 963 typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 964 {
 965     U8                      ReasonCode;                 /* 0x00 */
 966     U8                      PhysicalPort;               /* 0x01 */
 967     U16                     DevHandle;                  /* 0x02 */
 968     U64                     SASAddress;                 /* 0x04 */
 969 } MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 970   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 971   Mpi2EventDataSasInitDevStatusChange_t,
 972   MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
 973
 974 /* SAS Initiator Device Status Change event ReasonCode values */
 975 #define MPI2_EVENT_SAS_INIT_RC_ADDED                (0x01)
 976 #define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
 977
 978
 979 /* SAS Initiator Device Table Overflow Event data */
 980
 981 typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 982 {
 983     U16                     MaxInit;                    /* 0x00 */
 984     U16                     CurrentInit;                /* 0x02 */
 985     U64                     SASAddress;                 /* 0x04 */
 986 } MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 987   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 988   Mpi2EventDataSasInitTableOverflow_t,
 989   MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
 990
 991
 992 /* SAS Topology Change List Event data */
 993
 994 /*
 995  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 996  * one and check NumEntries at runtime.
 997  */
 998 #ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
 999 #define MPI2_EVENT_SAS_TOPO_PHY_COUNT           (1)
1000 #endif
1001
1002 typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
1003 {
1004     U16                     AttachedDevHandle;          /* 0x00 */
1005     U8                      LinkRate;                   /* 0x02 */
1006     U8                      PhyStatus;                  /* 0x03 */
1007 } MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
1008   Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
1009
1010 typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
1011 {
1012     U16                             EnclosureHandle;            /* 0x00 */
1013     U16                             ExpanderDevHandle;          /* 0x02 */
1014     U8                              NumPhys;                    /* 0x04 */
1015     U8                              Reserved1;                  /* 0x05 */
1016     U16                             Reserved2;                  /* 0x06 */
1017     U8                              NumEntries;                 /* 0x08 */
1018     U8                              StartPhyNum;                /* 0x09 */
1019     U8                              ExpStatus;                  /* 0x0A */
1020     U8                              PhysicalPort;               /* 0x0B */
1021     MPI2_EVENT_SAS_TOPO_PHY_ENTRY   PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
1022 } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
1023   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
1024   Mpi2EventDataSasTopologyChangeList_t,
1025   MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
1026
1027 /* values for the ExpStatus field */
1028 #define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER                  (0x00)
1029 #define MPI2_EVENT_SAS_TOPO_ES_ADDED                        (0x01)
1030 #define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING               (0x02)
1031 #define MPI2_EVENT_SAS_TOPO_ES_RESPONDING                   (0x03)
1032 #define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING         (0x04)
1033
1034 /* defines for the LinkRate field */
1035 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
1036 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
1037 #define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
1038 #define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
1039
1040 #define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
1041 #define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
1042 #define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
1043 #define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
1044 #define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
1045 #define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
1046 #define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY              (0x06)
1047 #define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5                     (0x08)
1048 #define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0                     (0x09)
1049 #define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
1050 #define MPI25_EVENT_SAS_TOPO_LR_RATE_12_0                   (0x0B)
1051
1052 /* values for the PhyStatus field */
1053 #define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT                (0x80)
1054 #define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE             (0x10)
1055 /* values for the PhyStatus ReasonCode sub-field */
1056 #define MPI2_EVENT_SAS_TOPO_RC_MASK                         (0x0F)
1057 #define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED                   (0x01)
1058 #define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING          (0x02)
1059 #define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED                  (0x03)
1060 #define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE                    (0x04)
1061 #define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING         (0x05)
1062
1063
1064 /* SAS Enclosure Device Status Change Event data */
1065
1066 typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
1067 {
1068     U16                     EnclosureHandle;            /* 0x00 */
1069     U8                      ReasonCode;                 /* 0x02 */
1070     U8                      PhysicalPort;               /* 0x03 */
1071     U64                     EnclosureLogicalID;         /* 0x04 */
1072     U16                     NumSlots;                   /* 0x0C */
1073     U16                     StartSlot;                  /* 0x0E */
1074     U32                     PhyBits;                    /* 0x10 */
1075 } MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
1076   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
1077   Mpi2EventDataSasEnclDevStatusChange_t,
1078   MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
1079
1080 /* SAS Enclosure Device Status Change event ReasonCode values */
1081 #define MPI2_EVENT_SAS_ENCL_RC_ADDED                (0x01)
1082 #define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING       (0x02)
1083
1084
1085 /* SAS PHY Counter Event data */
1086
1087 typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER
1088 {
1089     U64         TimeStamp;          /* 0x00 */
1090     U32         Reserved1;          /* 0x08 */
1091     U8          PhyEventCode;       /* 0x0C */
1092     U8          PhyNum;             /* 0x0D */
1093     U16         Reserved2;          /* 0x0E */
1094     U32         PhyEventInfo;       /* 0x10 */
1095     U8          CounterType;        /* 0x14 */
1096     U8          ThresholdWindow;    /* 0x15 */
1097     U8          TimeUnits;          /* 0x16 */
1098     U8          Reserved3;          /* 0x17 */
1099     U32         EventThreshold;     /* 0x18 */
1100     U16         ThresholdFlags;     /* 0x1C */
1101     U16         Reserved4;          /* 0x1E */
1102 } MPI2_EVENT_DATA_SAS_PHY_COUNTER,
1103   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
1104   Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
1105
1106 /* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the PhyEventCode field */
1107
1108 /* use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the CounterType field */
1109
1110 /* use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the TimeUnits field */
1111
1112 /* use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the ThresholdFlags field */
1113
1114
1115 /* SAS Quiesce Event data */
1116
1117 typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE
1118 {
1119     U8                      ReasonCode;                 /* 0x00 */
1120     U8                      Reserved1;                  /* 0x01 */
1121     U16                     Reserved2;                  /* 0x02 */
1122     U32                     Reserved3;                  /* 0x04 */
1123 } MPI2_EVENT_DATA_SAS_QUIESCE,
1124   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
1125   Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t;
1126
1127 /* SAS Quiesce Event data ReasonCode values */
1128 #define MPI2_EVENT_SAS_QUIESCE_RC_STARTED                   (0x01)
1129 #define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED                 (0x02)
1130
1131
1132 /* Host Based Discovery Phy Event data */
1133
1134 typedef struct _MPI2_EVENT_HBD_PHY_SAS
1135 {
1136     U8          Flags;                      /* 0x00 */
1137     U8          NegotiatedLinkRate;         /* 0x01 */
1138     U8          PhyNum;                     /* 0x02 */
1139     U8          PhysicalPort;               /* 0x03 */
1140     U32         Reserved1;                  /* 0x04 */
1141     U8          InitialFrame[28];           /* 0x08 */
1142 } MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
1143   Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
1144
1145 /* values for the Flags field */
1146 #define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID        (0x02)
1147 #define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME         (0x01)
1148
1149 /* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for the NegotiatedLinkRate field */
1150
1151 typedef union _MPI2_EVENT_HBD_DESCRIPTOR
1152 {
1153     MPI2_EVENT_HBD_PHY_SAS      Sas;
1154 } MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
1155   Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
1156
1157 typedef struct _MPI2_EVENT_DATA_HBD_PHY
1158 {
1159     U8                          DescriptorType;     /* 0x00 */
1160     U8                          Reserved1;          /* 0x01 */
1161     U16                         Reserved2;          /* 0x02 */
1162     U32                         Reserved3;          /* 0x04 */
1163     MPI2_EVENT_HBD_DESCRIPTOR   Descriptor;         /* 0x08 */
1164 } MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
1165   Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
1166
1167 /* values for the DescriptorType field */
1168 #define MPI2_EVENT_HBD_DT_SAS               (0x01)
1169
1170
1171 /****************************************************************************
1172 *  EventAck message
1173 ****************************************************************************/
1174
1175 /* EventAck Request message */
1176 typedef struct _MPI2_EVENT_ACK_REQUEST
1177 {
1178     U16                     Reserved1;                      /* 0x00 */
1179     U8                      ChainOffset;                    /* 0x02 */
1180     U8                      Function;                       /* 0x03 */
1181     U16                     Reserved2;                      /* 0x04 */
1182     U8                      Reserved3;                      /* 0x06 */
1183     U8                      MsgFlags;                       /* 0x07 */
1184     U8                      VP_ID;                          /* 0x08 */
1185     U8                      VF_ID;                          /* 0x09 */
1186     U16                     Reserved4;                      /* 0x0A */
1187     U16                     Event;                          /* 0x0C */
1188     U16                     Reserved5;                      /* 0x0E */
1189     U32                     EventContext;                   /* 0x10 */
1190 } MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
1191   Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
1192
1193
1194 /* EventAck Reply message */
1195 typedef struct _MPI2_EVENT_ACK_REPLY
1196 {
1197     U16                     Reserved1;                      /* 0x00 */
1198     U8                      MsgLength;                      /* 0x02 */
1199     U8                      Function;                       /* 0x03 */
1200     U16                     Reserved2;                      /* 0x04 */
1201     U8                      Reserved3;                      /* 0x06 */
1202     U8                      MsgFlags;                       /* 0x07 */
1203     U8                      VP_ID;                          /* 0x08 */
1204     U8                      VF_ID;                          /* 0x09 */
1205     U16                     Reserved4;                      /* 0x0A */
1206     U16                     Reserved5;                      /* 0x0C */
1207     U16                     IOCStatus;                      /* 0x0E */
1208     U32                     IOCLogInfo;                     /* 0x10 */
1209 } MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
1210   Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
1211
1212
1213 /****************************************************************************
1214 *  SendHostMessage message
1215 ****************************************************************************/
1216
1217 /* SendHostMessage Request message */
1218 typedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST
1219 {
1220     U16                     HostDataLength;                 /* 0x00 */
1221     U8                      ChainOffset;                    /* 0x02 */
1222     U8                      Function;                       /* 0x03 */
1223     U16                     Reserved1;                      /* 0x04 */
1224     U8                      Reserved2;                      /* 0x06 */
1225     U8                      MsgFlags;                       /* 0x07 */
1226     U8                      VP_ID;                          /* 0x08 */
1227     U8                      VF_ID;                          /* 0x09 */
1228     U16                     Reserved3;                      /* 0x0A */
1229     U8                      Reserved4;                      /* 0x0C */
1230     U8                      DestVF_ID;                      /* 0x0D */
1231     U16                     Reserved5;                      /* 0x0E */
1232     U32                     Reserved6;                      /* 0x10 */
1233     U32                     Reserved7;                      /* 0x14 */
1234     U32                     Reserved8;                      /* 0x18 */
1235     U32                     Reserved9;                      /* 0x1C */
1236     U32                     Reserved10;                     /* 0x20 */
1237     U32                     HostData[1];                    /* 0x24 */
1238 } MPI2_SEND_HOST_MESSAGE_REQUEST,
1239   MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REQUEST,
1240   Mpi2SendHostMessageRequest_t, MPI2_POINTER pMpi2SendHostMessageRequest_t;
1241
1242
1243 /* SendHostMessage Reply message */
1244 typedef struct _MPI2_SEND_HOST_MESSAGE_REPLY
1245 {
1246     U16                     HostDataLength;                 /* 0x00 */
1247     U8                      MsgLength;                      /* 0x02 */
1248     U8                      Function;                       /* 0x03 */
1249     U16                     Reserved1;                      /* 0x04 */
1250     U8                      Reserved2;                      /* 0x06 */
1251     U8                      MsgFlags;                       /* 0x07 */
1252     U8                      VP_ID;                          /* 0x08 */
1253     U8                      VF_ID;                          /* 0x09 */
1254     U16                     Reserved3;                      /* 0x0A */
1255     U16                     Reserved4;                      /* 0x0C */
1256     U16                     IOCStatus;                      /* 0x0E */
1257     U32                     IOCLogInfo;                     /* 0x10 */
1258 } MPI2_SEND_HOST_MESSAGE_REPLY, MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REPLY,
1259   Mpi2SendHostMessageReply_t, MPI2_POINTER pMpi2SendHostMessageReply_t;
1260
1261
1262 /****************************************************************************
1263 *  FWDownload message
1264 ****************************************************************************/
1265
1266 /* MPI v2.0 FWDownload Request message */
1267 typedef struct _MPI2_FW_DOWNLOAD_REQUEST
1268 {
1269     U8                      ImageType;                  /* 0x00 */
1270     U8                      Reserved1;                  /* 0x01 */
1271     U8                      ChainOffset;                /* 0x02 */
1272     U8                      Function;                   /* 0x03 */
1273     U16                     Reserved2;                  /* 0x04 */
1274     U8                      Reserved3;                  /* 0x06 */
1275     U8                      MsgFlags;                   /* 0x07 */
1276     U8                      VP_ID;                      /* 0x08 */
1277     U8                      VF_ID;                      /* 0x09 */
1278     U16                     Reserved4;                  /* 0x0A */
1279     U32                     TotalImageSize;             /* 0x0C */
1280     U32                     Reserved5;                  /* 0x10 */
1281     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1282 } MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
1283   Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
1284
1285 #define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT   (0x01)
1286
1287 #define MPI2_FW_DOWNLOAD_ITYPE_FW                   (0x01)
1288 #define MPI2_FW_DOWNLOAD_ITYPE_BIOS                 (0x02)
1289 #define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING        (0x06)
1290 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1             (0x07)
1291 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2             (0x08)
1292 #define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID             (0x09)
1293 #define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE             (0x0A)
1294 #define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK    (0x0B)
1295 #define MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY           (0x0C) /* MPI v2.5 and newer */
1296 #define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
1297
1298 /* MPI v2.0 FWDownload TransactionContext Element */
1299 typedef struct _MPI2_FW_DOWNLOAD_TCSGE
1300 {
1301     U8                      Reserved1;                  /* 0x00 */
1302     U8                      ContextSize;                /* 0x01 */
1303     U8                      DetailsLength;              /* 0x02 */
1304     U8                      Flags;                      /* 0x03 */
1305     U32                     Reserved2;                  /* 0x04 */
1306     U32                     ImageOffset;                /* 0x08 */
1307     U32                     ImageSize;                  /* 0x0C */
1308 } MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
1309   Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
1310
1311
1312 /* MPI v2.5 FWDownload Request message */
1313 typedef struct _MPI25_FW_DOWNLOAD_REQUEST
1314 {
1315     U8                      ImageType;                  /* 0x00 */
1316     U8                      Reserved1;                  /* 0x01 */
1317     U8                      ChainOffset;                /* 0x02 */
1318     U8                      Function;                   /* 0x03 */
1319     U16                     Reserved2;                  /* 0x04 */
1320     U8                      Reserved3;                  /* 0x06 */
1321     U8                      MsgFlags;                   /* 0x07 */
1322     U8                      VP_ID;                      /* 0x08 */
1323     U8                      VF_ID;                      /* 0x09 */
1324     U16                     Reserved4;                  /* 0x0A */
1325     U32                     TotalImageSize;             /* 0x0C */
1326     U32                     Reserved5;                  /* 0x10 */
1327     U32                     Reserved6;                  /* 0x14 */
1328     U32                     ImageOffset;                /* 0x18 */
1329     U32                     ImageSize;                  /* 0x1C */
1330     MPI25_SGE_IO_UNION      SGL;                        /* 0x20 */
1331 } MPI25_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_DOWNLOAD_REQUEST,
1332   Mpi25FWDownloadRequest, MPI2_POINTER pMpi25FWDownloadRequest;
1333
1334
1335 /* FWDownload Reply message */
1336 typedef struct _MPI2_FW_DOWNLOAD_REPLY
1337 {
1338     U8                      ImageType;                  /* 0x00 */
1339     U8                      Reserved1;                  /* 0x01 */
1340     U8                      MsgLength;                  /* 0x02 */
1341     U8                      Function;                   /* 0x03 */
1342     U16                     Reserved2;                  /* 0x04 */
1343     U8                      Reserved3;                  /* 0x06 */
1344     U8                      MsgFlags;                   /* 0x07 */
1345     U8                      VP_ID;                      /* 0x08 */
1346     U8                      VF_ID;                      /* 0x09 */
1347     U16                     Reserved4;                  /* 0x0A */
1348     U16                     Reserved5;                  /* 0x0C */
1349     U16                     IOCStatus;                  /* 0x0E */
1350     U32                     IOCLogInfo;                 /* 0x10 */
1351 } MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
1352   Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
1353
1354
1355 /****************************************************************************
1356 *  FWUpload message
1357 ****************************************************************************/
1358
1359 /* MPI v2.0 FWUpload Request message */
1360 typedef struct _MPI2_FW_UPLOAD_REQUEST
1361 {
1362     U8                      ImageType;                  /* 0x00 */
1363     U8                      Reserved1;                  /* 0x01 */
1364     U8                      ChainOffset;                /* 0x02 */
1365     U8                      Function;                   /* 0x03 */
1366     U16                     Reserved2;                  /* 0x04 */
1367     U8                      Reserved3;                  /* 0x06 */
1368     U8                      MsgFlags;                   /* 0x07 */
1369     U8                      VP_ID;                      /* 0x08 */
1370     U8                      VF_ID;                      /* 0x09 */
1371     U16                     Reserved4;                  /* 0x0A */
1372     U32                     Reserved5;                  /* 0x0C */
1373     U32                     Reserved6;                  /* 0x10 */
1374     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1375 } MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
1376   Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
1377
1378 #define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT         (0x00)
1379 #define MPI2_FW_UPLOAD_ITYPE_FW_FLASH           (0x01)
1380 #define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH         (0x02)
1381 #define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP          (0x05)
1382 #define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING      (0x06)
1383 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_1           (0x07)
1384 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_2           (0x08)
1385 #define MPI2_FW_UPLOAD_ITYPE_MEGARAID           (0x09)
1386 #define MPI2_FW_UPLOAD_ITYPE_COMPLETE           (0x0A)
1387 #define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK  (0x0B)
1388 #define MPI2_FW_UPLOAD_ITYPE_CBB_BACKUP         (0x0D)
1389
1390 /* MPI v2.0 FWUpload TransactionContext Element */
1391 typedef struct _MPI2_FW_UPLOAD_TCSGE
1392 {
1393     U8                      Reserved1;                  /* 0x00 */
1394     U8                      ContextSize;                /* 0x01 */
1395     U8                      DetailsLength;              /* 0x02 */
1396     U8                      Flags;                      /* 0x03 */
1397     U32                     Reserved2;                  /* 0x04 */
1398     U32                     ImageOffset;                /* 0x08 */
1399     U32                     ImageSize;                  /* 0x0C */
1400 } MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
1401   Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
1402
1403
1404 /* MPI v2.5 FWUpload Request message */
1405 typedef struct _MPI25_FW_UPLOAD_REQUEST
1406 {
1407     U8                      ImageType;                  /* 0x00 */
1408     U8                      Reserved1;                  /* 0x01 */
1409     U8                      ChainOffset;                /* 0x02 */
1410     U8                      Function;                   /* 0x03 */
1411     U16                     Reserved2;                  /* 0x04 */
1412     U8                      Reserved3;                  /* 0x06 */
1413     U8                      MsgFlags;                   /* 0x07 */
1414     U8                      VP_ID;                      /* 0x08 */
1415     U8                      VF_ID;                      /* 0x09 */
1416     U16                     Reserved4;                  /* 0x0A */
1417     U32                     Reserved5;                  /* 0x0C */
1418     U32                     Reserved6;                  /* 0x10 */
1419     U32                     Reserved7;                  /* 0x14 */
1420     U32                     ImageOffset;                /* 0x18 */
1421     U32                     ImageSize;                  /* 0x1C */
1422     MPI25_SGE_IO_UNION      SGL;                        /* 0x20 */
1423 } MPI25_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_UPLOAD_REQUEST,
1424   Mpi25FWUploadRequest_t, MPI2_POINTER pMpi25FWUploadRequest_t;
1425
1426
1427 /* FWUpload Reply message */
1428 typedef struct _MPI2_FW_UPLOAD_REPLY
1429 {
1430     U8                      ImageType;                  /* 0x00 */
1431     U8                      Reserved1;                  /* 0x01 */
1432     U8                      MsgLength;                  /* 0x02 */
1433     U8                      Function;                   /* 0x03 */
1434     U16                     Reserved2;                  /* 0x04 */
1435     U8                      Reserved3;                  /* 0x06 */
1436     U8                      MsgFlags;                   /* 0x07 */
1437     U8                      VP_ID;                      /* 0x08 */
1438     U8                      VF_ID;                      /* 0x09 */
1439     U16                     Reserved4;                  /* 0x0A */
1440     U16                     Reserved5;                  /* 0x0C */
1441     U16                     IOCStatus;                  /* 0x0E */
1442     U32                     IOCLogInfo;                 /* 0x10 */
1443     U32                     ActualImageSize;            /* 0x14 */
1444 } MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
1445   Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
1446
1447
1448 /* FW Image Header */
1449 typedef struct _MPI2_FW_IMAGE_HEADER
1450 {
1451     U32                     Signature;                  /* 0x00 */
1452     U32                     Signature0;                 /* 0x04 */
1453     U32                     Signature1;                 /* 0x08 */
1454     U32                     Signature2;                 /* 0x0C */
1455     MPI2_VERSION_UNION      MPIVersion;                 /* 0x10 */
1456     MPI2_VERSION_UNION      FWVersion;                  /* 0x14 */
1457     MPI2_VERSION_UNION      NVDATAVersion;              /* 0x18 */
1458     MPI2_VERSION_UNION      PackageVersion;             /* 0x1C */
1459     U16                     VendorID;                   /* 0x20 */
1460     U16                     ProductID;                  /* 0x22 */
1461     U16                     ProtocolFlags;              /* 0x24 */
1462     U16                     Reserved26;                 /* 0x26 */
1463     U32                     IOCCapabilities;            /* 0x28 */
1464     U32                     ImageSize;                  /* 0x2C */
1465     U32                     NextImageHeaderOffset;      /* 0x30 */
1466     U32                     Checksum;                   /* 0x34 */
1467     U32                     Reserved38;                 /* 0x38 */
1468     U32                     Reserved3C;                 /* 0x3C */
1469     U32                     Reserved40;                 /* 0x40 */
1470     U32                     Reserved44;                 /* 0x44 */
1471     U32                     Reserved48;                 /* 0x48 */
1472     U32                     Reserved4C;                 /* 0x4C */
1473     U32                     Reserved50;                 /* 0x50 */
1474     U32                     Reserved54;                 /* 0x54 */
1475     U32                     Reserved58;                 /* 0x58 */
1476     U32                     Reserved5C;                 /* 0x5C */
1477     U32                     BootFlags;                 /* 0x60 */ /* reserved in  MPI v2.5 and earlier */
1478     U32                     FirmwareVersionNameWhat;    /* 0x64 */
1479     U8                      FirmwareVersionName[32];    /* 0x68 */
1480     U32                     VendorNameWhat;             /* 0x88 */
1481     U8                      VendorName[32];             /* 0x8C */
1482     U32                     PackageNameWhat;            /* 0x88 */
1483     U8                      PackageName[32];            /* 0x8C */
1484     U32                     ReservedD0;                 /* 0xD0 */
1485     U32                     ReservedD4;                 /* 0xD4 */
1486     U32                     ReservedD8;                 /* 0xD8 */
1487     U32                     ReservedDC;                 /* 0xDC */
1488     U32                     ReservedE0;                 /* 0xE0 */
1489     U32                     ReservedE4;                 /* 0xE4 */
1490     U32                     ReservedE8;                 /* 0xE8 */
1491     U32                     ReservedEC;                 /* 0xEC */
1492     U32                     ReservedF0;                 /* 0xF0 */
1493     U32                     ReservedF4;                 /* 0xF4 */
1494     U32                     ReservedF8;                 /* 0xF8 */
1495     U32                     ReservedFC;                 /* 0xFC */
1496 } MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1497   Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1498
1499 /* Signature field */
1500 #define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1501 #define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1502 #define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1503 #define MPI26_FW_HEADER_SIGNATURE               (0xEB000000)
1504
1505 /* Signature0 field */
1506 #define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1507 #define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1508 #define MPI26_FW_HEADER_SIGNATURE0_BASE         (0x5AEAA500)    /* Last byte is defined by architecture */
1509 #define MPI26_FW_HEADER_SIGNATURE0_ARC_0        (0x5A)
1510 #define MPI26_FW_HEADER_SIGNATURE0_ARC_1        (0x00)
1511 #define MPI26_FW_HEADER_SIGNATURE0_ARC_2        (0x01)
1512 #define MPI26_FW_HEADER_SIGNATURE0              (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_0) // legacy (0x5AEAA55A)
1513 #define MPI26_FW_HEADER_SIGNATURE0_3516         (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_1)
1514
1515 /* Signature1 field */
1516 #define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1517 #define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1518 #define MPI26_FW_HEADER_SIGNATURE1              (0xA55AEAA5)
1519
1520 /* Signature2 field */
1521 #define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1522 #define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1523 #define MPI26_FW_HEADER_SIGNATURE2              (0x5AA55AEA)
1524
1525
1526 /* defines for using the ProductID field */
1527 #define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1528 #define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1529
1530 #define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1531 #define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
1532 #define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
1533 #define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
1534
1535
1536 #define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1537 /* SAS ProductID Family bits */
1538 #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
1539 #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
1540 #define MPI25_FW_HEADER_PID_FAMILY_3108_SAS     (0x0021)
1541 #define MPI26_FW_HEADER_PID_FAMILY_3324_SAS     (0x0028)
1542 #define MPI26_FW_HEADER_PID_FAMILY_3516_SAS     (0x0031)
1543
1544 /* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1545
1546 /* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1547
1548
1549 #define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1550 #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1551 #define MPI26_FW_HEADER_BOOTFLAGS_OFFSET        (0x60)
1552 #define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1553
1554 #define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1555
1556 #define MPI2_FW_HEADER_SIZE                     (0x100)
1557
1558
1559 /* Extended Image Header */
1560 typedef struct _MPI2_EXT_IMAGE_HEADER
1561
1562 {
1563     U8                      ImageType;                  /* 0x00 */
1564     U8                      Reserved1;                  /* 0x01 */
1565     U16                     Reserved2;                  /* 0x02 */
1566     U32                     Checksum;                   /* 0x04 */
1567     U32                     ImageSize;                  /* 0x08 */
1568     U32                     NextImageHeaderOffset;      /* 0x0C */
1569     U32                     PackageVersion;             /* 0x10 */
1570     U32                     Reserved3;                  /* 0x14 */
1571     U32                     Reserved4;                  /* 0x18 */
1572     U32                     Reserved5;                  /* 0x1C */
1573     U8                      IdentifyString[32];         /* 0x20 */
1574 } MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1575   Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1576
1577 /* useful offsets */
1578 #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1579 #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1580 #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1581
1582 #define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1583
1584 /* defines for the ImageType field */
1585 #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED             (0x00)
1586 #define MPI2_EXT_IMAGE_TYPE_FW                      (0x01)
1587 #define MPI2_EXT_IMAGE_TYPE_NVDATA                  (0x03)
1588 #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER              (0x04)
1589 #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION          (0x05)
1590 #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT            (0x06)
1591 #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES       (0x07)
1592 #define MPI2_EXT_IMAGE_TYPE_MEGARAID                (0x08)
1593 #define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH          (0x09) /* MPI v2.5 and newer */
1594 #define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
1595 #define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
1596
1597 #define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)  /* deprecated */
1598
1599
1600
1601 /* FLASH Layout Extended Image Data */
1602
1603 /*
1604  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1605  * one and check RegionsPerLayout at runtime.
1606  */
1607 #ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1608 #define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1609 #endif
1610
1611 /*
1612  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1613  * one and check NumberOfLayouts at runtime.
1614  */
1615 #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1616 #define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1617 #endif
1618
1619 typedef struct _MPI2_FLASH_REGION
1620 {
1621     U8                      RegionType;                 /* 0x00 */
1622     U8                      Reserved1;                  /* 0x01 */
1623     U16                     Reserved2;                  /* 0x02 */
1624     U32                     RegionOffset;               /* 0x04 */
1625     U32                     RegionSize;                 /* 0x08 */
1626     U32                     Reserved3;                  /* 0x0C */
1627 } MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1628   Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1629
1630 typedef struct _MPI2_FLASH_LAYOUT
1631 {
1632     U32                     FlashSize;                  /* 0x00 */
1633     U32                     Reserved1;                  /* 0x04 */
1634     U32                     Reserved2;                  /* 0x08 */
1635     U32                     Reserved3;                  /* 0x0C */
1636     MPI2_FLASH_REGION       Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1637 } MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1638   Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1639
1640 typedef struct _MPI2_FLASH_LAYOUT_DATA
1641 {
1642     U8                      ImageRevision;              /* 0x00 */
1643     U8                      Reserved1;                  /* 0x01 */
1644     U8                      SizeOfRegion;               /* 0x02 */
1645     U8                      Reserved2;                  /* 0x03 */
1646     U16                     NumberOfLayouts;            /* 0x04 */
1647     U16                     RegionsPerLayout;           /* 0x06 */
1648     U16                     MinimumSectorAlignment;     /* 0x08 */
1649     U16                     Reserved3;                  /* 0x0A */
1650     U32                     Reserved4;                  /* 0x0C */
1651     MPI2_FLASH_LAYOUT       Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1652 } MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1653   Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1654
1655 /* defines for the RegionType field */
1656 #define MPI2_FLASH_REGION_UNUSED                (0x00)
1657 #define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1658 #define MPI2_FLASH_REGION_BIOS                  (0x02)
1659 #define MPI2_FLASH_REGION_NVDATA                (0x03)
1660 #define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1661 #define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1662 #define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1663 #define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1664 #define MPI2_FLASH_REGION_MEGARAID              (0x09)
1665 #define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK     (0x0A)
1666 #define MPI2_FLASH_REGION_INIT                  (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK) /* older name */
1667 #define MPI2_FLASH_REGION_CBB_BACKUP            (0x0D)
1668
1669
1670 /* ImageRevision */
1671 #define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1672
1673
1674
1675 /* Supported Devices Extended Image Data */
1676
1677 /*
1678  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1679  * one and check NumberOfDevices at runtime.
1680  */
1681 #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1682 #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1683 #endif
1684
1685 typedef struct _MPI2_SUPPORTED_DEVICE
1686 {
1687     U16                     DeviceID;                   /* 0x00 */
1688     U16                     VendorID;                   /* 0x02 */
1689     U16                     DeviceIDMask;               /* 0x04 */
1690     U16                     Reserved1;                  /* 0x06 */
1691     U8                      LowPCIRev;                  /* 0x08 */
1692     U8                      HighPCIRev;                 /* 0x09 */
1693     U16                     Reserved2;                  /* 0x0A */
1694     U32                     Reserved3;                  /* 0x0C */
1695 } MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1696   Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1697
1698 typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1699 {
1700     U8                      ImageRevision;              /* 0x00 */
1701     U8                      Reserved1;                  /* 0x01 */
1702     U8                      NumberOfDevices;            /* 0x02 */
1703     U8                      Reserved2;                  /* 0x03 */
1704     U32                     Reserved3;                  /* 0x04 */
1705     MPI2_SUPPORTED_DEVICE   SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1706 } MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1707   Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1708
1709 /* ImageRevision */
1710 #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1711
1712
1713 /* Init Extended Image Data */
1714
1715 typedef struct _MPI2_INIT_IMAGE_FOOTER
1716
1717 {
1718     U32                     BootFlags;                  /* 0x00 */
1719     U32                     ImageSize;                  /* 0x04 */
1720     U32                     Signature0;                 /* 0x08 */
1721     U32                     Signature1;                 /* 0x0C */
1722     U32                     Signature2;                 /* 0x10 */
1723     U32                     ResetVector;                /* 0x14 */
1724 } MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1725   Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1726
1727 /* defines for the BootFlags field */
1728 #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1729
1730 /* defines for the ImageSize field */
1731 #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1732
1733 /* defines for the Signature0 field */
1734 #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1735 #define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1736
1737 /* defines for the Signature1 field */
1738 #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1739 #define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1740
1741 /* defines for the Signature2 field */
1742 #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1743 #define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1744
1745 /* Signature fields as individual bytes */
1746 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1747 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1748 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1749 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1750
1751 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1752 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1753 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1754 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1755
1756 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1757 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1758 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1759 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1760
1761 /* defines for the ResetVector field */
1762 #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1763
1764
1765 /* Encrypted Hash Extended Image Data */
1766
1767 typedef struct _MPI25_ENCRYPTED_HASH_ENTRY
1768 {
1769     U8                  HashImageType;          /* 0x00 */
1770     U8                  HashAlgorithm;          /* 0x01 */
1771     U8                  EncryptionAlgorithm;    /* 0x02 */
1772     U8                  Reserved1;              /* 0x03 */
1773     U32                 Reserved2;              /* 0x04 */
1774     U32                 EncryptedHash[1];       /* 0x08 */ /* variable length */
1775 } MPI25_ENCRYPTED_HASH_ENTRY, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_ENTRY,
1776   Mpi25EncryptedHashEntry_t, MPI2_POINTER pMpi25EncryptedHashEntry_t;
1777
1778 /* values for HashImageType */
1779 #define MPI25_HASH_IMAGE_TYPE_UNUSED            (0x00)
1780 #define MPI25_HASH_IMAGE_TYPE_FIRMWARE          (0x01)
1781 #define MPI25_HASH_IMAGE_TYPE_BIOS              (0x02)
1782
1783 /* values for HashAlgorithm */
1784 #define MPI25_HASH_ALGORITHM_UNUSED             (0x00)
1785 #define MPI25_HASH_ALGORITHM_SHA256             (0x01)
1786
1787 /* values for EncryptionAlgorithm */
1788 #define MPI25_ENCRYPTION_ALG_UNUSED             (0x00)
1789 #define MPI25_ENCRYPTION_ALG_RSA256             (0x01)
1790
1791 typedef struct _MPI25_ENCRYPTED_HASH_DATA
1792 {
1793     U8                              ImageVersion;           /* 0x00 */
1794     U8                              NumHash;                /* 0x01 */
1795     U16                             Reserved1;              /* 0x02 */
1796     U32                             Reserved2;              /* 0x04 */
1797     MPI25_ENCRYPTED_HASH_ENTRY      EncryptedHashEntry[1];  /* 0x08 */ /* variable number of entries */
1798 } MPI25_ENCRYPTED_HASH_DATA, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_DATA,
1799   Mpi25EncryptedHashData_t, MPI2_POINTER pMpi25EncryptedHashData_t;
1800
1801 /****************************************************************************
1802 *  PowerManagementControl message
1803 ****************************************************************************/
1804
1805 /* PowerManagementControl Request message */
1806 typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST
1807 {
1808     U8                      Feature;                    /* 0x00 */
1809     U8                      Reserved1;                  /* 0x01 */
1810     U8                      ChainOffset;                /* 0x02 */
1811     U8                      Function;                   /* 0x03 */
1812     U16                     Reserved2;                  /* 0x04 */
1813     U8                      Reserved3;                  /* 0x06 */
1814     U8                      MsgFlags;                   /* 0x07 */
1815     U8                      VP_ID;                      /* 0x08 */
1816     U8                      VF_ID;                      /* 0x09 */
1817     U16                     Reserved4;                  /* 0x0A */
1818     U8                      Parameter1;                 /* 0x0C */
1819     U8                      Parameter2;                 /* 0x0D */
1820     U8                      Parameter3;                 /* 0x0E */
1821     U8                      Parameter4;                 /* 0x0F */
1822     U32                     Reserved5;                  /* 0x10 */
1823     U32                     Reserved6;                  /* 0x14 */
1824 } MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
1825   Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t;
1826
1827 /* defines for the Feature field */
1828 #define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND       (0x01)
1829 #define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION   (0x02)
1830 #define MPI2_PM_CONTROL_FEATURE_PCIE_LINK               (0x03) /* obsolete */
1831 #define MPI2_PM_CONTROL_FEATURE_IOC_SPEED               (0x04)
1832 #define MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE    (0x05) /* reserved in MPI 2.0 */
1833 #define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC    (0x80)
1834 #define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC    (0xFF)
1835
1836 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
1837 /* Parameter1 contains a PHY number */
1838 /* Parameter2 indicates power condition action using these defines */
1839 #define MPI2_PM_CONTROL_PARAM2_PARTIAL                  (0x01)
1840 #define MPI2_PM_CONTROL_PARAM2_SLUMBER                  (0x02)
1841 #define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT            (0x03)
1842 /* Parameter3 and Parameter4 are reserved */
1843
1844 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION Feature */
1845 /* Parameter1 contains SAS port width modulation group number */
1846 /* Parameter2 indicates IOC action using these defines */
1847 #define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP        (0x01)
1848 #define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION        (0x02)
1849 #define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP     (0x03)
1850 /* Parameter3 indicates desired modulation level using these defines */
1851 #define MPI2_PM_CONTROL_PARAM3_25_PERCENT               (0x00)
1852 #define MPI2_PM_CONTROL_PARAM3_50_PERCENT               (0x01)
1853 #define MPI2_PM_CONTROL_PARAM3_75_PERCENT               (0x02)
1854 #define MPI2_PM_CONTROL_PARAM3_100_PERCENT              (0x03)
1855 /* Parameter4 is reserved */
1856
1857 /* this next set (_PCIE_LINK) is obsolete */
1858 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
1859 /* Parameter1 indicates desired PCIe link speed using these defines */
1860 #define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS            (0x00) /* obsolete */
1861 #define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS            (0x01) /* obsolete */
1862 #define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS            (0x02) /* obsolete */
1863 /* Parameter2 indicates desired PCIe link width using these defines */
1864 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X1                 (0x01) /* obsolete */
1865 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X2                 (0x02) /* obsolete */
1866 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X4                 (0x04) /* obsolete */
1867 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X8                 (0x08) /* obsolete */
1868 /* Parameter3 and Parameter4 are reserved */
1869
1870 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
1871 /* Parameter1 indicates desired IOC hardware clock speed using these defines */
1872 #define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED           (0x01)
1873 #define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED           (0x02)
1874 #define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED        (0x04)
1875 #define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED         (0x08)
1876 /* Parameter2, Parameter3, and Parameter4 are reserved */
1877
1878 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE Feature */
1879 /* Parameter1 indicates host action regarding global power management mode */
1880 #define MPI2_PM_CONTROL_PARAM1_TAKE_CONTROL             (0x01)
1881 #define MPI2_PM_CONTROL_PARAM1_CHANGE_GLOBAL_MODE       (0x02)
1882 #define MPI2_PM_CONTROL_PARAM1_RELEASE_CONTROL          (0x03)
1883 /* Parameter2 indicates the requested global power management mode */
1884 #define MPI2_PM_CONTROL_PARAM2_FULL_PWR_PERF            (0x01)
1885 #define MPI2_PM_CONTROL_PARAM2_REDUCED_PWR_PERF         (0x08)
1886 #define MPI2_PM_CONTROL_PARAM2_STANDBY                  (0x40)
1887 /* Parameter3 and Parameter4 are reserved */
1888
1889
1890 /* PowerManagementControl Reply message */
1891 typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY
1892 {
1893     U8                      Feature;                    /* 0x00 */
1894     U8                      Reserved1;                  /* 0x01 */
1895     U8                      MsgLength;                  /* 0x02 */
1896     U8                      Function;                   /* 0x03 */
1897     U16                     Reserved2;                  /* 0x04 */
1898     U8                      Reserved3;                  /* 0x06 */
1899     U8                      MsgFlags;                   /* 0x07 */
1900     U8                      VP_ID;                      /* 0x08 */
1901     U8                      VF_ID;                      /* 0x09 */
1902     U16                     Reserved4;                  /* 0x0A */
1903     U16                     Reserved5;                  /* 0x0C */
1904     U16                     IOCStatus;                  /* 0x0E */
1905     U32                     IOCLogInfo;                 /* 0x10 */
1906 } MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
1907   Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
1908
1909
1910 /****************************************************************************
1911 *  IO Unit Control messages (MPI v2.6 and later only.)
1912 ****************************************************************************/
1913
1914 /* IO Unit Control Request Message */
1915 typedef struct _MPI26_IOUNIT_CONTROL_REQUEST
1916 {
1917     U8                      Operation;          /* 0x00 */
1918     U8                      Reserved1;          /* 0x01 */
1919     U8                      ChainOffset;        /* 0x02 */
1920     U8                      Function;           /* 0x03 */
1921     U16                     DevHandle;          /* 0x04 */
1922     U8                      IOCParameter;       /* 0x06 */
1923     U8                      MsgFlags;           /* 0x07 */
1924     U8                      VP_ID;              /* 0x08 */
1925     U8                      VF_ID;              /* 0x09 */
1926     U16                     Reserved3;          /* 0x0A */
1927     U16                     Reserved4;          /* 0x0C */
1928     U8                      PhyNum;             /* 0x0E */
1929     U8                      PrimFlags;          /* 0x0F */
1930     U32                     Primitive;          /* 0x10 */
1931     U8                      LookupMethod;       /* 0x14 */
1932     U8                      Reserved5;          /* 0x15 */
1933     U16                     SlotNumber;         /* 0x16 */
1934     U64                     LookupAddress;      /* 0x18 */
1935     U32                     IOCParameterValue;  /* 0x20 */
1936     U32                     Reserved7;          /* 0x24 */
1937     U32                     Reserved8;          /* 0x28 */
1938 } MPI26_IOUNIT_CONTROL_REQUEST,
1939   MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REQUEST,
1940   Mpi26IoUnitControlRequest_t, MPI2_POINTER pMpi26IoUnitControlRequest_t;
1941
1942 /* values for the Operation field */
1943 #define MPI26_CTRL_OP_CLEAR_ALL_PERSISTENT              (0x02)
1944 #define MPI26_CTRL_OP_SAS_PHY_LINK_RESET                (0x06)
1945 #define MPI26_CTRL_OP_SAS_PHY_HARD_RESET                (0x07)
1946 #define MPI26_CTRL_OP_PHY_CLEAR_ERROR_LOG               (0x08)
1947 #define MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG              (0x09)
1948 #define MPI26_CTRL_OP_SAS_SEND_PRIMITIVE                (0x0A)
1949 #define MPI26_CTRL_OP_FORCE_FULL_DISCOVERY              (0x0B)
1950 #define MPI26_CTRL_OP_REMOVE_DEVICE                     (0x0D)
1951 #define MPI26_CTRL_OP_LOOKUP_MAPPING                    (0x0E)
1952 #define MPI26_CTRL_OP_SET_IOC_PARAMETER                 (0x0F)
1953 #define MPI26_CTRL_OP_ENABLE_FP_DEVICE                  (0x10)
1954 #define MPI26_CTRL_OP_DISABLE_FP_DEVICE                 (0x11)
1955 #define MPI26_CTRL_OP_ENABLE_FP_ALL                     (0x12)
1956 #define MPI26_CTRL_OP_DISABLE_FP_ALL                    (0x13)
1957 #define MPI26_CTRL_OP_DEV_ENABLE_NCQ                    (0x14)
1958 #define MPI26_CTRL_OP_DEV_DISABLE_NCQ                   (0x15)
1959 #define MPI26_CTRL_OP_SHUTDOWN                          (0x16)
1960 #define MPI26_CTRL_OP_DEV_ENABLE_PERSIST_CONNECTION     (0x17)
1961 #define MPI26_CTRL_OP_DEV_DISABLE_PERSIST_CONNECTION    (0x18)
1962 #define MPI26_CTRL_OP_DEV_CLOSE_PERSIST_CONNECTION      (0x19)
1963 #define MPI26_CTRL_OP_PRODUCT_SPECIFIC_MIN              (0x80)
1964
1965 /* values for the PrimFlags field */
1966 #define MPI26_CTRL_PRIMFLAGS_SINGLE                     (0x08)
1967 #define MPI26_CTRL_PRIMFLAGS_TRIPLE                     (0x02)
1968 #define MPI26_CTRL_PRIMFLAGS_REDUNDANT                  (0x01)
1969
1970 /* values for the LookupMethod field */
1971 #define MPI26_CTRL_LOOKUP_METHOD_WWID_ADDRESS           (0x01)
1972 #define MPI26_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT         (0x02)
1973 #define MPI26_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME        (0x03)
1974
1975
1976 /* IO Unit Control Reply Message */
1977 typedef struct _MPI26_IOUNIT_CONTROL_REPLY
1978 {
1979     U8                      Operation;          /* 0x00 */
1980     U8                      Reserved1;          /* 0x01 */
1981     U8                      MsgLength;          /* 0x02 */
1982     U8                      Function;           /* 0x03 */
1983     U16                     DevHandle;          /* 0x04 */
1984     U8                      IOCParameter;       /* 0x06 */
1985     U8                      MsgFlags;           /* 0x07 */
1986     U8                      VP_ID;              /* 0x08 */
1987     U8                      VF_ID;              /* 0x09 */
1988     U16                     Reserved3;          /* 0x0A */
1989     U16                     Reserved4;          /* 0x0C */
1990     U16                     IOCStatus;          /* 0x0E */
1991     U32                     IOCLogInfo;         /* 0x10 */
1992 } MPI26_IOUNIT_CONTROL_REPLY, MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REPLY,
1993   Mpi26IoUnitControlReply_t, MPI2_POINTER pMpi26IoUnitControlReply_t;
1994
1995
1996 #endif
1997