2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2015 Avago Technologies
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 /* Communications core for Avago Technologies (LSI) MPT2 */
38 /* TODO Move headers to mpsvar */
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/selinfo.h>
45 #include <sys/mutex.h>
46 #include <sys/module.h>
50 #include <sys/malloc.h>
52 #include <sys/sysctl.h>
53 #include <sys/queue.h>
54 #include <sys/kthread.h>
55 #include <sys/taskqueue.h>
56 #include <sys/endian.h>
57 #include <sys/eventhandler.h>
59 #include <machine/bus.h>
60 #include <machine/resource.h>
64 #include <dev/pci/pcivar.h>
67 #include <cam/scsi/scsi_all.h>
69 #include <dev/mps/mpi/mpi2_type.h>
70 #include <dev/mps/mpi/mpi2.h>
71 #include <dev/mps/mpi/mpi2_ioc.h>
72 #include <dev/mps/mpi/mpi2_sas.h>
73 #include <dev/mps/mpi/mpi2_cnfg.h>
74 #include <dev/mps/mpi/mpi2_init.h>
75 #include <dev/mps/mpi/mpi2_tool.h>
76 #include <dev/mps/mps_ioctl.h>
77 #include <dev/mps/mpsvar.h>
78 #include <dev/mps/mps_table.h>
80 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag);
81 static int mps_init_queues(struct mps_softc *sc);
82 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag);
83 static int mps_transition_operational(struct mps_softc *sc);
84 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching);
85 static void mps_iocfacts_free(struct mps_softc *sc);
86 static void mps_startup(void *arg);
87 static int mps_send_iocinit(struct mps_softc *sc);
88 static int mps_alloc_queues(struct mps_softc *sc);
89 static int mps_alloc_replies(struct mps_softc *sc);
90 static int mps_alloc_requests(struct mps_softc *sc);
91 static int mps_attach_log(struct mps_softc *sc);
92 static __inline void mps_complete_command(struct mps_softc *sc,
93 struct mps_command *cm);
94 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
95 MPI2_EVENT_NOTIFICATION_REPLY *reply);
96 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
97 static void mps_periodic(void *);
98 static int mps_reregister_events(struct mps_softc *sc);
99 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
100 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
101 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag);
102 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
104 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
107 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
108 * any state and back to its initialization state machine.
110 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
112 /* Added this union to smoothly convert le64toh cm->cm_desc.Words.
113 * Compiler only support unint64_t to be passed as argument.
114 * Otherwise it will through below error
115 * "aggregate value used where an integer was expected"
118 typedef union _reply_descriptor {
124 }reply_descriptor,address_descriptor;
126 /* Rate limit chain-fail messages to 1 per minute */
127 static struct timeval mps_chainfail_interval = { 60, 0 };
130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
131 * If this function is called from process context, it can sleep
132 * and there is no harm to sleep, in case if this fuction is called
133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
134 * based on sleep flags driver will call either msleep, pause or DELAY.
135 * msleep and pause are of same variant, but pause is used when mps_mtx
136 * is not hold by driver.
140 mps_diag_reset(struct mps_softc *sc,int sleep_flag)
143 int i, error, tries = 0;
144 uint8_t first_wait_done = FALSE;
146 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
148 /* Clear any pending interrupts */
149 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
151 /*Force NO_SLEEP for threads prohibited to sleep
152 * e.a Thread from interrupt handler are prohibited to sleep.
154 if (curthread->td_no_sleeping != 0)
155 sleep_flag = NO_SLEEP;
157 /* Push the magic sequence */
159 while (tries++ < 20) {
160 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
161 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
162 mpt2_reset_magic[i]);
164 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
165 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
167 else if (sleep_flag == CAN_SLEEP)
168 pause("mpsdiag", hz/10);
172 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
173 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
181 /* Send the actual reset. XXX need to refresh the reg? */
182 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
183 reg | MPI2_DIAG_RESET_ADAPTER);
185 /* Wait up to 300 seconds in 50ms intervals */
187 for (i = 0; i < 6000; i++) {
189 * Wait 50 msec. If this is the first time through, wait 256
190 * msec to satisfy Diag Reset timing requirements.
192 if (first_wait_done) {
193 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
194 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
196 else if (sleep_flag == CAN_SLEEP)
197 pause("mpsdiag", hz/20);
202 first_wait_done = TRUE;
205 * Check for the RESET_ADAPTER bit to be cleared first, then
206 * wait for the RESET state to be cleared, which takes a little
209 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
210 if (reg & MPI2_DIAG_RESET_ADAPTER) {
213 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
214 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
222 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
228 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag)
233 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
234 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
235 MPI2_DOORBELL_FUNCTION_SHIFT);
237 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) {
238 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed : <%s>\n",
247 mps_transition_ready(struct mps_softc *sc)
250 int error, tries = 0;
254 /* If we are in attach call, do not sleep */
255 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE)
256 ? CAN_SLEEP:NO_SLEEP;
258 while (tries++ < 1200) {
259 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
260 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
263 * Ensure the IOC is ready to talk. If it's not, try
266 if (reg & MPI2_DOORBELL_USED) {
267 mps_diag_reset(sc, sleep_flags);
272 /* Is the adapter owned by another peer? */
273 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
274 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
275 device_printf(sc->mps_dev, "IOC is under the control "
276 "of another peer host, aborting initialization.\n");
280 state = reg & MPI2_IOC_STATE_MASK;
281 if (state == MPI2_IOC_STATE_READY) {
285 } else if (state == MPI2_IOC_STATE_FAULT) {
286 mps_dprint(sc, MPS_FAULT, "IOC in fault state 0x%x, resetting\n",
287 state & MPI2_DOORBELL_FAULT_CODE_MASK);
288 mps_diag_reset(sc, sleep_flags);
289 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
290 /* Need to take ownership */
291 mps_message_unit_reset(sc, sleep_flags);
292 } else if (state == MPI2_IOC_STATE_RESET) {
293 /* Wait a bit, IOC might be in transition */
294 mps_dprint(sc, MPS_FAULT,
295 "IOC in unexpected reset state\n");
297 mps_dprint(sc, MPS_FAULT,
298 "IOC in unknown state 0x%x\n", state);
303 /* Wait 50ms for things to settle down. */
308 device_printf(sc->mps_dev, "Cannot transition IOC to ready\n");
314 mps_transition_operational(struct mps_softc *sc)
322 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
323 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
325 state = reg & MPI2_IOC_STATE_MASK;
326 if (state != MPI2_IOC_STATE_READY) {
327 if ((error = mps_transition_ready(sc)) != 0) {
328 mps_dprint(sc, MPS_FAULT,
329 "%s failed to transition ready\n", __func__);
334 error = mps_send_iocinit(sc);
339 * This is called during attach and when re-initializing due to a Diag Reset.
340 * IOC Facts is used to allocate many of the structures needed by the driver.
341 * If called from attach, de-allocation is not required because the driver has
342 * not allocated any structures yet, but if called from a Diag Reset, previously
343 * allocated structures based on IOC Facts will need to be freed and re-
344 * allocated bases on the latest IOC Facts.
347 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching)
350 Mpi2IOCFactsReply_t saved_facts;
351 uint8_t saved_mode, reallocating;
353 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
355 /* Save old IOC Facts and then only reallocate if Facts have changed */
357 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
361 * Get IOC Facts. In all cases throughout this function, panic if doing
362 * a re-initialization and only return the error if attaching so the OS
365 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) {
367 mps_dprint(sc, MPS_FAULT, "%s failed to get IOC Facts "
368 "with error %d\n", __func__, error);
371 panic("%s failed to get IOC Facts with error %d\n",
376 mps_print_iocfacts(sc, sc->facts);
378 snprintf(sc->fw_version, sizeof(sc->fw_version),
379 "%02d.%02d.%02d.%02d",
380 sc->facts->FWVersion.Struct.Major,
381 sc->facts->FWVersion.Struct.Minor,
382 sc->facts->FWVersion.Struct.Unit,
383 sc->facts->FWVersion.Struct.Dev);
385 mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
387 mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
388 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
389 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
390 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
393 * If the chip doesn't support event replay then a hard reset will be
394 * required to trigger a full discovery. Do the reset here then
395 * retransition to Ready. A hard reset might have already been done,
396 * but it doesn't hurt to do it again. Only do this if attaching, not
400 if ((sc->facts->IOCCapabilities &
401 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
402 mps_diag_reset(sc, NO_SLEEP);
403 if ((error = mps_transition_ready(sc)) != 0) {
404 mps_dprint(sc, MPS_FAULT, "%s failed to "
405 "transition to ready with error %d\n",
413 * Set flag if IR Firmware is loaded. If the RAID Capability has
414 * changed from the previous IOC Facts, log a warning, but only if
415 * checking this after a Diag Reset and not during attach.
417 saved_mode = sc->ir_firmware;
418 if (sc->facts->IOCCapabilities &
419 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
422 if (sc->ir_firmware != saved_mode) {
423 mps_dprint(sc, MPS_FAULT, "%s new IR/IT mode in IOC "
424 "Facts does not match previous mode\n", __func__);
428 /* Only deallocate and reallocate if relevant IOC Facts have changed */
429 reallocating = FALSE;
431 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
432 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
433 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
434 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
435 (saved_facts.ProductID != sc->facts->ProductID) ||
436 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
437 (saved_facts.IOCRequestFrameSize !=
438 sc->facts->IOCRequestFrameSize) ||
439 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
440 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
441 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
442 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
443 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
444 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
445 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
446 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
447 (saved_facts.MaxPersistentEntries !=
448 sc->facts->MaxPersistentEntries))) {
453 * Some things should be done if attaching or re-allocating after a Diag
454 * Reset, but are not needed after a Diag Reset if the FW has not
457 if (attaching || reallocating) {
459 * Check if controller supports FW diag buffers and set flag to
462 if (sc->facts->IOCCapabilities &
463 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
464 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
466 if (sc->facts->IOCCapabilities &
467 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
468 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
470 if (sc->facts->IOCCapabilities &
471 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
472 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
476 * Set flag if EEDP is supported and if TLR is supported.
478 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
479 sc->eedp_enabled = TRUE;
480 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
481 sc->control_TLR = TRUE;
484 * Size the queues. Since the reply queues always need one free
485 * entry, we'll just deduct one reply message here.
487 sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit);
488 sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES,
489 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
492 * Initialize all Tail Queues
494 TAILQ_INIT(&sc->req_list);
495 TAILQ_INIT(&sc->high_priority_req_list);
496 TAILQ_INIT(&sc->chain_list);
497 TAILQ_INIT(&sc->tm_list);
501 * If doing a Diag Reset and the FW is significantly different
502 * (reallocating will be set above in IOC Facts comparison), then all
503 * buffers based on the IOC Facts will need to be freed before they are
507 mps_iocfacts_free(sc);
508 mpssas_realloc_targets(sc, saved_facts.MaxTargets);
512 * Any deallocation has been completed. Now start reallocating
513 * if needed. Will only need to reallocate if attaching or if the new
514 * IOC Facts are different from the previous IOC Facts after a Diag
515 * Reset. Targets have already been allocated above if needed.
517 if (attaching || reallocating) {
518 if (((error = mps_alloc_queues(sc)) != 0) ||
519 ((error = mps_alloc_replies(sc)) != 0) ||
520 ((error = mps_alloc_requests(sc)) != 0)) {
522 mps_dprint(sc, MPS_FAULT, "%s failed to alloc "
523 "queues with error %d\n", __func__, error);
527 panic("%s failed to alloc queues with error "
528 "%d\n", __func__, error);
533 /* Always initialize the queues */
534 bzero(sc->free_queue, sc->fqdepth * 4);
538 * Always get the chip out of the reset state, but only panic if not
539 * attaching. If attaching and there is an error, that is handled by
542 error = mps_transition_operational(sc);
545 mps_printf(sc, "%s failed to transition to operational "
546 "with error %d\n", __func__, error);
550 panic("%s failed to transition to operational with "
551 "error %d\n", __func__, error);
556 * Finish the queue initialization.
557 * These are set here instead of in mps_init_queues() because the
558 * IOC resets these values during the state transition in
559 * mps_transition_operational(). The free index is set to 1
560 * because the corresponding index in the IOC is set to 0, and the
561 * IOC treats the queues as full if both are set to the same value.
562 * Hence the reason that the queue can't hold all of the possible
565 sc->replypostindex = 0;
566 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
567 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
570 * Attach the subsystems so they can prepare their event masks.
572 /* XXX Should be dynamic so that IM/IR and user modules can attach */
574 if (((error = mps_attach_log(sc)) != 0) ||
575 ((error = mps_attach_sas(sc)) != 0) ||
576 ((error = mps_attach_user(sc)) != 0)) {
577 mps_printf(sc, "%s failed to attach all subsystems: "
578 "error %d\n", __func__, error);
583 if ((error = mps_pci_setup_interrupts(sc)) != 0) {
584 mps_printf(sc, "%s failed to setup interrupts\n",
592 * Set flag if this is a WD controller. This shouldn't ever change, but
593 * reset it after a Diag Reset, just in case.
595 sc->WD_available = FALSE;
596 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200)
597 sc->WD_available = TRUE;
603 * This is called if memory is being free (during detach for example) and when
604 * buffers need to be reallocated due to a Diag Reset.
607 mps_iocfacts_free(struct mps_softc *sc)
609 struct mps_command *cm;
612 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
614 if (sc->free_busaddr != 0)
615 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
616 if (sc->free_queue != NULL)
617 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
619 if (sc->queues_dmat != NULL)
620 bus_dma_tag_destroy(sc->queues_dmat);
622 if (sc->chain_busaddr != 0)
623 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
624 if (sc->chain_frames != NULL)
625 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
627 if (sc->chain_dmat != NULL)
628 bus_dma_tag_destroy(sc->chain_dmat);
630 if (sc->sense_busaddr != 0)
631 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
632 if (sc->sense_frames != NULL)
633 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
635 if (sc->sense_dmat != NULL)
636 bus_dma_tag_destroy(sc->sense_dmat);
638 if (sc->reply_busaddr != 0)
639 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
640 if (sc->reply_frames != NULL)
641 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
643 if (sc->reply_dmat != NULL)
644 bus_dma_tag_destroy(sc->reply_dmat);
646 if (sc->req_busaddr != 0)
647 bus_dmamap_unload(sc->req_dmat, sc->req_map);
648 if (sc->req_frames != NULL)
649 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
650 if (sc->req_dmat != NULL)
651 bus_dma_tag_destroy(sc->req_dmat);
653 if (sc->chains != NULL)
654 free(sc->chains, M_MPT2);
655 if (sc->commands != NULL) {
656 for (i = 1; i < sc->num_reqs; i++) {
657 cm = &sc->commands[i];
658 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
660 free(sc->commands, M_MPT2);
662 if (sc->buffer_dmat != NULL)
663 bus_dma_tag_destroy(sc->buffer_dmat);
667 * The terms diag reset and hard reset are used interchangeably in the MPI
668 * docs to mean resetting the controller chip. In this code diag reset
669 * cleans everything up, and the hard reset function just sends the reset
670 * sequence to the chip. This should probably be refactored so that every
671 * subsystem gets a reset notification of some sort, and can clean up
675 mps_reinit(struct mps_softc *sc)
678 struct mpssas_softc *sassc;
684 mtx_assert(&sc->mps_mtx, MA_OWNED);
686 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
687 mps_dprint(sc, MPS_INIT, "%s reset already in progress\n",
692 mps_dprint(sc, MPS_INFO, "Reinitializing controller,\n");
693 /* make sure the completion callbacks can recognize they're getting
694 * a NULL cm_reply due to a reset.
696 sc->mps_flags |= MPS_FLAGS_DIAGRESET;
699 * Mask interrupts here.
701 mps_dprint(sc, MPS_INIT, "%s mask interrupts\n", __func__);
704 error = mps_diag_reset(sc, CAN_SLEEP);
706 /* XXXSL No need to panic here */
707 panic("%s hard reset failed with error %d\n",
711 /* Restore the PCI state, including the MSI-X registers */
714 /* Give the I/O subsystem special priority to get itself prepared */
715 mpssas_handle_reinit(sc);
718 * Get IOC Facts and allocate all structures based on this information.
719 * The attach function will also call mps_iocfacts_allocate at startup.
720 * If relevant values have changed in IOC Facts, this function will free
721 * all of the memory based on IOC Facts and reallocate that memory.
723 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) {
724 panic("%s IOC Facts based allocation failed with error %d\n",
729 * Mapping structures will be re-allocated after getting IOC Page8, so
730 * free these structures here.
732 mps_mapping_exit(sc);
735 * The static page function currently read is IOC Page8. Others can be
736 * added in future. It's possible that the values in IOC Page8 have
737 * changed after a Diag Reset due to user modification, so always read
738 * these. Interrupts are masked, so unmask them before getting config
742 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
743 mps_base_static_config_pages(sc);
746 * Some mapping info is based in IOC Page8 data, so re-initialize the
749 mps_mapping_initialize(sc);
752 * Restart will reload the event masks clobbered by the reset, and
753 * then enable the port.
755 mps_reregister_events(sc);
757 /* the end of discovery will release the simq, so we're done. */
758 mps_dprint(sc, MPS_INFO, "%s finished sc %p post %u free %u\n",
759 __func__, sc, sc->replypostindex, sc->replyfreeindex);
761 mpssas_release_simq_reinit(sassc);
766 /* Wait for the chip to ACK a word that we've put into its FIFO
767 * Wait for <timeout> seconds. In single loop wait for busy loop
768 * for 500 microseconds.
769 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
772 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag)
780 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
782 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
783 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
784 mps_dprint(sc, MPS_INIT,
785 "%s: successfull count(%d), timeout(%d)\n",
786 __func__, count, timeout);
788 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
789 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
790 if ((doorbell & MPI2_IOC_STATE_MASK) ==
791 MPI2_IOC_STATE_FAULT) {
792 mps_dprint(sc, MPS_FAULT,
793 "fault_state(0x%04x)!\n", doorbell);
796 } else if (int_status == 0xFFFFFFFF)
799 /* If it can sleep, sleep for 1 milisecond, else busy loop for
801 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
802 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
804 else if (sleep_flag == CAN_SLEEP)
805 pause("mpsdba", hz/1000);
812 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), "
813 "int_status(%x)!\n", __func__, count, int_status);
818 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
820 mps_wait_db_int(struct mps_softc *sc)
824 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
825 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
826 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
833 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
835 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
836 int req_sz, int reply_sz, int timeout)
840 int i, count, ioc_sz, residual;
841 int sleep_flags = CAN_SLEEP;
843 if (curthread->td_no_sleeping != 0)
844 sleep_flags = NO_SLEEP;
847 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
850 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
854 * Announce that a message is coming through the doorbell. Messages
855 * are pushed at 32bit words, so round up if needed.
857 count = (req_sz + 3) / 4;
858 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
859 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
860 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
863 if (mps_wait_db_int(sc) ||
864 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
865 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
868 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
869 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
870 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
875 /* Clock out the message data synchronously in 32-bit dwords*/
876 data32 = (uint32_t *)req;
877 for (i = 0; i < count; i++) {
878 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
879 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
880 mps_dprint(sc, MPS_FAULT,
881 "Timeout while writing doorbell\n");
887 /* Clock in the reply in 16-bit words. The total length of the
888 * message is always in the 4th byte, so clock out the first 2 words
889 * manually, then loop the rest.
891 data16 = (uint16_t *)reply;
892 if (mps_wait_db_int(sc) != 0) {
893 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
897 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
898 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
899 if (mps_wait_db_int(sc) != 0) {
900 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
904 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
905 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
907 /* Number of 32bit words in the message */
908 ioc_sz = reply->MsgLength;
911 * Figure out how many 16bit words to clock in without overrunning.
912 * The precision loss with dividing reply_sz can safely be
913 * ignored because the messages can only be multiples of 32bits.
916 count = MIN((reply_sz / 4), ioc_sz) * 2;
917 if (count < ioc_sz * 2) {
918 residual = ioc_sz * 2 - count;
919 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d "
920 "residual message words\n", residual);
923 for (i = 2; i < count; i++) {
924 if (mps_wait_db_int(sc) != 0) {
925 mps_dprint(sc, MPS_FAULT,
926 "Timeout reading doorbell %d\n", i);
929 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
930 MPI2_DOORBELL_DATA_MASK;
931 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
935 * Pull out residual words that won't fit into the provided buffer.
936 * This keeps the chip from hanging due to a driver programming
940 if (mps_wait_db_int(sc) != 0) {
941 mps_dprint(sc, MPS_FAULT,
942 "Timeout reading doorbell\n");
945 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
946 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
950 if (mps_wait_db_int(sc) != 0) {
951 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
954 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
955 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
956 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
962 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
966 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n",
967 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
969 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
970 mtx_assert(&sc->mps_mtx, MA_OWNED);
972 if (++sc->io_cmds_active > sc->io_cmds_highwater)
973 sc->io_cmds_highwater++;
974 rd.u.low = cm->cm_desc.Words.Low;
975 rd.u.high = cm->cm_desc.Words.High;
976 rd.word = htole64(rd.word);
977 /* TODO-We may need to make below regwrite atomic */
978 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
980 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
985 * Just the FACTS, ma'am.
988 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
990 MPI2_DEFAULT_REPLY *reply;
991 MPI2_IOC_FACTS_REQUEST request;
992 int error, req_sz, reply_sz;
996 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
997 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
998 reply = (MPI2_DEFAULT_REPLY *)facts;
1000 bzero(&request, req_sz);
1001 request.Function = MPI2_FUNCTION_IOC_FACTS;
1002 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1008 mps_send_iocinit(struct mps_softc *sc)
1010 MPI2_IOC_INIT_REQUEST init;
1011 MPI2_DEFAULT_REPLY reply;
1012 int req_sz, reply_sz, error;
1014 uint64_t time_in_msec;
1018 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1019 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1020 bzero(&init, req_sz);
1021 bzero(&reply, reply_sz);
1024 * Fill in the init block. Note that most addresses are
1025 * deliberately in the lower 32bits of memory. This is a micro-
1026 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1028 init.Function = MPI2_FUNCTION_IOC_INIT;
1029 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1030 init.MsgVersion = htole16(MPI2_VERSION);
1031 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1032 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1033 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1034 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1035 init.SenseBufferAddressHigh = 0;
1036 init.SystemReplyAddressHigh = 0;
1037 init.SystemRequestFrameBaseAddress.High = 0;
1038 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr);
1039 init.ReplyDescriptorPostQueueAddress.High = 0;
1040 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr);
1041 init.ReplyFreeQueueAddress.High = 0;
1042 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1044 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1045 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1046 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1048 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1049 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1052 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1057 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1062 *addr = segs[0].ds_addr;
1066 mps_alloc_queues(struct mps_softc *sc)
1068 bus_addr_t queues_busaddr;
1070 int qsize, fqsize, pqsize;
1073 * The reply free queue contains 4 byte entries in multiples of 16 and
1074 * aligned on a 16 byte boundary. There must always be an unused entry.
1075 * This queue supplies fresh reply frames for the firmware to use.
1077 * The reply descriptor post queue contains 8 byte entries in
1078 * multiples of 16 and aligned on a 16 byte boundary. This queue
1079 * contains filled-in reply frames sent from the firmware to the host.
1081 * These two queues are allocated together for simplicity.
1083 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
1084 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
1085 fqsize= sc->fqdepth * 4;
1086 pqsize = sc->pqdepth * 8;
1087 qsize = fqsize + pqsize;
1089 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1090 16, 0, /* algnmnt, boundary */
1091 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1092 BUS_SPACE_MAXADDR, /* highaddr */
1093 NULL, NULL, /* filter, filterarg */
1094 qsize, /* maxsize */
1096 qsize, /* maxsegsize */
1098 NULL, NULL, /* lockfunc, lockarg */
1099 &sc->queues_dmat)) {
1100 device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n");
1103 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1105 device_printf(sc->mps_dev, "Cannot allocate queues memory\n");
1108 bzero(queues, qsize);
1109 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1110 mps_memaddr_cb, &queues_busaddr, 0);
1112 sc->free_queue = (uint32_t *)queues;
1113 sc->free_busaddr = queues_busaddr;
1114 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1115 sc->post_busaddr = queues_busaddr + fqsize;
1121 mps_alloc_replies(struct mps_softc *sc)
1123 int rsize, num_replies;
1126 * sc->num_replies should be one less than sc->fqdepth. We need to
1127 * allocate space for sc->fqdepth replies, but only sc->num_replies
1128 * replies can be used at once.
1130 num_replies = max(sc->fqdepth, sc->num_replies);
1132 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1133 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1134 4, 0, /* algnmnt, boundary */
1135 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1136 BUS_SPACE_MAXADDR, /* highaddr */
1137 NULL, NULL, /* filter, filterarg */
1138 rsize, /* maxsize */
1140 rsize, /* maxsegsize */
1142 NULL, NULL, /* lockfunc, lockarg */
1144 device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n");
1147 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1148 BUS_DMA_NOWAIT, &sc->reply_map)) {
1149 device_printf(sc->mps_dev, "Cannot allocate replies memory\n");
1152 bzero(sc->reply_frames, rsize);
1153 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1154 mps_memaddr_cb, &sc->reply_busaddr, 0);
1160 mps_alloc_requests(struct mps_softc *sc)
1162 struct mps_command *cm;
1163 struct mps_chain *chain;
1164 int i, rsize, nsegs;
1166 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1167 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1168 16, 0, /* algnmnt, boundary */
1169 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1170 BUS_SPACE_MAXADDR, /* highaddr */
1171 NULL, NULL, /* filter, filterarg */
1172 rsize, /* maxsize */
1174 rsize, /* maxsegsize */
1176 NULL, NULL, /* lockfunc, lockarg */
1178 device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n");
1181 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1182 BUS_DMA_NOWAIT, &sc->req_map)) {
1183 device_printf(sc->mps_dev, "Cannot allocate request memory\n");
1186 bzero(sc->req_frames, rsize);
1187 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1188 mps_memaddr_cb, &sc->req_busaddr, 0);
1190 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
1191 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1192 16, 0, /* algnmnt, boundary */
1193 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1194 BUS_SPACE_MAXADDR, /* highaddr */
1195 NULL, NULL, /* filter, filterarg */
1196 rsize, /* maxsize */
1198 rsize, /* maxsegsize */
1200 NULL, NULL, /* lockfunc, lockarg */
1202 device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n");
1205 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1206 BUS_DMA_NOWAIT, &sc->chain_map)) {
1207 device_printf(sc->mps_dev, "Cannot allocate chain memory\n");
1210 bzero(sc->chain_frames, rsize);
1211 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1212 mps_memaddr_cb, &sc->chain_busaddr, 0);
1214 rsize = MPS_SENSE_LEN * sc->num_reqs;
1215 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1216 1, 0, /* algnmnt, boundary */
1217 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1218 BUS_SPACE_MAXADDR, /* highaddr */
1219 NULL, NULL, /* filter, filterarg */
1220 rsize, /* maxsize */
1222 rsize, /* maxsegsize */
1224 NULL, NULL, /* lockfunc, lockarg */
1226 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
1229 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1230 BUS_DMA_NOWAIT, &sc->sense_map)) {
1231 device_printf(sc->mps_dev, "Cannot allocate sense memory\n");
1234 bzero(sc->sense_frames, rsize);
1235 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1236 mps_memaddr_cb, &sc->sense_busaddr, 0);
1238 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2,
1241 device_printf(sc->mps_dev,
1242 "Cannot allocate chains memory %s %d\n",
1243 __func__, __LINE__);
1246 for (i = 0; i < sc->max_chains; i++) {
1247 chain = &sc->chains[i];
1248 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1249 i * sc->facts->IOCRequestFrameSize * 4);
1250 chain->chain_busaddr = sc->chain_busaddr +
1251 i * sc->facts->IOCRequestFrameSize * 4;
1252 mps_free_chain(sc, chain);
1253 sc->chain_free_lowwater++;
1256 /* XXX Need to pick a more precise value */
1257 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1258 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1259 1, 0, /* algnmnt, boundary */
1260 BUS_SPACE_MAXADDR, /* lowaddr */
1261 BUS_SPACE_MAXADDR, /* highaddr */
1262 NULL, NULL, /* filter, filterarg */
1263 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1264 nsegs, /* nsegments */
1265 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */
1266 BUS_DMA_ALLOCNOW, /* flags */
1267 busdma_lock_mutex, /* lockfunc */
1268 &sc->mps_mtx, /* lockarg */
1269 &sc->buffer_dmat)) {
1270 device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n");
1275 * SMID 0 cannot be used as a free command per the firmware spec.
1276 * Just drop that command instead of risking accounting bugs.
1278 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
1279 M_MPT2, M_WAITOK | M_ZERO);
1281 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1282 __func__, __LINE__);
1285 for (i = 1; i < sc->num_reqs; i++) {
1286 cm = &sc->commands[i];
1287 cm->cm_req = sc->req_frames +
1288 i * sc->facts->IOCRequestFrameSize * 4;
1289 cm->cm_req_busaddr = sc->req_busaddr +
1290 i * sc->facts->IOCRequestFrameSize * 4;
1291 cm->cm_sense = &sc->sense_frames[i];
1292 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
1293 cm->cm_desc.Default.SMID = i;
1295 TAILQ_INIT(&cm->cm_chain_list);
1296 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
1298 /* XXX Is a failure here a critical problem? */
1299 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1300 if (i <= sc->facts->HighPriorityCredit)
1301 mps_free_high_priority_command(sc, cm);
1303 mps_free_command(sc, cm);
1305 panic("failed to allocate command %d\n", i);
1315 mps_init_queues(struct mps_softc *sc)
1319 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1322 * According to the spec, we need to use one less reply than we
1323 * have space for on the queue. So sc->num_replies (the number we
1324 * use) should be less than sc->fqdepth (allocated size).
1326 if (sc->num_replies >= sc->fqdepth)
1330 * Initialize all of the free queue entries.
1332 for (i = 0; i < sc->fqdepth; i++)
1333 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1334 sc->replyfreeindex = sc->num_replies;
1339 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
1340 * Next are the global settings, if they exist. Highest are the per-unit
1341 * settings, if they exist.
1344 mps_get_tunables(struct mps_softc *sc)
1348 /* XXX default to some debugging for now */
1349 sc->mps_debug = MPS_INFO|MPS_FAULT;
1350 sc->disable_msix = 0;
1351 sc->disable_msi = 0;
1352 sc->max_chains = MPS_CHAIN_FRAMES;
1353 sc->max_io_pages = MPS_MAXIO_PAGES;
1354 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD;
1355 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1359 * Grab the global variables.
1361 TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug);
1362 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
1363 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
1364 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
1365 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages);
1366 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu);
1367 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time);
1368 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum);
1370 /* Grab the unit-instance variables */
1371 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
1372 device_get_unit(sc->mps_dev));
1373 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug);
1375 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
1376 device_get_unit(sc->mps_dev));
1377 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1379 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
1380 device_get_unit(sc->mps_dev));
1381 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1383 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
1384 device_get_unit(sc->mps_dev));
1385 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1387 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages",
1388 device_get_unit(sc->mps_dev));
1389 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages);
1391 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1392 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids",
1393 device_get_unit(sc->mps_dev));
1394 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1396 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu",
1397 device_get_unit(sc->mps_dev));
1398 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1400 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time",
1401 device_get_unit(sc->mps_dev));
1402 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1404 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num",
1405 device_get_unit(sc->mps_dev));
1406 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum);
1410 mps_setup_sysctl(struct mps_softc *sc)
1412 struct sysctl_ctx_list *sysctl_ctx = NULL;
1413 struct sysctl_oid *sysctl_tree = NULL;
1414 char tmpstr[80], tmpstr2[80];
1417 * Setup the sysctl variable so the user can change the debug level
1420 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
1421 device_get_unit(sc->mps_dev));
1422 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
1424 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
1425 if (sysctl_ctx != NULL)
1426 sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
1428 if (sysctl_tree == NULL) {
1429 sysctl_ctx_init(&sc->sysctl_ctx);
1430 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1431 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
1432 CTLFLAG_RD, 0, tmpstr);
1433 if (sc->sysctl_tree == NULL)
1435 sysctl_ctx = &sc->sysctl_ctx;
1436 sysctl_tree = sc->sysctl_tree;
1439 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1440 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0,
1443 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1444 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1445 "Disable the use of MSI-X interrupts");
1447 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1448 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1449 "Disable the use of MSI interrupts");
1451 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1452 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version,
1453 strlen(sc->fw_version), "firmware version");
1455 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1456 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION,
1457 strlen(MPS_DRIVER_VERSION), "driver version");
1459 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1460 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1461 &sc->io_cmds_active, 0, "number of currently active commands");
1463 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1464 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1465 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1467 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1468 OID_AUTO, "chain_free", CTLFLAG_RD,
1469 &sc->chain_free, 0, "number of free chain elements");
1471 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1472 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1473 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1475 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1476 OID_AUTO, "max_chains", CTLFLAG_RD,
1477 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1479 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1480 OID_AUTO, "max_io_pages", CTLFLAG_RD,
1481 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use "
1484 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1485 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1486 "enable SSU to SATA SSD/HDD at shutdown");
1488 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1489 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1490 &sc->chain_alloc_fail, "chain allocation failures");
1492 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1493 OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1494 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1495 "spinup after SATA ID error");
1497 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1498 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1499 mps_mapping_dump, "A", "Mapping Table Dump");
1501 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1502 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1503 mps_mapping_encl_dump, "A", "Enclosure Table Dump");
1505 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1506 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0,
1507 "Use the phy number for enumeration");
1511 mps_attach(struct mps_softc *sc)
1515 mps_get_tunables(sc);
1519 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
1520 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
1521 TAILQ_INIT(&sc->event_list);
1522 timevalclear(&sc->lastfail);
1524 if ((error = mps_transition_ready(sc)) != 0) {
1525 mps_printf(sc, "%s failed to transition ready\n", __func__);
1529 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
1532 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1533 __func__, __LINE__);
1538 * Get IOC Facts and allocate all structures based on this information.
1539 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC
1540 * Facts. If relevant values have changed in IOC Facts, this function
1541 * will free all of the memory based on IOC Facts and reallocate that
1542 * memory. If this fails, any allocated memory should already be freed.
1544 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) {
1545 mps_dprint(sc, MPS_FAULT, "%s IOC Facts based allocation "
1546 "failed with error %d\n", __func__, error);
1550 /* Start the periodic watchdog check on the IOC Doorbell */
1554 * The portenable will kick off discovery events that will drive the
1555 * rest of the initialization process. The CAM/SAS module will
1556 * hold up the boot sequence until discovery is complete.
1558 sc->mps_ich.ich_func = mps_startup;
1559 sc->mps_ich.ich_arg = sc;
1560 if (config_intrhook_establish(&sc->mps_ich) != 0) {
1561 mps_dprint(sc, MPS_ERROR, "Cannot establish MPS config hook\n");
1566 * Allow IR to shutdown gracefully when shutdown occurs.
1568 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1569 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1571 if (sc->shutdown_eh == NULL)
1572 mps_dprint(sc, MPS_ERROR, "shutdown event registration "
1575 mps_setup_sysctl(sc);
1577 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
1582 /* Run through any late-start handlers. */
1584 mps_startup(void *arg)
1586 struct mps_softc *sc;
1588 sc = (struct mps_softc *)arg;
1591 mps_unmask_intr(sc);
1593 /* initialize device mapping tables */
1594 mps_base_static_config_pages(sc);
1595 mps_mapping_initialize(sc);
1600 /* Periodic watchdog. Is called with the driver lock already held. */
1602 mps_periodic(void *arg)
1604 struct mps_softc *sc;
1607 sc = (struct mps_softc *)arg;
1608 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
1611 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
1612 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1613 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1617 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
1621 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
1622 MPI2_EVENT_NOTIFICATION_REPLY *event)
1624 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1626 mps_print_event(sc, event);
1628 switch (event->Event) {
1629 case MPI2_EVENT_LOG_DATA:
1630 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1631 if (sc->mps_debug & MPS_EVENT)
1632 hexdump(event->EventData, event->EventDataLength, NULL, 0);
1634 case MPI2_EVENT_LOG_ENTRY_ADDED:
1635 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1636 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1637 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1638 entry->LogSequence);
1647 mps_attach_log(struct mps_softc *sc)
1649 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1652 setbit(events, MPI2_EVENT_LOG_DATA);
1653 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1655 mps_register_events(sc, events, mps_log_evt_handler, NULL,
1662 mps_detach_log(struct mps_softc *sc)
1665 if (sc->mps_log_eh != NULL)
1666 mps_deregister_events(sc, sc->mps_log_eh);
1671 * Free all of the driver resources and detach submodules. Should be called
1672 * without the lock held.
1675 mps_free(struct mps_softc *sc)
1679 /* Turn off the watchdog */
1681 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
1683 /* Lock must not be held for this */
1684 callout_drain(&sc->periodic);
1686 if (((error = mps_detach_log(sc)) != 0) ||
1687 ((error = mps_detach_sas(sc)) != 0))
1690 mps_detach_user(sc);
1692 /* Put the IOC back in the READY state. */
1694 if ((error = mps_transition_ready(sc)) != 0) {
1700 if (sc->facts != NULL)
1701 free(sc->facts, M_MPT2);
1704 * Free all buffers that are based on IOC Facts. A Diag Reset may need
1705 * to free these buffers too.
1707 mps_iocfacts_free(sc);
1709 if (sc->sysctl_tree != NULL)
1710 sysctl_ctx_free(&sc->sysctl_ctx);
1712 /* Deregister the shutdown function */
1713 if (sc->shutdown_eh != NULL)
1714 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1716 mtx_destroy(&sc->mps_mtx);
1721 static __inline void
1722 mps_complete_command(struct mps_softc *sc, struct mps_command *cm)
1727 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n");
1731 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
1732 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
1734 if (cm->cm_complete != NULL) {
1735 mps_dprint(sc, MPS_TRACE,
1736 "%s cm %p calling cm_complete %p data %p reply %p\n",
1737 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1739 cm->cm_complete(sc, cm);
1742 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
1743 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm);
1747 if (cm->cm_sc->io_cmds_active != 0) {
1748 cm->cm_sc->io_cmds_active--;
1750 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is "
1751 "out of sync - resynching to 0\n");
1757 mps_sas_log_info(struct mps_softc *sc , u32 log_info)
1759 union loginfo_type {
1768 union loginfo_type sas_loginfo;
1769 char *originator_str = NULL;
1771 sas_loginfo.loginfo = log_info;
1772 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1775 /* each nexus loss loginfo */
1776 if (log_info == 0x31170000)
1779 /* eat the loginfos associated with task aborts */
1780 if ((log_info == 30050000 || log_info ==
1781 0x31140000 || log_info == 0x31130000))
1784 switch (sas_loginfo.dw.originator) {
1786 originator_str = "IOP";
1789 originator_str = "PL";
1792 originator_str = "IR";
1796 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), "
1797 "code(0x%02x), sub_code(0x%04x)\n", log_info,
1798 originator_str, sas_loginfo.dw.code,
1799 sas_loginfo.dw.subcode);
1803 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply)
1805 MPI2DefaultReply_t *mpi_reply;
1808 mpi_reply = (MPI2DefaultReply_t*)reply;
1809 sc_status = le16toh(mpi_reply->IOCStatus);
1810 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1811 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1814 mps_intr(void *data)
1816 struct mps_softc *sc;
1819 sc = (struct mps_softc *)data;
1820 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1823 * Check interrupt status register to flush the bus. This is
1824 * needed for both INTx interrupts and driver-driven polling
1826 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1827 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1831 mps_intr_locked(data);
1837 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1838 * chip. Hopefully this theory is correct.
1841 mps_intr_msi(void *data)
1843 struct mps_softc *sc;
1845 sc = (struct mps_softc *)data;
1846 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1848 mps_intr_locked(data);
1854 * The locking is overly broad and simplistic, but easy to deal with for now.
1857 mps_intr_locked(void *data)
1859 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1860 struct mps_softc *sc;
1861 struct mps_command *cm = NULL;
1864 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1865 mps_fw_diagnostic_buffer_t *pBuffer;
1867 sc = (struct mps_softc *)data;
1869 pq = sc->replypostindex;
1870 mps_dprint(sc, MPS_TRACE,
1871 "%s sc %p starting with replypostindex %u\n",
1872 __func__, sc, sc->replypostindex);
1876 desc = &sc->post_queue[sc->replypostindex];
1877 flags = desc->Default.ReplyFlags &
1878 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1879 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1880 || (le32toh(desc->Words.High) == 0xffffffff))
1883 /* increment the replypostindex now, so that event handlers
1884 * and cm completion handlers which decide to do a diag
1885 * reset can zero it without it getting incremented again
1886 * afterwards, and we break out of this loop on the next
1887 * iteration since the reply post queue has been cleared to
1888 * 0xFF and all descriptors look unused (which they are).
1890 if (++sc->replypostindex >= sc->pqdepth)
1891 sc->replypostindex = 0;
1894 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1895 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1896 cm->cm_reply = NULL;
1898 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1904 * Re-compose the reply address from the address
1905 * sent back from the chip. The ReplyFrameAddress
1906 * is the lower 32 bits of the physical address of
1907 * particular reply frame. Convert that address to
1908 * host format, and then use that to provide the
1909 * offset against the virtual address base
1910 * (sc->reply_frames).
1912 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1913 reply = sc->reply_frames +
1914 (baddr - ((uint32_t)sc->reply_busaddr));
1916 * Make sure the reply we got back is in a valid
1917 * range. If not, go ahead and panic here, since
1918 * we'll probably panic as soon as we deference the
1919 * reply pointer anyway.
1921 if ((reply < sc->reply_frames)
1922 || (reply > (sc->reply_frames +
1923 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1924 printf("%s: WARNING: reply %p out of range!\n",
1926 printf("%s: reply_frames %p, fqdepth %d, "
1927 "frame size %d\n", __func__,
1928 sc->reply_frames, sc->fqdepth,
1929 sc->facts->ReplyFrameSize * 4);
1930 printf("%s: baddr %#x,\n", __func__, baddr);
1931 /* LSI-TODO. See Linux Code. Need Gracefull exit*/
1932 panic("Reply address out of range");
1934 if (le16toh(desc->AddressReply.SMID) == 0) {
1935 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1936 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1938 * If SMID is 0 for Diag Buffer Post,
1939 * this implies that the reply is due to
1940 * a release function with a status that
1941 * the buffer has been released. Set
1942 * the buffer flags accordingly.
1945 (MPI2_DIAG_RELEASE_REPLY *)reply;
1946 if ((le16toh(rel_rep->IOCStatus) &
1947 MPI2_IOCSTATUS_MASK) ==
1948 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1951 &sc->fw_diag_buffer_list[
1952 rel_rep->BufferType];
1953 pBuffer->valid_data = TRUE;
1954 pBuffer->owned_by_firmware =
1956 pBuffer->immediate = FALSE;
1959 mps_dispatch_event(sc, baddr,
1960 (MPI2_EVENT_NOTIFICATION_REPLY *)
1963 cm = &sc->commands[le16toh(desc->AddressReply.SMID)];
1964 cm->cm_reply = reply;
1966 le32toh(desc->AddressReply.ReplyFrameAddress);
1970 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1971 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1972 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1975 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n",
1976 desc->Default.ReplyFlags);
1983 // Print Error reply frame
1985 mps_display_reply_info(sc,cm->cm_reply);
1986 mps_complete_command(sc, cm);
1989 desc->Words.Low = 0xffffffff;
1990 desc->Words.High = 0xffffffff;
1993 if (pq != sc->replypostindex) {
1994 mps_dprint(sc, MPS_TRACE,
1995 "%s sc %p writing postindex %d\n",
1996 __func__, sc, sc->replypostindex);
1997 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex);
2004 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
2005 MPI2_EVENT_NOTIFICATION_REPLY *reply)
2007 struct mps_event_handle *eh;
2008 int event, handled = 0;
2010 event = le16toh(reply->Event);
2011 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2012 if (isset(eh->mask, event)) {
2013 eh->callback(sc, data, reply);
2019 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event));
2022 * This is the only place that the event/reply should be freed.
2023 * Anything wanting to hold onto the event data should have
2024 * already copied it into their own storage.
2026 mps_free_reply(sc, data);
2030 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
2032 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2036 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2038 mps_free_command(sc, cm);
2040 /* next, send a port enable */
2045 * For both register_events and update_events, the caller supplies a bitmap
2046 * of events that it _wants_. These functions then turn that into a bitmask
2047 * suitable for the controller.
2050 mps_register_events(struct mps_softc *sc, u32 *mask,
2051 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
2053 struct mps_event_handle *eh;
2056 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
2058 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
2059 __func__, __LINE__);
2064 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2066 error = mps_update_events(sc, eh, mask);
2073 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
2076 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2077 MPI2_EVENT_NOTIFICATION_REPLY *reply;
2078 struct mps_command *cm;
2081 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2083 if ((mask != NULL) && (handle != NULL))
2084 bcopy(mask, &handle->mask[0], sizeof(u32) *
2085 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2087 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2088 sc->event_mask[i] = -1;
2090 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2091 sc->event_mask[i] &= ~handle->mask[i];
2094 if ((cm = mps_alloc_command(sc)) == NULL)
2096 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2097 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2098 evtreq->MsgFlags = 0;
2099 evtreq->SASBroadcastPrimitiveMasks = 0;
2100 #ifdef MPS_DEBUG_ALL_EVENTS
2102 u_char fullmask[16];
2103 memset(fullmask, 0x00, 16);
2104 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2105 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2108 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2109 evtreq->EventMasks[i] =
2110 htole32(sc->event_mask[i]);
2112 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2115 error = mps_wait_command(sc, cm, 60, 0);
2116 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2117 if ((reply == NULL) ||
2118 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2120 mps_print_event(sc, reply);
2121 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
2123 mps_free_command(sc, cm);
2128 mps_reregister_events(struct mps_softc *sc)
2130 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2131 struct mps_command *cm;
2132 struct mps_event_handle *eh;
2135 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2137 /* first, reregister events */
2139 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2140 sc->event_mask[i] = -1;
2142 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2143 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2144 sc->event_mask[i] &= ~eh->mask[i];
2147 if ((cm = mps_alloc_command(sc)) == NULL)
2149 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2150 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2151 evtreq->MsgFlags = 0;
2152 evtreq->SASBroadcastPrimitiveMasks = 0;
2153 #ifdef MPS_DEBUG_ALL_EVENTS
2155 u_char fullmask[16];
2156 memset(fullmask, 0x00, 16);
2157 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2158 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2161 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2162 evtreq->EventMasks[i] =
2163 htole32(sc->event_mask[i]);
2165 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2167 cm->cm_complete = mps_reregister_events_complete;
2169 error = mps_map_command(sc, cm);
2171 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__,
2177 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
2180 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2181 free(handle, M_MPT2);
2185 * Add a chain element as the next SGE for the specified command.
2186 * Reset cm_sge and cm_sgesize to indicate all the available space.
2189 mps_add_chain(struct mps_command *cm)
2191 MPI2_SGE_CHAIN32 *sgc;
2192 struct mps_chain *chain;
2195 if (cm->cm_sglsize < MPS_SGC_SIZE)
2196 panic("MPS: Need SGE Error Code\n");
2198 chain = mps_alloc_chain(cm->cm_sc);
2202 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
2205 * Note: a double-linked list is used to make it easier to
2206 * walk for debugging.
2208 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2210 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
2211 sgc->Length = htole16(space);
2212 sgc->NextChainOffset = 0;
2213 /* TODO Looks like bug in Setting sgc->Flags.
2214 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2215 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT
2216 * This is fine.. because we are not using simple element. In case of
2217 * MPI2_SGE_CHAIN32, we have seperate Length and Flags feild.
2219 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
2220 sgc->Address = htole32(chain->chain_busaddr);
2222 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
2223 cm->cm_sglsize = space;
2228 * Add one scatter-gather element (chain, simple, transaction context)
2229 * to the scatter-gather list for a command. Maintain cm_sglsize and
2230 * cm_sge as the remaining size and pointer to the next SGE to fill
2234 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
2236 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
2237 MPI2_SGE_SIMPLE64 *sge = sgep;
2239 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2241 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
2245 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
2246 if (len != tc->DetailsLength + 4)
2247 panic("TC %p length %u or %zu?", tc,
2248 tc->DetailsLength + 4, len);
2251 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
2252 /* Driver only uses 32-bit chain elements */
2253 if (len != MPS_SGC_SIZE)
2254 panic("CHAIN %p length %u or %zu?", sgep,
2257 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
2258 /* Driver only uses 64-bit SGE simple elements */
2259 if (len != MPS_SGE64_SIZE)
2260 panic("SGE simple %p length %u or %zu?", sge,
2261 MPS_SGE64_SIZE, len);
2262 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) &
2263 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
2264 panic("SGE simple %p not marked 64-bit?", sge);
2268 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
2273 * case 1: 1 more segment, enough room for it
2274 * case 2: 2 more segments, enough room for both
2275 * case 3: >=2 more segments, only enough room for 1 and a chain
2276 * case 4: >=1 more segment, enough room for only a chain
2277 * case 5: >=1 more segment, no room for anything (error)
2281 * There should be room for at least a chain element, or this
2282 * code is buggy. Case (5).
2284 if (cm->cm_sglsize < MPS_SGC_SIZE)
2285 panic("MPS: Need SGE Error Code\n");
2287 if (segsleft >= 2 &&
2288 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
2290 * There are 2 or more segments left to add, and only
2291 * enough room for 1 and a chain. Case (3).
2293 * Mark as last element in this chain if necessary.
2295 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2296 sge->FlagsLength |= htole32(
2297 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
2301 * Add the item then a chain. Do the chain now,
2302 * rather than on the next iteration, to simplify
2303 * understanding the code.
2305 cm->cm_sglsize -= len;
2306 bcopy(sgep, cm->cm_sge, len);
2307 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2308 return (mps_add_chain(cm));
2311 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
2313 * 1 or more segment, enough room for only a chain.
2314 * Hope the previous element wasn't a Simple entry
2315 * that needed to be marked with
2316 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
2318 if ((error = mps_add_chain(cm)) != 0)
2323 /* Case 1: 1 more segment, enough room for it. */
2324 if (segsleft == 1 && cm->cm_sglsize < len)
2325 panic("1 seg left and no room? %u versus %zu",
2326 cm->cm_sglsize, len);
2328 /* Case 2: 2 more segments, enough room for both */
2329 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
2330 panic("2 segs left and no room? %u versus %zu",
2331 cm->cm_sglsize, len);
2334 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2336 * If this is a bi-directional request, need to account for that
2337 * here. Save the pre-filled sge values. These will be used
2338 * either for the 2nd SGL or for a single direction SGL. If
2339 * cm_out_len is non-zero, this is a bi-directional request, so
2340 * fill in the OUT SGL first, then the IN SGL, otherwise just
2341 * fill in the IN SGL. Note that at this time, when filling in
2342 * 2 SGL's for a bi-directional request, they both use the same
2343 * DMA buffer (same cm command).
2345 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF;
2346 saved_address_low = sge->Address.Low;
2347 saved_address_high = sge->Address.High;
2348 if (cm->cm_out_len) {
2349 sge->FlagsLength = htole32(cm->cm_out_len |
2350 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2351 MPI2_SGE_FLAGS_END_OF_BUFFER |
2352 MPI2_SGE_FLAGS_HOST_TO_IOC |
2353 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2354 MPI2_SGE_FLAGS_SHIFT));
2355 cm->cm_sglsize -= len;
2356 bcopy(sgep, cm->cm_sge, len);
2357 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
2361 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2362 MPI2_SGE_FLAGS_END_OF_BUFFER |
2363 MPI2_SGE_FLAGS_LAST_ELEMENT |
2364 MPI2_SGE_FLAGS_END_OF_LIST |
2365 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2366 MPI2_SGE_FLAGS_SHIFT);
2367 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
2369 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2370 MPI2_SGE_FLAGS_SHIFT);
2373 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2374 MPI2_SGE_FLAGS_SHIFT);
2376 sge->FlagsLength = htole32(saved_buf_len);
2377 sge->Address.Low = saved_address_low;
2378 sge->Address.High = saved_address_high;
2381 cm->cm_sglsize -= len;
2382 bcopy(sgep, cm->cm_sge, len);
2383 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2388 * Add one dma segment to the scatter-gather list for a command.
2391 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2394 MPI2_SGE_SIMPLE64 sge;
2397 * This driver always uses 64-bit address elements for simplicity.
2399 bzero(&sge, sizeof(sge));
2400 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2401 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2402 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT));
2403 mps_from_u64(pa, &sge.Address);
2405 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2409 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2411 struct mps_softc *sc;
2412 struct mps_command *cm;
2413 u_int i, dir, sflags;
2415 cm = (struct mps_command *)arg;
2419 * In this case, just print out a warning and let the chip tell the
2420 * user they did the wrong thing.
2422 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2423 mps_dprint(sc, MPS_ERROR,
2424 "%s: warning: busdma returned %d segments, "
2425 "more than the %d allowed\n", __func__, nsegs,
2430 * Set up DMA direction flags. Bi-directional requests are also handled
2431 * here. In that case, both direction flags will be set.
2434 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2436 * We have to add a special case for SMP passthrough, there
2437 * is no easy way to generically handle it. The first
2438 * S/G element is used for the command (therefore the
2439 * direction bit needs to be set). The second one is used
2440 * for the reply. We'll leave it to the caller to make
2441 * sure we only have two buffers.
2444 * Even though the busdma man page says it doesn't make
2445 * sense to have both direction flags, it does in this case.
2446 * We have one s/g element being accessed in each direction.
2448 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2451 * Set the direction flag on the first buffer in the SMP
2452 * passthrough request. We'll clear it for the second one.
2454 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2455 MPI2_SGE_FLAGS_END_OF_BUFFER;
2456 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2457 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2458 dir = BUS_DMASYNC_PREWRITE;
2460 dir = BUS_DMASYNC_PREREAD;
2462 for (i = 0; i < nsegs; i++) {
2463 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
2464 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2466 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2469 /* Resource shortage, roll back! */
2470 if (ratecheck(&sc->lastfail, &mps_chainfail_interval))
2471 mps_dprint(sc, MPS_INFO, "Out of chain frames, "
2472 "consider increasing hw.mps.max_chains.\n");
2473 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
2474 mps_complete_command(sc, cm);
2479 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2480 mps_enqueue_request(sc, cm);
2486 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2489 mps_data_cb(arg, segs, nsegs, error);
2493 * This is the routine to enqueue commands ansynchronously.
2494 * Note that the only error path here is from bus_dmamap_load(), which can
2495 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2496 * assumed that if you have a command in-hand, then you have enough credits
2500 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
2504 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
2505 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2506 &cm->cm_uio, mps_data_cb2, cm, 0);
2507 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) {
2508 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2509 cm->cm_data, mps_data_cb, cm, 0);
2510 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2511 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2512 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
2514 /* Add a zero-length element as needed */
2515 if (cm->cm_sge != NULL)
2516 mps_add_dmaseg(cm, 0, 0, 0, 1);
2517 mps_enqueue_request(sc, cm);
2524 * This is the routine to enqueue commands synchronously. An error of
2525 * EINPROGRESS from mps_map_command() is ignored since the command will
2526 * be executed and enqueued automatically. Other errors come from msleep().
2529 mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout,
2533 struct timeval cur_time, start_time;
2535 if (sc->mps_flags & MPS_FLAGS_DIAGRESET)
2538 cm->cm_complete = NULL;
2539 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
2540 error = mps_map_command(sc, cm);
2541 if ((error != 0) && (error != EINPROGRESS))
2545 * Check for context and wait for 50 mSec at a time until time has
2546 * expired or the command has finished. If msleep can't be used, need
2549 if (curthread->td_no_sleeping != 0)
2550 sleep_flag = NO_SLEEP;
2551 getmicrotime(&start_time);
2552 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) {
2553 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
2554 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
2556 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
2557 mps_intr_locked(sc);
2558 if (sleep_flag == CAN_SLEEP)
2559 pause("mpswait", hz/20);
2563 getmicrotime(&cur_time);
2564 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2565 error = EWOULDBLOCK;
2571 if (error == EWOULDBLOCK) {
2572 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s\n", __func__);
2573 rc = mps_reinit(sc);
2574 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2582 * The MPT driver had a verbose interface for config pages. In this driver,
2583 * reduce it to much simplier terms, similar to the Linux driver.
2586 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
2588 MPI2_CONFIG_REQUEST *req;
2589 struct mps_command *cm;
2592 if (sc->mps_flags & MPS_FLAGS_BUSY) {
2596 cm = mps_alloc_command(sc);
2601 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2602 req->Function = MPI2_FUNCTION_CONFIG;
2603 req->Action = params->action;
2605 req->ChainOffset = 0;
2606 req->PageAddress = params->page_address;
2607 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2608 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2610 hdr = ¶ms->hdr.Ext;
2611 req->ExtPageType = hdr->ExtPageType;
2612 req->ExtPageLength = hdr->ExtPageLength;
2613 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2614 req->Header.PageLength = 0; /* Must be set to zero */
2615 req->Header.PageNumber = hdr->PageNumber;
2616 req->Header.PageVersion = hdr->PageVersion;
2618 MPI2_CONFIG_PAGE_HEADER *hdr;
2620 hdr = ¶ms->hdr.Struct;
2621 req->Header.PageType = hdr->PageType;
2622 req->Header.PageNumber = hdr->PageNumber;
2623 req->Header.PageLength = hdr->PageLength;
2624 req->Header.PageVersion = hdr->PageVersion;
2627 cm->cm_data = params->buffer;
2628 cm->cm_length = params->length;
2629 if (cm->cm_data != NULL) {
2630 cm->cm_sge = &req->PageBufferSGE;
2631 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2632 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
2635 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2637 cm->cm_complete_data = params;
2638 if (params->callback != NULL) {
2639 cm->cm_complete = mps_config_complete;
2640 return (mps_map_command(sc, cm));
2642 error = mps_wait_command(sc, cm, 0, CAN_SLEEP);
2644 mps_dprint(sc, MPS_FAULT,
2645 "Error %d reading config page\n", error);
2646 mps_free_command(sc, cm);
2649 mps_config_complete(sc, cm);
2656 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
2662 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
2664 MPI2_CONFIG_REPLY *reply;
2665 struct mps_config_params *params;
2668 params = cm->cm_complete_data;
2670 if (cm->cm_data != NULL) {
2671 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2672 BUS_DMASYNC_POSTREAD);
2673 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2677 * XXX KDM need to do more error recovery? This results in the
2678 * device in question not getting probed.
2680 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
2681 params->status = MPI2_IOCSTATUS_BUSY;
2685 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2686 if (reply == NULL) {
2687 params->status = MPI2_IOCSTATUS_BUSY;
2690 params->status = reply->IOCStatus;
2691 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2692 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2693 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2694 params->hdr.Ext.PageType = reply->Header.PageType;
2695 params->hdr.Ext.PageNumber = reply->Header.PageNumber;
2696 params->hdr.Ext.PageVersion = reply->Header.PageVersion;
2698 params->hdr.Struct.PageType = reply->Header.PageType;
2699 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2700 params->hdr.Struct.PageLength = reply->Header.PageLength;
2701 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2705 mps_free_command(sc, cm);
2706 if (params->callback != NULL)
2707 params->callback(sc, params);