sys/dev/nand/nand_generic.c

   1 /*-
   2  * Copyright (C) 2009-2012 Semihalf
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 /* Generic NAND driver */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/param.h>
  33 #include <sys/systm.h>
  34 #include <sys/proc.h>
  35 #include <sys/bus.h>
  36 #include <sys/conf.h>
  37 #include <sys/kernel.h>
  38 #include <sys/module.h>
  39 #include <sys/rman.h>
  40 #include <sys/lock.h>
  41 #include <sys/mutex.h>
  42 #include <sys/time.h>
  43 #include <sys/malloc.h>
  44
  45 #include <dev/nand/nand.h>
  46 #include <dev/nand/nandbus.h>
  47 #include "nfc_if.h"
  48 #include "nand_if.h"
  49 #include "nandbus_if.h"
  50
  51
  52 static int onfi_nand_probe(device_t dev);
  53 static int large_nand_probe(device_t dev);
  54 static int small_nand_probe(device_t dev);
  55 static int generic_nand_attach(device_t dev);
  56 static int generic_nand_detach(device_t dev);
  57
  58 static int generic_erase_block(device_t, uint32_t);
  59 static int generic_erase_block_intlv(device_t, uint32_t);
  60 static int generic_read_page (device_t, uint32_t, void *, uint32_t, uint32_t);
  61 static int generic_read_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  62 static int generic_program_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  63 static int generic_program_page_intlv(device_t, uint32_t, void *, uint32_t,
  64     uint32_t);
  65 static int generic_program_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  66 static int generic_is_blk_bad(device_t, uint32_t, uint8_t *);
  67 static int generic_get_ecc(device_t, void *, void *, int *);
  68 static int generic_correct_ecc(device_t, void *, void *, void *);
  69
  70 static int small_read_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  71 static int small_read_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  72 static int small_program_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  73 static int small_program_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  74
  75 static int onfi_is_blk_bad(device_t, uint32_t, uint8_t *);
  76 static int onfi_read_parameter(struct nand_chip *, struct onfi_params *);
  77
  78 static int nand_send_address(device_t, int32_t, int32_t, int8_t);
  79
  80 static device_method_t onand_methods[] = {
  81         /* Device interface */
  82         DEVMETHOD(device_probe,                 onfi_nand_probe),
  83         DEVMETHOD(device_attach,                generic_nand_attach),
  84         DEVMETHOD(device_detach,                generic_nand_detach),
  85
  86         DEVMETHOD(nand_read_page,               generic_read_page),
  87         DEVMETHOD(nand_program_page,            generic_program_page),
  88         DEVMETHOD(nand_program_page_intlv,      generic_program_page_intlv),
  89         DEVMETHOD(nand_read_oob,                generic_read_oob),
  90         DEVMETHOD(nand_program_oob,             generic_program_oob),
  91         DEVMETHOD(nand_erase_block,             generic_erase_block),
  92         DEVMETHOD(nand_erase_block_intlv,       generic_erase_block_intlv),
  93
  94         DEVMETHOD(nand_is_blk_bad,              onfi_is_blk_bad),
  95         DEVMETHOD(nand_get_ecc,                 generic_get_ecc),
  96         DEVMETHOD(nand_correct_ecc,             generic_correct_ecc),
  97         { 0, 0 }
  98 };
  99
 100 static device_method_t lnand_methods[] = {
 101         /* Device interface */
 102         DEVMETHOD(device_probe,         large_nand_probe),
 103         DEVMETHOD(device_attach,        generic_nand_attach),
 104         DEVMETHOD(device_detach,        generic_nand_detach),
 105
 106         DEVMETHOD(nand_read_page,       generic_read_page),
 107         DEVMETHOD(nand_program_page,    generic_program_page),
 108         DEVMETHOD(nand_read_oob,        generic_read_oob),
 109         DEVMETHOD(nand_program_oob,     generic_program_oob),
 110         DEVMETHOD(nand_erase_block,     generic_erase_block),
 111
 112         DEVMETHOD(nand_is_blk_bad,      generic_is_blk_bad),
 113         DEVMETHOD(nand_get_ecc,         generic_get_ecc),
 114         DEVMETHOD(nand_correct_ecc,     generic_correct_ecc),
 115         { 0, 0 }
 116 };
 117
 118 static device_method_t snand_methods[] = {
 119         /* Device interface */
 120         DEVMETHOD(device_probe,         small_nand_probe),
 121         DEVMETHOD(device_attach,        generic_nand_attach),
 122         DEVMETHOD(device_detach,        generic_nand_detach),
 123
 124         DEVMETHOD(nand_read_page,       small_read_page),
 125         DEVMETHOD(nand_program_page,    small_program_page),
 126         DEVMETHOD(nand_read_oob,        small_read_oob),
 127         DEVMETHOD(nand_program_oob,     small_program_oob),
 128         DEVMETHOD(nand_erase_block,     generic_erase_block),
 129
 130         DEVMETHOD(nand_is_blk_bad,      generic_is_blk_bad),
 131         DEVMETHOD(nand_get_ecc,         generic_get_ecc),
 132         DEVMETHOD(nand_correct_ecc,     generic_correct_ecc),
 133         { 0, 0 }
 134 };
 135
 136 devclass_t onand_devclass;
 137 devclass_t lnand_devclass;
 138 devclass_t snand_devclass;
 139
 140 driver_t onand_driver = {
 141         "onand",
 142         onand_methods,
 143         sizeof(struct nand_chip)
 144 };
 145
 146 driver_t lnand_driver = {
 147         "lnand",
 148         lnand_methods,
 149         sizeof(struct nand_chip)
 150 };
 151
 152 driver_t snand_driver = {
 153         "snand",
 154         snand_methods,
 155         sizeof(struct nand_chip)
 156 };
 157
 158 DRIVER_MODULE(onand, nandbus, onand_driver, onand_devclass, 0, 0);
 159 DRIVER_MODULE(lnand, nandbus, lnand_driver, lnand_devclass, 0, 0);
 160 DRIVER_MODULE(snand, nandbus, snand_driver, snand_devclass, 0, 0);
 161
 162 static int
 163 onfi_nand_probe(device_t dev)
 164 {
 165         struct nandbus_ivar *ivar;
 166
 167         ivar = device_get_ivars(dev);
 168         if (ivar && ivar->is_onfi) {
 169                 device_set_desc(dev, "ONFI compliant NAND");
 170                 return (BUS_PROBE_DEFAULT);
 171         }
 172
 173         return (ENODEV);
 174 }
 175
 176 static int
 177 large_nand_probe(device_t dev)
 178 {
 179         struct nandbus_ivar *ivar;
 180
 181         ivar = device_get_ivars(dev);
 182         if (ivar && !ivar->is_onfi && ivar->params->page_size >= 512) {
 183                 device_set_desc(dev, ivar->params->name);
 184                 return (BUS_PROBE_DEFAULT);
 185         }
 186
 187         return (ENODEV);
 188 }
 189
 190 static int
 191 small_nand_probe(device_t dev)
 192 {
 193         struct nandbus_ivar *ivar;
 194
 195         ivar = device_get_ivars(dev);
 196         if (ivar && !ivar->is_onfi && ivar->params->page_size == 512) {
 197                 device_set_desc(dev, ivar->params->name);
 198                 return (BUS_PROBE_DEFAULT);
 199         }
 200
 201         return (ENODEV);
 202 }
 203
 204 static int
 205 generic_nand_attach(device_t dev)
 206 {
 207         struct nand_chip *chip;
 208         struct nandbus_ivar *ivar;
 209         struct onfi_params *onfi_params;
 210         device_t nandbus, nfc;
 211         int err;
 212
 213         chip = device_get_softc(dev);
 214         chip->dev = dev;
 215
 216         ivar = device_get_ivars(dev);
 217         chip->id.man_id = ivar->man_id;
 218         chip->id.dev_id = ivar->dev_id;
 219         chip->num = ivar->cs;
 220
 221         /* TODO remove when HW ECC supported */
 222         nandbus = device_get_parent(dev);
 223         nfc = device_get_parent(nandbus);
 224
 225         chip->nand = device_get_softc(nfc);
 226
 227         if (ivar->is_onfi) {
 228                 onfi_params = malloc(sizeof(struct onfi_params),
 229                     M_NAND, M_WAITOK | M_ZERO);
 230                 if (onfi_params == NULL)
 231                         return (ENXIO);
 232
 233                 if (onfi_read_parameter(chip, onfi_params)) {
 234                         nand_debug(NDBG_GEN,"Could not read parameter page!\n");
 235                         free(onfi_params, M_NAND);
 236                         return (ENXIO);
 237                 }
 238
 239                 nand_onfi_set_params(chip, onfi_params);
 240                 /* Set proper column and row cycles */
 241                 ivar->cols = (onfi_params->address_cycles >> 4) & 0xf;
 242                 ivar->rows = onfi_params->address_cycles & 0xf;
 243                 free(onfi_params, M_NAND);
 244
 245         } else {
 246
 247                 nand_set_params(chip, ivar->params);
 248         }
 249
 250         err = nand_init_stat(chip);
 251         if (err) {
 252                 generic_nand_detach(dev);
 253                 return (err);
 254         }
 255
 256         err = nand_init_bbt(chip);
 257         if (err) {
 258                 generic_nand_detach(dev);
 259                 return (err);
 260         }
 261
 262         err = nand_make_dev(chip);
 263         if (err) {
 264                 generic_nand_detach(dev);
 265                 return (err);
 266         }
 267
 268         err = create_geom_disk(chip);
 269         if (err) {
 270                 generic_nand_detach(dev);
 271                 return (err);
 272         }
 273
 274         return (0);
 275 }
 276
 277 static int
 278 generic_nand_detach(device_t dev)
 279 {
 280         struct nand_chip *chip;
 281
 282         chip = device_get_softc(dev);
 283
 284         nand_destroy_bbt(chip);
 285         destroy_geom_disk(chip);
 286         nand_destroy_dev(chip);
 287         nand_destroy_stat(chip);
 288
 289         return (0);
 290 }
 291
 292 static int
 293 can_write(device_t nandbus)
 294 {
 295         uint8_t status;
 296
 297         if (NANDBUS_WAIT_READY(nandbus, &status))
 298                 return (0);
 299
 300         if (!(status & NAND_STATUS_WP)) {
 301                 nand_debug(NDBG_GEN,"Chip is write-protected");
 302                 return (0);
 303         }
 304
 305         return (1);
 306 }
 307
 308 static int
 309 check_fail(device_t nandbus)
 310 {
 311         uint8_t status;
 312
 313         NANDBUS_WAIT_READY(nandbus, &status);
 314         if (status & NAND_STATUS_FAIL) {
 315                 nand_debug(NDBG_GEN,"Status failed %x", status);
 316                 return (ENXIO);
 317         }
 318
 319         return (0);
 320 }
 321
 322 static int
 323 onfi_read_parameter(struct nand_chip *chip, struct onfi_params *params)
 324 {
 325         device_t nandbus;
 326
 327         nand_debug(NDBG_GEN,"read parameter");
 328
 329         nandbus = device_get_parent(chip->dev);
 330
 331         NANDBUS_SELECT_CS(nandbus, chip->num);
 332
 333         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_READ_PARAMETER))
 334                 return (ENXIO);
 335
 336         if (nand_send_address(chip->dev, -1, -1, PAGE_PARAMETER_DEF))
 337                 return (ENXIO);
 338
 339         if (NANDBUS_START_COMMAND(nandbus))
 340                 return (ENXIO);
 341
 342         NANDBUS_READ_BUFFER(nandbus, params, sizeof(struct onfi_params));
 343
 344         /* TODO */
 345         /* Check for signature */
 346         /* Check CRC */
 347         /* Use redundant page if necessary */
 348
 349         return (0);
 350 }
 351
 352 static int
 353 send_read_page(device_t nand, uint8_t start_command, uint8_t end_command,
 354     uint32_t row, uint32_t column)
 355 {
 356         device_t nandbus = device_get_parent(nand);
 357
 358         if (NANDBUS_SEND_COMMAND(nandbus, start_command))
 359                 return (ENXIO);
 360
 361         if (nand_send_address(nand, row, column, -1))
 362                 return (ENXIO);
 363
 364         if (NANDBUS_SEND_COMMAND(nandbus, end_command))
 365                 return (ENXIO);
 366
 367         if (NANDBUS_START_COMMAND(nandbus))
 368                 return (ENXIO);
 369
 370         return (0);
 371 }
 372
 373 static int
 374 generic_read_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 375     uint32_t offset)
 376 {
 377         struct nand_chip *chip;
 378         struct page_stat *pg_stat;
 379         device_t nandbus;
 380         uint32_t row;
 381
 382         nand_debug(NDBG_GEN,"%p raw read page %x[%x] at %x", nand, page, len, offset);
 383         chip = device_get_softc(nand);
 384         nandbus = device_get_parent(nand);
 385
 386         if (nand_check_page_boundary(chip, page))
 387                 return (ENXIO);
 388
 389         page_to_row(&chip->chip_geom, page, &row);
 390
 391         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_END, row,
 392             offset))
 393                 return (ENXIO);
 394
 395         DELAY(chip->t_r);
 396
 397         NANDBUS_READ_BUFFER(nandbus, buf, len);
 398
 399         if (check_fail(nandbus))
 400                 return (ENXIO);
 401
 402         pg_stat = &(chip->pg_stat[page]);
 403         pg_stat->page_raw_read++;
 404
 405         return (0);
 406 }
 407
 408 static int
 409 generic_read_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 410     uint32_t offset)
 411 {
 412         struct nand_chip *chip;
 413         device_t nandbus;
 414         uint32_t row;
 415
 416         nand_debug(NDBG_GEN,"%p raw read oob %x[%x] at %x", nand, page, len, offset);
 417         chip = device_get_softc(nand);
 418         nandbus = device_get_parent(nand);
 419
 420         if (nand_check_page_boundary(chip, page)) {
 421                 nand_debug(NDBG_GEN,"page boundary check failed: %08x\n", page);
 422                 return (ENXIO);
 423         }
 424
 425         page_to_row(&chip->chip_geom, page, &row);
 426
 427         offset += chip->chip_geom.page_size;
 428
 429         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_END, row,
 430             offset))
 431                 return (ENXIO);
 432
 433         DELAY(chip->t_r);
 434
 435         NANDBUS_READ_BUFFER(nandbus, buf, len);
 436
 437         if (check_fail(nandbus))
 438                 return (ENXIO);
 439
 440         return (0);
 441 }
 442
 443 static int
 444 send_start_program_page(device_t nand, uint32_t row, uint32_t column)
 445 {
 446         device_t nandbus = device_get_parent(nand);
 447
 448         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_PROG))
 449                 return (ENXIO);
 450
 451         if (nand_send_address(nand, row, column, -1))
 452                 return (ENXIO);
 453
 454         return (0);
 455 }
 456
 457 static int
 458 send_end_program_page(device_t nandbus, uint8_t end_command)
 459 {
 460
 461         if (NANDBUS_SEND_COMMAND(nandbus, end_command))
 462                 return (ENXIO);
 463
 464         if (NANDBUS_START_COMMAND(nandbus))
 465                 return (ENXIO);
 466
 467         return (0);
 468 }
 469
 470 static int
 471 generic_program_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 472     uint32_t offset)
 473 {
 474         struct nand_chip *chip;
 475         struct page_stat *pg_stat;
 476         device_t nandbus;
 477         uint32_t row;
 478
 479         nand_debug(NDBG_GEN,"%p raw prog page %x[%x] at %x", nand, page, len,
 480             offset);
 481         chip = device_get_softc(nand);
 482         nandbus = device_get_parent(nand);
 483
 484         if (nand_check_page_boundary(chip, page))
 485                 return (ENXIO);
 486
 487         page_to_row(&chip->chip_geom, page, &row);
 488
 489         if (!can_write(nandbus))
 490                 return (ENXIO);
 491
 492         if (send_start_program_page(nand, row, offset))
 493                 return (ENXIO);
 494
 495         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 496
 497         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 498                 return (ENXIO);
 499
 500         DELAY(chip->t_prog);
 501
 502         if (check_fail(nandbus))
 503                 return (ENXIO);
 504
 505         pg_stat = &(chip->pg_stat[page]);
 506         pg_stat->page_raw_written++;
 507
 508         return (0);
 509 }
 510
 511 static int
 512 generic_program_page_intlv(device_t nand, uint32_t page, void *buf,
 513     uint32_t len, uint32_t offset)
 514 {
 515         struct nand_chip *chip;
 516         struct page_stat *pg_stat;
 517         device_t nandbus;
 518         uint32_t row;
 519
 520         nand_debug(NDBG_GEN,"%p raw prog page %x[%x] at %x", nand, page, len, offset);
 521         chip = device_get_softc(nand);
 522         nandbus = device_get_parent(nand);
 523
 524         if (nand_check_page_boundary(chip, page))
 525                 return (ENXIO);
 526
 527         page_to_row(&chip->chip_geom, page, &row);
 528
 529         if (!can_write(nandbus))
 530                 return (ENXIO);
 531
 532         if (send_start_program_page(nand, row, offset))
 533                 return (ENXIO);
 534
 535         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 536
 537         if (send_end_program_page(nandbus, NAND_CMD_PROG_INTLV))
 538                 return (ENXIO);
 539
 540         DELAY(chip->t_prog);
 541
 542         if (check_fail(nandbus))
 543                 return (ENXIO);
 544
 545         pg_stat = &(chip->pg_stat[page]);
 546         pg_stat->page_raw_written++;
 547
 548         return (0);
 549 }
 550
 551 static int
 552 generic_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 553     uint32_t offset)
 554 {
 555         struct nand_chip *chip;
 556         device_t nandbus;
 557         uint32_t row;
 558
 559         nand_debug(NDBG_GEN,"%p raw prog oob %x[%x] at %x", nand, page, len,
 560             offset);
 561         chip = device_get_softc(nand);
 562         nandbus = device_get_parent(nand);
 563
 564         if (nand_check_page_boundary(chip, page))
 565                 return (ENXIO);
 566
 567         page_to_row(&chip->chip_geom, page, &row);
 568         offset += chip->chip_geom.page_size;
 569
 570         if (!can_write(nandbus))
 571                 return (ENXIO);
 572
 573         if (send_start_program_page(nand, row, offset))
 574                 return (ENXIO);
 575
 576         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 577
 578         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 579                 return (ENXIO);
 580
 581         DELAY(chip->t_prog);
 582
 583         if (check_fail(nandbus))
 584                 return (ENXIO);
 585
 586         return (0);
 587 }
 588
 589 static int
 590 send_erase_block(device_t nand, uint32_t row, uint8_t second_command)
 591 {
 592         device_t nandbus = device_get_parent(nand);
 593
 594         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_ERASE))
 595                 return (ENXIO);
 596
 597         if (nand_send_address(nand, row, -1, -1))
 598                 return (ENXIO);
 599
 600         if (NANDBUS_SEND_COMMAND(nandbus, second_command))
 601                 return (ENXIO);
 602
 603         if (NANDBUS_START_COMMAND(nandbus))
 604                 return (ENXIO);
 605
 606         return (0);
 607 }
 608
 609 static int
 610 generic_erase_block(device_t nand, uint32_t block)
 611 {
 612         struct block_stat *blk_stat;
 613         struct nand_chip *chip;
 614         device_t nandbus;
 615         int row;
 616
 617         nand_debug(NDBG_GEN,"%p erase block  %x", nand, block);
 618         nandbus = device_get_parent(nand);
 619         chip = device_get_softc(nand);
 620
 621         if (block >= (chip->chip_geom.blks_per_lun * chip->chip_geom.luns))
 622                 return (ENXIO);
 623
 624         row = (block << chip->chip_geom.blk_shift) &
 625             chip->chip_geom.blk_mask;
 626
 627         nand_debug(NDBG_GEN,"%p erase block  row %x", nand, row);
 628
 629         if (!can_write(nandbus))
 630                 return (ENXIO);
 631
 632         send_erase_block(nand, row, NAND_CMD_ERASE_END);
 633
 634         DELAY(chip->t_bers);
 635
 636         if (check_fail(nandbus))
 637                 return (ENXIO);
 638
 639         blk_stat = &(chip->blk_stat[block]);
 640         blk_stat->block_erased++;
 641
 642         return (0);
 643 }
 644
 645 static int
 646 generic_erase_block_intlv(device_t nand, uint32_t block)
 647 {
 648         struct block_stat *blk_stat;
 649         struct nand_chip *chip;
 650         device_t nandbus;
 651         int row;
 652
 653         nand_debug(NDBG_GEN,"%p erase block  %x", nand, block);
 654         nandbus = device_get_parent(nand);
 655         chip = device_get_softc(nand);
 656
 657         if (block >= (chip->chip_geom.blks_per_lun * chip->chip_geom.luns))
 658                 return (ENXIO);
 659
 660         row = (block << chip->chip_geom.blk_shift) &
 661             chip->chip_geom.blk_mask;
 662
 663         if (!can_write(nandbus))
 664                 return (ENXIO);
 665
 666         send_erase_block(nand, row, NAND_CMD_ERASE_INTLV);
 667
 668         DELAY(chip->t_bers);
 669
 670         if (check_fail(nandbus))
 671                 return (ENXIO);
 672
 673         blk_stat = &(chip->blk_stat[block]);
 674         blk_stat->block_erased++;
 675
 676         return (0);
 677
 678 }
 679
 680 static int
 681 onfi_is_blk_bad(device_t device, uint32_t block_number, uint8_t *bad)
 682 {
 683         struct nand_chip *chip;
 684         int page_number, i, j, err;
 685         uint8_t *oob;
 686
 687         chip = device_get_softc(device);
 688
 689         oob = malloc(chip->chip_geom.oob_size, M_NAND, M_WAITOK);
 690         if (!oob) {
 691                 device_printf(device, "%s: cannot allocate oob\n", __func__);
 692                 return (ENOMEM);
 693         }
 694
 695         page_number = block_number * chip->chip_geom.pgs_per_blk;
 696         *bad = 0;
 697         /* Check OOB of first and last page */
 698         for (i = 0; i < 2; i++, page_number+= chip->chip_geom.pgs_per_blk - 1) {
 699                 err = generic_read_oob(device, page_number, oob,
 700                     chip->chip_geom.oob_size, 0);
 701                 if (err) {
 702                         device_printf(device, "%s: cannot allocate oob\n",
 703                             __func__);
 704                         free(oob, M_NAND);
 705                         return (ENOMEM);
 706                 }
 707
 708                 for (j = 0; j < chip->chip_geom.oob_size; j++) {
 709                         if (!oob[j]) {
 710                                 *bad = 1;
 711                                 free(oob, M_NAND);
 712                                 return (0);
 713                         }
 714                 }
 715         }
 716
 717         free(oob, M_NAND);
 718
 719         return (0);
 720 }
 721
 722 static int
 723 send_small_read_page(device_t nand, uint8_t start_command,
 724     uint32_t row, uint32_t column)
 725 {
 726         device_t nandbus = device_get_parent(nand);
 727
 728         if (NANDBUS_SEND_COMMAND(nandbus, start_command))
 729                 return (ENXIO);
 730
 731         if (nand_send_address(nand, row, column, -1))
 732                 return (ENXIO);
 733
 734         if (NANDBUS_START_COMMAND(nandbus))
 735                 return (ENXIO);
 736
 737         return (0);
 738 }
 739
 740
 741 static int
 742 small_read_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 743     uint32_t offset)
 744 {
 745         struct nand_chip *chip;
 746         struct page_stat *pg_stat;
 747         device_t nandbus;
 748         uint32_t row;
 749
 750         nand_debug(NDBG_GEN,"%p small read page %x[%x] at %x", nand, page, len, offset);
 751         chip = device_get_softc(nand);
 752         nandbus = device_get_parent(nand);
 753
 754         if (nand_check_page_boundary(chip, page))
 755                 return (ENXIO);
 756
 757         page_to_row(&chip->chip_geom, page, &row);
 758
 759         if (offset < 256) {
 760                 if (send_small_read_page(nand, NAND_CMD_SMALLA, row, offset))
 761                         return (ENXIO);
 762         } else {
 763                 offset -= 256;
 764                 if (send_small_read_page(nandbus, NAND_CMD_SMALLB, row, offset))
 765                         return (ENXIO);
 766         }
 767
 768         DELAY(chip->t_r);
 769
 770         NANDBUS_READ_BUFFER(nandbus, buf, len);
 771
 772         if (check_fail(nandbus))
 773                 return (ENXIO);
 774
 775         pg_stat = &(chip->pg_stat[page]);
 776         pg_stat->page_raw_read++;
 777
 778         return (0);
 779 }
 780
 781 static int
 782 small_read_oob(device_t nand, uint32_t page, void *buf, uint32_t len,
 783     uint32_t offset)
 784 {
 785         struct nand_chip *chip;
 786         struct page_stat *pg_stat;
 787         device_t nandbus;
 788         uint32_t row;
 789
 790         nand_debug(NDBG_GEN,"%p small read oob %x[%x] at %x", nand, page, len, offset);
 791         chip = device_get_softc(nand);
 792         nandbus = device_get_parent(nand);
 793
 794         if (nand_check_page_boundary(chip, page))
 795                 return (ENXIO);
 796
 797         page_to_row(&chip->chip_geom, page, &row);
 798
 799         if (send_small_read_page(nand, NAND_CMD_SMALLOOB, row, 0))
 800                 return (ENXIO);
 801
 802         DELAY(chip->t_r);
 803
 804         NANDBUS_READ_BUFFER(nandbus, buf, len);
 805
 806         if (check_fail(nandbus))
 807                 return (ENXIO);
 808
 809         pg_stat = &(chip->pg_stat[page]);
 810         pg_stat->page_raw_read++;
 811
 812         return (0);
 813 }
 814
 815 static int
 816 small_program_page(device_t nand, uint32_t page, void* buf, uint32_t len,
 817     uint32_t offset)
 818 {
 819         struct nand_chip *chip;
 820         device_t nandbus;
 821         uint32_t row;
 822
 823         nand_debug(NDBG_GEN,"%p small prog page %x[%x] at %x", nand, page, len, offset);
 824         chip = device_get_softc(nand);
 825         nandbus = device_get_parent(nand);
 826
 827         if (nand_check_page_boundary(chip, page))
 828                 return (ENXIO);
 829
 830         page_to_row(&chip->chip_geom, page, &row);
 831
 832         if (!can_write(nandbus))
 833                 return (ENXIO);
 834
 835         if (offset < 256) {
 836                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLA))
 837                         return (ENXIO);
 838         } else {
 839                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLB))
 840                         return (ENXIO);
 841         }
 842
 843         if (send_start_program_page(nand, row, offset))
 844                 return (ENXIO);
 845
 846         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 847
 848         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 849                 return (ENXIO);
 850
 851         DELAY(chip->t_prog);
 852
 853         if (check_fail(nandbus))
 854                 return (ENXIO);
 855
 856         return (0);
 857 }
 858
 859 static int
 860 small_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 861     uint32_t offset)
 862 {
 863         struct nand_chip *chip;
 864         device_t nandbus;
 865         uint32_t row;
 866
 867         nand_debug(NDBG_GEN,"%p small prog oob %x[%x] at %x", nand, page, len, offset);
 868         chip = device_get_softc(nand);
 869         nandbus = device_get_parent(nand);
 870
 871         if (nand_check_page_boundary(chip, page))
 872                 return (ENXIO);
 873
 874         page_to_row(&chip->chip_geom, page, &row);
 875
 876         if (!can_write(nandbus))
 877                 return (ENXIO);
 878
 879         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLOOB))
 880                 return (ENXIO);
 881
 882         if (send_start_program_page(nand, row, offset))
 883                 return (ENXIO);
 884
 885         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 886
 887         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 888                 return (ENXIO);
 889
 890         DELAY(chip->t_prog);
 891
 892         if (check_fail(nandbus))
 893                 return (ENXIO);
 894
 895         return (0);
 896 }
 897
 898 int
 899 nand_send_address(device_t nand, int32_t row, int32_t col, int8_t id)
 900 {
 901         struct nandbus_ivar *ivar;
 902         device_t nandbus;
 903         uint8_t addr;
 904         int err = 0;
 905         int i;
 906
 907         nandbus = device_get_parent(nand);
 908         ivar = device_get_ivars(nand);
 909
 910         if (id != -1) {
 911                 nand_debug(NDBG_GEN,"send_address: send id %02x", id);
 912                 err = NANDBUS_SEND_ADDRESS(nandbus, id);
 913         }
 914
 915         if (!err && col != -1) {
 916                 for (i = 0; i < ivar->cols; i++, col >>= 8) {
 917                         addr = (uint8_t)(col & 0xff);
 918                         nand_debug(NDBG_GEN,"send_address: send address column "
 919                             "%02x", addr);
 920                         err = NANDBUS_SEND_ADDRESS(nandbus, addr);
 921                         if (err)
 922                                 break;
 923                 }
 924         }
 925
 926         if (!err && row != -1) {
 927                 for (i = 0; i < ivar->rows; i++, row >>= 8) {
 928                         addr = (uint8_t)(row & 0xff);
 929                         nand_debug(NDBG_GEN,"send_address: send address row "
 930                             "%02x", addr);
 931                         err = NANDBUS_SEND_ADDRESS(nandbus, addr);
 932                         if (err)
 933                                 break;
 934                 }
 935         }
 936
 937         return (err);
 938 }
 939
 940 static int
 941 generic_is_blk_bad(device_t dev, uint32_t block, uint8_t *bad)
 942 {
 943         struct nand_chip *chip;
 944         int page_number, err, i;
 945         uint8_t *oob;
 946
 947         chip = device_get_softc(dev);
 948
 949         oob = malloc(chip->chip_geom.oob_size, M_NAND, M_WAITOK);
 950         if (!oob) {
 951                 device_printf(dev, "%s: cannot allocate OOB\n", __func__);
 952                 return (ENOMEM);
 953         }
 954
 955         page_number = block * chip->chip_geom.pgs_per_blk;
 956         *bad = 0;
 957
 958         /* Check OOB of first and second page */
 959         for (i = 0; i < 2; i++) {
 960                 err = NAND_READ_OOB(dev, page_number + i, oob,
 961                     chip->chip_geom.oob_size, 0);
 962                 if (err) {
 963                         device_printf(dev, "%s: cannot allocate OOB\n",
 964                             __func__);
 965                         free(oob, M_NAND);
 966                         return (ENOMEM);
 967                 }
 968
 969                 if (!oob[0]) {
 970                         *bad = 1;
 971                         free(oob, M_NAND);
 972                         return (0);
 973                 }
 974         }
 975
 976         free(oob, M_NAND);
 977
 978         return (0);
 979 }
 980
 981 static int
 982 generic_get_ecc(device_t dev, void *buf, void *ecc, int *needwrite)
 983 {
 984         struct nand_chip *chip = device_get_softc(dev);
 985         struct chip_geom *cg = &chip->chip_geom;
 986
 987         return (NANDBUS_GET_ECC(device_get_parent(dev), buf, cg->page_size,
 988             ecc, needwrite));
 989 }
 990
 991 static int
 992 generic_correct_ecc(device_t dev, void *buf, void *readecc, void *calcecc)
 993 {
 994         struct nand_chip *chip = device_get_softc(dev);
 995         struct chip_geom *cg = &chip->chip_geom;
 996
 997         return (NANDBUS_CORRECT_ECC(device_get_parent(dev), buf,
 998             cg->page_size, readecc, calcecc));
 999 }
1000
1001
1002 #if 0
1003 int
1004 nand_chng_read_col(device_t nand, uint32_t col, void *buf, size_t len)
1005 {
1006         struct nand_chip *chip;
1007         device_t nandbus;
1008
1009         chip = device_get_softc(nand);
1010         nandbus = device_get_parent(nand);
1011
1012         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL))
1013                 return (ENXIO);
1014
1015         if (NANDBUS_SEND_ADDRESS(nandbus, -1, col, -1))
1016                 return (ENXIO);
1017
1018         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL_END))
1019                 return (ENXIO);
1020
1021         if (NANDBUS_START_COMMAND(nandbus))
1022                 return (ENXIO);
1023
1024         if (buf != NULL && len > 0)
1025                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1026
1027         return (0);
1028 }
1029
1030 int
1031 nand_chng_write_col(device_t dev, uint32_t col, void *buf,
1032     size_t len)
1033 {
1034         struct nand_chip *chip;
1035         device_t nandbus;
1036
1037         chip = device_get_softc(dev);
1038         nandbus = device_get_parent(dev);
1039
1040         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_WRITE_COL))
1041                 return (ENXIO);
1042
1043         if (NANDBUS_SEND_ADDRESS(nandbus, -1, col, -1))
1044                 return (ENXIO);
1045
1046         if (buf != NULL && len > 0)
1047                 NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1048
1049         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL_END))
1050                 return (ENXIO);
1051
1052         if (NANDBUS_START_COMMAND(nandbus))
1053                 return (ENXIO);
1054
1055         return (0);
1056 }
1057
1058 int
1059 nand_copyback_read(device_t dev, uint32_t page, uint32_t col,
1060     void *buf, size_t len)
1061 {
1062         struct nand_chip *chip;
1063         struct page_stat *pg_stat;
1064         device_t nandbus;
1065         uint32_t row;
1066
1067         nand_debug(NDBG_GEN," raw read page %x[%x] at %x", page, col, len);
1068         chip = device_get_softc(dev);
1069         nandbus = device_get_parent(dev);
1070
1071         if (nand_check_page_boundary(chip, page))
1072                 return (ENXIO);
1073
1074         page_to_row(&chip->chip_geom, page, &row);
1075
1076         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_CPBK, row, 0))
1077                 return (ENXIO);
1078
1079         DELAY(chip->t_r);
1080         if (check_fail(nandbus))
1081                 return (ENXIO);
1082
1083         if (buf != NULL && len > 0)
1084                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1085
1086         pg_stat = &(chip->pg_stat[page]);
1087         pg_stat->page_raw_read++;
1088
1089         return (0);
1090 }
1091
1092 int
1093 nand_copyback_prog(device_t dev, uint32_t page, uint32_t col,
1094     void *buf, size_t len)
1095 {
1096         struct nand_chip *chip;
1097         struct page_stat *pg_stat;
1098         device_t nandbus;
1099         uint32_t row;
1100
1101         nand_debug(NDBG_GEN,"copyback prog page %x[%x]",  page, len);
1102         chip = device_get_softc(dev);
1103         nandbus = device_get_parent(dev);
1104
1105         if (nand_check_page_boundary(chip, page))
1106                 return (ENXIO);
1107
1108         page_to_row(&chip->chip_geom, page, &row);
1109
1110         if (!can_write(nandbus))
1111                 return (ENXIO);
1112
1113         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_WRITE_COL))
1114                 return (ENXIO);
1115
1116         if (NANDBUS_SEND_ADDRESS(nandbus, row, col, -1))
1117                 return (ENXIO);
1118
1119         if (buf != NULL && len > 0)
1120                 NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1121
1122         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
1123                 return (ENXIO);
1124
1125         DELAY(chip->t_prog);
1126
1127         if (check_fail(nandbus))
1128                 return (ENXIO);
1129
1130         pg_stat = &(chip->pg_stat[page]);
1131         pg_stat->page_raw_written++;
1132
1133         return (0);
1134 }
1135
1136 int
1137 nand_copyback_prog_intlv(device_t dev, uint32_t page)
1138 {
1139         struct nand_chip *chip;
1140         struct page_stat *pg_stat;
1141         device_t nandbus;
1142         uint32_t row;
1143
1144         nand_debug(NDBG_GEN,"cache prog page %x", page);
1145         chip = device_get_softc(dev);
1146         nandbus = device_get_parent(dev);
1147
1148         if (nand_check_page_boundary(chip, page))
1149                 return (ENXIO);
1150
1151         page_to_row(&chip->chip_geom, page, &row);
1152
1153         if (!can_write(nandbus))
1154                 return (ENXIO);
1155
1156         if (send_start_program_page(nand, row, 0))
1157                 return (ENXIO);
1158
1159         if (send_end_program_page(nandbus, NAND_CMD_PROG_INTLV))
1160                 return (ENXIO);
1161
1162         DELAY(chip->t_prog);
1163
1164         if (check_fail(nandbus))
1165                 return (ENXIO);
1166
1167         pg_stat = &(chip->pg_stat[page]);
1168         pg_stat->page_raw_written++;
1169
1170         return (0);
1171 }
1172
1173 int
1174 nand_prog_cache(device_t dev, uint32_t page, uint32_t col,
1175     void *buf, size_t len, uint8_t end)
1176 {
1177         struct nand_chip *chip;
1178         struct page_stat *pg_stat;
1179         device_t nandbus;
1180         uint32_t row;
1181         uint8_t command;
1182
1183         nand_debug(NDBG_GEN,"cache prog page %x[%x]",  page, len);
1184         chip = device_get_softc(dev);
1185         nandbus = device_get_parent(dev);
1186
1187         if (nand_check_page_boundary(chip, page))
1188                 return (ENXIO);
1189
1190         page_to_row(&chip->chip_geom, page, &row);
1191
1192         if (!can_write(nandbus))
1193                 return (ENXIO);
1194
1195         if (send_start_program_page(dev, row, 0))
1196                 return (ENXIO);
1197
1198         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1199
1200         if (end)
1201                 command = NAND_CMD_PROG_END;
1202         else
1203                 command = NAND_CMD_PROG_CACHE;
1204
1205         if (send_end_program_page(nandbus, command))
1206                 return (ENXIO);
1207
1208         DELAY(chip->t_prog);
1209
1210         if (check_fail(nandbus))
1211                 return (ENXIO);
1212
1213         pg_stat = &(chip->pg_stat[page]);
1214         pg_stat->page_raw_written++;
1215
1216         return (0);
1217 }
1218
1219 int
1220 nand_read_cache(device_t dev, uint32_t page, uint32_t col,
1221     void *buf, size_t len, uint8_t end)
1222 {
1223         struct nand_chip *chip;
1224         struct page_stat *pg_stat;
1225         device_t nandbus;
1226         uint32_t row;
1227         uint8_t command;
1228
1229         nand_debug(NDBG_GEN,"cache read page %x[%x] ", page, len);
1230         chip = device_get_softc(dev);
1231         nandbus = device_get_parent(dev);
1232
1233         if (nand_check_page_boundary(chip, page))
1234                 return (ENXIO);
1235
1236         page_to_row(&chip->chip_geom, page, &row);
1237
1238         if (page != -1) {
1239                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_READ))
1240                         return (ENXIO);
1241
1242                 if (NANDBUS_SEND_ADDRESS(nandbus, row, col, -1))
1243                         return (ENXIO);
1244         }
1245
1246         if (end)
1247                 command = NAND_CMD_READ_CACHE_END;
1248         else
1249                 command = NAND_CMD_READ_CACHE;
1250
1251         if (NANDBUS_SEND_COMMAND(nandbus, command))
1252                 return (ENXIO);
1253
1254         if (NANDBUS_START_COMMAND(nandbus))
1255                 return (ENXIO);
1256
1257         DELAY(chip->t_r);
1258         if (check_fail(nandbus))
1259                 return (ENXIO);
1260
1261         if (buf != NULL && len > 0)
1262                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1263
1264         pg_stat = &(chip->pg_stat[page]);
1265         pg_stat->page_raw_read++;
1266
1267         return (0);
1268 }
1269
1270 int
1271 nand_get_feature(device_t dev, uint8_t feat, void *buf)
1272 {
1273         struct nand_chip *chip;
1274         device_t nandbus;
1275
1276         nand_debug(NDBG_GEN,"nand get feature");
1277
1278         chip = device_get_softc(dev);
1279         nandbus = device_get_parent(dev);
1280
1281         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_GET_FEATURE))
1282                 return (ENXIO);
1283
1284         if (NANDBUS_SEND_ADDRESS(nandbus, -1, -1, feat))
1285                 return (ENXIO);
1286
1287         if (NANDBUS_START_COMMAND(nandbus))
1288                 return (ENXIO);
1289
1290         DELAY(chip->t_r);
1291         NANDBUS_READ_BUFFER(nandbus, buf, 4);
1292
1293         return (0);
1294 }
1295
1296 int
1297 nand_set_feature(device_t dev, uint8_t feat, void *buf)
1298 {
1299         struct nand_chip *chip;
1300         device_t nandbus;
1301
1302         nand_debug(NDBG_GEN,"nand set feature");
1303
1304         chip = device_get_softc(dev);
1305         nandbus = device_get_parent(dev);
1306
1307         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SET_FEATURE))
1308                 return (ENXIO);
1309
1310         if (NANDBUS_SEND_ADDRESS(nandbus, -1, -1, feat))
1311                 return (ENXIO);
1312
1313         NANDBUS_WRITE_BUFFER(nandbus, buf, 4);
1314
1315         if (NANDBUS_START_COMMAND(nandbus))
1316                 return (ENXIO);
1317
1318         return (0);
1319 }
1320 #endif