]> CyberLeo.Net >> Repos - FreeBSD/stable/10.git/blob - sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
MFC r316485
[FreeBSD/stable/10.git] / sys / dev / qlnx / qlnxe / ecore_init_fw_funcs.h
1 /*
2  * Copyright (c) 2017-2018 Cavium, Inc. 
3  * All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions
7  *  are met:
8  *
9  *  1. Redistributions of source code must retain the above copyright
10  *     notice, this list of conditions and the following disclaimer.
11  *  2. Redistributions in binary form must reproduce the above copyright
12  *     notice, this list of conditions and the following disclaimer in the
13  *     documentation and/or other materials provided with the distribution.
14  *
15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  *  POSSIBILITY OF SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  *
29  */
30
31 #ifndef _INIT_FW_FUNCS_H
32 #define _INIT_FW_FUNCS_H
33 /* Forward declarations */
34
35 struct init_qm_pq_params;
36
37 /**
38  * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
39  *
40  * Returns the required host memory size in 4KB units.
41  * Must be called before all QM init HSI functions.
42  *
43  * @param pf_id -       physical function ID
44  * @param num_pf_cids - number of connections used by this PF
45  * @param num_vf_cids - number of connections used by VFs of this PF
46  * @param num_tids -    number of tasks used by this PF
47  * @param num_pf_pqs -  number of PQs used by this PF
48  * @param num_vf_pqs -  number of PQs used by VFs of this PF
49  *
50  * @return The required host memory size in 4KB units.
51  */
52 u32 ecore_qm_pf_mem_size(u8 pf_id,
53                                                  u32 num_pf_cids,
54                                                  u32 num_vf_cids,
55                                                  u32 num_tids,
56                                                  u16 num_pf_pqs,
57                                                  u16 num_vf_pqs);
58
59 /**
60  * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the
61  * engine phase.
62  *
63  * @param p_hwfn -                        HW device data
64  * @param max_ports_per_engine -  max number of ports per engine in HW
65  * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
66  * @param pf_rl_en -              enable per-PF rate limiters
67  * @param pf_wfq_en -             enable per-PF WFQ
68  * @param vport_rl_en -           enable per-VPORT rate limiters
69  * @param vport_wfq_en -          enable per-VPORT WFQ
70  * @param port_params -           array of size MAX_NUM_PORTS with parameters
71  *                                for each port
72  *
73  * @return 0 on success, -1 on error.
74  */
75 int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn,
76                                                         u8 max_ports_per_engine,
77                                                         u8 max_phys_tcs_per_port,
78                                                         bool pf_rl_en,
79                                                         bool pf_wfq_en,
80                                                         bool vport_rl_en,
81                                                         bool vport_wfq_en,
82                                                         struct init_qm_port_params port_params[MAX_NUM_PORTS]);
83
84 /**
85  * @brief ecore_qm_pf_rt_init - Prepare QM runtime init values for the PF phase
86  *
87  * @param p_hwfn -                        HW device data
88  * @param p_ptt -                         ptt window used for writing the registers
89  * @param port_id -               port ID
90  * @param pf_id -                 PF ID
91  * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
92  * @param is_first_pf -           1 = first PF in engine, 0 = othwerwise
93  * @param num_pf_cids -           number of connections used by this PF
94  * @param num_vf_cids -           number of connections used by VFs of this PF
95  * @param num_tids -              number of tasks used by this PF
96  * @param start_pq -              first Tx PQ ID associated with this PF
97  * @param num_pf_pqs -            number of Tx PQs associated with this PF
98  *                                (non-VF)
99  * @param num_vf_pqs -            number of Tx PQs associated with a VF
100  * @param start_vport -           first VPORT ID associated with this PF
101  * @param num_vports -            number of VPORTs associated with this PF
102  * @param pf_wfq -                WFQ weight. if PF WFQ is globally disabled,
103  *                                the weight must be 0. otherwise, the weight
104  *                                must be non-zero.
105  * @param pf_rl -                 rate limit in Mb/sec units. a value of 0
106  *                                means don't configure. ignored if PF RL is
107  *                                globally disabled.
108  * @param pq_params -             array of size (num_pf_pqs + num_vf_pqs) with
109  *                                parameters for each Tx PQ associated with the
110  *                                specified PF.
111  * @param vport_params -          array of size num_vports with parameters for
112  *                                each associated VPORT.
113  *
114  * @return 0 on success, -1 on error.
115  */
116 int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn,
117                                                 struct ecore_ptt *p_ptt,
118                                                 u8 port_id,
119                                                 u8 pf_id,
120                                                 u8 max_phys_tcs_per_port,
121                                                 bool is_first_pf,
122                                                 u32 num_pf_cids,
123                                                 u32 num_vf_cids,
124                                                 u32 num_tids,
125                                                 u16 start_pq,
126                                                 u16 num_pf_pqs,
127                                                 u16 num_vf_pqs,
128                                                 u8 start_vport,
129                                                 u8 num_vports,
130                                                 u16 pf_wfq,
131                                                 u32 pf_rl,
132                                                 struct init_qm_pq_params *pq_params,
133                                                 struct init_qm_vport_params *vport_params);
134
135 /**
136  * @brief ecore_init_pf_wfq - Initializes the WFQ weight of the specified PF
137  *
138  * @param p_hwfn -         HW device data
139  * @param p_ptt -          ptt window used for writing the registers
140  * @param pf_id -  PF ID
141  * @param pf_wfq - WFQ weight. Must be non-zero.
142  *
143  * @return 0 on success, -1 on error.
144  */
145 int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn,
146                                           struct ecore_ptt *p_ptt,
147                                           u8 pf_id,
148                                           u16 pf_wfq);
149
150 /**
151  * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF
152  *
153  * @param p_hwfn
154  * @param p_ptt -   ptt window used for writing the registers
155  * @param pf_id - PF ID
156  * @param pf_rl - rate limit in Mb/sec units
157  *
158  * @return 0 on success, -1 on error.
159  */
160 int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn,
161                                          struct ecore_ptt *p_ptt,
162                                          u8 pf_id,
163                                          u32 pf_rl);
164
165 /**
166  * @brief ecore_init_vport_wfq - Initializes the WFQ weight of the specified VPORT
167  *
168  * @param p_hwfn -                 HW device data
169  * @param p_ptt -                  ptt window used for writing the registers
170  * @param first_tx_pq_id - An array containing the first Tx PQ ID associated
171  *                         with the VPORT for each TC. This array is filled by
172  *                         ecore_qm_pf_rt_init
173  * @param vport_wfq -      WFQ weight. Must be non-zero.
174  *
175  * @return 0 on success, -1 on error.
176  */
177 int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn,
178                                                  struct ecore_ptt *p_ptt,
179                                                  u16 first_tx_pq_id[NUM_OF_TCS],
180                                                  u16 vport_wfq);
181
182 /**
183  * @brief ecore_init_vport_rl - Initializes the rate limit of the specified
184  * VPORT.
185  *
186  * @param p_hwfn -           HW device data
187  * @param p_ptt -            ptt window used for writing the registers
188  * @param vport_id - VPORT ID
189  * @param vport_rl - rate limit in Mb/sec units
190  *
191  * @return 0 on success, -1 on error.
192  */
193 int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn,
194                                                 struct ecore_ptt *p_ptt,
195                                                 u8 vport_id,
196                                                 u32 vport_rl);
197
198 /**
199  * @brief ecore_send_qm_stop_cmd - Sends a stop command to the QM
200  *
201  * @param p_hwfn -                 HW device data
202  * @param p_ptt -                  ptt window used for writing the registers
203  * @param is_release_cmd - true for release, false for stop.
204  * @param is_tx_pq -       true for Tx PQs, false for Other PQs.
205  * @param start_pq -       first PQ ID to stop
206  * @param num_pqs -        Number of PQs to stop, starting from start_pq.
207  *
208  * @return bool, true if successful, false if timeout occured while waiting for
209  * QM command done.
210  */
211 bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn,
212                                                         struct ecore_ptt *p_ptt,
213                                                         bool is_release_cmd,
214                                                         bool is_tx_pq,
215                                                         u16 start_pq,
216                                                         u16 num_pqs);
217
218 #ifndef UNUSED_HSI_FUNC
219
220 /**
221  * @brief ecore_init_nig_ets - Initializes the NIG ETS arbiter
222  *
223  * Based on weight/priority requirements per-TC.
224  *
225  * @param p_hwfn -   HW device data
226  * @param p_ptt -   ptt window used for writing the registers.
227  * @param req -   the NIG ETS initialization requirements.
228  * @param is_lb - if set, the loopback port arbiter is initialized, otherwise
229  *                the physical port arbiter is initialized. The pure-LB TC
230  *                requirements are ignored when is_lb is cleared.
231  */
232 void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn,
233                                                 struct ecore_ptt *p_ptt,
234                                                 struct init_ets_req* req,
235                                                 bool is_lb);
236
237 /**
238  * @brief ecore_init_nig_lb_rl - Initializes the NIG LB RLs
239  *
240  * Based on global and per-TC rate requirements
241  *
242  * @param p_hwfn -      HW device data
243  * @param p_ptt - ptt window used for writing the registers.
244  * @param req - the NIG LB RLs initialization requirements.
245  */
246 void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn,
247                                                   struct ecore_ptt *p_ptt,
248                                                   struct init_nig_lb_rl_req* req);
249
250 #endif /* UNUSED_HSI_FUNC */
251
252 /**
253  * @brief ecore_init_nig_pri_tc_map - Initializes the NIG priority to TC map.
254  *
255  * Assumes valid arguments.
256  *
257  * @param p_hwfn -      HW device data
258  * @param p_ptt - ptt window used for writing the registers.
259  * @param req - required mapping from prioirties to TCs.
260  */
261 void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn,
262                                                            struct ecore_ptt *p_ptt,
263                                                            struct init_nig_pri_tc_map_req* req);
264
265 #ifndef UNUSED_HSI_FUNC
266
267 /**
268  * @brief ecore_init_prs_ets - Initializes the PRS Rx ETS arbiter
269  *
270  * Based on weight/priority requirements per-TC.
271  *
272  * @param p_hwfn -      HW device data
273  * @param p_ptt - ptt window used for writing the registers.
274  * @param req - the PRS ETS initialization requirements.
275  */
276 void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn,
277                                                 struct ecore_ptt *p_ptt,
278                                                 struct init_ets_req* req);
279
280 #endif /* UNUSED_HSI_FUNC */
281 #ifndef UNUSED_HSI_FUNC
282
283 /**
284  * @brief ecore_init_brb_ram - Initializes BRB RAM sizes per TC.
285  *
286  * Based on weight/priority requirements per-TC.
287  *
288  * @param p_hwfn -   HW device data
289  * @param p_ptt - ptt window used for writing the registers.
290  * @param req -   the BRB RAM initialization requirements.
291  */
292 void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn,
293                                                 struct ecore_ptt *p_ptt,
294                                                 struct init_brb_ram_req* req);
295
296 #endif /* UNUSED_HSI_FUNC */
297 #ifndef UNUSED_HSI_FUNC
298
299 /**
300  * @brief ecore_set_engine_mf_ovlan_eth_type - Initializes Nig,Prs,Pbf and llh
301  * ethType Regs to  input ethType. Should Be called once per engine if engine
302  * is in BD mode.
303  *
304  * @param p_hwfn -          HW device data
305  * @param p_ptt -     ptt window used for writing the registers.
306  * @param ethType - etherType to configure
307  */
308 void ecore_set_engine_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
309                                                                                 struct ecore_ptt *p_ptt,
310                                                                                 u32 ethType);
311
312 /**
313  * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
314  * input ethType. should Be called once per port.
315  *
316  * @param p_hwfn -     HW device data
317  * @param p_ptt -     ptt window used for writing the registers.
318  * @param ethType - etherType to configure
319  */
320 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
321                                                                           struct ecore_ptt *p_ptt,
322                                                                           u32 ethType);
323
324 #endif /* UNUSED_HSI_FUNC */
325
326 /**
327  * @brief ecore_set_vxlan_dest_port - Initializes vxlan tunnel destination udp
328  * port.
329  *
330  * @param p_hwfn -            HW device data
331  * @param p_ptt -       ptt window used for writing the registers.
332  * @param dest_port - vxlan destination udp port.
333  */
334 void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn,
335                                struct ecore_ptt *p_ptt,
336                                u16 dest_port);
337
338 /**
339  * @brief ecore_set_vxlan_enable - Enable or disable VXLAN tunnel in HW
340  *
341  * @param p_hwfn -               HW device data
342  * @param p_ptt -                ptt window used for writing the registers.
343  * @param vxlan_enable - vxlan enable flag.
344  */
345 void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn,
346                             struct ecore_ptt *p_ptt,
347                             bool vxlan_enable);
348
349 /**
350  * @brief ecore_set_gre_enable - Enable or disable GRE tunnel in HW
351  *
352  * @param p_hwfn -                 HW device data
353  * @param p_ptt -                  ptt window used for writing the registers.
354  * @param eth_gre_enable - eth GRE enable enable flag.
355  * @param ip_gre_enable -  IP GRE enable enable flag.
356  */
357 void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn,
358                           struct ecore_ptt *p_ptt,
359                           bool eth_gre_enable,
360                           bool ip_gre_enable);
361
362 /**
363  * @brief ecore_set_geneve_dest_port - Initializes geneve tunnel destination
364  * udp port.
365  *
366  * @param p_hwfn -            HW device data
367  * @param p_ptt -       ptt window used for writing the registers.
368  * @param dest_port - geneve destination udp port.
369  */
370 void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn,
371                                 struct ecore_ptt *p_ptt,
372                                 u16 dest_port);
373
374 /**
375  * @brief ecore_set_geneve_enable - Enable or disable GRE tunnel in HW
376  *
377  * @param p_hwfn -                      HW device data
378  * @param p_ptt -                       ptt window used for writing the registers.
379  * @param eth_geneve_enable -   eth GENEVE enable enable flag.
380  * @param ip_geneve_enable -    IP GENEVE enable enable flag.
381   */
382 void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn,
383                              struct ecore_ptt *p_ptt,
384                              bool eth_geneve_enable,
385                              bool ip_geneve_enable);
386
387 #ifndef UNUSED_HSI_FUNC
388
389 /**
390  * @brief ecore_set_gft_event_id_cm_hdr - Configure GFT event id and cm header
391  *
392  * @param p_hwfn - HW device data
393  * @param p_ptt - ptt window used for writing the registers.
394  */
395 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn,
396                                                                    struct ecore_ptt *p_ptt);
397
398 /**
399  * @brief ecore_set_rfs_mode_disable - Disable and configure HW for RFS
400  *
401  * @param p_hwfn -   HW device data
402  * @param p_ptt -   ptt window used for writing the registers.
403  * @param pf_id - pf on which to disable RFS.
404  */
405 void ecore_set_rfs_mode_disable(struct ecore_hwfn *p_hwfn,
406                                                                 struct ecore_ptt *p_ptt,
407                                                                 u16 pf_id);
408
409 /**
410  * @brief ecore_set_rfs_mode_enable - Enable and configure HW for RFS
411  *                           
412  * @param p_hwfn -        HW device data
413  * @param p_ptt -   ptt window used for writing the registers.
414  * @param pf_id - pf on which to enable RFS.
415  * @param tcp -   set profile tcp packets.
416  * @param udp -   set profile udp  packet.
417  * @param ipv4 -  set profile ipv4 packet.
418  * @param ipv6 -  set profile ipv6 packet.
419  */
420 void ecore_set_rfs_mode_enable(struct ecore_hwfn *p_hwfn,
421         struct ecore_ptt *p_ptt,
422         u16 pf_id,
423         bool tcp,
424         bool udp,
425         bool ipv4,
426         bool ipv6);
427
428 #endif /* UNUSED_HSI_FUNC */
429
430 /**
431  * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
432  * used before first ETH queue started.
433  *
434  * @param p_hwfn -               HW device data
435  * @param p_ptt -                ptt window used for writing the registers. Don't care
436  *                       if runtime_init used.
437  * @param mode -         VF zone size mode. Use enum vf_zone_size_mode.
438  * @param runtime_init - Set 1 to init runtime registers in engine phase.
439  *                       Set 0 if VF zone size mode configured after engine
440  *                       phase.
441  */
442 void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn,
443                                                                         struct ecore_ptt *p_ptt,
444                                                                         u16 mode,
445                                                                         bool runtime_init);
446
447 /**
448  * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by
449  * VF zone size mode.
450  *
451  * @param p_hwfn -                      HW device data
452  * @param stat_cnt_id -         statistic counter id
453  * @param vf_zone_size_mode -   VF zone size mode. Use enum vf_zone_size_mode.
454  */
455 u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
456                                                                            u16 stat_cnt_id,
457                                                                            u16 vf_zone_size_mode);
458
459 /**
460  * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
461  * size mode.
462  *
463  * @param p_hwfn -                    HW device data
464  * @param vf_id -             vf id.
465  * @param vf_queue_id -       per VF rx queue id.
466  * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode.
467  */
468 u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn,
469                                                                                  u8 vf_id,
470                                                                                  u8 vf_queue_id,
471                                                                                  u16 vf_zone_size_mode);
472
473 /**
474  * @brief ecore_enable_context_validation - Enable and configure context
475  * validation.
476  *
477  * @param p_hwfn -   HW device data
478  * @param p_ptt - ptt window used for writing the registers.
479  */
480 void ecore_enable_context_validation(struct ecore_hwfn *p_hwfn,
481                                                                          struct ecore_ptt *p_ptt);
482
483 /**
484 * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for
485 * session context.
486 *
487 * @param p_ctx_mem -    pointer to context memory.
488 * @param ctx_size -     context size.
489 * @param ctx_type -     context type.
490 * @param cid -          context cid.
491 */
492 void ecore_calc_session_ctx_validation(struct ecore_hwfn * p_hwfn,
493                                        void *p_ctx_mem,
494                                        u16 ctx_size,
495                                        u8 ctx_type,
496                                        u32 cid);
497
498 /**
499 * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task
500 * context.
501 *
502 * @param p_hwfn -                   HW device data
503 * @param p_ctx_mem -    pointer to context memory.
504 * @param ctx_size -     context size.
505 * @param ctx_type -     context type.
506 * @param tid -              context tid.
507 */
508 void ecore_calc_task_ctx_validation(struct ecore_hwfn * p_hwfn,
509                                     void *p_ctx_mem,
510                                     u16 ctx_size,
511                                     u8 ctx_type,
512                                     u32 tid);
513
514 /**
515 * @brief ecore_memset_session_ctx - Memset session context to 0 while
516 * preserving validation bytes.
517 *
518 * @param p_hwfn -                 HW device data
519 * @param p_ctx_mem - pointer to context memory.
520 * @param ctx_size -  size to initialzie.
521 * @param ctx_type -  context type.
522 */
523 void ecore_memset_session_ctx(void *p_ctx_mem,
524                               u32 ctx_size,
525                               u8 ctx_type);
526
527 /**
528 * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving
529 * validation bytes.
530 *
531 * @param p_ctx_mem - pointer to context memory.
532 * @param ctx_size -  size to initialzie.
533 * @param ctx_type -  context type.
534 */
535 void ecore_memset_task_ctx(void *p_ctx_mem,
536                            u32 ctx_size,
537                            u8 ctx_type);
538
539 #endif